diff --git a/Core/Inc/RFID.h b/Core/Inc/RFID.h new file mode 100644 index 0000000..ab647c2 --- /dev/null +++ b/Core/Inc/RFID.h @@ -0,0 +1,196 @@ +/* + * RFID.h + * + * Created on: Jan 16, 2022 + * Author: hussam + */ + + + +#ifndef RFID_H_ +#define RFID_H_ + + +#include "stdbool.h" +#include "stdint.h" + + +#define MFRC522_CS_LOW MFRC522_CS_PORT->BSRRH = MFRC522_CS_PIN; +#define MFRC522_CS_HIGH MFRC522_CS_PORT->BSRRL = MFRC522_CS_PIN; + +/* MFRC522 Commands */ +#define PCD_IDLE 0x00 //NO action; Cancel the current command +#define PCD_AUTHENT 0x0E //Authentication Key +#define PCD_RECEIVE 0x08 //Receive Data +#define PCD_TRANSMIT 0x04 //Transmit data +#define PCD_TRANSCEIVE 0x0C //Transmit and receive data, +#define PCD_RESETPHASE 0x0F //Reset +#define PCD_CALCCRC 0x03 //CRC Calculate + +/* Mifare_One card command word */ +#define PICC_REQIDL 0x26 // find the antenna area does not enter hibernation +#define PICC_REQALL 0x52 // find all the cards antenna area +#define PICC_ANTICOLL 0x93 // anti-collision +#define PICC_SElECTTAG 0x93 // election card +#define PICC_AUTHENT1A 0x60 // authentication key A +#define PICC_AUTHENT1B 0x61 // authentication key B +#define PICC_READ 0x30 // Read Block +#define PICC_WRITE 0xA0 // write block +#define PICC_DECREMENT 0xC0 // debit +#define PICC_INCREMENT 0xC1 // recharge +#define PICC_RESTORE 0xC2 // transfer block data to the buffer +#define PICC_TRANSFER 0xB0 // save the data in the buffer +#define PICC_HALT 0x50 // Sleep + +/* MFRC522 Registers */ +//Page 0: Command and Status +#define MFRC522_REG_RESERVED00 0x00 +#define MFRC522_REG_COMMAND 0x01 +#define MFRC522_REG_COMM_IE_N 0x02 +#define MFRC522_REG_DIV1_EN 0x03 +#define MFRC522_REG_COMM_IRQ 0x04 +#define MFRC522_REG_DIV_IRQ 0x05 +#define MFRC522_REG_ERROR 0x06 +#define MFRC522_REG_STATUS1 0x07 +#define MFRC522_REG_STATUS2 0x08 +#define MFRC522_REG_FIFO_DATA 0x09 +#define MFRC522_REG_FIFO_LEVEL 0x0A +#define MFRC522_REG_WATER_LEVEL 0x0B +#define MFRC522_REG_CONTROL 0x0C +#define MFRC522_REG_BIT_FRAMING 0x0D +#define MFRC522_REG_COLL 0x0E +#define MFRC522_REG_RESERVED01 0x0F +//Page 1: Command +#define MFRC522_REG_RESERVED10 0x10 +#define MFRC522_REG_MODE 0x11 +#define MFRC522_REG_TX_MODE 0x12 +#define MFRC522_REG_RX_MODE 0x13 +#define MFRC522_REG_TX_CONTROL 0x14 +#define MFRC522_REG_TX_AUTO 0x15 +#define MFRC522_REG_TX_SELL 0x16 +#define MFRC522_REG_RX_SELL 0x17 +#define MFRC522_REG_RX_THRESHOLD 0x18 +#define MFRC522_REG_DEMOD 0x19 +#define MFRC522_REG_RESERVED11 0x1A +#define MFRC522_REG_RESERVED12 0x1B +#define MFRC522_REG_MIFARE 0x1C +#define MFRC522_REG_RESERVED13 0x1D +#define MFRC522_REG_RESERVED14 0x1E +#define MFRC522_REG_SERIALSPEED 0x1F +//Page 2: CFG +#define MFRC522_REG_RESERVED20 0x20 +#define MFRC522_REG_CRC_RESULT_M 0x21 +#define MFRC522_REG_CRC_RESULT_L 0x22 +#define MFRC522_REG_RESERVED21 0x23 +#define MFRC522_REG_MOD_WIDTH 0x24 +#define MFRC522_REG_RESERVED22 0x25 +#define MFRC522_REG_RF_CFG 0x26 +#define MFRC522_REG_GS_N 0x27 +#define MFRC522_REG_CWGS_PREG 0x28 +#define MFRC522_REG__MODGS_PREG 0x29 +#define MFRC522_REG_T_MODE 0x2A +#define MFRC522_REG_T_PRESCALER 0x2B +#define MFRC522_REG_T_RELOAD_H 0x2C +#define MFRC522_REG_T_RELOAD_L 0x2D +#define MFRC522_REG_T_COUNTER_VALUE_H 0x2E +#define MFRC522_REG_T_COUNTER_VALUE_L 0x2F +//Page 3:TestRegister +#define MFRC522_REG_RESERVED30 0x30 +#define MFRC522_REG_TEST_SEL1 0x31 +#define MFRC522_REG_TEST_SEL2 0x32 +#define MFRC522_REG_TEST_PIN_EN 0x33 +#define MFRC522_REG_TEST_PIN_VALUE 0x34 +#define MFRC522_REG_TEST_BUS 0x35 +#define MFRC522_REG_AUTO_TEST 0x36 +#define MFRC522_REG_VERSION 0x37 +#define MFRC522_REG_ANALOG_TEST 0x38 +#define MFRC522_REG_TEST_ADC1 0x39 +#define MFRC522_REG_TEST_ADC2 0x3A +#define MFRC522_REG_TEST_ADC0 0x3B +#define MFRC522_REG_RESERVED31 0x3C +#define MFRC522_REG_RESERVED32 0x3D +#define MFRC522_REG_RESERVED33 0x3E +#define MFRC522_REG_RESERVED34 0x3F +//Dummy byte +#define MFRC522_DUMMY 0x00 + +#define MFRC522_MAX_LEN 16 + + +/** + * @brief initialize function + */ +void rc522_init(void); + +/** + * @brief read register + */ +uint8_t rc522_regRead8(uint8_t reg); + +/** + * @brief write register + */ +void rc522_regWrite8(uint8_t reg, uint8_t data8); + +/** + * @brief set bit + */ +void rc522_setBit(uint8_t reg, uint8_t mask); + +/** + * @brief clear bit + */ +void rc522_clearBit(uint8_t reg, uint8_t mask); + +/** + * @brief reset function + */ +void rc522_reset(void); + +/** + * @brief Antenna ON + */ +void rc522_antennaON(void); + +/** + * @brief Check card + */ +bool rc522_checkCard(uint8_t *id); + +/** + * @brief Request function + */ +bool rc522_request(uint8_t reqMode, uint8_t *tagType); + +/** + * @brief to Card + */ +bool rc522_toCard( + uint8_t command, + uint8_t* sendData, + uint8_t sendLen, + uint8_t* backData, + uint16_t* backLen); + +/** + * @brief Anti-Collis + */ +bool rc522_antiColl(uint8_t* serNum); + +/** + * @brief Halt + */ +void rc522_halt(void); + +/** + * @brief calculate CRC + */ +void rc522_calculateCRC(uint8_t* pIndata, uint8_t len, uint8_t* pOutData); + +/** + * @brief compare IDs + */ +bool rc522_compareIds(uint8_t *idCurrent, uint8_t *idReference); + + +#endif /* RFID_H_ */ diff --git a/Core/Inc/main.h b/Core/Inc/main.h index aad5768..02b2994 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -54,11 +54,14 @@ void Error_Handler(void); /* USER CODE BEGIN EFP */ +extern SPI_HandleTypeDef hspi1; /* USER CODE END EFP */ /* Private defines -----------------------------------------------------------*/ #define INT_Pin GPIO_PIN_1 #define INT_GPIO_Port GPIOA +#define RFID_CS_Pin GPIO_PIN_4 +#define RFID_CS_GPIO_Port GPIOA #define HALL_Pin GPIO_PIN_0 #define HALL_GPIO_Port GPIOB #define CLOSE_Pin GPIO_PIN_1 diff --git a/Core/Src/RFID.c b/Core/Src/RFID.c new file mode 100644 index 0000000..42a72fb --- /dev/null +++ b/Core/Src/RFID.c @@ -0,0 +1,341 @@ +#include "RFID.h" +#include "main.h" +#include "stdbool.h" +#include "stdio.h" + +/** + * @brief initialize function + */ + +/** + * @brief read register + */ + + +bool rc522_toCard( + uint8_t command, + uint8_t* sendData, + uint8_t sendLen, + uint8_t* backData, + uint16_t* backLen); + +bool rc522_request(uint8_t reqMode, uint8_t *tagType); + +bool rc522_antiColl(uint8_t* serNum); + +void spi_cs_rfid_write(bool state) +{ + HAL_GPIO_WritePin(RFID_CS_GPIO_Port, RFID_CS_Pin, state); +} + +uint8_t rc522_regRead8(uint8_t reg) +{ + spi_cs_rfid_write(0); + reg = ((reg << 1) & 0x7E) | 0x80; +// spi1_transmit(®, 1); + // TODO: change to interrupting or something. + HAL_SPI_Transmit(&hspi1, ®, 1, 1000); + uint8_t dataRd=0; + HAL_SPI_Receive(&hspi1, &dataRd, 1, 1000); +// spi1_receive(&dataRd, 1); + spi_cs_rfid_write(1); + return dataRd; +} + +/** + * @brief write register + */ +void rc522_regWrite8(uint8_t reg, uint8_t data8) +{ + spi_cs_rfid_write(0); + uint8_t txData[2] = {0x7E&(reg << 1), data8}; +// spi1_transmit(txData, 2); + HAL_SPI_Transmit(&hspi1, (uint8_t*)&txData, 2, 1000); + spi_cs_rfid_write(1); +} + +/** + * @brief set bit + */ +void rc522_setBit(uint8_t reg, uint8_t mask) +{ + rc522_regWrite8(reg, rc522_regRead8(reg)|mask); +} + +/** + * @brief clear bit + */ +void rc522_clearBit(uint8_t reg, uint8_t mask) +{ + rc522_regWrite8(reg, rc522_regRead8(reg)&(~mask)); +} + +/** + * @brief reset function + */ +void rc522_reset(void) +{ + rc522_regWrite8(0x01, 0x0F); +} + +/** + * @brief Antenna ON + */ +void rc522_antennaON(void) +{ + uint8_t temp; + + temp = rc522_regRead8(MFRC522_REG_TX_CONTROL); + if (!(temp & 0x03)) { + rc522_setBit(MFRC522_REG_TX_CONTROL, 0x03); + } +} + +/** + * @brief Check card + */ +bool rc522_checkCard(uint8_t *id) +{ + bool status=false; + //Find cards, return card type + status = rc522_request(PICC_REQIDL, id); + if (status == true) { + //Card detected + //Anti-collision, return card serial number 4 bytes + status = rc522_antiColl(id); + } + rc522_halt(); //Command card into hibernation + + return status; +} + +/** + * @brief Request function + */ +bool rc522_request(uint8_t reqMode, uint8_t *tagType) +{ + bool status=false; + uint16_t backBits; + rc522_regWrite8(MFRC522_REG_BIT_FRAMING, 0x07); + tagType[0] = reqMode; + status = rc522_toCard(PCD_TRANSCEIVE, tagType, 1, tagType, &backBits); + if ((status != true) || (backBits != 0x10)) { + status = false; + } + return status; +} + +/** + * @brief to Card + */ +bool rc522_toCard( + uint8_t command, + uint8_t* sendData, + uint8_t sendLen, + uint8_t* backData, + uint16_t* backLen) +{ + bool status = false; + uint8_t irqEn = 0x00; + uint8_t waitIRq = 0x00; + uint8_t lastBits; + uint8_t n; + uint16_t i; + + switch (command) { + case PCD_AUTHENT: { + irqEn = 0x12; + waitIRq = 0x10; + break; + } + case PCD_TRANSCEIVE: { + irqEn = 0x77; + waitIRq = 0x30; + break; + } + default: + break; + } + + rc522_regWrite8(MFRC522_REG_COMM_IE_N, irqEn | 0x80); + rc522_clearBit(MFRC522_REG_COMM_IRQ, 0x80); + rc522_setBit(MFRC522_REG_FIFO_LEVEL, 0x80); + + rc522_regWrite8(MFRC522_REG_COMMAND, PCD_IDLE); + + //Writing data to the FIFO + for (i = 0; i < sendLen; i++) { + rc522_regWrite8(MFRC522_REG_FIFO_DATA, sendData[i]); + } + + //Execute the command + rc522_regWrite8(MFRC522_REG_COMMAND, command); + if (command == PCD_TRANSCEIVE) { + rc522_setBit(MFRC522_REG_BIT_FRAMING, 0x80); //StartSend=1,transmission of data starts + } + + //Waiting to receive data to complete + i = 100; //i according to the clock frequency adjustment, the operator M1 card maximum waiting time 25ms??? + do { + //CommIrqReg[7..0] + //Set1 TxIRq RxIRq IdleIRq HiAlerIRq LoAlertIRq ErrIRq TimerIRq + n = rc522_regRead8(MFRC522_REG_COMM_IRQ); + i--; + } while ((i!=0) && !(n&0x01) && !(n&waitIRq)); + + rc522_clearBit(MFRC522_REG_BIT_FRAMING, 0x80); //StartSend=0 + + if (i != 0) { + if (!(rc522_regRead8(MFRC522_REG_ERROR) & 0x1B)) { + status = true; + if (n & irqEn & 0x01) { + status = false; + } + + if (command == PCD_TRANSCEIVE) { + n = rc522_regRead8(MFRC522_REG_FIFO_LEVEL); + uint8_t l = n; + lastBits = rc522_regRead8(MFRC522_REG_CONTROL) & 0x07; + if (lastBits) { + *backLen = (n - 1) * 8 + lastBits; + } else { + *backLen = n * 8; + } + + if (n == 0) { + n = 1; + } + if (n > MFRC522_MAX_LEN) { + n = MFRC522_MAX_LEN; + } + + //Reading the received data in FIFO + for (i = 0; i < n; i++) { + uint8_t d = rc522_regRead8(MFRC522_REG_FIFO_DATA); + if (l == 4) + printf("%02x ", d); + backData[i] = d; + } + if (l==4) + printf("\r\n"); + return status; + } + } else { + printf("error\r\n"); + status = false; + } + } + + return status; +} + +bool rc522_antiColl(uint8_t* serNum) +{ + bool status; + uint8_t i; + uint8_t serNumCheck = 0; + uint16_t unLen; + //for (i = 0; i < 4; i++) +// printf("Anticoll In %d: 0x%02x\r\n", i, serNum[i]); + + + rc522_regWrite8(MFRC522_REG_BIT_FRAMING, 0x00); //TxLastBists = BitFramingReg[2..0] + + serNum[0] = PICC_ANTICOLL; + serNum[1] = 0x20; + status = rc522_toCard(PCD_TRANSCEIVE, serNum, 2, serNum, &unLen); + + //for (i = 0; i < 4; i++) +// printf("Anticoll ToCard %d: 0x%02x\r\n", i, serNum[i]); + + if (status == true) { + //Check card serial number + for (i = 0; i < 4; i++) { + serNumCheck ^= serNum[i]; + } + if (serNumCheck != serNum[i]) { + status = false; + } + } + return status; +} + +void rc522_halt(void) +{ + uint16_t unLen; + uint8_t buff[4]; + + buff[0] = PICC_HALT; + buff[1] = 0; + rc522_calculateCRC(buff, 2, &buff[2]); + + rc522_toCard(PCD_TRANSCEIVE, buff, 4, buff, &unLen); +} + +void rc522_calculateCRC(uint8_t* pIndata, uint8_t len, uint8_t* pOutData) +{ + uint8_t i, n; + + rc522_clearBit(MFRC522_REG_DIV_IRQ, 0x04); //CRCIrq = 0 + rc522_setBit(MFRC522_REG_FIFO_LEVEL, 0x80); //Clear the FIFO pointer + //Write_MFRC522(CommandReg, PCD_IDLE); + + //Writing data to the FIFO + for (i = 0; i < len; i++) { + rc522_regWrite8(MFRC522_REG_FIFO_DATA, *(pIndata+i)); + } + rc522_regWrite8(MFRC522_REG_COMMAND, PCD_CALCCRC); + + //Wait CRC calculation is complete + i = 0xFF; + do { + n = rc522_regRead8(MFRC522_REG_DIV_IRQ); + i--; + } while ((i!=0) && !(n&0x04)); //CRCIrq = 1 + + //Read CRC calculation result + pOutData[0] = rc522_regRead8(MFRC522_REG_CRC_RESULT_L); + pOutData[1] = rc522_regRead8(MFRC522_REG_CRC_RESULT_M); +} + +/** + * @brief compare IDs + */ +bool rc522_compareIds(uint8_t *idCurrent, uint8_t *idReference) +{ + uint8_t i; + for(i=0; i<4;i++) + { + if(idCurrent[i] != idReference[i]) + { + return false; + } + } + return true; +} + +void rc522_init(void) +{ + /* + * STM32 ->RFID + * SPI -> SPI + * PA8 ->RST + * PB0 ->CS + * */ + + HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, 0); + HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, 1); + rc522_reset(); + + rc522_regWrite8(MFRC522_REG_T_MODE, 0x80); + rc522_regWrite8(MFRC522_REG_T_PRESCALER, 0xA9); + rc522_regWrite8(MFRC522_REG_T_RELOAD_L, 0xE8); + rc522_regWrite8(MFRC522_REG_T_RELOAD_H, 0x03); + + + rc522_regWrite8(MFRC522_REG_TX_AUTO, 0x40); + rc522_regWrite8(MFRC522_REG_MODE, 0x3D); + + rc522_antennaON(); //Open the antenna +} + diff --git a/Core/Src/main.c b/Core/Src/main.c index 82440c0..f413f62 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -21,6 +21,7 @@ /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ +#include "RFID.h" #include /* USER CODE END Includes */ @@ -128,22 +129,27 @@ int main(void) /* USER CODE BEGIN 2 */ init_keypad(); init_buttons(); + rc522_init(); printf("Hello, world!\r\n"); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ + uint8_t rfid_id[4] = {0}; while (1) { - HAL_Delay(100); - scan_keypad(); - scan_buttons(); + HAL_Delay(500); +// scan_keypad(); +// scan_buttons(); // printBinary(keypad_state); - printf("s: %d\r\n", keypad_state); - printf("r: %d\r\n", recv_cnt); - printf("d: %d %d %d %d, %d %d %d %d\r\n", data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]); - HAL_I2C_Slave_Receive_IT(&hi2c1, (uint8_t*)&data, 8); +// printf("s: %d\r\n", keypad_state); +// printf("r: %d\r\n", recv_cnt); +// printf("d: %d %d %d %d, %d %d %d %d\r\n", data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]); +// HAL_I2C_Slave_Receive_IT(&hi2c1, (uint8_t*)&data, 8); + if(rc522_checkCard(rfid_id)) { + printf("0x%x 0x%x 0x%x 0x%x\r\n", rfid_id[0], rfid_id[1], rfid_id[2], rfid_id[3]); + } /* USER CODE END WHILE */ @@ -257,10 +263,10 @@ static void MX_SPI1_Init(void) hspi1.Instance = SPI1; hspi1.Init.Mode = SPI_MODE_MASTER; hspi1.Init.Direction = SPI_DIRECTION_2LINES; - hspi1.Init.DataSize = SPI_DATASIZE_4BIT; + hspi1.Init.DataSize = SPI_DATASIZE_8BIT; hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT; + hspi1.Init.NSS = SPI_NSS_SOFT; hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; hspi1.Init.TIMode = SPI_TIMODE_DISABLE; @@ -344,6 +350,9 @@ static void MX_GPIO_Init(void) __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(RFID_CS_GPIO_Port, RFID_CS_Pin, GPIO_PIN_RESET); + /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, GPIO_PIN_RESET); @@ -364,6 +373,13 @@ static void MX_GPIO_Init(void) GPIO_InitStruct.Alternate = GPIO_AF7_EVENTOUT; HAL_GPIO_Init(INT_GPIO_Port, &GPIO_InitStruct); + /*Configure GPIO pin : RFID_CS_Pin */ + GPIO_InitStruct.Pin = RFID_CS_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(RFID_CS_GPIO_Port, &GPIO_InitStruct); + /*Configure GPIO pins : HALL_Pin CLOSE_Pin */ GPIO_InitStruct.Pin = HALL_Pin|CLOSE_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; diff --git a/Core/Src/stm32g0xx_hal_msp.c b/Core/Src/stm32g0xx_hal_msp.c index ded7ebc..fa502c5 100644 --- a/Core/Src/stm32g0xx_hal_msp.c +++ b/Core/Src/stm32g0xx_hal_msp.c @@ -182,12 +182,11 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) __HAL_RCC_GPIOA_CLK_ENABLE(); /**SPI1 GPIO Configuration - PA4 ------> SPI1_NSS PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ - GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; @@ -218,12 +217,11 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) __HAL_RCC_SPI1_CLK_DISABLE(); /**SPI1 GPIO Configuration - PA4 ------> SPI1_NSS PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); /* USER CODE BEGIN SPI1_MspDeInit 1 */ diff --git a/Debug/Core/Src/RFID.cyclo b/Debug/Core/Src/RFID.cyclo new file mode 100644 index 0000000..b9e6e54 --- /dev/null +++ b/Debug/Core/Src/RFID.cyclo @@ -0,0 +1,15 @@ +../Core/Src/RFID.c:26:6:spi_cs_rfid_write 1 +../Core/Src/RFID.c:31:9:rc522_regRead8 1 +../Core/Src/RFID.c:48:6:rc522_regWrite8 1 +../Core/Src/RFID.c:60:6:rc522_setBit 1 +../Core/Src/RFID.c:68:6:rc522_clearBit 1 +../Core/Src/RFID.c:76:6:rc522_reset 1 +../Core/Src/RFID.c:84:6:rc522_antennaON 2 +../Core/Src/RFID.c:97:6:rc522_checkCard 2 +../Core/Src/RFID.c:115:6:rc522_request 3 +../Core/Src/RFID.c:131:6:rc522_toCard 18 +../Core/Src/RFID.c:232:6:rc522_antiColl 4 +../Core/Src/RFID.c:263:6:rc522_halt 1 +../Core/Src/RFID.c:275:6:rc522_calculateCRC 4 +../Core/Src/RFID.c:304:6:rc522_compareIds 3 +../Core/Src/RFID.c:317:6:rc522_init 1 diff --git a/Debug/Core/Src/RFID.d b/Debug/Core/Src/RFID.d new file mode 100644 index 0000000..07b5c71 --- /dev/null +++ b/Debug/Core/Src/RFID.d @@ -0,0 +1,69 @@ +Core/Src/RFID.o: ../Core/Src/RFID.c ../Core/Inc/RFID.h ../Core/Inc/main.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h \ + ../Core/Inc/stm32g0xx_hal_conf.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g070xx.h \ + ../Drivers/CMSIS/Include/core_cm0plus.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc_ex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio_ex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_dma.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_dmamux.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma_ex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_cortex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_exti.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c_ex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr_ex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h \ + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h +../Core/Inc/RFID.h: +../Core/Inc/main.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h: +../Core/Inc/stm32g0xx_hal_conf.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h: +../Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g070xx.h: +../Drivers/CMSIS/Include/core_cm0plus.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc_ex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio_ex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_dma.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_dmamux.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_dma_ex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_cortex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_exti.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c_ex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr_ex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h: +../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h: diff --git a/Debug/Core/Src/RFID.o b/Debug/Core/Src/RFID.o new file mode 100644 index 0000000..2beec22 Binary files /dev/null and b/Debug/Core/Src/RFID.o differ diff --git a/Debug/Core/Src/RFID.su b/Debug/Core/Src/RFID.su new file mode 100644 index 0000000..4e2fa07 --- /dev/null +++ b/Debug/Core/Src/RFID.su @@ -0,0 +1,15 @@ +../Core/Src/RFID.c:26:6:spi_cs_rfid_write 16 static +../Core/Src/RFID.c:31:9:rc522_regRead8 32 static +../Core/Src/RFID.c:48:6:rc522_regWrite8 24 static +../Core/Src/RFID.c:60:6:rc522_setBit 16 static +../Core/Src/RFID.c:68:6:rc522_clearBit 16 static +../Core/Src/RFID.c:76:6:rc522_reset 8 static +../Core/Src/RFID.c:84:6:rc522_antennaON 24 static +../Core/Src/RFID.c:97:6:rc522_checkCard 32 static +../Core/Src/RFID.c:115:6:rc522_request 48 static +../Core/Src/RFID.c:131:6:rc522_toCard 48 static +../Core/Src/RFID.c:232:6:rc522_antiColl 40 static +../Core/Src/RFID.c:263:6:rc522_halt 24 static +../Core/Src/RFID.c:275:6:rc522_calculateCRC 40 static +../Core/Src/RFID.c:304:6:rc522_compareIds 24 static +../Core/Src/RFID.c:317:6:rc522_init 8 static diff --git a/Debug/Core/Src/main.cyclo b/Debug/Core/Src/main.cyclo index 8c19144..d071553 100644 --- a/Debug/Core/Src/main.cyclo +++ b/Debug/Core/Src/main.cyclo @@ -1,15 +1,15 @@ -../Core/Src/main.c:81:6:printBinary 2 -../Core/Src/main.c:100:5:main 1 -../Core/Src/main.c:159:6:SystemClock_Config 3 -../Core/Src/main.c:198:13:MX_I2C1_Init 4 -../Core/Src/main.c:246:13:MX_SPI1_Init 2 -../Core/Src/main.c:286:13:MX_USART2_UART_Init 5 -../Core/Src/main.c:334:13:MX_GPIO_Init 1 -../Core/Src/main.c:436:1:__io_putchar 1 -../Core/Src/main.c:446:6:HAL_I2C_SlaveRxCpltCallback 1 -../Core/Src/main.c:451:6:init_keypad 1 -../Core/Src/main.c:459:6:init_buttons 1 -../Core/Src/main.c:466:6:scan_keypad 16 -../Core/Src/main.c:500:6:scan_buttons 12 -../Core/Src/main.c:527:6:send_iterupt 1 -../Core/Src/main.c:537:6:Error_Handler 1 +../Core/Src/main.c:82:6:printBinary 2 +../Core/Src/main.c:101:5:main 2 +../Core/Src/main.c:165:6:SystemClock_Config 3 +../Core/Src/main.c:204:13:MX_I2C1_Init 4 +../Core/Src/main.c:252:13:MX_SPI1_Init 2 +../Core/Src/main.c:292:13:MX_USART2_UART_Init 5 +../Core/Src/main.c:340:13:MX_GPIO_Init 1 +../Core/Src/main.c:452:1:__io_putchar 1 +../Core/Src/main.c:462:6:HAL_I2C_SlaveRxCpltCallback 1 +../Core/Src/main.c:467:6:init_keypad 1 +../Core/Src/main.c:475:6:init_buttons 1 +../Core/Src/main.c:482:6:scan_keypad 16 +../Core/Src/main.c:516:6:scan_buttons 12 +../Core/Src/main.c:543:6:send_iterupt 1 +../Core/Src/main.c:553:6:Error_Handler 1 diff --git a/Debug/Core/Src/main.d b/Debug/Core/Src/main.d index 768043c..ae5f11d 100644 --- a/Debug/Core/Src/main.d +++ b/Debug/Core/Src/main.d @@ -31,7 +31,8 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi.h \ ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h \ ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h \ - ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h + ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h \ + ../Core/Inc/RFID.h ../Core/Inc/main.h: ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h: ../Core/Inc/stm32g0xx_hal_conf.h: @@ -66,3 +67,4 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h: ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h: ../Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h: +../Core/Inc/RFID.h: diff --git a/Debug/Core/Src/main.o b/Debug/Core/Src/main.o index e72c846..4233602 100644 Binary files a/Debug/Core/Src/main.o and b/Debug/Core/Src/main.o differ diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su index 7a1368c..8d38da5 100644 --- a/Debug/Core/Src/main.su +++ b/Debug/Core/Src/main.su @@ -1,15 +1,15 @@ -../Core/Src/main.c:81:6:printBinary 24 static -../Core/Src/main.c:100:5:main 48 static -../Core/Src/main.c:159:6:SystemClock_Config 88 static -../Core/Src/main.c:198:13:MX_I2C1_Init 8 static -../Core/Src/main.c:246:13:MX_SPI1_Init 8 static -../Core/Src/main.c:286:13:MX_USART2_UART_Init 8 static -../Core/Src/main.c:334:13:MX_GPIO_Init 56 static -../Core/Src/main.c:436:1:__io_putchar 16 static -../Core/Src/main.c:446:6:HAL_I2C_SlaveRxCpltCallback 16 static -../Core/Src/main.c:451:6:init_keypad 8 static -../Core/Src/main.c:459:6:init_buttons 8 static -../Core/Src/main.c:466:6:scan_keypad 8 static -../Core/Src/main.c:500:6:scan_buttons 8 static -../Core/Src/main.c:527:6:send_iterupt 8 static -../Core/Src/main.c:537:6:Error_Handler 8 static,ignoring_inline_asm +../Core/Src/main.c:82:6:printBinary 24 static +../Core/Src/main.c:101:5:main 32 static +../Core/Src/main.c:165:6:SystemClock_Config 88 static +../Core/Src/main.c:204:13:MX_I2C1_Init 8 static +../Core/Src/main.c:252:13:MX_SPI1_Init 8 static +../Core/Src/main.c:292:13:MX_USART2_UART_Init 8 static +../Core/Src/main.c:340:13:MX_GPIO_Init 56 static +../Core/Src/main.c:452:1:__io_putchar 16 static +../Core/Src/main.c:462:6:HAL_I2C_SlaveRxCpltCallback 16 static +../Core/Src/main.c:467:6:init_keypad 8 static +../Core/Src/main.c:475:6:init_buttons 8 static +../Core/Src/main.c:482:6:scan_keypad 8 static +../Core/Src/main.c:516:6:scan_buttons 8 static +../Core/Src/main.c:543:6:send_iterupt 8 static +../Core/Src/main.c:553:6:Error_Handler 8 static,ignoring_inline_asm diff --git a/Debug/Core/Src/stm32g0xx_hal_msp.cyclo b/Debug/Core/Src/stm32g0xx_hal_msp.cyclo index 928417c..2a8b57c 100644 --- a/Debug/Core/Src/stm32g0xx_hal_msp.cyclo +++ b/Debug/Core/Src/stm32g0xx_hal_msp.cyclo @@ -2,6 +2,6 @@ ../Core/Src/stm32g0xx_hal_msp.c:90:6:HAL_I2C_MspInit 3 ../Core/Src/stm32g0xx_hal_msp.c:139:6:HAL_I2C_MspDeInit 2 ../Core/Src/stm32g0xx_hal_msp.c:172:6:HAL_SPI_MspInit 2 -../Core/Src/stm32g0xx_hal_msp.c:210:6:HAL_SPI_MspDeInit 2 -../Core/Src/stm32g0xx_hal_msp.c:241:6:HAL_UART_MspInit 3 -../Core/Src/stm32g0xx_hal_msp.c:288:6:HAL_UART_MspDeInit 2 +../Core/Src/stm32g0xx_hal_msp.c:209:6:HAL_SPI_MspDeInit 2 +../Core/Src/stm32g0xx_hal_msp.c:239:6:HAL_UART_MspInit 3 +../Core/Src/stm32g0xx_hal_msp.c:286:6:HAL_UART_MspDeInit 2 diff --git a/Debug/Core/Src/stm32g0xx_hal_msp.o b/Debug/Core/Src/stm32g0xx_hal_msp.o index fd54c42..7461699 100644 Binary files a/Debug/Core/Src/stm32g0xx_hal_msp.o and b/Debug/Core/Src/stm32g0xx_hal_msp.o differ diff --git a/Debug/Core/Src/stm32g0xx_hal_msp.su b/Debug/Core/Src/stm32g0xx_hal_msp.su index f241a8d..e51fbe8 100644 --- a/Debug/Core/Src/stm32g0xx_hal_msp.su +++ b/Debug/Core/Src/stm32g0xx_hal_msp.su @@ -2,6 +2,6 @@ ../Core/Src/stm32g0xx_hal_msp.c:90:6:HAL_I2C_MspInit 80 static ../Core/Src/stm32g0xx_hal_msp.c:139:6:HAL_I2C_MspDeInit 16 static ../Core/Src/stm32g0xx_hal_msp.c:172:6:HAL_SPI_MspInit 56 static -../Core/Src/stm32g0xx_hal_msp.c:210:6:HAL_SPI_MspDeInit 16 static -../Core/Src/stm32g0xx_hal_msp.c:241:6:HAL_UART_MspInit 80 static -../Core/Src/stm32g0xx_hal_msp.c:288:6:HAL_UART_MspDeInit 16 static +../Core/Src/stm32g0xx_hal_msp.c:209:6:HAL_SPI_MspDeInit 16 static +../Core/Src/stm32g0xx_hal_msp.c:239:6:HAL_UART_MspInit 80 static +../Core/Src/stm32g0xx_hal_msp.c:286:6:HAL_UART_MspDeInit 16 static diff --git a/Debug/Core/Src/stm32g0xx_it.o b/Debug/Core/Src/stm32g0xx_it.o index 01c16f8..474fa67 100644 Binary files a/Debug/Core/Src/stm32g0xx_it.o and b/Debug/Core/Src/stm32g0xx_it.o differ diff --git a/Debug/Core/Src/subdir.mk b/Debug/Core/Src/subdir.mk index 74032b2..8050786 100644 --- a/Debug/Core/Src/subdir.mk +++ b/Debug/Core/Src/subdir.mk @@ -5,6 +5,7 @@ # Add inputs and outputs from these tool invocations to the build variables C_SRCS += \ +../Core/Src/RFID.c \ ../Core/Src/main.c \ ../Core/Src/stm32g0xx_hal_msp.c \ ../Core/Src/stm32g0xx_it.c \ @@ -13,6 +14,7 @@ C_SRCS += \ ../Core/Src/system_stm32g0xx.c C_DEPS += \ +./Core/Src/RFID.d \ ./Core/Src/main.d \ ./Core/Src/stm32g0xx_hal_msp.d \ ./Core/Src/stm32g0xx_it.d \ @@ -21,6 +23,7 @@ C_DEPS += \ ./Core/Src/system_stm32g0xx.d OBJS += \ +./Core/Src/RFID.o \ ./Core/Src/main.o \ ./Core/Src/stm32g0xx_hal_msp.o \ ./Core/Src/stm32g0xx_it.o \ @@ -36,7 +39,7 @@ Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk clean: clean-Core-2f-Src clean-Core-2f-Src: - -$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32g0xx_hal_msp.cyclo ./Core/Src/stm32g0xx_hal_msp.d ./Core/Src/stm32g0xx_hal_msp.o ./Core/Src/stm32g0xx_hal_msp.su ./Core/Src/stm32g0xx_it.cyclo ./Core/Src/stm32g0xx_it.d ./Core/Src/stm32g0xx_it.o ./Core/Src/stm32g0xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32g0xx.cyclo ./Core/Src/system_stm32g0xx.d ./Core/Src/system_stm32g0xx.o ./Core/Src/system_stm32g0xx.su + -$(RM) ./Core/Src/RFID.cyclo ./Core/Src/RFID.d ./Core/Src/RFID.o ./Core/Src/RFID.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32g0xx_hal_msp.cyclo ./Core/Src/stm32g0xx_hal_msp.d ./Core/Src/stm32g0xx_hal_msp.o ./Core/Src/stm32g0xx_hal_msp.su ./Core/Src/stm32g0xx_it.cyclo ./Core/Src/stm32g0xx_it.d ./Core/Src/stm32g0xx_it.o ./Core/Src/stm32g0xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32g0xx.cyclo ./Core/Src/system_stm32g0xx.d ./Core/Src/system_stm32g0xx.o ./Core/Src/system_stm32g0xx.su .PHONY: clean-Core-2f-Src diff --git a/Debug/blk_box_bc.elf b/Debug/blk_box_bc.elf index a7243e1..63f2d62 100644 Binary files a/Debug/blk_box_bc.elf and b/Debug/blk_box_bc.elf differ diff --git a/Debug/blk_box_bc.list b/Debug/blk_box_bc.list index e868516..713f1ec 100644 --- a/Debug/blk_box_bc.list +++ b/Debug/blk_box_bc.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000b8 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00005e20 080000b8 080000b8 000010b8 2**2 + 1 .text 00006144 080000b8 080000b8 000010b8 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000104 08005ed8 08005ed8 00006ed8 2**2 + 2 .rodata 00000100 080061fc 080061fc 000071fc 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08005fdc 08005fdc 00007068 2**0 + 3 .ARM.extab 00000000 080062fc 080062fc 00008068 2**0 CONTENTS - 4 .ARM 00000000 08005fdc 08005fdc 00007068 2**0 + 4 .ARM 00000000 080062fc 080062fc 00008068 2**0 CONTENTS - 5 .preinit_array 00000000 08005fdc 08005fdc 00007068 2**0 + 5 .preinit_array 00000000 080062fc 080062fc 00008068 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08005fdc 08005fdc 00006fdc 2**2 + 6 .init_array 00000004 080062fc 080062fc 000072fc 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 08005fe0 08005fe0 00006fe0 2**2 + 7 .fini_array 00000004 08006300 08006300 00007300 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 00000068 20000000 08005fe4 00007000 2**2 + 8 .data 00000068 20000000 08006304 00008000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 000002d0 20000068 0800604c 00007068 2**2 + 9 .bss 000002c0 20000068 0800636c 00008068 2**2 ALLOC - 10 ._user_heap_stack 00000600 20000338 0800604c 00007338 2**0 + 10 ._user_heap_stack 00000600 20000328 0800636c 00008328 2**0 ALLOC - 11 .ARM.attributes 00000028 00000000 00000000 00007068 2**0 + 11 .ARM.attributes 00000028 00000000 00000000 00008068 2**0 CONTENTS, READONLY - 12 .debug_info 00010ce5 00000000 00000000 00007090 2**0 + 12 .debug_info 00011938 00000000 00000000 00008090 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00002787 00000000 00000000 00017d75 2**0 + 13 .debug_abbrev 00002a98 00000000 00000000 000199c8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00000e38 00000000 00000000 0001a500 2**3 + 14 .debug_aranges 00000ec8 00000000 00000000 0001c460 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 00000b1c 00000000 00000000 0001b338 2**0 + 15 .debug_rnglists 00000b85 00000000 00000000 0001d328 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0001704e 00000000 00000000 0001be54 2**0 + 16 .debug_macro 000175a0 00000000 00000000 0001dead 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 0001368d 00000000 00000000 00032ea2 2**0 + 17 .debug_line 000142e2 00000000 00000000 0003544d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 0008b486 00000000 00000000 0004652f 2**0 + 18 .debug_str 0008bf65 00000000 00000000 0004972f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000d19b5 2**0 + 19 .comment 00000043 00000000 00000000 000d5694 2**0 CONTENTS, READONLY - 20 .debug_frame 00003a48 00000000 00000000 000d19f8 2**2 + 20 .debug_frame 00003c38 00000000 00000000 000d56d8 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000066 00000000 00000000 000d5440 2**0 + 21 .debug_line_str 00000066 00000000 00000000 000d9310 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -67,7 +67,7 @@ Disassembly of section .text: 80000d2: bd10 pop {r4, pc} 80000d4: 20000068 .word 0x20000068 80000d8: 00000000 .word 0x00000000 - 80000dc: 08005ec0 .word 0x08005ec0 + 80000dc: 080061e4 .word 0x080061e4 080000e0 : 80000e0: 4b04 ldr r3, [pc, #16] @ (80000f4 ) @@ -82,7 +82,7 @@ Disassembly of section .text: 80000f2: 46c0 nop @ (mov r8, r8) 80000f4: 00000000 .word 0x00000000 80000f8: 2000006c .word 0x2000006c - 80000fc: 08005ec0 .word 0x08005ec0 + 80000fc: 080061e4 .word 0x080061e4 08000100 <__gnu_thumb1_case_shi>: 8000100: b403 push {r0, r1} @@ -478,15971 +478,16564 @@ Disassembly of section .text: 80003fc: 4770 bx lr 80003fe: 46c0 nop @ (mov r8, r8) -08000400
: +08000400 : +bool rc522_request(uint8_t reqMode, uint8_t *tagType); + +bool rc522_antiColl(uint8_t* serNum); + +void spi_cs_rfid_write(bool state) +{ + 8000400: b580 push {r7, lr} + 8000402: b082 sub sp, #8 + 8000404: af00 add r7, sp, #0 + 8000406: 0002 movs r2, r0 + 8000408: 1dfb adds r3, r7, #7 + 800040a: 701a strb r2, [r3, #0] + HAL_GPIO_WritePin(RFID_CS_GPIO_Port, RFID_CS_Pin, state); + 800040c: 1dfb adds r3, r7, #7 + 800040e: 781a ldrb r2, [r3, #0] + 8000410: 23a0 movs r3, #160 @ 0xa0 + 8000412: 05db lsls r3, r3, #23 + 8000414: 2110 movs r1, #16 + 8000416: 0018 movs r0, r3 + 8000418: f001 fc24 bl 8001c64 +} + 800041c: 46c0 nop @ (mov r8, r8) + 800041e: 46bd mov sp, r7 + 8000420: b002 add sp, #8 + 8000422: bd80 pop {r7, pc} + +08000424 : + +uint8_t rc522_regRead8(uint8_t reg) +{ + 8000424: b590 push {r4, r7, lr} + 8000426: b085 sub sp, #20 + 8000428: af00 add r7, sp, #0 + 800042a: 0002 movs r2, r0 + 800042c: 1dfb adds r3, r7, #7 + 800042e: 701a strb r2, [r3, #0] + spi_cs_rfid_write(0); + 8000430: 2000 movs r0, #0 + 8000432: f7ff ffe5 bl 8000400 + reg = ((reg << 1) & 0x7E) | 0x80; + 8000436: 1dfb adds r3, r7, #7 + 8000438: 781b ldrb r3, [r3, #0] + 800043a: 005b lsls r3, r3, #1 + 800043c: b25b sxtb r3, r3 + 800043e: 227e movs r2, #126 @ 0x7e + 8000440: 4013 ands r3, r2 + 8000442: b25b sxtb r3, r3 + 8000444: 2280 movs r2, #128 @ 0x80 + 8000446: 4252 negs r2, r2 + 8000448: 4313 orrs r3, r2 + 800044a: b25b sxtb r3, r3 + 800044c: b2da uxtb r2, r3 + 800044e: 1dfb adds r3, r7, #7 + 8000450: 701a strb r2, [r3, #0] +// spi1_transmit(®, 1); + // TODO: change to interrupting or something. + HAL_SPI_Transmit(&hspi1, ®, 1, 1000); + 8000452: 23fa movs r3, #250 @ 0xfa + 8000454: 009b lsls r3, r3, #2 + 8000456: 1df9 adds r1, r7, #7 + 8000458: 480c ldr r0, [pc, #48] @ (800048c ) + 800045a: 2201 movs r2, #1 + 800045c: f003 faac bl 80039b8 + uint8_t dataRd=0; + 8000460: 210f movs r1, #15 + 8000462: 187b adds r3, r7, r1 + 8000464: 2200 movs r2, #0 + 8000466: 701a strb r2, [r3, #0] + HAL_SPI_Receive(&hspi1, &dataRd, 1, 1000); + 8000468: 23fa movs r3, #250 @ 0xfa + 800046a: 009b lsls r3, r3, #2 + 800046c: 000c movs r4, r1 + 800046e: 1879 adds r1, r7, r1 + 8000470: 4806 ldr r0, [pc, #24] @ (800048c ) + 8000472: 2201 movs r2, #1 + 8000474: f003 fc00 bl 8003c78 +// spi1_receive(&dataRd, 1); + spi_cs_rfid_write(1); + 8000478: 2001 movs r0, #1 + 800047a: f7ff ffc1 bl 8000400 + return dataRd; + 800047e: 193b adds r3, r7, r4 + 8000480: 781b ldrb r3, [r3, #0] +} + 8000482: 0018 movs r0, r3 + 8000484: 46bd mov sp, r7 + 8000486: b005 add sp, #20 + 8000488: bd90 pop {r4, r7, pc} + 800048a: 46c0 nop @ (mov r8, r8) + 800048c: 200000d8 .word 0x200000d8 + +08000490 : + +/** + * @brief write register + */ +void rc522_regWrite8(uint8_t reg, uint8_t data8) +{ + 8000490: b580 push {r7, lr} + 8000492: b084 sub sp, #16 + 8000494: af00 add r7, sp, #0 + 8000496: 0002 movs r2, r0 + 8000498: 1dfb adds r3, r7, #7 + 800049a: 701a strb r2, [r3, #0] + 800049c: 1dbb adds r3, r7, #6 + 800049e: 1c0a adds r2, r1, #0 + 80004a0: 701a strb r2, [r3, #0] + spi_cs_rfid_write(0); + 80004a2: 2000 movs r0, #0 + 80004a4: f7ff ffac bl 8000400 + uint8_t txData[2] = {0x7E&(reg << 1), data8}; + 80004a8: 1dfb adds r3, r7, #7 + 80004aa: 781b ldrb r3, [r3, #0] + 80004ac: 005b lsls r3, r3, #1 + 80004ae: b2db uxtb r3, r3 + 80004b0: 227e movs r2, #126 @ 0x7e + 80004b2: 4013 ands r3, r2 + 80004b4: b2da uxtb r2, r3 + 80004b6: 210c movs r1, #12 + 80004b8: 187b adds r3, r7, r1 + 80004ba: 701a strb r2, [r3, #0] + 80004bc: 187b adds r3, r7, r1 + 80004be: 1dba adds r2, r7, #6 + 80004c0: 7812 ldrb r2, [r2, #0] + 80004c2: 705a strb r2, [r3, #1] +// spi1_transmit(txData, 2); + HAL_SPI_Transmit(&hspi1, (uint8_t*)&txData, 2, 1000); + 80004c4: 23fa movs r3, #250 @ 0xfa + 80004c6: 009b lsls r3, r3, #2 + 80004c8: 1879 adds r1, r7, r1 + 80004ca: 4805 ldr r0, [pc, #20] @ (80004e0 ) + 80004cc: 2202 movs r2, #2 + 80004ce: f003 fa73 bl 80039b8 + spi_cs_rfid_write(1); + 80004d2: 2001 movs r0, #1 + 80004d4: f7ff ff94 bl 8000400 +} + 80004d8: 46c0 nop @ (mov r8, r8) + 80004da: 46bd mov sp, r7 + 80004dc: b004 add sp, #16 + 80004de: bd80 pop {r7, pc} + 80004e0: 200000d8 .word 0x200000d8 + +080004e4 : + +/** + * @brief set bit + */ +void rc522_setBit(uint8_t reg, uint8_t mask) +{ + 80004e4: b580 push {r7, lr} + 80004e6: b082 sub sp, #8 + 80004e8: af00 add r7, sp, #0 + 80004ea: 0002 movs r2, r0 + 80004ec: 1dfb adds r3, r7, #7 + 80004ee: 701a strb r2, [r3, #0] + 80004f0: 1dbb adds r3, r7, #6 + 80004f2: 1c0a adds r2, r1, #0 + 80004f4: 701a strb r2, [r3, #0] + rc522_regWrite8(reg, rc522_regRead8(reg)|mask); + 80004f6: 1dfb adds r3, r7, #7 + 80004f8: 781b ldrb r3, [r3, #0] + 80004fa: 0018 movs r0, r3 + 80004fc: f7ff ff92 bl 8000424 + 8000500: 0003 movs r3, r0 + 8000502: 001a movs r2, r3 + 8000504: 1dbb adds r3, r7, #6 + 8000506: 781b ldrb r3, [r3, #0] + 8000508: 4313 orrs r3, r2 + 800050a: b2da uxtb r2, r3 + 800050c: 1dfb adds r3, r7, #7 + 800050e: 781b ldrb r3, [r3, #0] + 8000510: 0011 movs r1, r2 + 8000512: 0018 movs r0, r3 + 8000514: f7ff ffbc bl 8000490 +} + 8000518: 46c0 nop @ (mov r8, r8) + 800051a: 46bd mov sp, r7 + 800051c: b002 add sp, #8 + 800051e: bd80 pop {r7, pc} + +08000520 : + +/** + * @brief clear bit + */ +void rc522_clearBit(uint8_t reg, uint8_t mask) +{ + 8000520: b580 push {r7, lr} + 8000522: b082 sub sp, #8 + 8000524: af00 add r7, sp, #0 + 8000526: 0002 movs r2, r0 + 8000528: 1dfb adds r3, r7, #7 + 800052a: 701a strb r2, [r3, #0] + 800052c: 1dbb adds r3, r7, #6 + 800052e: 1c0a adds r2, r1, #0 + 8000530: 701a strb r2, [r3, #0] + rc522_regWrite8(reg, rc522_regRead8(reg)&(~mask)); + 8000532: 1dfb adds r3, r7, #7 + 8000534: 781b ldrb r3, [r3, #0] + 8000536: 0018 movs r0, r3 + 8000538: f7ff ff74 bl 8000424 + 800053c: 0003 movs r3, r0 + 800053e: b25b sxtb r3, r3 + 8000540: 1dba adds r2, r7, #6 + 8000542: 7812 ldrb r2, [r2, #0] + 8000544: b252 sxtb r2, r2 + 8000546: 43d2 mvns r2, r2 + 8000548: b252 sxtb r2, r2 + 800054a: 4013 ands r3, r2 + 800054c: b25b sxtb r3, r3 + 800054e: b2da uxtb r2, r3 + 8000550: 1dfb adds r3, r7, #7 + 8000552: 781b ldrb r3, [r3, #0] + 8000554: 0011 movs r1, r2 + 8000556: 0018 movs r0, r3 + 8000558: f7ff ff9a bl 8000490 +} + 800055c: 46c0 nop @ (mov r8, r8) + 800055e: 46bd mov sp, r7 + 8000560: b002 add sp, #8 + 8000562: bd80 pop {r7, pc} + +08000564 : + +/** + * @brief reset function + */ +void rc522_reset(void) +{ + 8000564: b580 push {r7, lr} + 8000566: af00 add r7, sp, #0 + rc522_regWrite8(0x01, 0x0F); + 8000568: 210f movs r1, #15 + 800056a: 2001 movs r0, #1 + 800056c: f7ff ff90 bl 8000490 +} + 8000570: 46c0 nop @ (mov r8, r8) + 8000572: 46bd mov sp, r7 + 8000574: bd80 pop {r7, pc} + +08000576 : + +/** + * @brief Antenna ON + */ +void rc522_antennaON(void) +{ + 8000576: b590 push {r4, r7, lr} + 8000578: b083 sub sp, #12 + 800057a: af00 add r7, sp, #0 + uint8_t temp; + + temp = rc522_regRead8(MFRC522_REG_TX_CONTROL); + 800057c: 1dfc adds r4, r7, #7 + 800057e: 2014 movs r0, #20 + 8000580: f7ff ff50 bl 8000424 + 8000584: 0003 movs r3, r0 + 8000586: 7023 strb r3, [r4, #0] + if (!(temp & 0x03)) { + 8000588: 1dfb adds r3, r7, #7 + 800058a: 781b ldrb r3, [r3, #0] + 800058c: 2203 movs r2, #3 + 800058e: 4013 ands r3, r2 + 8000590: d103 bne.n 800059a + rc522_setBit(MFRC522_REG_TX_CONTROL, 0x03); + 8000592: 2103 movs r1, #3 + 8000594: 2014 movs r0, #20 + 8000596: f7ff ffa5 bl 80004e4 + } +} + 800059a: 46c0 nop @ (mov r8, r8) + 800059c: 46bd mov sp, r7 + 800059e: b003 add sp, #12 + 80005a0: bd90 pop {r4, r7, pc} + +080005a2 : + +/** + * @brief Check card + */ +bool rc522_checkCard(uint8_t *id) +{ + 80005a2: b5b0 push {r4, r5, r7, lr} + 80005a4: b084 sub sp, #16 + 80005a6: af00 add r7, sp, #0 + 80005a8: 6078 str r0, [r7, #4] + bool status=false; + 80005aa: 250f movs r5, #15 + 80005ac: 197b adds r3, r7, r5 + 80005ae: 2200 movs r2, #0 + 80005b0: 701a strb r2, [r3, #0] + //Find cards, return card type + status = rc522_request(PICC_REQIDL, id); + 80005b2: 197c adds r4, r7, r5 + 80005b4: 687b ldr r3, [r7, #4] + 80005b6: 0019 movs r1, r3 + 80005b8: 2026 movs r0, #38 @ 0x26 + 80005ba: f000 f816 bl 80005ea + 80005be: 0003 movs r3, r0 + 80005c0: 7023 strb r3, [r4, #0] + if (status == true) { + 80005c2: 197b adds r3, r7, r5 + 80005c4: 781b ldrb r3, [r3, #0] + 80005c6: 2b00 cmp r3, #0 + 80005c8: d006 beq.n 80005d8 + //Card detected + //Anti-collision, return card serial number 4 bytes + status = rc522_antiColl(id); + 80005ca: 197c adds r4, r7, r5 + 80005cc: 687b ldr r3, [r7, #4] + 80005ce: 0018 movs r0, r3 + 80005d0: f000 f998 bl 8000904 + 80005d4: 0003 movs r3, r0 + 80005d6: 7023 strb r3, [r4, #0] + } + rc522_halt(); //Command card into hibernation + 80005d8: f000 f9e9 bl 80009ae + + return status; + 80005dc: 230f movs r3, #15 + 80005de: 18fb adds r3, r7, r3 + 80005e0: 781b ldrb r3, [r3, #0] +} + 80005e2: 0018 movs r0, r3 + 80005e4: 46bd mov sp, r7 + 80005e6: b004 add sp, #16 + 80005e8: bdb0 pop {r4, r5, r7, pc} + +080005ea : + +/** + * @brief Request function + */ +bool rc522_request(uint8_t reqMode, uint8_t *tagType) +{ + 80005ea: b5f0 push {r4, r5, r6, r7, lr} + 80005ec: b087 sub sp, #28 + 80005ee: af02 add r7, sp, #8 + 80005f0: 0002 movs r2, r0 + 80005f2: 6039 str r1, [r7, #0] + 80005f4: 1dfb adds r3, r7, #7 + 80005f6: 701a strb r2, [r3, #0] + bool status=false; + 80005f8: 250f movs r5, #15 + 80005fa: 197b adds r3, r7, r5 + 80005fc: 2200 movs r2, #0 + 80005fe: 701a strb r2, [r3, #0] + uint16_t backBits; + rc522_regWrite8(MFRC522_REG_BIT_FRAMING, 0x07); + 8000600: 2107 movs r1, #7 + 8000602: 200d movs r0, #13 + 8000604: f7ff ff44 bl 8000490 + tagType[0] = reqMode; + 8000608: 683b ldr r3, [r7, #0] + 800060a: 1dfa adds r2, r7, #7 + 800060c: 7812 ldrb r2, [r2, #0] + 800060e: 701a strb r2, [r3, #0] + status = rc522_toCard(PCD_TRANSCEIVE, tagType, 1, tagType, &backBits); + 8000610: 197c adds r4, r7, r5 + 8000612: 683a ldr r2, [r7, #0] + 8000614: 6839 ldr r1, [r7, #0] + 8000616: 260c movs r6, #12 + 8000618: 19bb adds r3, r7, r6 + 800061a: 9300 str r3, [sp, #0] + 800061c: 0013 movs r3, r2 + 800061e: 2201 movs r2, #1 + 8000620: 200c movs r0, #12 + 8000622: f000 f819 bl 8000658 + 8000626: 0003 movs r3, r0 + 8000628: 7023 strb r3, [r4, #0] + if ((status != true) || (backBits != 0x10)) { + 800062a: 197b adds r3, r7, r5 + 800062c: 781b ldrb r3, [r3, #0] + 800062e: 2201 movs r2, #1 + 8000630: 4053 eors r3, r2 + 8000632: b2db uxtb r3, r3 + 8000634: 2b00 cmp r3, #0 + 8000636: d103 bne.n 8000640 + 8000638: 19bb adds r3, r7, r6 + 800063a: 881b ldrh r3, [r3, #0] + 800063c: 2b10 cmp r3, #16 + 800063e: d003 beq.n 8000648 + status = false; + 8000640: 230f movs r3, #15 + 8000642: 18fb adds r3, r7, r3 + 8000644: 2200 movs r2, #0 + 8000646: 701a strb r2, [r3, #0] + } + return status; + 8000648: 230f movs r3, #15 + 800064a: 18fb adds r3, r7, r3 + 800064c: 781b ldrb r3, [r3, #0] +} + 800064e: 0018 movs r0, r3 + 8000650: 46bd mov sp, r7 + 8000652: b005 add sp, #20 + 8000654: bdf0 pop {r4, r5, r6, r7, pc} + ... + +08000658 : + uint8_t command, + uint8_t* sendData, + uint8_t sendLen, + uint8_t* backData, + uint16_t* backLen) +{ + 8000658: b5b0 push {r4, r5, r7, lr} + 800065a: b088 sub sp, #32 + 800065c: af00 add r7, sp, #0 + 800065e: 60b9 str r1, [r7, #8] + 8000660: 0011 movs r1, r2 + 8000662: 607b str r3, [r7, #4] + 8000664: 240f movs r4, #15 + 8000666: 193b adds r3, r7, r4 + 8000668: 1c02 adds r2, r0, #0 + 800066a: 701a strb r2, [r3, #0] + 800066c: 230e movs r3, #14 + 800066e: 18fb adds r3, r7, r3 + 8000670: 1c0a adds r2, r1, #0 + 8000672: 701a strb r2, [r3, #0] + bool status = false; + 8000674: 231f movs r3, #31 + 8000676: 18fb adds r3, r7, r3 + 8000678: 2200 movs r2, #0 + 800067a: 701a strb r2, [r3, #0] + uint8_t irqEn = 0x00; + 800067c: 211e movs r1, #30 + 800067e: 187b adds r3, r7, r1 + 8000680: 2200 movs r2, #0 + 8000682: 701a strb r2, [r3, #0] + uint8_t waitIRq = 0x00; + 8000684: 201d movs r0, #29 + 8000686: 183b adds r3, r7, r0 + 8000688: 2200 movs r2, #0 + 800068a: 701a strb r2, [r3, #0] + uint8_t lastBits; + uint8_t n; + uint16_t i; + + switch (command) { + 800068c: 193b adds r3, r7, r4 + 800068e: 781b ldrb r3, [r3, #0] + 8000690: 2b0c cmp r3, #12 + 8000692: d008 beq.n 80006a6 + 8000694: 2b0e cmp r3, #14 + 8000696: d10f bne.n 80006b8 + case PCD_AUTHENT: { + irqEn = 0x12; + 8000698: 187b adds r3, r7, r1 + 800069a: 2212 movs r2, #18 + 800069c: 701a strb r2, [r3, #0] + waitIRq = 0x10; + 800069e: 183b adds r3, r7, r0 + 80006a0: 2210 movs r2, #16 + 80006a2: 701a strb r2, [r3, #0] + break; + 80006a4: e009 b.n 80006ba + } + case PCD_TRANSCEIVE: { + irqEn = 0x77; + 80006a6: 231e movs r3, #30 + 80006a8: 18fb adds r3, r7, r3 + 80006aa: 2277 movs r2, #119 @ 0x77 + 80006ac: 701a strb r2, [r3, #0] + waitIRq = 0x30; + 80006ae: 231d movs r3, #29 + 80006b0: 18fb adds r3, r7, r3 + 80006b2: 2230 movs r2, #48 @ 0x30 + 80006b4: 701a strb r2, [r3, #0] + break; + 80006b6: e000 b.n 80006ba + } + default: + break; + 80006b8: 46c0 nop @ (mov r8, r8) + } + + rc522_regWrite8(MFRC522_REG_COMM_IE_N, irqEn | 0x80); + 80006ba: 231e movs r3, #30 + 80006bc: 18fb adds r3, r7, r3 + 80006be: 781b ldrb r3, [r3, #0] + 80006c0: 2280 movs r2, #128 @ 0x80 + 80006c2: 4252 negs r2, r2 + 80006c4: 4313 orrs r3, r2 + 80006c6: b2db uxtb r3, r3 + 80006c8: 0019 movs r1, r3 + 80006ca: 2002 movs r0, #2 + 80006cc: f7ff fee0 bl 8000490 + rc522_clearBit(MFRC522_REG_COMM_IRQ, 0x80); + 80006d0: 2180 movs r1, #128 @ 0x80 + 80006d2: 2004 movs r0, #4 + 80006d4: f7ff ff24 bl 8000520 + rc522_setBit(MFRC522_REG_FIFO_LEVEL, 0x80); + 80006d8: 2180 movs r1, #128 @ 0x80 + 80006da: 200a movs r0, #10 + 80006dc: f7ff ff02 bl 80004e4 + + rc522_regWrite8(MFRC522_REG_COMMAND, PCD_IDLE); + 80006e0: 2100 movs r1, #0 + 80006e2: 2001 movs r0, #1 + 80006e4: f7ff fed4 bl 8000490 + + //Writing data to the FIFO + for (i = 0; i < sendLen; i++) { + 80006e8: 231a movs r3, #26 + 80006ea: 18fb adds r3, r7, r3 + 80006ec: 2200 movs r2, #0 + 80006ee: 801a strh r2, [r3, #0] + 80006f0: e00e b.n 8000710 + rc522_regWrite8(MFRC522_REG_FIFO_DATA, sendData[i]); + 80006f2: 241a movs r4, #26 + 80006f4: 193b adds r3, r7, r4 + 80006f6: 881b ldrh r3, [r3, #0] + 80006f8: 68ba ldr r2, [r7, #8] + 80006fa: 18d3 adds r3, r2, r3 + 80006fc: 781b ldrb r3, [r3, #0] + 80006fe: 0019 movs r1, r3 + 8000700: 2009 movs r0, #9 + 8000702: f7ff fec5 bl 8000490 + for (i = 0; i < sendLen; i++) { + 8000706: 193b adds r3, r7, r4 + 8000708: 881a ldrh r2, [r3, #0] + 800070a: 193b adds r3, r7, r4 + 800070c: 3201 adds r2, #1 + 800070e: 801a strh r2, [r3, #0] + 8000710: 230e movs r3, #14 + 8000712: 18fb adds r3, r7, r3 + 8000714: 781b ldrb r3, [r3, #0] + 8000716: b29b uxth r3, r3 + 8000718: 221a movs r2, #26 + 800071a: 18ba adds r2, r7, r2 + 800071c: 8812 ldrh r2, [r2, #0] + 800071e: 429a cmp r2, r3 + 8000720: d3e7 bcc.n 80006f2 + } + + //Execute the command + rc522_regWrite8(MFRC522_REG_COMMAND, command); + 8000722: 240f movs r4, #15 + 8000724: 193b adds r3, r7, r4 + 8000726: 781b ldrb r3, [r3, #0] + 8000728: 0019 movs r1, r3 + 800072a: 2001 movs r0, #1 + 800072c: f7ff feb0 bl 8000490 + if (command == PCD_TRANSCEIVE) { + 8000730: 193b adds r3, r7, r4 + 8000732: 781b ldrb r3, [r3, #0] + 8000734: 2b0c cmp r3, #12 + 8000736: d103 bne.n 8000740 + rc522_setBit(MFRC522_REG_BIT_FRAMING, 0x80); //StartSend=1,transmission of data starts + 8000738: 2180 movs r1, #128 @ 0x80 + 800073a: 200d movs r0, #13 + 800073c: f7ff fed2 bl 80004e4 + } + + //Waiting to receive data to complete + i = 100; //i according to the clock frequency adjustment, the operator M1 card maximum waiting time 25ms??? + 8000740: 231a movs r3, #26 + 8000742: 18fb adds r3, r7, r3 + 8000744: 2264 movs r2, #100 @ 0x64 + 8000746: 801a strh r2, [r3, #0] + do { + //CommIrqReg[7..0] + //Set1 TxIRq RxIRq IdleIRq HiAlerIRq LoAlertIRq ErrIRq TimerIRq + n = rc522_regRead8(MFRC522_REG_COMM_IRQ); + 8000748: 251c movs r5, #28 + 800074a: 197c adds r4, r7, r5 + 800074c: 2004 movs r0, #4 + 800074e: f7ff fe69 bl 8000424 + 8000752: 0003 movs r3, r0 + 8000754: 7023 strb r3, [r4, #0] + i--; + 8000756: 211a movs r1, #26 + 8000758: 187b adds r3, r7, r1 + 800075a: 881a ldrh r2, [r3, #0] + 800075c: 187b adds r3, r7, r1 + 800075e: 3a01 subs r2, #1 + 8000760: 801a strh r2, [r3, #0] + } while ((i!=0) && !(n&0x01) && !(n&waitIRq)); + 8000762: 187b adds r3, r7, r1 + 8000764: 881b ldrh r3, [r3, #0] + 8000766: 2b00 cmp r3, #0 + 8000768: d00d beq.n 8000786 + 800076a: 197b adds r3, r7, r5 + 800076c: 781b ldrb r3, [r3, #0] + 800076e: 2201 movs r2, #1 + 8000770: 4013 ands r3, r2 + 8000772: d108 bne.n 8000786 + 8000774: 197b adds r3, r7, r5 + 8000776: 221d movs r2, #29 + 8000778: 18ba adds r2, r7, r2 + 800077a: 781b ldrb r3, [r3, #0] + 800077c: 7812 ldrb r2, [r2, #0] + 800077e: 4013 ands r3, r2 + 8000780: b2db uxtb r3, r3 + 8000782: 2b00 cmp r3, #0 + 8000784: d0e0 beq.n 8000748 + + rc522_clearBit(MFRC522_REG_BIT_FRAMING, 0x80); //StartSend=0 + 8000786: 2180 movs r1, #128 @ 0x80 + 8000788: 200d movs r0, #13 + 800078a: f7ff fec9 bl 8000520 + + if (i != 0) { + 800078e: 231a movs r3, #26 + 8000790: 18fb adds r3, r7, r3 + 8000792: 881b ldrh r3, [r3, #0] + 8000794: 2b00 cmp r3, #0 + 8000796: d100 bne.n 800079a + 8000798: e0a7 b.n 80008ea + if (!(rc522_regRead8(MFRC522_REG_ERROR) & 0x1B)) { + 800079a: 2006 movs r0, #6 + 800079c: f7ff fe42 bl 8000424 + 80007a0: 0003 movs r3, r0 + 80007a2: 001a movs r2, r3 + 80007a4: 231b movs r3, #27 + 80007a6: 4013 ands r3, r2 + 80007a8: d000 beq.n 80007ac + 80007aa: e096 b.n 80008da + status = true; + 80007ac: 211f movs r1, #31 + 80007ae: 187b adds r3, r7, r1 + 80007b0: 2201 movs r2, #1 + 80007b2: 701a strb r2, [r3, #0] + if (n & irqEn & 0x01) { + 80007b4: 231c movs r3, #28 + 80007b6: 18fb adds r3, r7, r3 + 80007b8: 221e movs r2, #30 + 80007ba: 18ba adds r2, r7, r2 + 80007bc: 781b ldrb r3, [r3, #0] + 80007be: 7812 ldrb r2, [r2, #0] + 80007c0: 4013 ands r3, r2 + 80007c2: b2db uxtb r3, r3 + 80007c4: 001a movs r2, r3 + 80007c6: 2301 movs r3, #1 + 80007c8: 4013 ands r3, r2 + 80007ca: d002 beq.n 80007d2 + status = false; + 80007cc: 187b adds r3, r7, r1 + 80007ce: 2200 movs r2, #0 + 80007d0: 701a strb r2, [r3, #0] + } + + if (command == PCD_TRANSCEIVE) { + 80007d2: 230f movs r3, #15 + 80007d4: 18fb adds r3, r7, r3 + 80007d6: 781b ldrb r3, [r3, #0] + 80007d8: 2b0c cmp r3, #12 + 80007da: d000 beq.n 80007de + 80007dc: e085 b.n 80008ea + n = rc522_regRead8(MFRC522_REG_FIFO_LEVEL); + 80007de: 251c movs r5, #28 + 80007e0: 197c adds r4, r7, r5 + 80007e2: 200a movs r0, #10 + 80007e4: f7ff fe1e bl 8000424 + 80007e8: 0003 movs r3, r0 + 80007ea: 7023 strb r3, [r4, #0] + uint8_t l = n; + 80007ec: 2319 movs r3, #25 + 80007ee: 18fb adds r3, r7, r3 + 80007f0: 002c movs r4, r5 + 80007f2: 193a adds r2, r7, r4 + 80007f4: 7812 ldrb r2, [r2, #0] + 80007f6: 701a strb r2, [r3, #0] + lastBits = rc522_regRead8(MFRC522_REG_CONTROL) & 0x07; + 80007f8: 200c movs r0, #12 + 80007fa: f7ff fe13 bl 8000424 + 80007fe: 0003 movs r3, r0 + 8000800: 0019 movs r1, r3 + 8000802: 2018 movs r0, #24 + 8000804: 183b adds r3, r7, r0 + 8000806: 2207 movs r2, #7 + 8000808: 400a ands r2, r1 + 800080a: 701a strb r2, [r3, #0] + if (lastBits) { + 800080c: 0001 movs r1, r0 + 800080e: 187b adds r3, r7, r1 + 8000810: 781b ldrb r3, [r3, #0] + 8000812: 2b00 cmp r3, #0 + 8000814: d00d beq.n 8000832 + *backLen = (n - 1) * 8 + lastBits; + 8000816: 193b adds r3, r7, r4 + 8000818: 781b ldrb r3, [r3, #0] + 800081a: 3b01 subs r3, #1 + 800081c: b29b uxth r3, r3 + 800081e: 00db lsls r3, r3, #3 + 8000820: b29a uxth r2, r3 + 8000822: 187b adds r3, r7, r1 + 8000824: 781b ldrb r3, [r3, #0] + 8000826: b29b uxth r3, r3 + 8000828: 18d3 adds r3, r2, r3 + 800082a: b29a uxth r2, r3 + 800082c: 6b3b ldr r3, [r7, #48] @ 0x30 + 800082e: 801a strh r2, [r3, #0] + 8000830: e007 b.n 8000842 + } else { + *backLen = n * 8; + 8000832: 231c movs r3, #28 + 8000834: 18fb adds r3, r7, r3 + 8000836: 781b ldrb r3, [r3, #0] + 8000838: b29b uxth r3, r3 + 800083a: 00db lsls r3, r3, #3 + 800083c: b29a uxth r2, r3 + 800083e: 6b3b ldr r3, [r7, #48] @ 0x30 + 8000840: 801a strh r2, [r3, #0] + } + + if (n == 0) { + 8000842: 221c movs r2, #28 + 8000844: 18bb adds r3, r7, r2 + 8000846: 781b ldrb r3, [r3, #0] + 8000848: 2b00 cmp r3, #0 + 800084a: d102 bne.n 8000852 + n = 1; + 800084c: 18bb adds r3, r7, r2 + 800084e: 2201 movs r2, #1 + 8000850: 701a strb r2, [r3, #0] + } + if (n > MFRC522_MAX_LEN) { + 8000852: 221c movs r2, #28 + 8000854: 18bb adds r3, r7, r2 + 8000856: 781b ldrb r3, [r3, #0] + 8000858: 2b10 cmp r3, #16 + 800085a: d902 bls.n 8000862 + n = MFRC522_MAX_LEN; + 800085c: 18bb adds r3, r7, r2 + 800085e: 2210 movs r2, #16 + 8000860: 701a strb r2, [r3, #0] + } + + //Reading the received data in FIFO + for (i = 0; i < n; i++) { + 8000862: 231a movs r3, #26 + 8000864: 18fb adds r3, r7, r3 + 8000866: 2200 movs r2, #0 + 8000868: 801a strh r2, [r3, #0] + 800086a: e020 b.n 80008ae + uint8_t d = rc522_regRead8(MFRC522_REG_FIFO_DATA); + 800086c: 2517 movs r5, #23 + 800086e: 197c adds r4, r7, r5 + 8000870: 2009 movs r0, #9 + 8000872: f7ff fdd7 bl 8000424 + 8000876: 0003 movs r3, r0 + 8000878: 7023 strb r3, [r4, #0] + if (l == 4) + 800087a: 2319 movs r3, #25 + 800087c: 18fb adds r3, r7, r3 + 800087e: 781b ldrb r3, [r3, #0] + 8000880: 2b04 cmp r3, #4 + 8000882: d106 bne.n 8000892 + printf("%02x ", d); + 8000884: 197b adds r3, r7, r5 + 8000886: 781a ldrb r2, [r3, #0] + 8000888: 4b1b ldr r3, [pc, #108] @ (80008f8 ) + 800088a: 0011 movs r1, r2 + 800088c: 0018 movs r0, r3 + 800088e: f004 fdab bl 80053e8 + backData[i] = d; + 8000892: 211a movs r1, #26 + 8000894: 187b adds r3, r7, r1 + 8000896: 881b ldrh r3, [r3, #0] + 8000898: 687a ldr r2, [r7, #4] + 800089a: 18d3 adds r3, r2, r3 + 800089c: 2217 movs r2, #23 + 800089e: 18ba adds r2, r7, r2 + 80008a0: 7812 ldrb r2, [r2, #0] + 80008a2: 701a strb r2, [r3, #0] + for (i = 0; i < n; i++) { + 80008a4: 187b adds r3, r7, r1 + 80008a6: 881a ldrh r2, [r3, #0] + 80008a8: 187b adds r3, r7, r1 + 80008aa: 3201 adds r2, #1 + 80008ac: 801a strh r2, [r3, #0] + 80008ae: 231c movs r3, #28 + 80008b0: 18fb adds r3, r7, r3 + 80008b2: 781b ldrb r3, [r3, #0] + 80008b4: b29b uxth r3, r3 + 80008b6: 221a movs r2, #26 + 80008b8: 18ba adds r2, r7, r2 + 80008ba: 8812 ldrh r2, [r2, #0] + 80008bc: 429a cmp r2, r3 + 80008be: d3d5 bcc.n 800086c + } + if (l==4) + 80008c0: 2319 movs r3, #25 + 80008c2: 18fb adds r3, r7, r3 + 80008c4: 781b ldrb r3, [r3, #0] + 80008c6: 2b04 cmp r3, #4 + 80008c8: d103 bne.n 80008d2 + printf("\r\n"); + 80008ca: 4b0c ldr r3, [pc, #48] @ (80008fc ) + 80008cc: 0018 movs r0, r3 + 80008ce: f004 fdf1 bl 80054b4 + return status; + 80008d2: 231f movs r3, #31 + 80008d4: 18fb adds r3, r7, r3 + 80008d6: 781b ldrb r3, [r3, #0] + 80008d8: e00a b.n 80008f0 + } + } else { + printf("error\r\n"); + 80008da: 4b09 ldr r3, [pc, #36] @ (8000900 ) + 80008dc: 0018 movs r0, r3 + 80008de: f004 fde9 bl 80054b4 + status = false; + 80008e2: 231f movs r3, #31 + 80008e4: 18fb adds r3, r7, r3 + 80008e6: 2200 movs r2, #0 + 80008e8: 701a strb r2, [r3, #0] + } + } + + return status; + 80008ea: 231f movs r3, #31 + 80008ec: 18fb adds r3, r7, r3 + 80008ee: 781b ldrb r3, [r3, #0] +} + 80008f0: 0018 movs r0, r3 + 80008f2: 46bd mov sp, r7 + 80008f4: b008 add sp, #32 + 80008f6: bdb0 pop {r4, r5, r7, pc} + 80008f8: 080061fc .word 0x080061fc + 80008fc: 08006204 .word 0x08006204 + 8000900: 08006208 .word 0x08006208 + +08000904 : + +bool rc522_antiColl(uint8_t* serNum) +{ + 8000904: b5b0 push {r4, r5, r7, lr} + 8000906: b086 sub sp, #24 + 8000908: af02 add r7, sp, #8 + 800090a: 6078 str r0, [r7, #4] + bool status; + uint8_t i; + uint8_t serNumCheck = 0; + 800090c: 230d movs r3, #13 + 800090e: 18fb adds r3, r7, r3 + 8000910: 2200 movs r2, #0 + 8000912: 701a strb r2, [r3, #0] + uint16_t unLen; + //for (i = 0; i < 4; i++) +// printf("Anticoll In %d: 0x%02x\r\n", i, serNum[i]); + + + rc522_regWrite8(MFRC522_REG_BIT_FRAMING, 0x00); //TxLastBists = BitFramingReg[2..0] + 8000914: 2100 movs r1, #0 + 8000916: 200d movs r0, #13 + 8000918: f7ff fdba bl 8000490 + + serNum[0] = PICC_ANTICOLL; + 800091c: 687b ldr r3, [r7, #4] + 800091e: 2293 movs r2, #147 @ 0x93 + 8000920: 701a strb r2, [r3, #0] + serNum[1] = 0x20; + 8000922: 687b ldr r3, [r7, #4] + 8000924: 3301 adds r3, #1 + 8000926: 2220 movs r2, #32 + 8000928: 701a strb r2, [r3, #0] + status = rc522_toCard(PCD_TRANSCEIVE, serNum, 2, serNum, &unLen); + 800092a: 250f movs r5, #15 + 800092c: 197c adds r4, r7, r5 + 800092e: 687a ldr r2, [r7, #4] + 8000930: 6879 ldr r1, [r7, #4] + 8000932: 230a movs r3, #10 + 8000934: 18fb adds r3, r7, r3 + 8000936: 9300 str r3, [sp, #0] + 8000938: 0013 movs r3, r2 + 800093a: 2202 movs r2, #2 + 800093c: 200c movs r0, #12 + 800093e: f7ff fe8b bl 8000658 + 8000942: 0003 movs r3, r0 + 8000944: 7023 strb r3, [r4, #0] + + //for (i = 0; i < 4; i++) +// printf("Anticoll ToCard %d: 0x%02x\r\n", i, serNum[i]); + + if (status == true) { + 8000946: 197b adds r3, r7, r5 + 8000948: 781b ldrb r3, [r3, #0] + 800094a: 2b00 cmp r3, #0 + 800094c: d028 beq.n 80009a0 + //Check card serial number + for (i = 0; i < 4; i++) { + 800094e: 230e movs r3, #14 + 8000950: 18fb adds r3, r7, r3 + 8000952: 2200 movs r2, #0 + 8000954: 701a strb r2, [r3, #0] + 8000956: e010 b.n 800097a + serNumCheck ^= serNum[i]; + 8000958: 200e movs r0, #14 + 800095a: 183b adds r3, r7, r0 + 800095c: 781b ldrb r3, [r3, #0] + 800095e: 687a ldr r2, [r7, #4] + 8000960: 18d3 adds r3, r2, r3 + 8000962: 7819 ldrb r1, [r3, #0] + 8000964: 220d movs r2, #13 + 8000966: 18bb adds r3, r7, r2 + 8000968: 18ba adds r2, r7, r2 + 800096a: 7812 ldrb r2, [r2, #0] + 800096c: 404a eors r2, r1 + 800096e: 701a strb r2, [r3, #0] + for (i = 0; i < 4; i++) { + 8000970: 183b adds r3, r7, r0 + 8000972: 781a ldrb r2, [r3, #0] + 8000974: 183b adds r3, r7, r0 + 8000976: 3201 adds r2, #1 + 8000978: 701a strb r2, [r3, #0] + 800097a: 220e movs r2, #14 + 800097c: 18bb adds r3, r7, r2 + 800097e: 781b ldrb r3, [r3, #0] + 8000980: 2b03 cmp r3, #3 + 8000982: d9e9 bls.n 8000958 + } + if (serNumCheck != serNum[i]) { + 8000984: 18bb adds r3, r7, r2 + 8000986: 781b ldrb r3, [r3, #0] + 8000988: 687a ldr r2, [r7, #4] + 800098a: 18d3 adds r3, r2, r3 + 800098c: 781b ldrb r3, [r3, #0] + 800098e: 220d movs r2, #13 + 8000990: 18ba adds r2, r7, r2 + 8000992: 7812 ldrb r2, [r2, #0] + 8000994: 429a cmp r2, r3 + 8000996: d003 beq.n 80009a0 + status = false; + 8000998: 230f movs r3, #15 + 800099a: 18fb adds r3, r7, r3 + 800099c: 2200 movs r2, #0 + 800099e: 701a strb r2, [r3, #0] + } + } + return status; + 80009a0: 230f movs r3, #15 + 80009a2: 18fb adds r3, r7, r3 + 80009a4: 781b ldrb r3, [r3, #0] +} + 80009a6: 0018 movs r0, r3 + 80009a8: 46bd mov sp, r7 + 80009aa: b004 add sp, #16 + 80009ac: bdb0 pop {r4, r5, r7, pc} + +080009ae : + +void rc522_halt(void) +{ + 80009ae: b580 push {r7, lr} + 80009b0: b084 sub sp, #16 + 80009b2: af02 add r7, sp, #8 + uint16_t unLen; + uint8_t buff[4]; + + buff[0] = PICC_HALT; + 80009b4: 003b movs r3, r7 + 80009b6: 2250 movs r2, #80 @ 0x50 + 80009b8: 701a strb r2, [r3, #0] + buff[1] = 0; + 80009ba: 003b movs r3, r7 + 80009bc: 2200 movs r2, #0 + 80009be: 705a strb r2, [r3, #1] + rc522_calculateCRC(buff, 2, &buff[2]); + 80009c0: 003b movs r3, r7 + 80009c2: 1c9a adds r2, r3, #2 + 80009c4: 003b movs r3, r7 + 80009c6: 2102 movs r1, #2 + 80009c8: 0018 movs r0, r3 + 80009ca: f000 f80d bl 80009e8 + + rc522_toCard(PCD_TRANSCEIVE, buff, 4, buff, &unLen); + 80009ce: 003a movs r2, r7 + 80009d0: 0039 movs r1, r7 + 80009d2: 1dbb adds r3, r7, #6 + 80009d4: 9300 str r3, [sp, #0] + 80009d6: 0013 movs r3, r2 + 80009d8: 2204 movs r2, #4 + 80009da: 200c movs r0, #12 + 80009dc: f7ff fe3c bl 8000658 +} + 80009e0: 46c0 nop @ (mov r8, r8) + 80009e2: 46bd mov sp, r7 + 80009e4: b002 add sp, #8 + 80009e6: bd80 pop {r7, pc} + +080009e8 : + +void rc522_calculateCRC(uint8_t* pIndata, uint8_t len, uint8_t* pOutData) +{ + 80009e8: b5b0 push {r4, r5, r7, lr} + 80009ea: b086 sub sp, #24 + 80009ec: af00 add r7, sp, #0 + 80009ee: 60f8 str r0, [r7, #12] + 80009f0: 607a str r2, [r7, #4] + 80009f2: 230b movs r3, #11 + 80009f4: 18fb adds r3, r7, r3 + 80009f6: 1c0a adds r2, r1, #0 + 80009f8: 701a strb r2, [r3, #0] + uint8_t i, n; + + rc522_clearBit(MFRC522_REG_DIV_IRQ, 0x04); //CRCIrq = 0 + 80009fa: 2104 movs r1, #4 + 80009fc: 2005 movs r0, #5 + 80009fe: f7ff fd8f bl 8000520 + rc522_setBit(MFRC522_REG_FIFO_LEVEL, 0x80); //Clear the FIFO pointer + 8000a02: 2180 movs r1, #128 @ 0x80 + 8000a04: 200a movs r0, #10 + 8000a06: f7ff fd6d bl 80004e4 + //Write_MFRC522(CommandReg, PCD_IDLE); + + //Writing data to the FIFO + for (i = 0; i < len; i++) { + 8000a0a: 2317 movs r3, #23 + 8000a0c: 18fb adds r3, r7, r3 + 8000a0e: 2200 movs r2, #0 + 8000a10: 701a strb r2, [r3, #0] + 8000a12: e00e b.n 8000a32 + rc522_regWrite8(MFRC522_REG_FIFO_DATA, *(pIndata+i)); + 8000a14: 2417 movs r4, #23 + 8000a16: 193b adds r3, r7, r4 + 8000a18: 781b ldrb r3, [r3, #0] + 8000a1a: 68fa ldr r2, [r7, #12] + 8000a1c: 18d3 adds r3, r2, r3 + 8000a1e: 781b ldrb r3, [r3, #0] + 8000a20: 0019 movs r1, r3 + 8000a22: 2009 movs r0, #9 + 8000a24: f7ff fd34 bl 8000490 + for (i = 0; i < len; i++) { + 8000a28: 193b adds r3, r7, r4 + 8000a2a: 781a ldrb r2, [r3, #0] + 8000a2c: 193b adds r3, r7, r4 + 8000a2e: 3201 adds r2, #1 + 8000a30: 701a strb r2, [r3, #0] + 8000a32: 2417 movs r4, #23 + 8000a34: 193a adds r2, r7, r4 + 8000a36: 230b movs r3, #11 + 8000a38: 18fb adds r3, r7, r3 + 8000a3a: 7812 ldrb r2, [r2, #0] + 8000a3c: 781b ldrb r3, [r3, #0] + 8000a3e: 429a cmp r2, r3 + 8000a40: d3e8 bcc.n 8000a14 + } + rc522_regWrite8(MFRC522_REG_COMMAND, PCD_CALCCRC); + 8000a42: 2103 movs r1, #3 + 8000a44: 2001 movs r0, #1 + 8000a46: f7ff fd23 bl 8000490 + + //Wait CRC calculation is complete + i = 0xFF; + 8000a4a: 193b adds r3, r7, r4 + 8000a4c: 22ff movs r2, #255 @ 0xff + 8000a4e: 701a strb r2, [r3, #0] + do { + n = rc522_regRead8(MFRC522_REG_DIV_IRQ); + 8000a50: 2516 movs r5, #22 + 8000a52: 197c adds r4, r7, r5 + 8000a54: 2005 movs r0, #5 + 8000a56: f7ff fce5 bl 8000424 + 8000a5a: 0003 movs r3, r0 + 8000a5c: 7023 strb r3, [r4, #0] + i--; + 8000a5e: 2117 movs r1, #23 + 8000a60: 187b adds r3, r7, r1 + 8000a62: 781a ldrb r2, [r3, #0] + 8000a64: 187b adds r3, r7, r1 + 8000a66: 3a01 subs r2, #1 + 8000a68: 701a strb r2, [r3, #0] + } while ((i!=0) && !(n&0x04)); //CRCIrq = 1 + 8000a6a: 187b adds r3, r7, r1 + 8000a6c: 781b ldrb r3, [r3, #0] + 8000a6e: 2b00 cmp r3, #0 + 8000a70: d004 beq.n 8000a7c + 8000a72: 197b adds r3, r7, r5 + 8000a74: 781b ldrb r3, [r3, #0] + 8000a76: 2204 movs r2, #4 + 8000a78: 4013 ands r3, r2 + 8000a7a: d0e9 beq.n 8000a50 + + //Read CRC calculation result + pOutData[0] = rc522_regRead8(MFRC522_REG_CRC_RESULT_L); + 8000a7c: 2022 movs r0, #34 @ 0x22 + 8000a7e: f7ff fcd1 bl 8000424 + 8000a82: 0003 movs r3, r0 + 8000a84: 001a movs r2, r3 + 8000a86: 687b ldr r3, [r7, #4] + 8000a88: 701a strb r2, [r3, #0] + pOutData[1] = rc522_regRead8(MFRC522_REG_CRC_RESULT_M); + 8000a8a: 687b ldr r3, [r7, #4] + 8000a8c: 1c5c adds r4, r3, #1 + 8000a8e: 2021 movs r0, #33 @ 0x21 + 8000a90: f7ff fcc8 bl 8000424 + 8000a94: 0003 movs r3, r0 + 8000a96: 7023 strb r3, [r4, #0] +} + 8000a98: 46c0 nop @ (mov r8, r8) + 8000a9a: 46bd mov sp, r7 + 8000a9c: b006 add sp, #24 + 8000a9e: bdb0 pop {r4, r5, r7, pc} + +08000aa0 : + } + return true; +} + +void rc522_init(void) +{ + 8000aa0: b580 push {r7, lr} + 8000aa2: af00 add r7, sp, #0 + * SPI -> SPI + * PA8 ->RST + * PB0 ->CS + * */ + + HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, 0); + 8000aa4: 4b15 ldr r3, [pc, #84] @ (8000afc ) + 8000aa6: 2200 movs r2, #0 + 8000aa8: 2104 movs r1, #4 + 8000aaa: 0018 movs r0, r3 + 8000aac: f001 f8da bl 8001c64 + HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, 1); + 8000ab0: 4b12 ldr r3, [pc, #72] @ (8000afc ) + 8000ab2: 2201 movs r2, #1 + 8000ab4: 2104 movs r1, #4 + 8000ab6: 0018 movs r0, r3 + 8000ab8: f001 f8d4 bl 8001c64 + rc522_reset(); + 8000abc: f7ff fd52 bl 8000564 + + rc522_regWrite8(MFRC522_REG_T_MODE, 0x80); + 8000ac0: 2180 movs r1, #128 @ 0x80 + 8000ac2: 202a movs r0, #42 @ 0x2a + 8000ac4: f7ff fce4 bl 8000490 + rc522_regWrite8(MFRC522_REG_T_PRESCALER, 0xA9); + 8000ac8: 21a9 movs r1, #169 @ 0xa9 + 8000aca: 202b movs r0, #43 @ 0x2b + 8000acc: f7ff fce0 bl 8000490 + rc522_regWrite8(MFRC522_REG_T_RELOAD_L, 0xE8); + 8000ad0: 21e8 movs r1, #232 @ 0xe8 + 8000ad2: 202d movs r0, #45 @ 0x2d + 8000ad4: f7ff fcdc bl 8000490 + rc522_regWrite8(MFRC522_REG_T_RELOAD_H, 0x03); + 8000ad8: 2103 movs r1, #3 + 8000ada: 202c movs r0, #44 @ 0x2c + 8000adc: f7ff fcd8 bl 8000490 + + + rc522_regWrite8(MFRC522_REG_TX_AUTO, 0x40); + 8000ae0: 2140 movs r1, #64 @ 0x40 + 8000ae2: 2015 movs r0, #21 + 8000ae4: f7ff fcd4 bl 8000490 + rc522_regWrite8(MFRC522_REG_MODE, 0x3D); + 8000ae8: 213d movs r1, #61 @ 0x3d + 8000aea: 2011 movs r0, #17 + 8000aec: f7ff fcd0 bl 8000490 + + rc522_antennaON(); //Open the antenna + 8000af0: f7ff fd41 bl 8000576 +} + 8000af4: 46c0 nop @ (mov r8, r8) + 8000af6: 46bd mov sp, r7 + 8000af8: bd80 pop {r7, pc} + 8000afa: 46c0 nop @ (mov r8, r8) + 8000afc: 50000400 .word 0x50000400 + +08000b00
: /** * @brief The application entry point. * @retval int */ int main(void) { - 8000400: b5f0 push {r4, r5, r6, r7, lr} - 8000402: 46c6 mov lr, r8 - 8000404: b500 push {lr} - 8000406: b086 sub sp, #24 - 8000408: af06 add r7, sp, #24 + 8000b00: b590 push {r4, r7, lr} + 8000b02: b085 sub sp, #20 + 8000b04: af02 add r7, sp, #8 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 800040a: f001 f813 bl 8001434 + 8000b06: f000 fd35 bl 8001574 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 800040e: f000 f861 bl 80004d4 + 8000b0a: f000 f835 bl 8000b78 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8000412: f000 f96d bl 80006f0 + 8000b0e: f000 f941 bl 8000d94 MX_I2C1_Init(); - 8000416: f000 f89f bl 8000558 + 8000b12: f000 f873 bl 8000bfc MX_SPI1_Init(); - 800041a: f000 f8dd bl 80005d8 + 8000b16: f000 f8b1 bl 8000c7c MX_USART2_UART_Init(); - 800041e: f000 f919 bl 8000654 + 8000b1a: f000 f8ed bl 8000cf8 /* USER CODE BEGIN 2 */ init_keypad(); - 8000422: f000 fabb bl 800099c + 8000b1e: f000 faa9 bl 8001074 init_buttons(); - 8000426: f000 fadb bl 80009e0 + 8000b22: f000 fac9 bl 80010b8 + rc522_init(); + 8000b26: f7ff ffbb bl 8000aa0 printf("Hello, world!\r\n"); - 800042a: 4b22 ldr r3, [pc, #136] @ (80004b4 ) - 800042c: 0018 movs r0, r3 - 800042e: f004 feaf bl 8005190 + 8000b2a: 4b11 ldr r3, [pc, #68] @ (8000b70 ) + 8000b2c: 0018 movs r0, r3 + 8000b2e: f004 fcc1 bl 80054b4 + /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ + uint8_t rfid_id[4] = {0}; + 8000b32: 1d3b adds r3, r7, #4 + 8000b34: 2200 movs r2, #0 + 8000b36: 601a str r2, [r3, #0] while (1) { - HAL_Delay(100); - 8000432: 2064 movs r0, #100 @ 0x64 - 8000434: f001 f884 bl 8001540 - scan_keypad(); - 8000438: f000 faf0 bl 8000a1c - scan_buttons(); - 800043c: f000 fc7a bl 8000d34 -// printBinary(keypad_state); - printf("s: %d\r\n", keypad_state); - 8000440: 4b1d ldr r3, [pc, #116] @ (80004b8 ) - 8000442: 881b ldrh r3, [r3, #0] - 8000444: 001a movs r2, r3 - 8000446: 4b1d ldr r3, [pc, #116] @ (80004bc ) - 8000448: 0011 movs r1, r2 - 800044a: 0018 movs r0, r3 - 800044c: f004 fe3a bl 80050c4 - printf("r: %d\r\n", recv_cnt); - 8000450: 4b1b ldr r3, [pc, #108] @ (80004c0 ) - 8000452: 881b ldrh r3, [r3, #0] - 8000454: 001a movs r2, r3 - 8000456: 4b1b ldr r3, [pc, #108] @ (80004c4 ) - 8000458: 0011 movs r1, r2 - 800045a: 0018 movs r0, r3 - 800045c: f004 fe32 bl 80050c4 - printf("d: %d %d %d %d, %d %d %d %d\r\n", data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]); - 8000460: 4b19 ldr r3, [pc, #100] @ (80004c8 ) - 8000462: 781b ldrb r3, [r3, #0] - 8000464: 001e movs r6, r3 - 8000466: 4b18 ldr r3, [pc, #96] @ (80004c8 ) - 8000468: 785b ldrb r3, [r3, #1] - 800046a: 469c mov ip, r3 - 800046c: 4b16 ldr r3, [pc, #88] @ (80004c8 ) - 800046e: 789b ldrb r3, [r3, #2] - 8000470: 4698 mov r8, r3 - 8000472: 4b15 ldr r3, [pc, #84] @ (80004c8 ) - 8000474: 78db ldrb r3, [r3, #3] - 8000476: 001a movs r2, r3 - 8000478: 4b13 ldr r3, [pc, #76] @ (80004c8 ) - 800047a: 791b ldrb r3, [r3, #4] - 800047c: 0019 movs r1, r3 - 800047e: 4b12 ldr r3, [pc, #72] @ (80004c8 ) - 8000480: 795b ldrb r3, [r3, #5] - 8000482: 001c movs r4, r3 - 8000484: 4b10 ldr r3, [pc, #64] @ (80004c8 ) - 8000486: 799b ldrb r3, [r3, #6] - 8000488: 001d movs r5, r3 - 800048a: 4b0f ldr r3, [pc, #60] @ (80004c8 ) - 800048c: 79db ldrb r3, [r3, #7] - 800048e: 480f ldr r0, [pc, #60] @ (80004cc ) - 8000490: 9304 str r3, [sp, #16] - 8000492: 9503 str r5, [sp, #12] - 8000494: 9402 str r4, [sp, #8] - 8000496: 9101 str r1, [sp, #4] - 8000498: 9200 str r2, [sp, #0] - 800049a: 4643 mov r3, r8 - 800049c: 4662 mov r2, ip - 800049e: 0031 movs r1, r6 - 80004a0: f004 fe10 bl 80050c4 - HAL_I2C_Slave_Receive_IT(&hi2c1, (uint8_t*)&data, 8); - 80004a4: 4908 ldr r1, [pc, #32] @ (80004c8 ) - 80004a6: 4b0a ldr r3, [pc, #40] @ (80004d0 ) - 80004a8: 2208 movs r2, #8 - 80004aa: 0018 movs r0, r3 - 80004ac: f001 fc1a bl 8001ce4 - HAL_Delay(100); - 80004b0: 46c0 nop @ (mov r8, r8) - 80004b2: e7be b.n 8000432 - 80004b4: 08005ee0 .word 0x08005ee0 - 80004b8: 200001d2 .word 0x200001d2 - 80004bc: 08005ef0 .word 0x08005ef0 - 80004c0: 200001e0 .word 0x200001e0 - 80004c4: 08005ef8 .word 0x08005ef8 - 80004c8: 200001d8 .word 0x200001d8 - 80004cc: 08005f00 .word 0x08005f00 - 80004d0: 20000084 .word 0x20000084 + HAL_Delay(500); + 8000b38: 23fa movs r3, #250 @ 0xfa + 8000b3a: 005b lsls r3, r3, #1 + 8000b3c: 0018 movs r0, r3 + 8000b3e: f000 fd9f bl 8001680 +// printf("s: %d\r\n", keypad_state); +// printf("r: %d\r\n", recv_cnt); +// printf("d: %d %d %d %d, %d %d %d %d\r\n", data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]); +// HAL_I2C_Slave_Receive_IT(&hi2c1, (uint8_t*)&data, 8); -080004d4 : + if(rc522_checkCard(rfid_id)) { + 8000b42: 1d3b adds r3, r7, #4 + 8000b44: 0018 movs r0, r3 + 8000b46: f7ff fd2c bl 80005a2 + 8000b4a: 1e03 subs r3, r0, #0 + 8000b4c: d0f4 beq.n 8000b38 + printf("0x%x 0x%x 0x%x 0x%x\r\n", rfid_id[0], rfid_id[1], rfid_id[2], rfid_id[3]); + 8000b4e: 1d3b adds r3, r7, #4 + 8000b50: 781b ldrb r3, [r3, #0] + 8000b52: 0019 movs r1, r3 + 8000b54: 1d3b adds r3, r7, #4 + 8000b56: 785b ldrb r3, [r3, #1] + 8000b58: 001a movs r2, r3 + 8000b5a: 1d3b adds r3, r7, #4 + 8000b5c: 789b ldrb r3, [r3, #2] + 8000b5e: 001c movs r4, r3 + 8000b60: 1d3b adds r3, r7, #4 + 8000b62: 78db ldrb r3, [r3, #3] + 8000b64: 4803 ldr r0, [pc, #12] @ (8000b74 ) + 8000b66: 9300 str r3, [sp, #0] + 8000b68: 0023 movs r3, r4 + 8000b6a: f004 fc3d bl 80053e8 + HAL_Delay(500); + 8000b6e: e7e3 b.n 8000b38 + 8000b70: 08006218 .word 0x08006218 + 8000b74: 08006228 .word 0x08006228 + +08000b78 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 80004d4: b590 push {r4, r7, lr} - 80004d6: b093 sub sp, #76 @ 0x4c - 80004d8: af00 add r7, sp, #0 + 8000b78: b590 push {r4, r7, lr} + 8000b7a: b093 sub sp, #76 @ 0x4c + 8000b7c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 80004da: 2414 movs r4, #20 - 80004dc: 193b adds r3, r7, r4 - 80004de: 0018 movs r0, r3 - 80004e0: 2334 movs r3, #52 @ 0x34 - 80004e2: 001a movs r2, r3 - 80004e4: 2100 movs r1, #0 - 80004e6: f004 ff49 bl 800537c + 8000b7e: 2414 movs r4, #20 + 8000b80: 193b adds r3, r7, r4 + 8000b82: 0018 movs r0, r3 + 8000b84: 2334 movs r3, #52 @ 0x34 + 8000b86: 001a movs r2, r3 + 8000b88: 2100 movs r1, #0 + 8000b8a: f004 fd89 bl 80056a0 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 80004ea: 1d3b adds r3, r7, #4 - 80004ec: 0018 movs r0, r3 - 80004ee: 2310 movs r3, #16 - 80004f0: 001a movs r2, r3 - 80004f2: 2100 movs r1, #0 - 80004f4: f004 ff42 bl 800537c + 8000b8e: 1d3b adds r3, r7, #4 + 8000b90: 0018 movs r0, r3 + 8000b92: 2310 movs r3, #16 + 8000b94: 001a movs r2, r3 + 8000b96: 2100 movs r1, #0 + 8000b98: f004 fd82 bl 80056a0 /** Configure the main internal regulator output voltage */ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); - 80004f8: 2380 movs r3, #128 @ 0x80 - 80004fa: 009b lsls r3, r3, #2 - 80004fc: 0018 movs r0, r3 - 80004fe: f003 f83f bl 8003580 + 8000b9c: 2380 movs r3, #128 @ 0x80 + 8000b9e: 009b lsls r3, r3, #2 + 8000ba0: 0018 movs r0, r3 + 8000ba2: f002 f817 bl 8002bd4 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8000502: 193b adds r3, r7, r4 - 8000504: 2201 movs r2, #1 - 8000506: 601a str r2, [r3, #0] + 8000ba6: 193b adds r3, r7, r4 + 8000ba8: 2201 movs r2, #1 + 8000baa: 601a str r2, [r3, #0] RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8000508: 193b adds r3, r7, r4 - 800050a: 2280 movs r2, #128 @ 0x80 - 800050c: 0252 lsls r2, r2, #9 - 800050e: 605a str r2, [r3, #4] + 8000bac: 193b adds r3, r7, r4 + 8000bae: 2280 movs r2, #128 @ 0x80 + 8000bb0: 0252 lsls r2, r2, #9 + 8000bb2: 605a str r2, [r3, #4] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8000510: 193b adds r3, r7, r4 - 8000512: 2200 movs r2, #0 - 8000514: 61da str r2, [r3, #28] + 8000bb4: 193b adds r3, r7, r4 + 8000bb6: 2200 movs r2, #0 + 8000bb8: 61da str r2, [r3, #28] if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8000516: 193b adds r3, r7, r4 - 8000518: 0018 movs r0, r3 - 800051a: f003 f87d bl 8003618 - 800051e: 1e03 subs r3, r0, #0 - 8000520: d001 beq.n 8000526 + 8000bba: 193b adds r3, r7, r4 + 8000bbc: 0018 movs r0, r3 + 8000bbe: f002 f855 bl 8002c6c + 8000bc2: 1e03 subs r3, r0, #0 + 8000bc4: d001 beq.n 8000bca { Error_Handler(); - 8000522: f000 fd47 bl 8000fb4 + 8000bc6: f000 fa95 bl 80010f4 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8000526: 1d3b adds r3, r7, #4 - 8000528: 2207 movs r2, #7 - 800052a: 601a str r2, [r3, #0] + 8000bca: 1d3b adds r3, r7, #4 + 8000bcc: 2207 movs r2, #7 + 8000bce: 601a str r2, [r3, #0] |RCC_CLOCKTYPE_PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - 800052c: 1d3b adds r3, r7, #4 - 800052e: 2201 movs r2, #1 - 8000530: 605a str r2, [r3, #4] + 8000bd0: 1d3b adds r3, r7, #4 + 8000bd2: 2201 movs r2, #1 + 8000bd4: 605a str r2, [r3, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000532: 1d3b adds r3, r7, #4 - 8000534: 2200 movs r2, #0 - 8000536: 609a str r2, [r3, #8] + 8000bd6: 1d3b adds r3, r7, #4 + 8000bd8: 2200 movs r2, #0 + 8000bda: 609a str r2, [r3, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 8000538: 1d3b adds r3, r7, #4 - 800053a: 2200 movs r2, #0 - 800053c: 60da str r2, [r3, #12] + 8000bdc: 1d3b adds r3, r7, #4 + 8000bde: 2200 movs r2, #0 + 8000be0: 60da str r2, [r3, #12] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 800053e: 1d3b adds r3, r7, #4 - 8000540: 2100 movs r1, #0 - 8000542: 0018 movs r0, r3 - 8000544: f003 fb78 bl 8003c38 - 8000548: 1e03 subs r3, r0, #0 - 800054a: d001 beq.n 8000550 + 8000be2: 1d3b adds r3, r7, #4 + 8000be4: 2100 movs r1, #0 + 8000be6: 0018 movs r0, r3 + 8000be8: f002 fb50 bl 800328c + 8000bec: 1e03 subs r3, r0, #0 + 8000bee: d001 beq.n 8000bf4 { Error_Handler(); - 800054c: f000 fd32 bl 8000fb4 + 8000bf0: f000 fa80 bl 80010f4 } } - 8000550: 46c0 nop @ (mov r8, r8) - 8000552: 46bd mov sp, r7 - 8000554: b013 add sp, #76 @ 0x4c - 8000556: bd90 pop {r4, r7, pc} + 8000bf4: 46c0 nop @ (mov r8, r8) + 8000bf6: 46bd mov sp, r7 + 8000bf8: b013 add sp, #76 @ 0x4c + 8000bfa: bd90 pop {r4, r7, pc} -08000558 : +08000bfc : * @brief I2C1 Initialization Function * @param None * @retval None */ static void MX_I2C1_Init(void) { - 8000558: b580 push {r7, lr} - 800055a: af00 add r7, sp, #0 + 8000bfc: b580 push {r7, lr} + 8000bfe: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; - 800055c: 4b1b ldr r3, [pc, #108] @ (80005cc ) - 800055e: 4a1c ldr r2, [pc, #112] @ (80005d0 ) - 8000560: 601a str r2, [r3, #0] + 8000c00: 4b1b ldr r3, [pc, #108] @ (8000c70 ) + 8000c02: 4a1c ldr r2, [pc, #112] @ (8000c74 ) + 8000c04: 601a str r2, [r3, #0] hi2c1.Init.Timing = 0x2000090E; - 8000562: 4b1a ldr r3, [pc, #104] @ (80005cc ) - 8000564: 4a1b ldr r2, [pc, #108] @ (80005d4 ) - 8000566: 605a str r2, [r3, #4] + 8000c06: 4b1a ldr r3, [pc, #104] @ (8000c70 ) + 8000c08: 4a1b ldr r2, [pc, #108] @ (8000c78 ) + 8000c0a: 605a str r2, [r3, #4] hi2c1.Init.OwnAddress1 = 252; - 8000568: 4b18 ldr r3, [pc, #96] @ (80005cc ) - 800056a: 22fc movs r2, #252 @ 0xfc - 800056c: 609a str r2, [r3, #8] + 8000c0c: 4b18 ldr r3, [pc, #96] @ (8000c70 ) + 8000c0e: 22fc movs r2, #252 @ 0xfc + 8000c10: 609a str r2, [r3, #8] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 800056e: 4b17 ldr r3, [pc, #92] @ (80005cc ) - 8000570: 2201 movs r2, #1 - 8000572: 60da str r2, [r3, #12] + 8000c12: 4b17 ldr r3, [pc, #92] @ (8000c70 ) + 8000c14: 2201 movs r2, #1 + 8000c16: 60da str r2, [r3, #12] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8000574: 4b15 ldr r3, [pc, #84] @ (80005cc ) - 8000576: 2200 movs r2, #0 - 8000578: 611a str r2, [r3, #16] + 8000c18: 4b15 ldr r3, [pc, #84] @ (8000c70 ) + 8000c1a: 2200 movs r2, #0 + 8000c1c: 611a str r2, [r3, #16] hi2c1.Init.OwnAddress2 = 0; - 800057a: 4b14 ldr r3, [pc, #80] @ (80005cc ) - 800057c: 2200 movs r2, #0 - 800057e: 615a str r2, [r3, #20] + 8000c1e: 4b14 ldr r3, [pc, #80] @ (8000c70 ) + 8000c20: 2200 movs r2, #0 + 8000c22: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; - 8000580: 4b12 ldr r3, [pc, #72] @ (80005cc ) - 8000582: 2200 movs r2, #0 - 8000584: 619a str r2, [r3, #24] + 8000c24: 4b12 ldr r3, [pc, #72] @ (8000c70 ) + 8000c26: 2200 movs r2, #0 + 8000c28: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8000586: 4b11 ldr r3, [pc, #68] @ (80005cc ) - 8000588: 2200 movs r2, #0 - 800058a: 61da str r2, [r3, #28] + 8000c2a: 4b11 ldr r3, [pc, #68] @ (8000c70 ) + 8000c2c: 2200 movs r2, #0 + 8000c2e: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 800058c: 4b0f ldr r3, [pc, #60] @ (80005cc ) - 800058e: 2200 movs r2, #0 - 8000590: 621a str r2, [r3, #32] + 8000c30: 4b0f ldr r3, [pc, #60] @ (8000c70 ) + 8000c32: 2200 movs r2, #0 + 8000c34: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 8000592: 4b0e ldr r3, [pc, #56] @ (80005cc ) - 8000594: 0018 movs r0, r3 - 8000596: f001 faff bl 8001b98 - 800059a: 1e03 subs r3, r0, #0 - 800059c: d001 beq.n 80005a2 + 8000c36: 4b0e ldr r3, [pc, #56] @ (8000c70 ) + 8000c38: 0018 movs r0, r3 + 8000c3a: f001 f831 bl 8001ca0 + 8000c3e: 1e03 subs r3, r0, #0 + 8000c40: d001 beq.n 8000c46 { Error_Handler(); - 800059e: f000 fd09 bl 8000fb4 + 8000c42: f000 fa57 bl 80010f4 } /** Configure Analogue filter */ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) - 80005a2: 4b0a ldr r3, [pc, #40] @ (80005cc ) - 80005a4: 2100 movs r1, #0 - 80005a6: 0018 movs r0, r3 - 80005a8: f002 ff52 bl 8003450 - 80005ac: 1e03 subs r3, r0, #0 - 80005ae: d001 beq.n 80005b4 + 8000c46: 4b0a ldr r3, [pc, #40] @ (8000c70 ) + 8000c48: 2100 movs r1, #0 + 8000c4a: 0018 movs r0, r3 + 8000c4c: f001 ff2a bl 8002aa4 + 8000c50: 1e03 subs r3, r0, #0 + 8000c52: d001 beq.n 8000c58 { Error_Handler(); - 80005b0: f000 fd00 bl 8000fb4 + 8000c54: f000 fa4e bl 80010f4 } /** Configure Digital filter */ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) - 80005b4: 4b05 ldr r3, [pc, #20] @ (80005cc ) - 80005b6: 2100 movs r1, #0 - 80005b8: 0018 movs r0, r3 - 80005ba: f002 ff95 bl 80034e8 - 80005be: 1e03 subs r3, r0, #0 - 80005c0: d001 beq.n 80005c6 + 8000c58: 4b05 ldr r3, [pc, #20] @ (8000c70 ) + 8000c5a: 2100 movs r1, #0 + 8000c5c: 0018 movs r0, r3 + 8000c5e: f001 ff6d bl 8002b3c + 8000c62: 1e03 subs r3, r0, #0 + 8000c64: d001 beq.n 8000c6a { Error_Handler(); - 80005c2: f000 fcf7 bl 8000fb4 + 8000c66: f000 fa45 bl 80010f4 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } - 80005c6: 46c0 nop @ (mov r8, r8) - 80005c8: 46bd mov sp, r7 - 80005ca: bd80 pop {r7, pc} - 80005cc: 20000084 .word 0x20000084 - 80005d0: 40005400 .word 0x40005400 - 80005d4: 2000090e .word 0x2000090e + 8000c6a: 46c0 nop @ (mov r8, r8) + 8000c6c: 46bd mov sp, r7 + 8000c6e: bd80 pop {r7, pc} + 8000c70: 20000084 .word 0x20000084 + 8000c74: 40005400 .word 0x40005400 + 8000c78: 2000090e .word 0x2000090e -080005d8 : +08000c7c : * @brief SPI1 Initialization Function * @param None * @retval None */ static void MX_SPI1_Init(void) { - 80005d8: b580 push {r7, lr} - 80005da: af00 add r7, sp, #0 + 8000c7c: b580 push {r7, lr} + 8000c7e: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 parameter configuration*/ hspi1.Instance = SPI1; - 80005dc: 4b1b ldr r3, [pc, #108] @ (800064c ) - 80005de: 4a1c ldr r2, [pc, #112] @ (8000650 ) - 80005e0: 601a str r2, [r3, #0] + 8000c80: 4b1b ldr r3, [pc, #108] @ (8000cf0 ) + 8000c82: 4a1c ldr r2, [pc, #112] @ (8000cf4 ) + 8000c84: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; - 80005e2: 4b1a ldr r3, [pc, #104] @ (800064c ) - 80005e4: 2282 movs r2, #130 @ 0x82 - 80005e6: 0052 lsls r2, r2, #1 - 80005e8: 605a str r2, [r3, #4] + 8000c86: 4b1a ldr r3, [pc, #104] @ (8000cf0 ) + 8000c88: 2282 movs r2, #130 @ 0x82 + 8000c8a: 0052 lsls r2, r2, #1 + 8000c8c: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; - 80005ea: 4b18 ldr r3, [pc, #96] @ (800064c ) - 80005ec: 2200 movs r2, #0 - 80005ee: 609a str r2, [r3, #8] - hspi1.Init.DataSize = SPI_DATASIZE_4BIT; - 80005f0: 4b16 ldr r3, [pc, #88] @ (800064c ) - 80005f2: 22c0 movs r2, #192 @ 0xc0 - 80005f4: 0092 lsls r2, r2, #2 - 80005f6: 60da str r2, [r3, #12] + 8000c8e: 4b18 ldr r3, [pc, #96] @ (8000cf0 ) + 8000c90: 2200 movs r2, #0 + 8000c92: 609a str r2, [r3, #8] + hspi1.Init.DataSize = SPI_DATASIZE_8BIT; + 8000c94: 4b16 ldr r3, [pc, #88] @ (8000cf0 ) + 8000c96: 22e0 movs r2, #224 @ 0xe0 + 8000c98: 00d2 lsls r2, r2, #3 + 8000c9a: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; - 80005f8: 4b14 ldr r3, [pc, #80] @ (800064c ) - 80005fa: 2200 movs r2, #0 - 80005fc: 611a str r2, [r3, #16] + 8000c9c: 4b14 ldr r3, [pc, #80] @ (8000cf0 ) + 8000c9e: 2200 movs r2, #0 + 8000ca0: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - 80005fe: 4b13 ldr r3, [pc, #76] @ (800064c ) - 8000600: 2200 movs r2, #0 - 8000602: 615a str r2, [r3, #20] - hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT; - 8000604: 4b11 ldr r3, [pc, #68] @ (800064c ) - 8000606: 2280 movs r2, #128 @ 0x80 - 8000608: 02d2 lsls r2, r2, #11 - 800060a: 619a str r2, [r3, #24] + 8000ca2: 4b13 ldr r3, [pc, #76] @ (8000cf0 ) + 8000ca4: 2200 movs r2, #0 + 8000ca6: 615a str r2, [r3, #20] + hspi1.Init.NSS = SPI_NSS_SOFT; + 8000ca8: 4b11 ldr r3, [pc, #68] @ (8000cf0 ) + 8000caa: 2280 movs r2, #128 @ 0x80 + 8000cac: 0092 lsls r2, r2, #2 + 8000cae: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 800060c: 4b0f ldr r3, [pc, #60] @ (800064c ) - 800060e: 2200 movs r2, #0 - 8000610: 61da str r2, [r3, #28] + 8000cb0: 4b0f ldr r3, [pc, #60] @ (8000cf0 ) + 8000cb2: 2200 movs r2, #0 + 8000cb4: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - 8000612: 4b0e ldr r3, [pc, #56] @ (800064c ) - 8000614: 2200 movs r2, #0 - 8000616: 621a str r2, [r3, #32] + 8000cb6: 4b0e ldr r3, [pc, #56] @ (8000cf0 ) + 8000cb8: 2200 movs r2, #0 + 8000cba: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; - 8000618: 4b0c ldr r3, [pc, #48] @ (800064c ) - 800061a: 2200 movs r2, #0 - 800061c: 625a str r2, [r3, #36] @ 0x24 + 8000cbc: 4b0c ldr r3, [pc, #48] @ (8000cf0 ) + 8000cbe: 2200 movs r2, #0 + 8000cc0: 625a str r2, [r3, #36] @ 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 800061e: 4b0b ldr r3, [pc, #44] @ (800064c ) - 8000620: 2200 movs r2, #0 - 8000622: 629a str r2, [r3, #40] @ 0x28 + 8000cc2: 4b0b ldr r3, [pc, #44] @ (8000cf0 ) + 8000cc4: 2200 movs r2, #0 + 8000cc6: 629a str r2, [r3, #40] @ 0x28 hspi1.Init.CRCPolynomial = 7; - 8000624: 4b09 ldr r3, [pc, #36] @ (800064c ) - 8000626: 2207 movs r2, #7 - 8000628: 62da str r2, [r3, #44] @ 0x2c + 8000cc8: 4b09 ldr r3, [pc, #36] @ (8000cf0 ) + 8000cca: 2207 movs r2, #7 + 8000ccc: 62da str r2, [r3, #44] @ 0x2c hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; - 800062a: 4b08 ldr r3, [pc, #32] @ (800064c ) - 800062c: 2200 movs r2, #0 - 800062e: 631a str r2, [r3, #48] @ 0x30 + 8000cce: 4b08 ldr r3, [pc, #32] @ (8000cf0 ) + 8000cd0: 2200 movs r2, #0 + 8000cd2: 631a str r2, [r3, #48] @ 0x30 hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; - 8000630: 4b06 ldr r3, [pc, #24] @ (800064c ) - 8000632: 2208 movs r2, #8 - 8000634: 635a str r2, [r3, #52] @ 0x34 + 8000cd4: 4b06 ldr r3, [pc, #24] @ (8000cf0 ) + 8000cd6: 2208 movs r2, #8 + 8000cd8: 635a str r2, [r3, #52] @ 0x34 if (HAL_SPI_Init(&hspi1) != HAL_OK) - 8000636: 4b05 ldr r3, [pc, #20] @ (800064c ) - 8000638: 0018 movs r0, r3 - 800063a: f003 fddb bl 80041f4 - 800063e: 1e03 subs r3, r0, #0 - 8000640: d001 beq.n 8000646 + 8000cda: 4b05 ldr r3, [pc, #20] @ (8000cf0 ) + 8000cdc: 0018 movs r0, r3 + 8000cde: f002 fdb3 bl 8003848 + 8000ce2: 1e03 subs r3, r0, #0 + 8000ce4: d001 beq.n 8000cea { Error_Handler(); - 8000642: f000 fcb7 bl 8000fb4 + 8000ce6: f000 fa05 bl 80010f4 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } - 8000646: 46c0 nop @ (mov r8, r8) - 8000648: 46bd mov sp, r7 - 800064a: bd80 pop {r7, pc} - 800064c: 200000d8 .word 0x200000d8 - 8000650: 40013000 .word 0x40013000 + 8000cea: 46c0 nop @ (mov r8, r8) + 8000cec: 46bd mov sp, r7 + 8000cee: bd80 pop {r7, pc} + 8000cf0: 200000d8 .word 0x200000d8 + 8000cf4: 40013000 .word 0x40013000 -08000654 : +08000cf8 : * @brief USART2 Initialization Function * @param None * @retval None */ static void MX_USART2_UART_Init(void) { - 8000654: b580 push {r7, lr} - 8000656: af00 add r7, sp, #0 + 8000cf8: b580 push {r7, lr} + 8000cfa: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; - 8000658: 4b23 ldr r3, [pc, #140] @ (80006e8 ) - 800065a: 4a24 ldr r2, [pc, #144] @ (80006ec ) - 800065c: 601a str r2, [r3, #0] + 8000cfc: 4b23 ldr r3, [pc, #140] @ (8000d8c ) + 8000cfe: 4a24 ldr r2, [pc, #144] @ (8000d90 ) + 8000d00: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; - 800065e: 4b22 ldr r3, [pc, #136] @ (80006e8 ) - 8000660: 22e1 movs r2, #225 @ 0xe1 - 8000662: 0252 lsls r2, r2, #9 - 8000664: 605a str r2, [r3, #4] + 8000d02: 4b22 ldr r3, [pc, #136] @ (8000d8c ) + 8000d04: 22e1 movs r2, #225 @ 0xe1 + 8000d06: 0252 lsls r2, r2, #9 + 8000d08: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; - 8000666: 4b20 ldr r3, [pc, #128] @ (80006e8 ) - 8000668: 2200 movs r2, #0 - 800066a: 609a str r2, [r3, #8] + 8000d0a: 4b20 ldr r3, [pc, #128] @ (8000d8c ) + 8000d0c: 2200 movs r2, #0 + 8000d0e: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; - 800066c: 4b1e ldr r3, [pc, #120] @ (80006e8 ) - 800066e: 2200 movs r2, #0 - 8000670: 60da str r2, [r3, #12] + 8000d10: 4b1e ldr r3, [pc, #120] @ (8000d8c ) + 8000d12: 2200 movs r2, #0 + 8000d14: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; - 8000672: 4b1d ldr r3, [pc, #116] @ (80006e8 ) - 8000674: 2200 movs r2, #0 - 8000676: 611a str r2, [r3, #16] + 8000d16: 4b1d ldr r3, [pc, #116] @ (8000d8c ) + 8000d18: 2200 movs r2, #0 + 8000d1a: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; - 8000678: 4b1b ldr r3, [pc, #108] @ (80006e8 ) - 800067a: 220c movs r2, #12 - 800067c: 615a str r2, [r3, #20] + 8000d1c: 4b1b ldr r3, [pc, #108] @ (8000d8c ) + 8000d1e: 220c movs r2, #12 + 8000d20: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 800067e: 4b1a ldr r3, [pc, #104] @ (80006e8 ) - 8000680: 2200 movs r2, #0 - 8000682: 619a str r2, [r3, #24] + 8000d22: 4b1a ldr r3, [pc, #104] @ (8000d8c ) + 8000d24: 2200 movs r2, #0 + 8000d26: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 8000684: 4b18 ldr r3, [pc, #96] @ (80006e8 ) - 8000686: 2200 movs r2, #0 - 8000688: 61da str r2, [r3, #28] + 8000d28: 4b18 ldr r3, [pc, #96] @ (8000d8c ) + 8000d2a: 2200 movs r2, #0 + 8000d2c: 61da str r2, [r3, #28] huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 800068a: 4b17 ldr r3, [pc, #92] @ (80006e8 ) - 800068c: 2200 movs r2, #0 - 800068e: 621a str r2, [r3, #32] + 8000d2e: 4b17 ldr r3, [pc, #92] @ (8000d8c ) + 8000d30: 2200 movs r2, #0 + 8000d32: 621a str r2, [r3, #32] huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8000690: 4b15 ldr r3, [pc, #84] @ (80006e8 ) - 8000692: 2200 movs r2, #0 - 8000694: 625a str r2, [r3, #36] @ 0x24 + 8000d34: 4b15 ldr r3, [pc, #84] @ (8000d8c ) + 8000d36: 2200 movs r2, #0 + 8000d38: 625a str r2, [r3, #36] @ 0x24 huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 8000696: 4b14 ldr r3, [pc, #80] @ (80006e8 ) - 8000698: 2200 movs r2, #0 - 800069a: 629a str r2, [r3, #40] @ 0x28 + 8000d3a: 4b14 ldr r3, [pc, #80] @ (8000d8c ) + 8000d3c: 2200 movs r2, #0 + 8000d3e: 629a str r2, [r3, #40] @ 0x28 if (HAL_UART_Init(&huart2) != HAL_OK) - 800069c: 4b12 ldr r3, [pc, #72] @ (80006e8 ) - 800069e: 0018 movs r0, r3 - 80006a0: f003 fe60 bl 8004364 - 80006a4: 1e03 subs r3, r0, #0 - 80006a6: d001 beq.n 80006ac + 8000d40: 4b12 ldr r3, [pc, #72] @ (8000d8c ) + 8000d42: 0018 movs r0, r3 + 8000d44: f003 fca0 bl 8004688 + 8000d48: 1e03 subs r3, r0, #0 + 8000d4a: d001 beq.n 8000d50 { Error_Handler(); - 80006a8: f000 fc84 bl 8000fb4 + 8000d4c: f000 f9d2 bl 80010f4 } if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 80006ac: 4b0e ldr r3, [pc, #56] @ (80006e8 ) - 80006ae: 2100 movs r1, #0 - 80006b0: 0018 movs r0, r3 - 80006b2: f004 fb63 bl 8004d7c - 80006b6: 1e03 subs r3, r0, #0 - 80006b8: d001 beq.n 80006be + 8000d50: 4b0e ldr r3, [pc, #56] @ (8000d8c ) + 8000d52: 2100 movs r1, #0 + 8000d54: 0018 movs r0, r3 + 8000d56: f004 f9a3 bl 80050a0 + 8000d5a: 1e03 subs r3, r0, #0 + 8000d5c: d001 beq.n 8000d62 { Error_Handler(); - 80006ba: f000 fc7b bl 8000fb4 + 8000d5e: f000 f9c9 bl 80010f4 } if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 80006be: 4b0a ldr r3, [pc, #40] @ (80006e8 ) - 80006c0: 2100 movs r1, #0 - 80006c2: 0018 movs r0, r3 - 80006c4: f004 fb9a bl 8004dfc - 80006c8: 1e03 subs r3, r0, #0 - 80006ca: d001 beq.n 80006d0 + 8000d62: 4b0a ldr r3, [pc, #40] @ (8000d8c ) + 8000d64: 2100 movs r1, #0 + 8000d66: 0018 movs r0, r3 + 8000d68: f004 f9da bl 8005120 + 8000d6c: 1e03 subs r3, r0, #0 + 8000d6e: d001 beq.n 8000d74 { Error_Handler(); - 80006cc: f000 fc72 bl 8000fb4 + 8000d70: f000 f9c0 bl 80010f4 } if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK) - 80006d0: 4b05 ldr r3, [pc, #20] @ (80006e8 ) - 80006d2: 0018 movs r0, r3 - 80006d4: f004 fb18 bl 8004d08 - 80006d8: 1e03 subs r3, r0, #0 - 80006da: d001 beq.n 80006e0 + 8000d74: 4b05 ldr r3, [pc, #20] @ (8000d8c ) + 8000d76: 0018 movs r0, r3 + 8000d78: f004 f958 bl 800502c + 8000d7c: 1e03 subs r3, r0, #0 + 8000d7e: d001 beq.n 8000d84 { Error_Handler(); - 80006dc: f000 fc6a bl 8000fb4 + 8000d80: f000 f9b8 bl 80010f4 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } - 80006e0: 46c0 nop @ (mov r8, r8) - 80006e2: 46bd mov sp, r7 - 80006e4: bd80 pop {r7, pc} - 80006e6: 46c0 nop @ (mov r8, r8) - 80006e8: 2000013c .word 0x2000013c - 80006ec: 40004400 .word 0x40004400 + 8000d84: 46c0 nop @ (mov r8, r8) + 8000d86: 46bd mov sp, r7 + 8000d88: bd80 pop {r7, pc} + 8000d8a: 46c0 nop @ (mov r8, r8) + 8000d8c: 2000013c .word 0x2000013c + 8000d90: 40004400 .word 0x40004400 -080006f0 : +08000d94 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 80006f0: b590 push {r4, r7, lr} - 80006f2: b08b sub sp, #44 @ 0x2c - 80006f4: af00 add r7, sp, #0 + 8000d94: b590 push {r4, r7, lr} + 8000d96: b08b sub sp, #44 @ 0x2c + 8000d98: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80006f6: 2414 movs r4, #20 - 80006f8: 193b adds r3, r7, r4 - 80006fa: 0018 movs r0, r3 - 80006fc: 2314 movs r3, #20 - 80006fe: 001a movs r2, r3 - 8000700: 2100 movs r1, #0 - 8000702: f004 fe3b bl 800537c + 8000d9a: 2414 movs r4, #20 + 8000d9c: 193b adds r3, r7, r4 + 8000d9e: 0018 movs r0, r3 + 8000da0: 2314 movs r3, #20 + 8000da2: 001a movs r2, r3 + 8000da4: 2100 movs r1, #0 + 8000da6: f004 fc7b bl 80056a0 /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOF_CLK_ENABLE(); - 8000706: 4b8e ldr r3, [pc, #568] @ (8000940 ) - 8000708: 6b5a ldr r2, [r3, #52] @ 0x34 - 800070a: 4b8d ldr r3, [pc, #564] @ (8000940 ) - 800070c: 2120 movs r1, #32 - 800070e: 430a orrs r2, r1 - 8000710: 635a str r2, [r3, #52] @ 0x34 - 8000712: 4b8b ldr r3, [pc, #556] @ (8000940 ) - 8000714: 6b5b ldr r3, [r3, #52] @ 0x34 - 8000716: 2220 movs r2, #32 - 8000718: 4013 ands r3, r2 - 800071a: 613b str r3, [r7, #16] - 800071c: 693b ldr r3, [r7, #16] + 8000daa: 4b9b ldr r3, [pc, #620] @ (8001018 ) + 8000dac: 6b5a ldr r2, [r3, #52] @ 0x34 + 8000dae: 4b9a ldr r3, [pc, #616] @ (8001018 ) + 8000db0: 2120 movs r1, #32 + 8000db2: 430a orrs r2, r1 + 8000db4: 635a str r2, [r3, #52] @ 0x34 + 8000db6: 4b98 ldr r3, [pc, #608] @ (8001018 ) + 8000db8: 6b5b ldr r3, [r3, #52] @ 0x34 + 8000dba: 2220 movs r2, #32 + 8000dbc: 4013 ands r3, r2 + 8000dbe: 613b str r3, [r7, #16] + 8000dc0: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 800071e: 4b88 ldr r3, [pc, #544] @ (8000940 ) - 8000720: 6b5a ldr r2, [r3, #52] @ 0x34 - 8000722: 4b87 ldr r3, [pc, #540] @ (8000940 ) - 8000724: 2101 movs r1, #1 - 8000726: 430a orrs r2, r1 - 8000728: 635a str r2, [r3, #52] @ 0x34 - 800072a: 4b85 ldr r3, [pc, #532] @ (8000940 ) - 800072c: 6b5b ldr r3, [r3, #52] @ 0x34 - 800072e: 2201 movs r2, #1 - 8000730: 4013 ands r3, r2 - 8000732: 60fb str r3, [r7, #12] - 8000734: 68fb ldr r3, [r7, #12] + 8000dc2: 4b95 ldr r3, [pc, #596] @ (8001018 ) + 8000dc4: 6b5a ldr r2, [r3, #52] @ 0x34 + 8000dc6: 4b94 ldr r3, [pc, #592] @ (8001018 ) + 8000dc8: 2101 movs r1, #1 + 8000dca: 430a orrs r2, r1 + 8000dcc: 635a str r2, [r3, #52] @ 0x34 + 8000dce: 4b92 ldr r3, [pc, #584] @ (8001018 ) + 8000dd0: 6b5b ldr r3, [r3, #52] @ 0x34 + 8000dd2: 2201 movs r2, #1 + 8000dd4: 4013 ands r3, r2 + 8000dd6: 60fb str r3, [r7, #12] + 8000dd8: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8000736: 4b82 ldr r3, [pc, #520] @ (8000940 ) - 8000738: 6b5a ldr r2, [r3, #52] @ 0x34 - 800073a: 4b81 ldr r3, [pc, #516] @ (8000940 ) - 800073c: 2102 movs r1, #2 - 800073e: 430a orrs r2, r1 - 8000740: 635a str r2, [r3, #52] @ 0x34 - 8000742: 4b7f ldr r3, [pc, #508] @ (8000940 ) - 8000744: 6b5b ldr r3, [r3, #52] @ 0x34 - 8000746: 2202 movs r2, #2 - 8000748: 4013 ands r3, r2 - 800074a: 60bb str r3, [r7, #8] - 800074c: 68bb ldr r3, [r7, #8] + 8000dda: 4b8f ldr r3, [pc, #572] @ (8001018 ) + 8000ddc: 6b5a ldr r2, [r3, #52] @ 0x34 + 8000dde: 4b8e ldr r3, [pc, #568] @ (8001018 ) + 8000de0: 2102 movs r1, #2 + 8000de2: 430a orrs r2, r1 + 8000de4: 635a str r2, [r3, #52] @ 0x34 + 8000de6: 4b8c ldr r3, [pc, #560] @ (8001018 ) + 8000de8: 6b5b ldr r3, [r3, #52] @ 0x34 + 8000dea: 2202 movs r2, #2 + 8000dec: 4013 ands r3, r2 + 8000dee: 60bb str r3, [r7, #8] + 8000df0: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOC_CLK_ENABLE(); - 800074e: 4b7c ldr r3, [pc, #496] @ (8000940 ) - 8000750: 6b5a ldr r2, [r3, #52] @ 0x34 - 8000752: 4b7b ldr r3, [pc, #492] @ (8000940 ) - 8000754: 2104 movs r1, #4 - 8000756: 430a orrs r2, r1 - 8000758: 635a str r2, [r3, #52] @ 0x34 - 800075a: 4b79 ldr r3, [pc, #484] @ (8000940 ) - 800075c: 6b5b ldr r3, [r3, #52] @ 0x34 - 800075e: 2204 movs r2, #4 - 8000760: 4013 ands r3, r2 - 8000762: 607b str r3, [r7, #4] - 8000764: 687b ldr r3, [r7, #4] + 8000df2: 4b89 ldr r3, [pc, #548] @ (8001018 ) + 8000df4: 6b5a ldr r2, [r3, #52] @ 0x34 + 8000df6: 4b88 ldr r3, [pc, #544] @ (8001018 ) + 8000df8: 2104 movs r1, #4 + 8000dfa: 430a orrs r2, r1 + 8000dfc: 635a str r2, [r3, #52] @ 0x34 + 8000dfe: 4b86 ldr r3, [pc, #536] @ (8001018 ) + 8000e00: 6b5b ldr r3, [r3, #52] @ 0x34 + 8000e02: 2204 movs r2, #4 + 8000e04: 4013 ands r3, r2 + 8000e06: 607b str r3, [r7, #4] + 8000e08: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); - 8000766: 4b76 ldr r3, [pc, #472] @ (8000940 ) - 8000768: 6b5a ldr r2, [r3, #52] @ 0x34 - 800076a: 4b75 ldr r3, [pc, #468] @ (8000940 ) - 800076c: 2108 movs r1, #8 - 800076e: 430a orrs r2, r1 - 8000770: 635a str r2, [r3, #52] @ 0x34 - 8000772: 4b73 ldr r3, [pc, #460] @ (8000940 ) - 8000774: 6b5b ldr r3, [r3, #52] @ 0x34 - 8000776: 2208 movs r2, #8 - 8000778: 4013 ands r3, r2 - 800077a: 603b str r3, [r7, #0] - 800077c: 683b ldr r3, [r7, #0] + 8000e0a: 4b83 ldr r3, [pc, #524] @ (8001018 ) + 8000e0c: 6b5a ldr r2, [r3, #52] @ 0x34 + 8000e0e: 4b82 ldr r3, [pc, #520] @ (8001018 ) + 8000e10: 2108 movs r1, #8 + 8000e12: 430a orrs r2, r1 + 8000e14: 635a str r2, [r3, #52] @ 0x34 + 8000e16: 4b80 ldr r3, [pc, #512] @ (8001018 ) + 8000e18: 6b5b ldr r3, [r3, #52] @ 0x34 + 8000e1a: 2208 movs r2, #8 + 8000e1c: 4013 ands r3, r2 + 8000e1e: 603b str r3, [r7, #0] + 8000e20: 683b ldr r3, [r7, #0] + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(RFID_CS_GPIO_Port, RFID_CS_Pin, GPIO_PIN_RESET); + 8000e22: 23a0 movs r3, #160 @ 0xa0 + 8000e24: 05db lsls r3, r3, #23 + 8000e26: 2200 movs r2, #0 + 8000e28: 2110 movs r1, #16 + 8000e2a: 0018 movs r0, r3 + 8000e2c: f000 ff1a bl 8001c64 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, GPIO_PIN_RESET); - 800077e: 4b71 ldr r3, [pc, #452] @ (8000944 ) - 8000780: 2200 movs r2, #0 - 8000782: 2104 movs r1, #4 - 8000784: 0018 movs r0, r3 - 8000786: f001 f9ea bl 8001b5e + 8000e30: 4b7a ldr r3, [pc, #488] @ (800101c ) + 8000e32: 2200 movs r2, #0 + 8000e34: 2104 movs r1, #4 + 8000e36: 0018 movs r0, r3 + 8000e38: f000 ff14 bl 8001c64 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, COL1_Pin|KP_C2_Pin|KP_C3_Pin|KP_C4_Pin, GPIO_PIN_SET); - 800078a: 496f ldr r1, [pc, #444] @ (8000948 ) - 800078c: 4b6d ldr r3, [pc, #436] @ (8000944 ) - 800078e: 2201 movs r2, #1 - 8000790: 0018 movs r0, r3 - 8000792: f001 f9e4 bl 8001b5e + 8000e3c: 4978 ldr r1, [pc, #480] @ (8001020 ) + 8000e3e: 4b77 ldr r3, [pc, #476] @ (800101c ) + 8000e40: 2201 movs r2, #1 + 8000e42: 0018 movs r0, r3 + 8000e44: f000 ff0e bl 8001c64 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(COL2_GPIO_Port, COL2_Pin, GPIO_PIN_SET); - 8000796: 2380 movs r3, #128 @ 0x80 - 8000798: 0059 lsls r1, r3, #1 - 800079a: 23a0 movs r3, #160 @ 0xa0 - 800079c: 05db lsls r3, r3, #23 - 800079e: 2201 movs r2, #1 - 80007a0: 0018 movs r0, r3 - 80007a2: f001 f9dc bl 8001b5e + 8000e48: 2380 movs r3, #128 @ 0x80 + 8000e4a: 0059 lsls r1, r3, #1 + 8000e4c: 23a0 movs r3, #160 @ 0xa0 + 8000e4e: 05db lsls r3, r3, #23 + 8000e50: 2201 movs r2, #1 + 8000e52: 0018 movs r0, r3 + 8000e54: f000 ff06 bl 8001c64 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, COL3_Pin|KP_C1_Pin, GPIO_PIN_SET); - 80007a6: 4b69 ldr r3, [pc, #420] @ (800094c ) - 80007a8: 2201 movs r2, #1 - 80007aa: 210a movs r1, #10 - 80007ac: 0018 movs r0, r3 - 80007ae: f001 f9d6 bl 8001b5e + 8000e58: 4b72 ldr r3, [pc, #456] @ (8001024 ) + 8000e5a: 2201 movs r2, #1 + 8000e5c: 210a movs r1, #10 + 8000e5e: 0018 movs r0, r3 + 8000e60: f000 ff00 bl 8001c64 /*Configure GPIO pin : INT_Pin */ GPIO_InitStruct.Pin = INT_Pin; - 80007b2: 193b adds r3, r7, r4 - 80007b4: 2202 movs r2, #2 - 80007b6: 601a str r2, [r3, #0] + 8000e64: 193b adds r3, r7, r4 + 8000e66: 2202 movs r2, #2 + 8000e68: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80007b8: 193b adds r3, r7, r4 - 80007ba: 2202 movs r2, #2 - 80007bc: 605a str r2, [r3, #4] + 8000e6a: 193b adds r3, r7, r4 + 8000e6c: 2202 movs r2, #2 + 8000e6e: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80007be: 193b adds r3, r7, r4 - 80007c0: 2200 movs r2, #0 - 80007c2: 609a str r2, [r3, #8] + 8000e70: 193b adds r3, r7, r4 + 8000e72: 2200 movs r2, #0 + 8000e74: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80007c4: 193b adds r3, r7, r4 - 80007c6: 2200 movs r2, #0 - 80007c8: 60da str r2, [r3, #12] + 8000e76: 193b adds r3, r7, r4 + 8000e78: 2200 movs r2, #0 + 8000e7a: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF7_EVENTOUT; - 80007ca: 193b adds r3, r7, r4 - 80007cc: 2207 movs r2, #7 - 80007ce: 611a str r2, [r3, #16] + 8000e7c: 193b adds r3, r7, r4 + 8000e7e: 2207 movs r2, #7 + 8000e80: 611a str r2, [r3, #16] HAL_GPIO_Init(INT_GPIO_Port, &GPIO_InitStruct); - 80007d0: 193a adds r2, r7, r4 - 80007d2: 23a0 movs r3, #160 @ 0xa0 - 80007d4: 05db lsls r3, r3, #23 - 80007d6: 0011 movs r1, r2 - 80007d8: 0018 movs r0, r3 - 80007da: f001 f83f bl 800185c + 8000e82: 193a adds r2, r7, r4 + 8000e84: 23a0 movs r3, #160 @ 0xa0 + 8000e86: 05db lsls r3, r3, #23 + 8000e88: 0011 movs r1, r2 + 8000e8a: 0018 movs r0, r3 + 8000e8c: f000 fd86 bl 800199c + + /*Configure GPIO pin : RFID_CS_Pin */ + GPIO_InitStruct.Pin = RFID_CS_Pin; + 8000e90: 193b adds r3, r7, r4 + 8000e92: 2210 movs r2, #16 + 8000e94: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 8000e96: 193b adds r3, r7, r4 + 8000e98: 2201 movs r2, #1 + 8000e9a: 605a str r2, [r3, #4] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8000e9c: 193b adds r3, r7, r4 + 8000e9e: 2200 movs r2, #0 + 8000ea0: 609a str r2, [r3, #8] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 8000ea2: 193b adds r3, r7, r4 + 8000ea4: 2200 movs r2, #0 + 8000ea6: 60da str r2, [r3, #12] + HAL_GPIO_Init(RFID_CS_GPIO_Port, &GPIO_InitStruct); + 8000ea8: 193a adds r2, r7, r4 + 8000eaa: 23a0 movs r3, #160 @ 0xa0 + 8000eac: 05db lsls r3, r3, #23 + 8000eae: 0011 movs r1, r2 + 8000eb0: 0018 movs r0, r3 + 8000eb2: f000 fd73 bl 800199c /*Configure GPIO pins : HALL_Pin CLOSE_Pin */ GPIO_InitStruct.Pin = HALL_Pin|CLOSE_Pin; - 80007de: 193b adds r3, r7, r4 - 80007e0: 2203 movs r2, #3 - 80007e2: 601a str r2, [r3, #0] + 8000eb6: 193b adds r3, r7, r4 + 8000eb8: 2203 movs r2, #3 + 8000eba: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 80007e4: 193b adds r3, r7, r4 - 80007e6: 2203 movs r2, #3 - 80007e8: 605a str r2, [r3, #4] + 8000ebc: 193b adds r3, r7, r4 + 8000ebe: 2203 movs r2, #3 + 8000ec0: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80007ea: 193b adds r3, r7, r4 - 80007ec: 2200 movs r2, #0 - 80007ee: 609a str r2, [r3, #8] + 8000ec2: 193b adds r3, r7, r4 + 8000ec4: 2200 movs r2, #0 + 8000ec6: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80007f0: 193b adds r3, r7, r4 - 80007f2: 4a54 ldr r2, [pc, #336] @ (8000944 ) - 80007f4: 0019 movs r1, r3 - 80007f6: 0010 movs r0, r2 - 80007f8: f001 f830 bl 800185c + 8000ec8: 193b adds r3, r7, r4 + 8000eca: 4a54 ldr r2, [pc, #336] @ (800101c ) + 8000ecc: 0019 movs r1, r3 + 8000ece: 0010 movs r0, r2 + 8000ed0: f000 fd64 bl 800199c /*Configure GPIO pin : RFID_RST_Pin */ GPIO_InitStruct.Pin = RFID_RST_Pin; - 80007fc: 193b adds r3, r7, r4 - 80007fe: 2204 movs r2, #4 - 8000800: 601a str r2, [r3, #0] + 8000ed4: 193b adds r3, r7, r4 + 8000ed6: 2204 movs r2, #4 + 8000ed8: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000802: 193b adds r3, r7, r4 - 8000804: 2201 movs r2, #1 - 8000806: 605a str r2, [r3, #4] + 8000eda: 193b adds r3, r7, r4 + 8000edc: 2201 movs r2, #1 + 8000ede: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000808: 193b adds r3, r7, r4 - 800080a: 2200 movs r2, #0 - 800080c: 609a str r2, [r3, #8] + 8000ee0: 193b adds r3, r7, r4 + 8000ee2: 2200 movs r2, #0 + 8000ee4: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800080e: 193b adds r3, r7, r4 - 8000810: 2200 movs r2, #0 - 8000812: 60da str r2, [r3, #12] + 8000ee6: 193b adds r3, r7, r4 + 8000ee8: 2200 movs r2, #0 + 8000eea: 60da str r2, [r3, #12] HAL_GPIO_Init(RFID_RST_GPIO_Port, &GPIO_InitStruct); - 8000814: 193b adds r3, r7, r4 - 8000816: 4a4b ldr r2, [pc, #300] @ (8000944 ) - 8000818: 0019 movs r1, r3 - 800081a: 0010 movs r0, r2 - 800081c: f001 f81e bl 800185c + 8000eec: 193b adds r3, r7, r4 + 8000eee: 4a4b ldr r2, [pc, #300] @ (800101c ) + 8000ef0: 0019 movs r1, r3 + 8000ef2: 0010 movs r0, r2 + 8000ef4: f000 fd52 bl 800199c /*Configure GPIO pins : SWT1_Pin SWT2_Pin */ GPIO_InitStruct.Pin = SWT1_Pin|SWT2_Pin; - 8000820: 0021 movs r1, r4 - 8000822: 187b adds r3, r7, r1 - 8000824: 22c0 movs r2, #192 @ 0xc0 - 8000826: 0112 lsls r2, r2, #4 - 8000828: 601a str r2, [r3, #0] + 8000ef8: 0021 movs r1, r4 + 8000efa: 187b adds r3, r7, r1 + 8000efc: 22c0 movs r2, #192 @ 0xc0 + 8000efe: 0112 lsls r2, r2, #4 + 8000f00: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 800082a: 000c movs r4, r1 - 800082c: 193b adds r3, r7, r4 - 800082e: 2200 movs r2, #0 - 8000830: 605a str r2, [r3, #4] + 8000f02: 000c movs r4, r1 + 8000f04: 193b adds r3, r7, r4 + 8000f06: 2200 movs r2, #0 + 8000f08: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000832: 193b adds r3, r7, r4 - 8000834: 2200 movs r2, #0 - 8000836: 609a str r2, [r3, #8] + 8000f0a: 193b adds r3, r7, r4 + 8000f0c: 2200 movs r2, #0 + 8000f0e: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8000838: 193b adds r3, r7, r4 - 800083a: 4a42 ldr r2, [pc, #264] @ (8000944 ) - 800083c: 0019 movs r1, r3 - 800083e: 0010 movs r0, r2 - 8000840: f001 f80c bl 800185c + 8000f10: 193b adds r3, r7, r4 + 8000f12: 4a42 ldr r2, [pc, #264] @ (800101c ) + 8000f14: 0019 movs r1, r3 + 8000f16: 0010 movs r0, r2 + 8000f18: f000 fd40 bl 800199c /*Configure GPIO pins : COL1_Pin KP_C2_Pin KP_C3_Pin KP_C4_Pin */ GPIO_InitStruct.Pin = COL1_Pin|KP_C2_Pin|KP_C3_Pin|KP_C4_Pin; - 8000844: 193b adds r3, r7, r4 - 8000846: 4a40 ldr r2, [pc, #256] @ (8000948 ) - 8000848: 601a str r2, [r3, #0] + 8000f1c: 193b adds r3, r7, r4 + 8000f1e: 4a40 ldr r2, [pc, #256] @ (8001020 ) + 8000f20: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 800084a: 193b adds r3, r7, r4 - 800084c: 2211 movs r2, #17 - 800084e: 605a str r2, [r3, #4] + 8000f22: 193b adds r3, r7, r4 + 8000f24: 2211 movs r2, #17 + 8000f26: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000850: 193b adds r3, r7, r4 - 8000852: 2200 movs r2, #0 - 8000854: 609a str r2, [r3, #8] + 8000f28: 193b adds r3, r7, r4 + 8000f2a: 2200 movs r2, #0 + 8000f2c: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000856: 193b adds r3, r7, r4 - 8000858: 2200 movs r2, #0 - 800085a: 60da str r2, [r3, #12] + 8000f2e: 193b adds r3, r7, r4 + 8000f30: 2200 movs r2, #0 + 8000f32: 60da str r2, [r3, #12] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800085c: 193b adds r3, r7, r4 - 800085e: 4a39 ldr r2, [pc, #228] @ (8000944 ) - 8000860: 0019 movs r1, r3 - 8000862: 0010 movs r0, r2 - 8000864: f000 fffa bl 800185c + 8000f34: 193b adds r3, r7, r4 + 8000f36: 4a39 ldr r2, [pc, #228] @ (800101c ) + 8000f38: 0019 movs r1, r3 + 8000f3a: 0010 movs r0, r2 + 8000f3c: f000 fd2e bl 800199c /*Configure GPIO pin : COL2_Pin */ GPIO_InitStruct.Pin = COL2_Pin; - 8000868: 0021 movs r1, r4 - 800086a: 187b adds r3, r7, r1 - 800086c: 2280 movs r2, #128 @ 0x80 - 800086e: 0052 lsls r2, r2, #1 - 8000870: 601a str r2, [r3, #0] + 8000f40: 0021 movs r1, r4 + 8000f42: 187b adds r3, r7, r1 + 8000f44: 2280 movs r2, #128 @ 0x80 + 8000f46: 0052 lsls r2, r2, #1 + 8000f48: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8000872: 000c movs r4, r1 - 8000874: 193b adds r3, r7, r4 - 8000876: 2211 movs r2, #17 - 8000878: 605a str r2, [r3, #4] + 8000f4a: 000c movs r4, r1 + 8000f4c: 193b adds r3, r7, r4 + 8000f4e: 2211 movs r2, #17 + 8000f50: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800087a: 193b adds r3, r7, r4 - 800087c: 2200 movs r2, #0 - 800087e: 609a str r2, [r3, #8] + 8000f52: 193b adds r3, r7, r4 + 8000f54: 2200 movs r2, #0 + 8000f56: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000880: 193b adds r3, r7, r4 - 8000882: 2200 movs r2, #0 - 8000884: 60da str r2, [r3, #12] + 8000f58: 193b adds r3, r7, r4 + 8000f5a: 2200 movs r2, #0 + 8000f5c: 60da str r2, [r3, #12] HAL_GPIO_Init(COL2_GPIO_Port, &GPIO_InitStruct); - 8000886: 193a adds r2, r7, r4 - 8000888: 23a0 movs r3, #160 @ 0xa0 - 800088a: 05db lsls r3, r3, #23 - 800088c: 0011 movs r1, r2 - 800088e: 0018 movs r0, r3 - 8000890: f000 ffe4 bl 800185c + 8000f5e: 193a adds r2, r7, r4 + 8000f60: 23a0 movs r3, #160 @ 0xa0 + 8000f62: 05db lsls r3, r3, #23 + 8000f64: 0011 movs r1, r2 + 8000f66: 0018 movs r0, r3 + 8000f68: f000 fd18 bl 800199c /*Configure GPIO pins : SWT3_Pin SWT4_Pin */ GPIO_InitStruct.Pin = SWT3_Pin|SWT4_Pin; - 8000894: 193b adds r3, r7, r4 - 8000896: 22c0 movs r2, #192 @ 0xc0 - 8000898: 601a str r2, [r3, #0] + 8000f6c: 193b adds r3, r7, r4 + 8000f6e: 22c0 movs r2, #192 @ 0xc0 + 8000f70: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 800089a: 193b adds r3, r7, r4 - 800089c: 2200 movs r2, #0 - 800089e: 605a str r2, [r3, #4] + 8000f72: 193b adds r3, r7, r4 + 8000f74: 2200 movs r2, #0 + 8000f76: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80008a0: 193b adds r3, r7, r4 - 80008a2: 2200 movs r2, #0 - 80008a4: 609a str r2, [r3, #8] + 8000f78: 193b adds r3, r7, r4 + 8000f7a: 2200 movs r2, #0 + 8000f7c: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 80008a6: 193b adds r3, r7, r4 - 80008a8: 4a29 ldr r2, [pc, #164] @ (8000950 ) - 80008aa: 0019 movs r1, r3 - 80008ac: 0010 movs r0, r2 - 80008ae: f000 ffd5 bl 800185c + 8000f7e: 193b adds r3, r7, r4 + 8000f80: 4a29 ldr r2, [pc, #164] @ (8001028 ) + 8000f82: 0019 movs r1, r3 + 8000f84: 0010 movs r0, r2 + 8000f86: f000 fd09 bl 800199c /*Configure GPIO pins : ROW1_Pin ROW2_Pin ROW3_Pin */ GPIO_InitStruct.Pin = ROW1_Pin|ROW2_Pin|ROW3_Pin; - 80008b2: 193b adds r3, r7, r4 - 80008b4: 2298 movs r2, #152 @ 0x98 - 80008b6: 0212 lsls r2, r2, #8 - 80008b8: 601a str r2, [r3, #0] + 8000f8a: 193b adds r3, r7, r4 + 8000f8c: 2298 movs r2, #152 @ 0x98 + 8000f8e: 0212 lsls r2, r2, #8 + 8000f90: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80008ba: 193b adds r3, r7, r4 - 80008bc: 2200 movs r2, #0 - 80008be: 605a str r2, [r3, #4] + 8000f92: 193b adds r3, r7, r4 + 8000f94: 2200 movs r2, #0 + 8000f96: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80008c0: 193b adds r3, r7, r4 - 80008c2: 2201 movs r2, #1 - 80008c4: 609a str r2, [r3, #8] + 8000f98: 193b adds r3, r7, r4 + 8000f9a: 2201 movs r2, #1 + 8000f9c: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80008c6: 193a adds r2, r7, r4 - 80008c8: 23a0 movs r3, #160 @ 0xa0 - 80008ca: 05db lsls r3, r3, #23 - 80008cc: 0011 movs r1, r2 - 80008ce: 0018 movs r0, r3 - 80008d0: f000 ffc4 bl 800185c + 8000f9e: 193a adds r2, r7, r4 + 8000fa0: 23a0 movs r3, #160 @ 0xa0 + 8000fa2: 05db lsls r3, r3, #23 + 8000fa4: 0011 movs r1, r2 + 8000fa6: 0018 movs r0, r3 + 8000fa8: f000 fcf8 bl 800199c /*Configure GPIO pins : ROW4_Pin TOUCH_Pin */ GPIO_InitStruct.Pin = ROW4_Pin|TOUCH_Pin; - 80008d4: 193b adds r3, r7, r4 - 80008d6: 2205 movs r2, #5 - 80008d8: 601a str r2, [r3, #0] + 8000fac: 193b adds r3, r7, r4 + 8000fae: 2205 movs r2, #5 + 8000fb0: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80008da: 193b adds r3, r7, r4 - 80008dc: 2200 movs r2, #0 - 80008de: 605a str r2, [r3, #4] + 8000fb2: 193b adds r3, r7, r4 + 8000fb4: 2200 movs r2, #0 + 8000fb6: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80008e0: 193b adds r3, r7, r4 - 80008e2: 2200 movs r2, #0 - 80008e4: 609a str r2, [r3, #8] + 8000fb8: 193b adds r3, r7, r4 + 8000fba: 2200 movs r2, #0 + 8000fbc: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 80008e6: 193b adds r3, r7, r4 - 80008e8: 4a18 ldr r2, [pc, #96] @ (800094c ) - 80008ea: 0019 movs r1, r3 - 80008ec: 0010 movs r0, r2 - 80008ee: f000 ffb5 bl 800185c + 8000fbe: 193b adds r3, r7, r4 + 8000fc0: 4a18 ldr r2, [pc, #96] @ (8001024 ) + 8000fc2: 0019 movs r1, r3 + 8000fc4: 0010 movs r0, r2 + 8000fc6: f000 fce9 bl 800199c /*Configure GPIO pins : COL3_Pin KP_C1_Pin */ GPIO_InitStruct.Pin = COL3_Pin|KP_C1_Pin; - 80008f2: 193b adds r3, r7, r4 - 80008f4: 220a movs r2, #10 - 80008f6: 601a str r2, [r3, #0] + 8000fca: 193b adds r3, r7, r4 + 8000fcc: 220a movs r2, #10 + 8000fce: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 80008f8: 193b adds r3, r7, r4 - 80008fa: 2211 movs r2, #17 - 80008fc: 605a str r2, [r3, #4] + 8000fd0: 193b adds r3, r7, r4 + 8000fd2: 2211 movs r2, #17 + 8000fd4: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80008fe: 193b adds r3, r7, r4 - 8000900: 2200 movs r2, #0 - 8000902: 609a str r2, [r3, #8] + 8000fd6: 193b adds r3, r7, r4 + 8000fd8: 2200 movs r2, #0 + 8000fda: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000904: 193b adds r3, r7, r4 - 8000906: 2200 movs r2, #0 - 8000908: 60da str r2, [r3, #12] + 8000fdc: 193b adds r3, r7, r4 + 8000fde: 2200 movs r2, #0 + 8000fe0: 60da str r2, [r3, #12] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 800090a: 193b adds r3, r7, r4 - 800090c: 4a0f ldr r2, [pc, #60] @ (800094c ) - 800090e: 0019 movs r1, r3 - 8000910: 0010 movs r0, r2 - 8000912: f000 ffa3 bl 800185c + 8000fe2: 193b adds r3, r7, r4 + 8000fe4: 4a0f ldr r2, [pc, #60] @ (8001024 ) + 8000fe6: 0019 movs r1, r3 + 8000fe8: 0010 movs r0, r2 + 8000fea: f000 fcd7 bl 800199c /*Configure GPIO pins : KP_R1_Pin KP_R2_Pin KP_R3_Pin KP_R4_Pin */ GPIO_InitStruct.Pin = KP_R1_Pin|KP_R2_Pin|KP_R3_Pin|KP_R4_Pin; - 8000916: 0021 movs r1, r4 - 8000918: 187b adds r3, r7, r1 - 800091a: 22f0 movs r2, #240 @ 0xf0 - 800091c: 0092 lsls r2, r2, #2 - 800091e: 601a str r2, [r3, #0] + 8000fee: 0021 movs r1, r4 + 8000ff0: 187b adds r3, r7, r1 + 8000ff2: 22f0 movs r2, #240 @ 0xf0 + 8000ff4: 0092 lsls r2, r2, #2 + 8000ff6: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8000920: 187b adds r3, r7, r1 - 8000922: 2200 movs r2, #0 - 8000924: 605a str r2, [r3, #4] + 8000ff8: 187b adds r3, r7, r1 + 8000ffa: 2200 movs r2, #0 + 8000ffc: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8000926: 187b adds r3, r7, r1 - 8000928: 2201 movs r2, #1 - 800092a: 609a str r2, [r3, #8] + 8000ffe: 187b adds r3, r7, r1 + 8001000: 2201 movs r2, #1 + 8001002: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800092c: 187b adds r3, r7, r1 - 800092e: 4a05 ldr r2, [pc, #20] @ (8000944 ) - 8000930: 0019 movs r1, r3 - 8000932: 0010 movs r0, r2 - 8000934: f000 ff92 bl 800185c + 8001004: 187b adds r3, r7, r1 + 8001006: 4a05 ldr r2, [pc, #20] @ (800101c ) + 8001008: 0019 movs r1, r3 + 800100a: 0010 movs r0, r2 + 800100c: f000 fcc6 bl 800199c /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } - 8000938: 46c0 nop @ (mov r8, r8) - 800093a: 46bd mov sp, r7 - 800093c: b00b add sp, #44 @ 0x2c - 800093e: bd90 pop {r4, r7, pc} - 8000940: 40021000 .word 0x40021000 - 8000944: 50000400 .word 0x50000400 - 8000948: 00008038 .word 0x00008038 - 800094c: 50000c00 .word 0x50000c00 - 8000950: 50000800 .word 0x50000800 + 8001010: 46c0 nop @ (mov r8, r8) + 8001012: 46bd mov sp, r7 + 8001014: b00b add sp, #44 @ 0x2c + 8001016: bd90 pop {r4, r7, pc} + 8001018: 40021000 .word 0x40021000 + 800101c: 50000400 .word 0x50000400 + 8001020: 00008038 .word 0x00008038 + 8001024: 50000c00 .word 0x50000c00 + 8001028: 50000800 .word 0x50000800 -08000954 <__io_putchar>: +0800102c <__io_putchar>: /* USER CODE BEGIN 4 */ PUTCHAR_PROTOTYPE { - 8000954: b580 push {r7, lr} - 8000956: b082 sub sp, #8 - 8000958: af00 add r7, sp, #0 - 800095a: 6078 str r0, [r7, #4] + 800102c: b580 push {r7, lr} + 800102e: b082 sub sp, #8 + 8001030: af00 add r7, sp, #0 + 8001032: 6078 str r0, [r7, #4] /* Place your implementation of fputc here */ /* e.g. write a character to the USART1 and Loop until the end of transmission */ HAL_UART_Transmit(&huart2, (uint8_t *)&ch, 1, 0xFFFF); - 800095c: 4b05 ldr r3, [pc, #20] @ (8000974 <__io_putchar+0x20>) - 800095e: 1d39 adds r1, r7, #4 - 8000960: 4805 ldr r0, [pc, #20] @ (8000978 <__io_putchar+0x24>) - 8000962: 2201 movs r2, #1 - 8000964: f003 fd54 bl 8004410 + 8001034: 4b05 ldr r3, [pc, #20] @ (800104c <__io_putchar+0x20>) + 8001036: 1d39 adds r1, r7, #4 + 8001038: 4805 ldr r0, [pc, #20] @ (8001050 <__io_putchar+0x24>) + 800103a: 2201 movs r2, #1 + 800103c: f003 fb7a bl 8004734 return ch; - 8000968: 687b ldr r3, [r7, #4] + 8001040: 687b ldr r3, [r7, #4] } - 800096a: 0018 movs r0, r3 - 800096c: 46bd mov sp, r7 - 800096e: b002 add sp, #8 - 8000970: bd80 pop {r7, pc} - 8000972: 46c0 nop @ (mov r8, r8) - 8000974: 0000ffff .word 0x0000ffff - 8000978: 2000013c .word 0x2000013c + 8001042: 0018 movs r0, r3 + 8001044: 46bd mov sp, r7 + 8001046: b002 add sp, #8 + 8001048: bd80 pop {r7, pc} + 800104a: 46c0 nop @ (mov r8, r8) + 800104c: 0000ffff .word 0x0000ffff + 8001050: 2000013c .word 0x2000013c -0800097c : +08001054 : void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef* hi2c) { - 800097c: b580 push {r7, lr} - 800097e: b082 sub sp, #8 - 8000980: af00 add r7, sp, #0 - 8000982: 6078 str r0, [r7, #4] + 8001054: b580 push {r7, lr} + 8001056: b082 sub sp, #8 + 8001058: af00 add r7, sp, #0 + 800105a: 6078 str r0, [r7, #4] recv_cnt += 1; - 8000984: 4b04 ldr r3, [pc, #16] @ (8000998 ) - 8000986: 881b ldrh r3, [r3, #0] - 8000988: 3301 adds r3, #1 - 800098a: b29a uxth r2, r3 - 800098c: 4b02 ldr r3, [pc, #8] @ (8000998 ) - 800098e: 801a strh r2, [r3, #0] + 800105c: 4b04 ldr r3, [pc, #16] @ (8001070 ) + 800105e: 881b ldrh r3, [r3, #0] + 8001060: 3301 adds r3, #1 + 8001062: b29a uxth r2, r3 + 8001064: 4b02 ldr r3, [pc, #8] @ (8001070 ) + 8001066: 801a strh r2, [r3, #0] } - 8000990: 46c0 nop @ (mov r8, r8) - 8000992: 46bd mov sp, r7 - 8000994: b002 add sp, #8 - 8000996: bd80 pop {r7, pc} - 8000998: 200001e0 .word 0x200001e0 + 8001068: 46c0 nop @ (mov r8, r8) + 800106a: 46bd mov sp, r7 + 800106c: b002 add sp, #8 + 800106e: bd80 pop {r7, pc} + 8001070: 200001d0 .word 0x200001d0 -0800099c : +08001074 : void init_keypad(void) { - 800099c: b580 push {r7, lr} - 800099e: af00 add r7, sp, #0 + 8001074: b580 push {r7, lr} + 8001076: af00 add r7, sp, #0 HAL_GPIO_WritePin(KP_C1_GPIO_Port, KP_C1_Pin, GPIO_PIN_SET); - 80009a0: 4b0d ldr r3, [pc, #52] @ (80009d8 ) - 80009a2: 2201 movs r2, #1 - 80009a4: 2108 movs r1, #8 - 80009a6: 0018 movs r0, r3 - 80009a8: f001 f8d9 bl 8001b5e + 8001078: 4b0d ldr r3, [pc, #52] @ (80010b0 ) + 800107a: 2201 movs r2, #1 + 800107c: 2108 movs r1, #8 + 800107e: 0018 movs r0, r3 + 8001080: f000 fdf0 bl 8001c64 HAL_GPIO_WritePin(KP_C2_GPIO_Port, KP_C2_Pin, GPIO_PIN_SET); - 80009ac: 4b0b ldr r3, [pc, #44] @ (80009dc ) - 80009ae: 2201 movs r2, #1 - 80009b0: 2108 movs r1, #8 - 80009b2: 0018 movs r0, r3 - 80009b4: f001 f8d3 bl 8001b5e + 8001084: 4b0b ldr r3, [pc, #44] @ (80010b4 ) + 8001086: 2201 movs r2, #1 + 8001088: 2108 movs r1, #8 + 800108a: 0018 movs r0, r3 + 800108c: f000 fdea bl 8001c64 HAL_GPIO_WritePin(KP_C3_GPIO_Port, KP_C3_Pin, GPIO_PIN_SET); - 80009b8: 4b08 ldr r3, [pc, #32] @ (80009dc ) - 80009ba: 2201 movs r2, #1 - 80009bc: 2110 movs r1, #16 - 80009be: 0018 movs r0, r3 - 80009c0: f001 f8cd bl 8001b5e + 8001090: 4b08 ldr r3, [pc, #32] @ (80010b4 ) + 8001092: 2201 movs r2, #1 + 8001094: 2110 movs r1, #16 + 8001096: 0018 movs r0, r3 + 8001098: f000 fde4 bl 8001c64 HAL_GPIO_WritePin(KP_C4_GPIO_Port, KP_C4_Pin, GPIO_PIN_SET); - 80009c4: 4b05 ldr r3, [pc, #20] @ (80009dc ) - 80009c6: 2201 movs r2, #1 - 80009c8: 2120 movs r1, #32 - 80009ca: 0018 movs r0, r3 - 80009cc: f001 f8c7 bl 8001b5e + 800109c: 4b05 ldr r3, [pc, #20] @ (80010b4 ) + 800109e: 2201 movs r2, #1 + 80010a0: 2120 movs r1, #32 + 80010a2: 0018 movs r0, r3 + 80010a4: f000 fdde bl 8001c64 } - 80009d0: 46c0 nop @ (mov r8, r8) - 80009d2: 46bd mov sp, r7 - 80009d4: bd80 pop {r7, pc} - 80009d6: 46c0 nop @ (mov r8, r8) - 80009d8: 50000c00 .word 0x50000c00 - 80009dc: 50000400 .word 0x50000400 + 80010a8: 46c0 nop @ (mov r8, r8) + 80010aa: 46bd mov sp, r7 + 80010ac: bd80 pop {r7, pc} + 80010ae: 46c0 nop @ (mov r8, r8) + 80010b0: 50000c00 .word 0x50000c00 + 80010b4: 50000400 .word 0x50000400 -080009e0 : +080010b8 : void init_buttons(void) { - 80009e0: b580 push {r7, lr} - 80009e2: af00 add r7, sp, #0 + 80010b8: b580 push {r7, lr} + 80010ba: af00 add r7, sp, #0 HAL_GPIO_WritePin(COL1_GPIO_Port, COL1_Pin, GPIO_PIN_SET); - 80009e4: 2380 movs r3, #128 @ 0x80 - 80009e6: 021b lsls r3, r3, #8 - 80009e8: 480a ldr r0, [pc, #40] @ (8000a14 ) - 80009ea: 2201 movs r2, #1 - 80009ec: 0019 movs r1, r3 - 80009ee: f001 f8b6 bl 8001b5e + 80010bc: 2380 movs r3, #128 @ 0x80 + 80010be: 021b lsls r3, r3, #8 + 80010c0: 480a ldr r0, [pc, #40] @ (80010ec ) + 80010c2: 2201 movs r2, #1 + 80010c4: 0019 movs r1, r3 + 80010c6: f000 fdcd bl 8001c64 HAL_GPIO_WritePin(COL2_GPIO_Port, COL2_Pin, GPIO_PIN_SET); - 80009f2: 2380 movs r3, #128 @ 0x80 - 80009f4: 0059 lsls r1, r3, #1 - 80009f6: 23a0 movs r3, #160 @ 0xa0 - 80009f8: 05db lsls r3, r3, #23 - 80009fa: 2201 movs r2, #1 - 80009fc: 0018 movs r0, r3 - 80009fe: f001 f8ae bl 8001b5e + 80010ca: 2380 movs r3, #128 @ 0x80 + 80010cc: 0059 lsls r1, r3, #1 + 80010ce: 23a0 movs r3, #160 @ 0xa0 + 80010d0: 05db lsls r3, r3, #23 + 80010d2: 2201 movs r2, #1 + 80010d4: 0018 movs r0, r3 + 80010d6: f000 fdc5 bl 8001c64 HAL_GPIO_WritePin(COL3_GPIO_Port, COL3_Pin, GPIO_PIN_SET); - 8000a02: 4b05 ldr r3, [pc, #20] @ (8000a18 ) - 8000a04: 2201 movs r2, #1 - 8000a06: 2102 movs r1, #2 - 8000a08: 0018 movs r0, r3 - 8000a0a: f001 f8a8 bl 8001b5e + 80010da: 4b05 ldr r3, [pc, #20] @ (80010f0 ) + 80010dc: 2201 movs r2, #1 + 80010de: 2102 movs r1, #2 + 80010e0: 0018 movs r0, r3 + 80010e2: f000 fdbf bl 8001c64 } - 8000a0e: 46c0 nop @ (mov r8, r8) - 8000a10: 46bd mov sp, r7 - 8000a12: bd80 pop {r7, pc} - 8000a14: 50000400 .word 0x50000400 - 8000a18: 50000c00 .word 0x50000c00 + 80010e6: 46c0 nop @ (mov r8, r8) + 80010e8: 46bd mov sp, r7 + 80010ea: bd80 pop {r7, pc} + 80010ec: 50000400 .word 0x50000400 + 80010f0: 50000c00 .word 0x50000c00 -08000a1c : - -void scan_keypad(void) -{ - 8000a1c: b580 push {r7, lr} - 8000a1e: af00 add r7, sp, #0 - old_keypad_state = keypad_state; - 8000a20: 4bc0 ldr r3, [pc, #768] @ (8000d24 ) - 8000a22: 881a ldrh r2, [r3, #0] - 8000a24: 4bc0 ldr r3, [pc, #768] @ (8000d28 ) - 8000a26: 801a strh r2, [r3, #0] - keypad_state = 0; - 8000a28: 4bbe ldr r3, [pc, #760] @ (8000d24 ) - 8000a2a: 2200 movs r2, #0 - 8000a2c: 801a strh r2, [r3, #0] - - HAL_GPIO_WritePin(KP_C1_GPIO_Port, KP_C1_Pin, GPIO_PIN_RESET); - 8000a2e: 4bbf ldr r3, [pc, #764] @ (8000d2c ) - 8000a30: 2200 movs r2, #0 - 8000a32: 2108 movs r1, #8 - 8000a34: 0018 movs r0, r3 - 8000a36: f001 f892 bl 8001b5e - keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 0; - 8000a3a: 4bbd ldr r3, [pc, #756] @ (8000d30 ) - 8000a3c: 2140 movs r1, #64 @ 0x40 - 8000a3e: 0018 movs r0, r3 - 8000a40: f001 f870 bl 8001b24 - 8000a44: 0003 movs r3, r0 - 8000a46: 425a negs r2, r3 - 8000a48: 4153 adcs r3, r2 - 8000a4a: b2db uxtb r3, r3 - 8000a4c: b21a sxth r2, r3 - 8000a4e: 4bb5 ldr r3, [pc, #724] @ (8000d24 ) - 8000a50: 881b ldrh r3, [r3, #0] - 8000a52: b21b sxth r3, r3 - 8000a54: 4313 orrs r3, r2 - 8000a56: b21b sxth r3, r3 - 8000a58: b29a uxth r2, r3 - 8000a5a: 4bb2 ldr r3, [pc, #712] @ (8000d24 ) - 8000a5c: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 1; - 8000a5e: 4bb4 ldr r3, [pc, #720] @ (8000d30 ) - 8000a60: 2180 movs r1, #128 @ 0x80 - 8000a62: 0018 movs r0, r3 - 8000a64: f001 f85e bl 8001b24 - 8000a68: 1e03 subs r3, r0, #0 - 8000a6a: d101 bne.n 8000a70 - 8000a6c: 2302 movs r3, #2 - 8000a6e: e000 b.n 8000a72 - 8000a70: 2300 movs r3, #0 - 8000a72: b21a sxth r2, r3 - 8000a74: 4bab ldr r3, [pc, #684] @ (8000d24 ) - 8000a76: 881b ldrh r3, [r3, #0] - 8000a78: b21b sxth r3, r3 - 8000a7a: 4313 orrs r3, r2 - 8000a7c: b21b sxth r3, r3 - 8000a7e: b29a uxth r2, r3 - 8000a80: 4ba8 ldr r3, [pc, #672] @ (8000d24 ) - 8000a82: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 2; - 8000a84: 2380 movs r3, #128 @ 0x80 - 8000a86: 005b lsls r3, r3, #1 - 8000a88: 4aa9 ldr r2, [pc, #676] @ (8000d30 ) - 8000a8a: 0019 movs r1, r3 - 8000a8c: 0010 movs r0, r2 - 8000a8e: f001 f849 bl 8001b24 - 8000a92: 1e03 subs r3, r0, #0 - 8000a94: d101 bne.n 8000a9a - 8000a96: 2304 movs r3, #4 - 8000a98: e000 b.n 8000a9c - 8000a9a: 2300 movs r3, #0 - 8000a9c: b21a sxth r2, r3 - 8000a9e: 4ba1 ldr r3, [pc, #644] @ (8000d24 ) - 8000aa0: 881b ldrh r3, [r3, #0] - 8000aa2: b21b sxth r3, r3 - 8000aa4: 4313 orrs r3, r2 - 8000aa6: b21b sxth r3, r3 - 8000aa8: b29a uxth r2, r3 - 8000aaa: 4b9e ldr r3, [pc, #632] @ (8000d24 ) - 8000aac: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 3; - 8000aae: 2380 movs r3, #128 @ 0x80 - 8000ab0: 009b lsls r3, r3, #2 - 8000ab2: 4a9f ldr r2, [pc, #636] @ (8000d30 ) - 8000ab4: 0019 movs r1, r3 - 8000ab6: 0010 movs r0, r2 - 8000ab8: f001 f834 bl 8001b24 - 8000abc: 1e03 subs r3, r0, #0 - 8000abe: d101 bne.n 8000ac4 - 8000ac0: 2308 movs r3, #8 - 8000ac2: e000 b.n 8000ac6 - 8000ac4: 2300 movs r3, #0 - 8000ac6: b21a sxth r2, r3 - 8000ac8: 4b96 ldr r3, [pc, #600] @ (8000d24 ) - 8000aca: 881b ldrh r3, [r3, #0] - 8000acc: b21b sxth r3, r3 - 8000ace: 4313 orrs r3, r2 - 8000ad0: b21b sxth r3, r3 - 8000ad2: b29a uxth r2, r3 - 8000ad4: 4b93 ldr r3, [pc, #588] @ (8000d24 ) - 8000ad6: 801a strh r2, [r3, #0] - HAL_GPIO_WritePin(KP_C1_GPIO_Port, KP_C1_Pin, GPIO_PIN_SET); - 8000ad8: 4b94 ldr r3, [pc, #592] @ (8000d2c ) - 8000ada: 2201 movs r2, #1 - 8000adc: 2108 movs r1, #8 - 8000ade: 0018 movs r0, r3 - 8000ae0: f001 f83d bl 8001b5e - - HAL_GPIO_WritePin(KP_C2_GPIO_Port, KP_C2_Pin, GPIO_PIN_RESET); - 8000ae4: 4b92 ldr r3, [pc, #584] @ (8000d30 ) - 8000ae6: 2200 movs r2, #0 - 8000ae8: 2108 movs r1, #8 - 8000aea: 0018 movs r0, r3 - 8000aec: f001 f837 bl 8001b5e - keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 4; - 8000af0: 4b8f ldr r3, [pc, #572] @ (8000d30 ) - 8000af2: 2140 movs r1, #64 @ 0x40 - 8000af4: 0018 movs r0, r3 - 8000af6: f001 f815 bl 8001b24 - 8000afa: 1e03 subs r3, r0, #0 - 8000afc: d101 bne.n 8000b02 - 8000afe: 2310 movs r3, #16 - 8000b00: e000 b.n 8000b04 - 8000b02: 2300 movs r3, #0 - 8000b04: b21a sxth r2, r3 - 8000b06: 4b87 ldr r3, [pc, #540] @ (8000d24 ) - 8000b08: 881b ldrh r3, [r3, #0] - 8000b0a: b21b sxth r3, r3 - 8000b0c: 4313 orrs r3, r2 - 8000b0e: b21b sxth r3, r3 - 8000b10: b29a uxth r2, r3 - 8000b12: 4b84 ldr r3, [pc, #528] @ (8000d24 ) - 8000b14: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 5; - 8000b16: 4b86 ldr r3, [pc, #536] @ (8000d30 ) - 8000b18: 2180 movs r1, #128 @ 0x80 - 8000b1a: 0018 movs r0, r3 - 8000b1c: f001 f802 bl 8001b24 - 8000b20: 1e03 subs r3, r0, #0 - 8000b22: d101 bne.n 8000b28 - 8000b24: 2320 movs r3, #32 - 8000b26: e000 b.n 8000b2a - 8000b28: 2300 movs r3, #0 - 8000b2a: b21a sxth r2, r3 - 8000b2c: 4b7d ldr r3, [pc, #500] @ (8000d24 ) - 8000b2e: 881b ldrh r3, [r3, #0] - 8000b30: b21b sxth r3, r3 - 8000b32: 4313 orrs r3, r2 - 8000b34: b21b sxth r3, r3 - 8000b36: b29a uxth r2, r3 - 8000b38: 4b7a ldr r3, [pc, #488] @ (8000d24 ) - 8000b3a: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 6; - 8000b3c: 2380 movs r3, #128 @ 0x80 - 8000b3e: 005b lsls r3, r3, #1 - 8000b40: 4a7b ldr r2, [pc, #492] @ (8000d30 ) - 8000b42: 0019 movs r1, r3 - 8000b44: 0010 movs r0, r2 - 8000b46: f000 ffed bl 8001b24 - 8000b4a: 1e03 subs r3, r0, #0 - 8000b4c: d101 bne.n 8000b52 - 8000b4e: 2340 movs r3, #64 @ 0x40 - 8000b50: e000 b.n 8000b54 - 8000b52: 2300 movs r3, #0 - 8000b54: b21a sxth r2, r3 - 8000b56: 4b73 ldr r3, [pc, #460] @ (8000d24 ) - 8000b58: 881b ldrh r3, [r3, #0] - 8000b5a: b21b sxth r3, r3 - 8000b5c: 4313 orrs r3, r2 - 8000b5e: b21b sxth r3, r3 - 8000b60: b29a uxth r2, r3 - 8000b62: 4b70 ldr r3, [pc, #448] @ (8000d24 ) - 8000b64: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 7; - 8000b66: 2380 movs r3, #128 @ 0x80 - 8000b68: 009b lsls r3, r3, #2 - 8000b6a: 4a71 ldr r2, [pc, #452] @ (8000d30 ) - 8000b6c: 0019 movs r1, r3 - 8000b6e: 0010 movs r0, r2 - 8000b70: f000 ffd8 bl 8001b24 - 8000b74: 1e03 subs r3, r0, #0 - 8000b76: d101 bne.n 8000b7c - 8000b78: 2380 movs r3, #128 @ 0x80 - 8000b7a: e000 b.n 8000b7e - 8000b7c: 2300 movs r3, #0 - 8000b7e: b21a sxth r2, r3 - 8000b80: 4b68 ldr r3, [pc, #416] @ (8000d24 ) - 8000b82: 881b ldrh r3, [r3, #0] - 8000b84: b21b sxth r3, r3 - 8000b86: 4313 orrs r3, r2 - 8000b88: b21b sxth r3, r3 - 8000b8a: b29a uxth r2, r3 - 8000b8c: 4b65 ldr r3, [pc, #404] @ (8000d24 ) - 8000b8e: 801a strh r2, [r3, #0] - HAL_GPIO_WritePin(KP_C2_GPIO_Port, KP_C2_Pin, GPIO_PIN_SET); - 8000b90: 4b67 ldr r3, [pc, #412] @ (8000d30 ) - 8000b92: 2201 movs r2, #1 - 8000b94: 2108 movs r1, #8 - 8000b96: 0018 movs r0, r3 - 8000b98: f000 ffe1 bl 8001b5e - - HAL_GPIO_WritePin(KP_C3_GPIO_Port, KP_C3_Pin, GPIO_PIN_RESET); - 8000b9c: 4b64 ldr r3, [pc, #400] @ (8000d30 ) - 8000b9e: 2200 movs r2, #0 - 8000ba0: 2110 movs r1, #16 - 8000ba2: 0018 movs r0, r3 - 8000ba4: f000 ffdb bl 8001b5e - keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 8; - 8000ba8: 4b61 ldr r3, [pc, #388] @ (8000d30 ) - 8000baa: 2140 movs r1, #64 @ 0x40 - 8000bac: 0018 movs r0, r3 - 8000bae: f000 ffb9 bl 8001b24 - 8000bb2: 1e03 subs r3, r0, #0 - 8000bb4: d102 bne.n 8000bbc - 8000bb6: 2380 movs r3, #128 @ 0x80 - 8000bb8: 005b lsls r3, r3, #1 - 8000bba: e000 b.n 8000bbe - 8000bbc: 2300 movs r3, #0 - 8000bbe: b21a sxth r2, r3 - 8000bc0: 4b58 ldr r3, [pc, #352] @ (8000d24 ) - 8000bc2: 881b ldrh r3, [r3, #0] - 8000bc4: b21b sxth r3, r3 - 8000bc6: 4313 orrs r3, r2 - 8000bc8: b21b sxth r3, r3 - 8000bca: b29a uxth r2, r3 - 8000bcc: 4b55 ldr r3, [pc, #340] @ (8000d24 ) - 8000bce: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 9; - 8000bd0: 4b57 ldr r3, [pc, #348] @ (8000d30 ) - 8000bd2: 2180 movs r1, #128 @ 0x80 - 8000bd4: 0018 movs r0, r3 - 8000bd6: f000 ffa5 bl 8001b24 - 8000bda: 1e03 subs r3, r0, #0 - 8000bdc: d102 bne.n 8000be4 - 8000bde: 2380 movs r3, #128 @ 0x80 - 8000be0: 009b lsls r3, r3, #2 - 8000be2: e000 b.n 8000be6 - 8000be4: 2300 movs r3, #0 - 8000be6: b21a sxth r2, r3 - 8000be8: 4b4e ldr r3, [pc, #312] @ (8000d24 ) - 8000bea: 881b ldrh r3, [r3, #0] - 8000bec: b21b sxth r3, r3 - 8000bee: 4313 orrs r3, r2 - 8000bf0: b21b sxth r3, r3 - 8000bf2: b29a uxth r2, r3 - 8000bf4: 4b4b ldr r3, [pc, #300] @ (8000d24 ) - 8000bf6: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 10; - 8000bf8: 2380 movs r3, #128 @ 0x80 - 8000bfa: 005b lsls r3, r3, #1 - 8000bfc: 4a4c ldr r2, [pc, #304] @ (8000d30 ) - 8000bfe: 0019 movs r1, r3 - 8000c00: 0010 movs r0, r2 - 8000c02: f000 ff8f bl 8001b24 - 8000c06: 1e03 subs r3, r0, #0 - 8000c08: d102 bne.n 8000c10 - 8000c0a: 2380 movs r3, #128 @ 0x80 - 8000c0c: 00db lsls r3, r3, #3 - 8000c0e: e000 b.n 8000c12 - 8000c10: 2300 movs r3, #0 - 8000c12: b21a sxth r2, r3 - 8000c14: 4b43 ldr r3, [pc, #268] @ (8000d24 ) - 8000c16: 881b ldrh r3, [r3, #0] - 8000c18: b21b sxth r3, r3 - 8000c1a: 4313 orrs r3, r2 - 8000c1c: b21b sxth r3, r3 - 8000c1e: b29a uxth r2, r3 - 8000c20: 4b40 ldr r3, [pc, #256] @ (8000d24 ) - 8000c22: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 11; - 8000c24: 2380 movs r3, #128 @ 0x80 - 8000c26: 009b lsls r3, r3, #2 - 8000c28: 4a41 ldr r2, [pc, #260] @ (8000d30 ) - 8000c2a: 0019 movs r1, r3 - 8000c2c: 0010 movs r0, r2 - 8000c2e: f000 ff79 bl 8001b24 - 8000c32: 1e03 subs r3, r0, #0 - 8000c34: d102 bne.n 8000c3c - 8000c36: 2380 movs r3, #128 @ 0x80 - 8000c38: 011b lsls r3, r3, #4 - 8000c3a: e000 b.n 8000c3e - 8000c3c: 2300 movs r3, #0 - 8000c3e: b21a sxth r2, r3 - 8000c40: 4b38 ldr r3, [pc, #224] @ (8000d24 ) - 8000c42: 881b ldrh r3, [r3, #0] - 8000c44: b21b sxth r3, r3 - 8000c46: 4313 orrs r3, r2 - 8000c48: b21b sxth r3, r3 - 8000c4a: b29a uxth r2, r3 - 8000c4c: 4b35 ldr r3, [pc, #212] @ (8000d24 ) - 8000c4e: 801a strh r2, [r3, #0] - HAL_GPIO_WritePin(KP_C3_GPIO_Port, KP_C3_Pin, GPIO_PIN_SET); - 8000c50: 4b37 ldr r3, [pc, #220] @ (8000d30 ) - 8000c52: 2201 movs r2, #1 - 8000c54: 2110 movs r1, #16 - 8000c56: 0018 movs r0, r3 - 8000c58: f000 ff81 bl 8001b5e - - HAL_GPIO_WritePin(KP_C4_GPIO_Port, KP_C4_Pin, GPIO_PIN_RESET); - 8000c5c: 4b34 ldr r3, [pc, #208] @ (8000d30 ) - 8000c5e: 2200 movs r2, #0 - 8000c60: 2120 movs r1, #32 - 8000c62: 0018 movs r0, r3 - 8000c64: f000 ff7b bl 8001b5e - keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 12; - 8000c68: 4b31 ldr r3, [pc, #196] @ (8000d30 ) - 8000c6a: 2140 movs r1, #64 @ 0x40 - 8000c6c: 0018 movs r0, r3 - 8000c6e: f000 ff59 bl 8001b24 - 8000c72: 1e03 subs r3, r0, #0 - 8000c74: d102 bne.n 8000c7c - 8000c76: 2380 movs r3, #128 @ 0x80 - 8000c78: 015b lsls r3, r3, #5 - 8000c7a: e000 b.n 8000c7e - 8000c7c: 2300 movs r3, #0 - 8000c7e: b21a sxth r2, r3 - 8000c80: 4b28 ldr r3, [pc, #160] @ (8000d24 ) - 8000c82: 881b ldrh r3, [r3, #0] - 8000c84: b21b sxth r3, r3 - 8000c86: 4313 orrs r3, r2 - 8000c88: b21b sxth r3, r3 - 8000c8a: b29a uxth r2, r3 - 8000c8c: 4b25 ldr r3, [pc, #148] @ (8000d24 ) - 8000c8e: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 13; - 8000c90: 4b27 ldr r3, [pc, #156] @ (8000d30 ) - 8000c92: 2180 movs r1, #128 @ 0x80 - 8000c94: 0018 movs r0, r3 - 8000c96: f000 ff45 bl 8001b24 - 8000c9a: 1e03 subs r3, r0, #0 - 8000c9c: d102 bne.n 8000ca4 - 8000c9e: 2380 movs r3, #128 @ 0x80 - 8000ca0: 019b lsls r3, r3, #6 - 8000ca2: e000 b.n 8000ca6 - 8000ca4: 2300 movs r3, #0 - 8000ca6: b21a sxth r2, r3 - 8000ca8: 4b1e ldr r3, [pc, #120] @ (8000d24 ) - 8000caa: 881b ldrh r3, [r3, #0] - 8000cac: b21b sxth r3, r3 - 8000cae: 4313 orrs r3, r2 - 8000cb0: b21b sxth r3, r3 - 8000cb2: b29a uxth r2, r3 - 8000cb4: 4b1b ldr r3, [pc, #108] @ (8000d24 ) - 8000cb6: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 14; - 8000cb8: 2380 movs r3, #128 @ 0x80 - 8000cba: 005b lsls r3, r3, #1 - 8000cbc: 4a1c ldr r2, [pc, #112] @ (8000d30 ) - 8000cbe: 0019 movs r1, r3 - 8000cc0: 0010 movs r0, r2 - 8000cc2: f000 ff2f bl 8001b24 - 8000cc6: 1e03 subs r3, r0, #0 - 8000cc8: d102 bne.n 8000cd0 - 8000cca: 2380 movs r3, #128 @ 0x80 - 8000ccc: 01db lsls r3, r3, #7 - 8000cce: e000 b.n 8000cd2 - 8000cd0: 2300 movs r3, #0 - 8000cd2: b21a sxth r2, r3 - 8000cd4: 4b13 ldr r3, [pc, #76] @ (8000d24 ) - 8000cd6: 881b ldrh r3, [r3, #0] - 8000cd8: b21b sxth r3, r3 - 8000cda: 4313 orrs r3, r2 - 8000cdc: b21b sxth r3, r3 - 8000cde: b29a uxth r2, r3 - 8000ce0: 4b10 ldr r3, [pc, #64] @ (8000d24 ) - 8000ce2: 801a strh r2, [r3, #0] - keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 15; - 8000ce4: 2380 movs r3, #128 @ 0x80 - 8000ce6: 009b lsls r3, r3, #2 - 8000ce8: 4a11 ldr r2, [pc, #68] @ (8000d30 ) - 8000cea: 0019 movs r1, r3 - 8000cec: 0010 movs r0, r2 - 8000cee: f000 ff19 bl 8001b24 - 8000cf2: 1e03 subs r3, r0, #0 - 8000cf4: d102 bne.n 8000cfc - 8000cf6: 2380 movs r3, #128 @ 0x80 - 8000cf8: 021b lsls r3, r3, #8 - 8000cfa: e000 b.n 8000cfe - 8000cfc: 2300 movs r3, #0 - 8000cfe: b21a sxth r2, r3 - 8000d00: 4b08 ldr r3, [pc, #32] @ (8000d24 ) - 8000d02: 881b ldrh r3, [r3, #0] - 8000d04: b21b sxth r3, r3 - 8000d06: 4313 orrs r3, r2 - 8000d08: b21b sxth r3, r3 - 8000d0a: b29a uxth r2, r3 - 8000d0c: 4b05 ldr r3, [pc, #20] @ (8000d24 ) - 8000d0e: 801a strh r2, [r3, #0] - HAL_GPIO_WritePin(KP_C4_GPIO_Port, KP_C4_Pin, GPIO_PIN_SET); - 8000d10: 4b07 ldr r3, [pc, #28] @ (8000d30 ) - 8000d12: 2201 movs r2, #1 - 8000d14: 2120 movs r1, #32 - 8000d16: 0018 movs r0, r3 - 8000d18: f000 ff21 bl 8001b5e -} - 8000d1c: 46c0 nop @ (mov r8, r8) - 8000d1e: 46bd mov sp, r7 - 8000d20: bd80 pop {r7, pc} - 8000d22: 46c0 nop @ (mov r8, r8) - 8000d24: 200001d2 .word 0x200001d2 - 8000d28: 200001d0 .word 0x200001d0 - 8000d2c: 50000c00 .word 0x50000c00 - 8000d30: 50000400 .word 0x50000400 - -08000d34 : - -void scan_buttons(void) -{ - 8000d34: b580 push {r7, lr} - 8000d36: af00 add r7, sp, #0 - old_button_state = button_state; - 8000d38: 4b9a ldr r3, [pc, #616] @ (8000fa4 ) - 8000d3a: 881a ldrh r2, [r3, #0] - 8000d3c: 4b9a ldr r3, [pc, #616] @ (8000fa8 ) - 8000d3e: 801a strh r2, [r3, #0] - button_state = 0; - 8000d40: 4b98 ldr r3, [pc, #608] @ (8000fa4 ) - 8000d42: 2200 movs r2, #0 - 8000d44: 801a strh r2, [r3, #0] - - HAL_GPIO_WritePin(COL1_GPIO_Port, COL1_Pin, GPIO_PIN_SET); - 8000d46: 2380 movs r3, #128 @ 0x80 - 8000d48: 021b lsls r3, r3, #8 - 8000d4a: 4898 ldr r0, [pc, #608] @ (8000fac ) - 8000d4c: 2201 movs r2, #1 - 8000d4e: 0019 movs r1, r3 - 8000d50: f000 ff05 bl 8001b5e - button_state |= (HAL_GPIO_ReadPin(ROW1_GPIO_Port, ROW1_Pin) == GPIO_PIN_RESET) << 0; - 8000d54: 2380 movs r3, #128 @ 0x80 - 8000d56: 011a lsls r2, r3, #4 - 8000d58: 23a0 movs r3, #160 @ 0xa0 - 8000d5a: 05db lsls r3, r3, #23 - 8000d5c: 0011 movs r1, r2 - 8000d5e: 0018 movs r0, r3 - 8000d60: f000 fee0 bl 8001b24 - 8000d64: 0003 movs r3, r0 - 8000d66: 425a negs r2, r3 - 8000d68: 4153 adcs r3, r2 - 8000d6a: b2db uxtb r3, r3 - 8000d6c: b21a sxth r2, r3 - 8000d6e: 4b8d ldr r3, [pc, #564] @ (8000fa4 ) - 8000d70: 881b ldrh r3, [r3, #0] - 8000d72: b21b sxth r3, r3 - 8000d74: 4313 orrs r3, r2 - 8000d76: b21b sxth r3, r3 - 8000d78: b29a uxth r2, r3 - 8000d7a: 4b8a ldr r3, [pc, #552] @ (8000fa4 ) - 8000d7c: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW2_GPIO_Port, ROW2_Pin) == GPIO_PIN_RESET) << 1; - 8000d7e: 2380 movs r3, #128 @ 0x80 - 8000d80: 015a lsls r2, r3, #5 - 8000d82: 23a0 movs r3, #160 @ 0xa0 - 8000d84: 05db lsls r3, r3, #23 - 8000d86: 0011 movs r1, r2 - 8000d88: 0018 movs r0, r3 - 8000d8a: f000 fecb bl 8001b24 - 8000d8e: 1e03 subs r3, r0, #0 - 8000d90: d101 bne.n 8000d96 - 8000d92: 2302 movs r3, #2 - 8000d94: e000 b.n 8000d98 - 8000d96: 2300 movs r3, #0 - 8000d98: b21a sxth r2, r3 - 8000d9a: 4b82 ldr r3, [pc, #520] @ (8000fa4 ) - 8000d9c: 881b ldrh r3, [r3, #0] - 8000d9e: b21b sxth r3, r3 - 8000da0: 4313 orrs r3, r2 - 8000da2: b21b sxth r3, r3 - 8000da4: b29a uxth r2, r3 - 8000da6: 4b7f ldr r3, [pc, #508] @ (8000fa4 ) - 8000da8: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW3_GPIO_Port, ROW3_Pin) == GPIO_PIN_RESET) << 2; - 8000daa: 2380 movs r3, #128 @ 0x80 - 8000dac: 021a lsls r2, r3, #8 - 8000dae: 23a0 movs r3, #160 @ 0xa0 - 8000db0: 05db lsls r3, r3, #23 - 8000db2: 0011 movs r1, r2 - 8000db4: 0018 movs r0, r3 - 8000db6: f000 feb5 bl 8001b24 - 8000dba: 1e03 subs r3, r0, #0 - 8000dbc: d101 bne.n 8000dc2 - 8000dbe: 2304 movs r3, #4 - 8000dc0: e000 b.n 8000dc4 - 8000dc2: 2300 movs r3, #0 - 8000dc4: b21a sxth r2, r3 - 8000dc6: 4b77 ldr r3, [pc, #476] @ (8000fa4 ) - 8000dc8: 881b ldrh r3, [r3, #0] - 8000dca: b21b sxth r3, r3 - 8000dcc: 4313 orrs r3, r2 - 8000dce: b21b sxth r3, r3 - 8000dd0: b29a uxth r2, r3 - 8000dd2: 4b74 ldr r3, [pc, #464] @ (8000fa4 ) - 8000dd4: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW4_GPIO_Port, ROW4_Pin) == GPIO_PIN_RESET) << 3; - 8000dd6: 4b76 ldr r3, [pc, #472] @ (8000fb0 ) - 8000dd8: 2101 movs r1, #1 - 8000dda: 0018 movs r0, r3 - 8000ddc: f000 fea2 bl 8001b24 - 8000de0: 1e03 subs r3, r0, #0 - 8000de2: d101 bne.n 8000de8 - 8000de4: 2308 movs r3, #8 - 8000de6: e000 b.n 8000dea - 8000de8: 2300 movs r3, #0 - 8000dea: b21a sxth r2, r3 - 8000dec: 4b6d ldr r3, [pc, #436] @ (8000fa4 ) - 8000dee: 881b ldrh r3, [r3, #0] - 8000df0: b21b sxth r3, r3 - 8000df2: 4313 orrs r3, r2 - 8000df4: b21b sxth r3, r3 - 8000df6: b29a uxth r2, r3 - 8000df8: 4b6a ldr r3, [pc, #424] @ (8000fa4 ) - 8000dfa: 801a strh r2, [r3, #0] - HAL_GPIO_WritePin(COL1_GPIO_Port, COL1_Pin, GPIO_PIN_RESET); - 8000dfc: 2380 movs r3, #128 @ 0x80 - 8000dfe: 021b lsls r3, r3, #8 - 8000e00: 486a ldr r0, [pc, #424] @ (8000fac ) - 8000e02: 2200 movs r2, #0 - 8000e04: 0019 movs r1, r3 - 8000e06: f000 feaa bl 8001b5e - - HAL_GPIO_WritePin(COL2_GPIO_Port, COL2_Pin, GPIO_PIN_SET); - 8000e0a: 2380 movs r3, #128 @ 0x80 - 8000e0c: 0059 lsls r1, r3, #1 - 8000e0e: 23a0 movs r3, #160 @ 0xa0 - 8000e10: 05db lsls r3, r3, #23 - 8000e12: 2201 movs r2, #1 - 8000e14: 0018 movs r0, r3 - 8000e16: f000 fea2 bl 8001b5e - button_state |= (HAL_GPIO_ReadPin(ROW1_GPIO_Port, ROW1_Pin) == GPIO_PIN_RESET) << 4; - 8000e1a: 2380 movs r3, #128 @ 0x80 - 8000e1c: 011a lsls r2, r3, #4 - 8000e1e: 23a0 movs r3, #160 @ 0xa0 - 8000e20: 05db lsls r3, r3, #23 - 8000e22: 0011 movs r1, r2 - 8000e24: 0018 movs r0, r3 - 8000e26: f000 fe7d bl 8001b24 - 8000e2a: 1e03 subs r3, r0, #0 - 8000e2c: d101 bne.n 8000e32 - 8000e2e: 2310 movs r3, #16 - 8000e30: e000 b.n 8000e34 - 8000e32: 2300 movs r3, #0 - 8000e34: b21a sxth r2, r3 - 8000e36: 4b5b ldr r3, [pc, #364] @ (8000fa4 ) - 8000e38: 881b ldrh r3, [r3, #0] - 8000e3a: b21b sxth r3, r3 - 8000e3c: 4313 orrs r3, r2 - 8000e3e: b21b sxth r3, r3 - 8000e40: b29a uxth r2, r3 - 8000e42: 4b58 ldr r3, [pc, #352] @ (8000fa4 ) - 8000e44: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW2_GPIO_Port, ROW2_Pin) == GPIO_PIN_RESET) << 5; - 8000e46: 2380 movs r3, #128 @ 0x80 - 8000e48: 015a lsls r2, r3, #5 - 8000e4a: 23a0 movs r3, #160 @ 0xa0 - 8000e4c: 05db lsls r3, r3, #23 - 8000e4e: 0011 movs r1, r2 - 8000e50: 0018 movs r0, r3 - 8000e52: f000 fe67 bl 8001b24 - 8000e56: 1e03 subs r3, r0, #0 - 8000e58: d101 bne.n 8000e5e - 8000e5a: 2320 movs r3, #32 - 8000e5c: e000 b.n 8000e60 - 8000e5e: 2300 movs r3, #0 - 8000e60: b21a sxth r2, r3 - 8000e62: 4b50 ldr r3, [pc, #320] @ (8000fa4 ) - 8000e64: 881b ldrh r3, [r3, #0] - 8000e66: b21b sxth r3, r3 - 8000e68: 4313 orrs r3, r2 - 8000e6a: b21b sxth r3, r3 - 8000e6c: b29a uxth r2, r3 - 8000e6e: 4b4d ldr r3, [pc, #308] @ (8000fa4 ) - 8000e70: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW3_GPIO_Port, ROW3_Pin) == GPIO_PIN_RESET) << 6; - 8000e72: 2380 movs r3, #128 @ 0x80 - 8000e74: 021a lsls r2, r3, #8 - 8000e76: 23a0 movs r3, #160 @ 0xa0 - 8000e78: 05db lsls r3, r3, #23 - 8000e7a: 0011 movs r1, r2 - 8000e7c: 0018 movs r0, r3 - 8000e7e: f000 fe51 bl 8001b24 - 8000e82: 1e03 subs r3, r0, #0 - 8000e84: d101 bne.n 8000e8a - 8000e86: 2340 movs r3, #64 @ 0x40 - 8000e88: e000 b.n 8000e8c - 8000e8a: 2300 movs r3, #0 - 8000e8c: b21a sxth r2, r3 - 8000e8e: 4b45 ldr r3, [pc, #276] @ (8000fa4 ) - 8000e90: 881b ldrh r3, [r3, #0] - 8000e92: b21b sxth r3, r3 - 8000e94: 4313 orrs r3, r2 - 8000e96: b21b sxth r3, r3 - 8000e98: b29a uxth r2, r3 - 8000e9a: 4b42 ldr r3, [pc, #264] @ (8000fa4 ) - 8000e9c: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW4_GPIO_Port, ROW4_Pin) == GPIO_PIN_RESET) << 7; - 8000e9e: 4b44 ldr r3, [pc, #272] @ (8000fb0 ) - 8000ea0: 2101 movs r1, #1 - 8000ea2: 0018 movs r0, r3 - 8000ea4: f000 fe3e bl 8001b24 - 8000ea8: 1e03 subs r3, r0, #0 - 8000eaa: d101 bne.n 8000eb0 - 8000eac: 2380 movs r3, #128 @ 0x80 - 8000eae: e000 b.n 8000eb2 - 8000eb0: 2300 movs r3, #0 - 8000eb2: b21a sxth r2, r3 - 8000eb4: 4b3b ldr r3, [pc, #236] @ (8000fa4 ) - 8000eb6: 881b ldrh r3, [r3, #0] - 8000eb8: b21b sxth r3, r3 - 8000eba: 4313 orrs r3, r2 - 8000ebc: b21b sxth r3, r3 - 8000ebe: b29a uxth r2, r3 - 8000ec0: 4b38 ldr r3, [pc, #224] @ (8000fa4 ) - 8000ec2: 801a strh r2, [r3, #0] - HAL_GPIO_WritePin(COL2_GPIO_Port, COL2_Pin, GPIO_PIN_RESET); - 8000ec4: 2380 movs r3, #128 @ 0x80 - 8000ec6: 0059 lsls r1, r3, #1 - 8000ec8: 23a0 movs r3, #160 @ 0xa0 - 8000eca: 05db lsls r3, r3, #23 - 8000ecc: 2200 movs r2, #0 - 8000ece: 0018 movs r0, r3 - 8000ed0: f000 fe45 bl 8001b5e - - HAL_GPIO_WritePin(COL3_GPIO_Port, COL3_Pin, GPIO_PIN_SET); - 8000ed4: 4b36 ldr r3, [pc, #216] @ (8000fb0 ) - 8000ed6: 2201 movs r2, #1 - 8000ed8: 2102 movs r1, #2 - 8000eda: 0018 movs r0, r3 - 8000edc: f000 fe3f bl 8001b5e - button_state |= (HAL_GPIO_ReadPin(ROW1_GPIO_Port, ROW1_Pin) == GPIO_PIN_RESET) << 8; - 8000ee0: 2380 movs r3, #128 @ 0x80 - 8000ee2: 011a lsls r2, r3, #4 - 8000ee4: 23a0 movs r3, #160 @ 0xa0 - 8000ee6: 05db lsls r3, r3, #23 - 8000ee8: 0011 movs r1, r2 - 8000eea: 0018 movs r0, r3 - 8000eec: f000 fe1a bl 8001b24 - 8000ef0: 1e03 subs r3, r0, #0 - 8000ef2: d102 bne.n 8000efa - 8000ef4: 2380 movs r3, #128 @ 0x80 - 8000ef6: 005b lsls r3, r3, #1 - 8000ef8: e000 b.n 8000efc - 8000efa: 2300 movs r3, #0 - 8000efc: b21a sxth r2, r3 - 8000efe: 4b29 ldr r3, [pc, #164] @ (8000fa4 ) - 8000f00: 881b ldrh r3, [r3, #0] - 8000f02: b21b sxth r3, r3 - 8000f04: 4313 orrs r3, r2 - 8000f06: b21b sxth r3, r3 - 8000f08: b29a uxth r2, r3 - 8000f0a: 4b26 ldr r3, [pc, #152] @ (8000fa4 ) - 8000f0c: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW2_GPIO_Port, ROW2_Pin) == GPIO_PIN_RESET) << 9; - 8000f0e: 2380 movs r3, #128 @ 0x80 - 8000f10: 015a lsls r2, r3, #5 - 8000f12: 23a0 movs r3, #160 @ 0xa0 - 8000f14: 05db lsls r3, r3, #23 - 8000f16: 0011 movs r1, r2 - 8000f18: 0018 movs r0, r3 - 8000f1a: f000 fe03 bl 8001b24 - 8000f1e: 1e03 subs r3, r0, #0 - 8000f20: d102 bne.n 8000f28 - 8000f22: 2380 movs r3, #128 @ 0x80 - 8000f24: 009b lsls r3, r3, #2 - 8000f26: e000 b.n 8000f2a - 8000f28: 2300 movs r3, #0 - 8000f2a: b21a sxth r2, r3 - 8000f2c: 4b1d ldr r3, [pc, #116] @ (8000fa4 ) - 8000f2e: 881b ldrh r3, [r3, #0] - 8000f30: b21b sxth r3, r3 - 8000f32: 4313 orrs r3, r2 - 8000f34: b21b sxth r3, r3 - 8000f36: b29a uxth r2, r3 - 8000f38: 4b1a ldr r3, [pc, #104] @ (8000fa4 ) - 8000f3a: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW3_GPIO_Port, ROW3_Pin) == GPIO_PIN_RESET) << 10; - 8000f3c: 2380 movs r3, #128 @ 0x80 - 8000f3e: 021a lsls r2, r3, #8 - 8000f40: 23a0 movs r3, #160 @ 0xa0 - 8000f42: 05db lsls r3, r3, #23 - 8000f44: 0011 movs r1, r2 - 8000f46: 0018 movs r0, r3 - 8000f48: f000 fdec bl 8001b24 - 8000f4c: 1e03 subs r3, r0, #0 - 8000f4e: d102 bne.n 8000f56 - 8000f50: 2380 movs r3, #128 @ 0x80 - 8000f52: 00db lsls r3, r3, #3 - 8000f54: e000 b.n 8000f58 - 8000f56: 2300 movs r3, #0 - 8000f58: b21a sxth r2, r3 - 8000f5a: 4b12 ldr r3, [pc, #72] @ (8000fa4 ) - 8000f5c: 881b ldrh r3, [r3, #0] - 8000f5e: b21b sxth r3, r3 - 8000f60: 4313 orrs r3, r2 - 8000f62: b21b sxth r3, r3 - 8000f64: b29a uxth r2, r3 - 8000f66: 4b0f ldr r3, [pc, #60] @ (8000fa4 ) - 8000f68: 801a strh r2, [r3, #0] - button_state |= (HAL_GPIO_ReadPin(ROW4_GPIO_Port, ROW4_Pin) == GPIO_PIN_RESET) << 11; - 8000f6a: 4b11 ldr r3, [pc, #68] @ (8000fb0 ) - 8000f6c: 2101 movs r1, #1 - 8000f6e: 0018 movs r0, r3 - 8000f70: f000 fdd8 bl 8001b24 - 8000f74: 1e03 subs r3, r0, #0 - 8000f76: d102 bne.n 8000f7e - 8000f78: 2380 movs r3, #128 @ 0x80 - 8000f7a: 011b lsls r3, r3, #4 - 8000f7c: e000 b.n 8000f80 - 8000f7e: 2300 movs r3, #0 - 8000f80: b21a sxth r2, r3 - 8000f82: 4b08 ldr r3, [pc, #32] @ (8000fa4 ) - 8000f84: 881b ldrh r3, [r3, #0] - 8000f86: b21b sxth r3, r3 - 8000f88: 4313 orrs r3, r2 - 8000f8a: b21b sxth r3, r3 - 8000f8c: b29a uxth r2, r3 - 8000f8e: 4b05 ldr r3, [pc, #20] @ (8000fa4 ) - 8000f90: 801a strh r2, [r3, #0] - HAL_GPIO_WritePin(COL3_GPIO_Port, COL3_Pin, GPIO_PIN_RESET); - 8000f92: 4b07 ldr r3, [pc, #28] @ (8000fb0 ) - 8000f94: 2200 movs r2, #0 - 8000f96: 2102 movs r1, #2 - 8000f98: 0018 movs r0, r3 - 8000f9a: f000 fde0 bl 8001b5e -} - 8000f9e: 46c0 nop @ (mov r8, r8) - 8000fa0: 46bd mov sp, r7 - 8000fa2: bd80 pop {r7, pc} - 8000fa4: 200001d6 .word 0x200001d6 - 8000fa8: 200001d4 .word 0x200001d4 - 8000fac: 50000400 .word 0x50000400 - 8000fb0: 50000c00 .word 0x50000c00 - -08000fb4 : +080010f4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8000fb4: b580 push {r7, lr} - 8000fb6: af00 add r7, sp, #0 + 80010f4: b580 push {r7, lr} + 80010f6: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8000fb8: b672 cpsid i + 80010f8: b672 cpsid i } - 8000fba: 46c0 nop @ (mov r8, r8) + 80010fa: 46c0 nop @ (mov r8, r8) /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8000fbc: 46c0 nop @ (mov r8, r8) - 8000fbe: e7fd b.n 8000fbc + 80010fc: 46c0 nop @ (mov r8, r8) + 80010fe: e7fd b.n 80010fc -08000fc0 : +08001100 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8000fc0: b580 push {r7, lr} - 8000fc2: b082 sub sp, #8 - 8000fc4: af00 add r7, sp, #0 + 8001100: b580 push {r7, lr} + 8001102: b082 sub sp, #8 + 8001104: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000fc6: 4b11 ldr r3, [pc, #68] @ (800100c ) - 8000fc8: 6c1a ldr r2, [r3, #64] @ 0x40 - 8000fca: 4b10 ldr r3, [pc, #64] @ (800100c ) - 8000fcc: 2101 movs r1, #1 - 8000fce: 430a orrs r2, r1 - 8000fd0: 641a str r2, [r3, #64] @ 0x40 - 8000fd2: 4b0e ldr r3, [pc, #56] @ (800100c ) - 8000fd4: 6c1b ldr r3, [r3, #64] @ 0x40 - 8000fd6: 2201 movs r2, #1 - 8000fd8: 4013 ands r3, r2 - 8000fda: 607b str r3, [r7, #4] - 8000fdc: 687b ldr r3, [r7, #4] + 8001106: 4b11 ldr r3, [pc, #68] @ (800114c ) + 8001108: 6c1a ldr r2, [r3, #64] @ 0x40 + 800110a: 4b10 ldr r3, [pc, #64] @ (800114c ) + 800110c: 2101 movs r1, #1 + 800110e: 430a orrs r2, r1 + 8001110: 641a str r2, [r3, #64] @ 0x40 + 8001112: 4b0e ldr r3, [pc, #56] @ (800114c ) + 8001114: 6c1b ldr r3, [r3, #64] @ 0x40 + 8001116: 2201 movs r2, #1 + 8001118: 4013 ands r3, r2 + 800111a: 607b str r3, [r7, #4] + 800111c: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 8000fde: 4b0b ldr r3, [pc, #44] @ (800100c ) - 8000fe0: 6bda ldr r2, [r3, #60] @ 0x3c - 8000fe2: 4b0a ldr r3, [pc, #40] @ (800100c ) - 8000fe4: 2180 movs r1, #128 @ 0x80 - 8000fe6: 0549 lsls r1, r1, #21 - 8000fe8: 430a orrs r2, r1 - 8000fea: 63da str r2, [r3, #60] @ 0x3c - 8000fec: 4b07 ldr r3, [pc, #28] @ (800100c ) - 8000fee: 6bda ldr r2, [r3, #60] @ 0x3c - 8000ff0: 2380 movs r3, #128 @ 0x80 - 8000ff2: 055b lsls r3, r3, #21 - 8000ff4: 4013 ands r3, r2 - 8000ff6: 603b str r3, [r7, #0] - 8000ff8: 683b ldr r3, [r7, #0] + 800111e: 4b0b ldr r3, [pc, #44] @ (800114c ) + 8001120: 6bda ldr r2, [r3, #60] @ 0x3c + 8001122: 4b0a ldr r3, [pc, #40] @ (800114c ) + 8001124: 2180 movs r1, #128 @ 0x80 + 8001126: 0549 lsls r1, r1, #21 + 8001128: 430a orrs r2, r1 + 800112a: 63da str r2, [r3, #60] @ 0x3c + 800112c: 4b07 ldr r3, [pc, #28] @ (800114c ) + 800112e: 6bda ldr r2, [r3, #60] @ 0x3c + 8001130: 2380 movs r3, #128 @ 0x80 + 8001132: 055b lsls r3, r3, #21 + 8001134: 4013 ands r3, r2 + 8001136: 603b str r3, [r7, #0] + 8001138: 683b ldr r3, [r7, #0] /* System interrupt init*/ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral */ HAL_SYSCFG_StrobeDBattpinsConfig(SYSCFG_CFGR1_UCPD1_STROBE | SYSCFG_CFGR1_UCPD2_STROBE); - 8000ffa: 23c0 movs r3, #192 @ 0xc0 - 8000ffc: 00db lsls r3, r3, #3 - 8000ffe: 0018 movs r0, r3 - 8001000: f000 fac2 bl 8001588 + 800113a: 23c0 movs r3, #192 @ 0xc0 + 800113c: 00db lsls r3, r3, #3 + 800113e: 0018 movs r0, r3 + 8001140: f000 fac2 bl 80016c8 /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8001004: 46c0 nop @ (mov r8, r8) - 8001006: 46bd mov sp, r7 - 8001008: b002 add sp, #8 - 800100a: bd80 pop {r7, pc} - 800100c: 40021000 .word 0x40021000 + 8001144: 46c0 nop @ (mov r8, r8) + 8001146: 46bd mov sp, r7 + 8001148: b002 add sp, #8 + 800114a: bd80 pop {r7, pc} + 800114c: 40021000 .word 0x40021000 -08001010 : +08001150 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { - 8001010: b590 push {r4, r7, lr} - 8001012: b091 sub sp, #68 @ 0x44 - 8001014: af00 add r7, sp, #0 - 8001016: 6078 str r0, [r7, #4] + 8001150: b590 push {r4, r7, lr} + 8001152: b091 sub sp, #68 @ 0x44 + 8001154: af00 add r7, sp, #0 + 8001156: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001018: 232c movs r3, #44 @ 0x2c - 800101a: 18fb adds r3, r7, r3 - 800101c: 0018 movs r0, r3 - 800101e: 2314 movs r3, #20 - 8001020: 001a movs r2, r3 - 8001022: 2100 movs r1, #0 - 8001024: f004 f9aa bl 800537c + 8001158: 232c movs r3, #44 @ 0x2c + 800115a: 18fb adds r3, r7, r3 + 800115c: 0018 movs r0, r3 + 800115e: 2314 movs r3, #20 + 8001160: 001a movs r2, r3 + 8001162: 2100 movs r1, #0 + 8001164: f004 fa9c bl 80056a0 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8001028: 2410 movs r4, #16 - 800102a: 193b adds r3, r7, r4 - 800102c: 0018 movs r0, r3 - 800102e: 231c movs r3, #28 - 8001030: 001a movs r2, r3 - 8001032: 2100 movs r1, #0 - 8001034: f004 f9a2 bl 800537c + 8001168: 2410 movs r4, #16 + 800116a: 193b adds r3, r7, r4 + 800116c: 0018 movs r0, r3 + 800116e: 231c movs r3, #28 + 8001170: 001a movs r2, r3 + 8001172: 2100 movs r1, #0 + 8001174: f004 fa94 bl 80056a0 if(hi2c->Instance==I2C1) - 8001038: 687b ldr r3, [r7, #4] - 800103a: 681b ldr r3, [r3, #0] - 800103c: 4a27 ldr r2, [pc, #156] @ (80010dc ) - 800103e: 4293 cmp r3, r2 - 8001040: d147 bne.n 80010d2 + 8001178: 687b ldr r3, [r7, #4] + 800117a: 681b ldr r3, [r3, #0] + 800117c: 4a27 ldr r2, [pc, #156] @ (800121c ) + 800117e: 4293 cmp r3, r2 + 8001180: d147 bne.n 8001212 /* USER CODE END I2C1_MspInit 0 */ /** Initializes the peripherals clocks */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1; - 8001042: 193b adds r3, r7, r4 - 8001044: 2220 movs r2, #32 - 8001046: 601a str r2, [r3, #0] + 8001182: 193b adds r3, r7, r4 + 8001184: 2220 movs r2, #32 + 8001186: 601a str r2, [r3, #0] PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; - 8001048: 193b adds r3, r7, r4 - 800104a: 2200 movs r2, #0 - 800104c: 60da str r2, [r3, #12] + 8001188: 193b adds r3, r7, r4 + 800118a: 2200 movs r2, #0 + 800118c: 60da str r2, [r3, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 800104e: 193b adds r3, r7, r4 - 8001050: 0018 movs r0, r3 - 8001052: f002 ff9b bl 8003f8c - 8001056: 1e03 subs r3, r0, #0 - 8001058: d001 beq.n 800105e + 800118e: 193b adds r3, r7, r4 + 8001190: 0018 movs r0, r3 + 8001192: f002 fa25 bl 80035e0 + 8001196: 1e03 subs r3, r0, #0 + 8001198: d001 beq.n 800119e { Error_Handler(); - 800105a: f7ff ffab bl 8000fb4 + 800119a: f7ff ffab bl 80010f4 } __HAL_RCC_GPIOA_CLK_ENABLE(); - 800105e: 4b20 ldr r3, [pc, #128] @ (80010e0 ) - 8001060: 6b5a ldr r2, [r3, #52] @ 0x34 - 8001062: 4b1f ldr r3, [pc, #124] @ (80010e0 ) - 8001064: 2101 movs r1, #1 - 8001066: 430a orrs r2, r1 - 8001068: 635a str r2, [r3, #52] @ 0x34 - 800106a: 4b1d ldr r3, [pc, #116] @ (80010e0 ) - 800106c: 6b5b ldr r3, [r3, #52] @ 0x34 - 800106e: 2201 movs r2, #1 - 8001070: 4013 ands r3, r2 - 8001072: 60fb str r3, [r7, #12] - 8001074: 68fb ldr r3, [r7, #12] + 800119e: 4b20 ldr r3, [pc, #128] @ (8001220 ) + 80011a0: 6b5a ldr r2, [r3, #52] @ 0x34 + 80011a2: 4b1f ldr r3, [pc, #124] @ (8001220 ) + 80011a4: 2101 movs r1, #1 + 80011a6: 430a orrs r2, r1 + 80011a8: 635a str r2, [r3, #52] @ 0x34 + 80011aa: 4b1d ldr r3, [pc, #116] @ (8001220 ) + 80011ac: 6b5b ldr r3, [r3, #52] @ 0x34 + 80011ae: 2201 movs r2, #1 + 80011b0: 4013 ands r3, r2 + 80011b2: 60fb str r3, [r7, #12] + 80011b4: 68fb ldr r3, [r7, #12] /**I2C1 GPIO Configuration PA9 ------> I2C1_SCL PA10 ------> I2C1_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; - 8001076: 212c movs r1, #44 @ 0x2c - 8001078: 187b adds r3, r7, r1 - 800107a: 22c0 movs r2, #192 @ 0xc0 - 800107c: 00d2 lsls r2, r2, #3 - 800107e: 601a str r2, [r3, #0] + 80011b6: 212c movs r1, #44 @ 0x2c + 80011b8: 187b adds r3, r7, r1 + 80011ba: 22c0 movs r2, #192 @ 0xc0 + 80011bc: 00d2 lsls r2, r2, #3 + 80011be: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8001080: 187b adds r3, r7, r1 - 8001082: 2212 movs r2, #18 - 8001084: 605a str r2, [r3, #4] + 80011c0: 187b adds r3, r7, r1 + 80011c2: 2212 movs r2, #18 + 80011c4: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001086: 187b adds r3, r7, r1 - 8001088: 2200 movs r2, #0 - 800108a: 609a str r2, [r3, #8] + 80011c6: 187b adds r3, r7, r1 + 80011c8: 2200 movs r2, #0 + 80011ca: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800108c: 187b adds r3, r7, r1 - 800108e: 2200 movs r2, #0 - 8001090: 60da str r2, [r3, #12] + 80011cc: 187b adds r3, r7, r1 + 80011ce: 2200 movs r2, #0 + 80011d0: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF6_I2C1; - 8001092: 187b adds r3, r7, r1 - 8001094: 2206 movs r2, #6 - 8001096: 611a str r2, [r3, #16] + 80011d2: 187b adds r3, r7, r1 + 80011d4: 2206 movs r2, #6 + 80011d6: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001098: 187a adds r2, r7, r1 - 800109a: 23a0 movs r3, #160 @ 0xa0 - 800109c: 05db lsls r3, r3, #23 - 800109e: 0011 movs r1, r2 - 80010a0: 0018 movs r0, r3 - 80010a2: f000 fbdb bl 800185c + 80011d8: 187a adds r2, r7, r1 + 80011da: 23a0 movs r3, #160 @ 0xa0 + 80011dc: 05db lsls r3, r3, #23 + 80011de: 0011 movs r1, r2 + 80011e0: 0018 movs r0, r3 + 80011e2: f000 fbdb bl 800199c /* Peripheral clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); - 80010a6: 4b0e ldr r3, [pc, #56] @ (80010e0 ) - 80010a8: 6bda ldr r2, [r3, #60] @ 0x3c - 80010aa: 4b0d ldr r3, [pc, #52] @ (80010e0 ) - 80010ac: 2180 movs r1, #128 @ 0x80 - 80010ae: 0389 lsls r1, r1, #14 - 80010b0: 430a orrs r2, r1 - 80010b2: 63da str r2, [r3, #60] @ 0x3c - 80010b4: 4b0a ldr r3, [pc, #40] @ (80010e0 ) - 80010b6: 6bda ldr r2, [r3, #60] @ 0x3c - 80010b8: 2380 movs r3, #128 @ 0x80 - 80010ba: 039b lsls r3, r3, #14 - 80010bc: 4013 ands r3, r2 - 80010be: 60bb str r3, [r7, #8] - 80010c0: 68bb ldr r3, [r7, #8] + 80011e6: 4b0e ldr r3, [pc, #56] @ (8001220 ) + 80011e8: 6bda ldr r2, [r3, #60] @ 0x3c + 80011ea: 4b0d ldr r3, [pc, #52] @ (8001220 ) + 80011ec: 2180 movs r1, #128 @ 0x80 + 80011ee: 0389 lsls r1, r1, #14 + 80011f0: 430a orrs r2, r1 + 80011f2: 63da str r2, [r3, #60] @ 0x3c + 80011f4: 4b0a ldr r3, [pc, #40] @ (8001220 ) + 80011f6: 6bda ldr r2, [r3, #60] @ 0x3c + 80011f8: 2380 movs r3, #128 @ 0x80 + 80011fa: 039b lsls r3, r3, #14 + 80011fc: 4013 ands r3, r2 + 80011fe: 60bb str r3, [r7, #8] + 8001200: 68bb ldr r3, [r7, #8] /* I2C1 interrupt Init */ HAL_NVIC_SetPriority(I2C1_IRQn, 0, 0); - 80010c2: 2200 movs r2, #0 - 80010c4: 2100 movs r1, #0 - 80010c6: 2017 movs r0, #23 - 80010c8: f000 fb20 bl 800170c + 8001202: 2200 movs r2, #0 + 8001204: 2100 movs r1, #0 + 8001206: 2017 movs r0, #23 + 8001208: f000 fb20 bl 800184c HAL_NVIC_EnableIRQ(I2C1_IRQn); - 80010cc: 2017 movs r0, #23 - 80010ce: f000 fb32 bl 8001736 + 800120c: 2017 movs r0, #23 + 800120e: f000 fb32 bl 8001876 /* USER CODE BEGIN I2C1_MspInit 1 */ /* USER CODE END I2C1_MspInit 1 */ } } - 80010d2: 46c0 nop @ (mov r8, r8) - 80010d4: 46bd mov sp, r7 - 80010d6: b011 add sp, #68 @ 0x44 - 80010d8: bd90 pop {r4, r7, pc} - 80010da: 46c0 nop @ (mov r8, r8) - 80010dc: 40005400 .word 0x40005400 - 80010e0: 40021000 .word 0x40021000 + 8001212: 46c0 nop @ (mov r8, r8) + 8001214: 46bd mov sp, r7 + 8001216: b011 add sp, #68 @ 0x44 + 8001218: bd90 pop {r4, r7, pc} + 800121a: 46c0 nop @ (mov r8, r8) + 800121c: 40005400 .word 0x40005400 + 8001220: 40021000 .word 0x40021000 -080010e4 : +08001224 : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { - 80010e4: b590 push {r4, r7, lr} - 80010e6: b08b sub sp, #44 @ 0x2c - 80010e8: af00 add r7, sp, #0 - 80010ea: 6078 str r0, [r7, #4] + 8001224: b590 push {r4, r7, lr} + 8001226: b08b sub sp, #44 @ 0x2c + 8001228: af00 add r7, sp, #0 + 800122a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80010ec: 2414 movs r4, #20 - 80010ee: 193b adds r3, r7, r4 - 80010f0: 0018 movs r0, r3 - 80010f2: 2314 movs r3, #20 - 80010f4: 001a movs r2, r3 - 80010f6: 2100 movs r1, #0 - 80010f8: f004 f940 bl 800537c + 800122c: 2414 movs r4, #20 + 800122e: 193b adds r3, r7, r4 + 8001230: 0018 movs r0, r3 + 8001232: 2314 movs r3, #20 + 8001234: 001a movs r2, r3 + 8001236: 2100 movs r1, #0 + 8001238: f004 fa32 bl 80056a0 if(hspi->Instance==SPI1) - 80010fc: 687b ldr r3, [r7, #4] - 80010fe: 681b ldr r3, [r3, #0] - 8001100: 4a1b ldr r2, [pc, #108] @ (8001170 ) - 8001102: 4293 cmp r3, r2 - 8001104: d130 bne.n 8001168 + 800123c: 687b ldr r3, [r7, #4] + 800123e: 681b ldr r3, [r3, #0] + 8001240: 4a1b ldr r2, [pc, #108] @ (80012b0 ) + 8001242: 4293 cmp r3, r2 + 8001244: d130 bne.n 80012a8 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); - 8001106: 4b1b ldr r3, [pc, #108] @ (8001174 ) - 8001108: 6c1a ldr r2, [r3, #64] @ 0x40 - 800110a: 4b1a ldr r3, [pc, #104] @ (8001174 ) - 800110c: 2180 movs r1, #128 @ 0x80 - 800110e: 0149 lsls r1, r1, #5 - 8001110: 430a orrs r2, r1 - 8001112: 641a str r2, [r3, #64] @ 0x40 - 8001114: 4b17 ldr r3, [pc, #92] @ (8001174 ) - 8001116: 6c1a ldr r2, [r3, #64] @ 0x40 - 8001118: 2380 movs r3, #128 @ 0x80 - 800111a: 015b lsls r3, r3, #5 - 800111c: 4013 ands r3, r2 - 800111e: 613b str r3, [r7, #16] - 8001120: 693b ldr r3, [r7, #16] + 8001246: 4b1b ldr r3, [pc, #108] @ (80012b4 ) + 8001248: 6c1a ldr r2, [r3, #64] @ 0x40 + 800124a: 4b1a ldr r3, [pc, #104] @ (80012b4 ) + 800124c: 2180 movs r1, #128 @ 0x80 + 800124e: 0149 lsls r1, r1, #5 + 8001250: 430a orrs r2, r1 + 8001252: 641a str r2, [r3, #64] @ 0x40 + 8001254: 4b17 ldr r3, [pc, #92] @ (80012b4 ) + 8001256: 6c1a ldr r2, [r3, #64] @ 0x40 + 8001258: 2380 movs r3, #128 @ 0x80 + 800125a: 015b lsls r3, r3, #5 + 800125c: 4013 ands r3, r2 + 800125e: 613b str r3, [r7, #16] + 8001260: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001122: 4b14 ldr r3, [pc, #80] @ (8001174 ) - 8001124: 6b5a ldr r2, [r3, #52] @ 0x34 - 8001126: 4b13 ldr r3, [pc, #76] @ (8001174 ) - 8001128: 2101 movs r1, #1 - 800112a: 430a orrs r2, r1 - 800112c: 635a str r2, [r3, #52] @ 0x34 - 800112e: 4b11 ldr r3, [pc, #68] @ (8001174 ) - 8001130: 6b5b ldr r3, [r3, #52] @ 0x34 - 8001132: 2201 movs r2, #1 - 8001134: 4013 ands r3, r2 - 8001136: 60fb str r3, [r7, #12] - 8001138: 68fb ldr r3, [r7, #12] - PA4 ------> SPI1_NSS + 8001262: 4b14 ldr r3, [pc, #80] @ (80012b4 ) + 8001264: 6b5a ldr r2, [r3, #52] @ 0x34 + 8001266: 4b13 ldr r3, [pc, #76] @ (80012b4 ) + 8001268: 2101 movs r1, #1 + 800126a: 430a orrs r2, r1 + 800126c: 635a str r2, [r3, #52] @ 0x34 + 800126e: 4b11 ldr r3, [pc, #68] @ (80012b4 ) + 8001270: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001272: 2201 movs r2, #1 + 8001274: 4013 ands r3, r2 + 8001276: 60fb str r3, [r7, #12] + 8001278: 68fb ldr r3, [r7, #12] + /**SPI1 GPIO Configuration PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ - GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; - 800113a: 0021 movs r1, r4 - 800113c: 187b adds r3, r7, r1 - 800113e: 22f0 movs r2, #240 @ 0xf0 - 8001140: 601a str r2, [r3, #0] + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + 800127a: 0021 movs r1, r4 + 800127c: 187b adds r3, r7, r1 + 800127e: 22e0 movs r2, #224 @ 0xe0 + 8001280: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8001142: 187b adds r3, r7, r1 - 8001144: 2202 movs r2, #2 - 8001146: 605a str r2, [r3, #4] + 8001282: 187b adds r3, r7, r1 + 8001284: 2202 movs r2, #2 + 8001286: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001148: 187b adds r3, r7, r1 - 800114a: 2200 movs r2, #0 - 800114c: 609a str r2, [r3, #8] + 8001288: 187b adds r3, r7, r1 + 800128a: 2200 movs r2, #0 + 800128c: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800114e: 187b adds r3, r7, r1 - 8001150: 2200 movs r2, #0 - 8001152: 60da str r2, [r3, #12] + 800128e: 187b adds r3, r7, r1 + 8001290: 2200 movs r2, #0 + 8001292: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF0_SPI1; - 8001154: 187b adds r3, r7, r1 - 8001156: 2200 movs r2, #0 - 8001158: 611a str r2, [r3, #16] + 8001294: 187b adds r3, r7, r1 + 8001296: 2200 movs r2, #0 + 8001298: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800115a: 187a adds r2, r7, r1 - 800115c: 23a0 movs r3, #160 @ 0xa0 - 800115e: 05db lsls r3, r3, #23 - 8001160: 0011 movs r1, r2 - 8001162: 0018 movs r0, r3 - 8001164: f000 fb7a bl 800185c + 800129a: 187a adds r2, r7, r1 + 800129c: 23a0 movs r3, #160 @ 0xa0 + 800129e: 05db lsls r3, r3, #23 + 80012a0: 0011 movs r1, r2 + 80012a2: 0018 movs r0, r3 + 80012a4: f000 fb7a bl 800199c /* USER CODE BEGIN SPI1_MspInit 1 */ /* USER CODE END SPI1_MspInit 1 */ } } - 8001168: 46c0 nop @ (mov r8, r8) - 800116a: 46bd mov sp, r7 - 800116c: b00b add sp, #44 @ 0x2c - 800116e: bd90 pop {r4, r7, pc} - 8001170: 40013000 .word 0x40013000 - 8001174: 40021000 .word 0x40021000 + 80012a8: 46c0 nop @ (mov r8, r8) + 80012aa: 46bd mov sp, r7 + 80012ac: b00b add sp, #44 @ 0x2c + 80012ae: bd90 pop {r4, r7, pc} + 80012b0: 40013000 .word 0x40013000 + 80012b4: 40021000 .word 0x40021000 -08001178 : +080012b8 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - 8001178: b590 push {r4, r7, lr} - 800117a: b091 sub sp, #68 @ 0x44 - 800117c: af00 add r7, sp, #0 - 800117e: 6078 str r0, [r7, #4] + 80012b8: b590 push {r4, r7, lr} + 80012ba: b091 sub sp, #68 @ 0x44 + 80012bc: af00 add r7, sp, #0 + 80012be: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001180: 232c movs r3, #44 @ 0x2c - 8001182: 18fb adds r3, r7, r3 - 8001184: 0018 movs r0, r3 - 8001186: 2314 movs r3, #20 - 8001188: 001a movs r2, r3 - 800118a: 2100 movs r1, #0 - 800118c: f004 f8f6 bl 800537c + 80012c0: 232c movs r3, #44 @ 0x2c + 80012c2: 18fb adds r3, r7, r3 + 80012c4: 0018 movs r0, r3 + 80012c6: 2314 movs r3, #20 + 80012c8: 001a movs r2, r3 + 80012ca: 2100 movs r1, #0 + 80012cc: f004 f9e8 bl 80056a0 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8001190: 2410 movs r4, #16 - 8001192: 193b adds r3, r7, r4 - 8001194: 0018 movs r0, r3 - 8001196: 231c movs r3, #28 - 8001198: 001a movs r2, r3 - 800119a: 2100 movs r1, #0 - 800119c: f004 f8ee bl 800537c + 80012d0: 2410 movs r4, #16 + 80012d2: 193b adds r3, r7, r4 + 80012d4: 0018 movs r0, r3 + 80012d6: 231c movs r3, #28 + 80012d8: 001a movs r2, r3 + 80012da: 2100 movs r1, #0 + 80012dc: f004 f9e0 bl 80056a0 if(huart->Instance==USART2) - 80011a0: 687b ldr r3, [r7, #4] - 80011a2: 681b ldr r3, [r3, #0] - 80011a4: 4a22 ldr r2, [pc, #136] @ (8001230 ) - 80011a6: 4293 cmp r3, r2 - 80011a8: d13e bne.n 8001228 + 80012e0: 687b ldr r3, [r7, #4] + 80012e2: 681b ldr r3, [r3, #0] + 80012e4: 4a22 ldr r2, [pc, #136] @ (8001370 ) + 80012e6: 4293 cmp r3, r2 + 80012e8: d13e bne.n 8001368 /* USER CODE END USART2_MspInit 0 */ /** Initializes the peripherals clocks */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; - 80011aa: 193b adds r3, r7, r4 - 80011ac: 2202 movs r2, #2 - 80011ae: 601a str r2, [r3, #0] + 80012ea: 193b adds r3, r7, r4 + 80012ec: 2202 movs r2, #2 + 80012ee: 601a str r2, [r3, #0] PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; - 80011b0: 193b adds r3, r7, r4 - 80011b2: 2200 movs r2, #0 - 80011b4: 609a str r2, [r3, #8] + 80012f0: 193b adds r3, r7, r4 + 80012f2: 2200 movs r2, #0 + 80012f4: 609a str r2, [r3, #8] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 80011b6: 193b adds r3, r7, r4 - 80011b8: 0018 movs r0, r3 - 80011ba: f002 fee7 bl 8003f8c - 80011be: 1e03 subs r3, r0, #0 - 80011c0: d001 beq.n 80011c6 + 80012f6: 193b adds r3, r7, r4 + 80012f8: 0018 movs r0, r3 + 80012fa: f002 f971 bl 80035e0 + 80012fe: 1e03 subs r3, r0, #0 + 8001300: d001 beq.n 8001306 { Error_Handler(); - 80011c2: f7ff fef7 bl 8000fb4 + 8001302: f7ff fef7 bl 80010f4 } /* Peripheral clock enable */ __HAL_RCC_USART2_CLK_ENABLE(); - 80011c6: 4b1b ldr r3, [pc, #108] @ (8001234 ) - 80011c8: 6bda ldr r2, [r3, #60] @ 0x3c - 80011ca: 4b1a ldr r3, [pc, #104] @ (8001234 ) - 80011cc: 2180 movs r1, #128 @ 0x80 - 80011ce: 0289 lsls r1, r1, #10 - 80011d0: 430a orrs r2, r1 - 80011d2: 63da str r2, [r3, #60] @ 0x3c - 80011d4: 4b17 ldr r3, [pc, #92] @ (8001234 ) - 80011d6: 6bda ldr r2, [r3, #60] @ 0x3c - 80011d8: 2380 movs r3, #128 @ 0x80 - 80011da: 029b lsls r3, r3, #10 - 80011dc: 4013 ands r3, r2 - 80011de: 60fb str r3, [r7, #12] - 80011e0: 68fb ldr r3, [r7, #12] + 8001306: 4b1b ldr r3, [pc, #108] @ (8001374 ) + 8001308: 6bda ldr r2, [r3, #60] @ 0x3c + 800130a: 4b1a ldr r3, [pc, #104] @ (8001374 ) + 800130c: 2180 movs r1, #128 @ 0x80 + 800130e: 0289 lsls r1, r1, #10 + 8001310: 430a orrs r2, r1 + 8001312: 63da str r2, [r3, #60] @ 0x3c + 8001314: 4b17 ldr r3, [pc, #92] @ (8001374 ) + 8001316: 6bda ldr r2, [r3, #60] @ 0x3c + 8001318: 2380 movs r3, #128 @ 0x80 + 800131a: 029b lsls r3, r3, #10 + 800131c: 4013 ands r3, r2 + 800131e: 60fb str r3, [r7, #12] + 8001320: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80011e2: 4b14 ldr r3, [pc, #80] @ (8001234 ) - 80011e4: 6b5a ldr r2, [r3, #52] @ 0x34 - 80011e6: 4b13 ldr r3, [pc, #76] @ (8001234 ) - 80011e8: 2101 movs r1, #1 - 80011ea: 430a orrs r2, r1 - 80011ec: 635a str r2, [r3, #52] @ 0x34 - 80011ee: 4b11 ldr r3, [pc, #68] @ (8001234 ) - 80011f0: 6b5b ldr r3, [r3, #52] @ 0x34 - 80011f2: 2201 movs r2, #1 - 80011f4: 4013 ands r3, r2 - 80011f6: 60bb str r3, [r7, #8] - 80011f8: 68bb ldr r3, [r7, #8] + 8001322: 4b14 ldr r3, [pc, #80] @ (8001374 ) + 8001324: 6b5a ldr r2, [r3, #52] @ 0x34 + 8001326: 4b13 ldr r3, [pc, #76] @ (8001374 ) + 8001328: 2101 movs r1, #1 + 800132a: 430a orrs r2, r1 + 800132c: 635a str r2, [r3, #52] @ 0x34 + 800132e: 4b11 ldr r3, [pc, #68] @ (8001374 ) + 8001330: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001332: 2201 movs r2, #1 + 8001334: 4013 ands r3, r2 + 8001336: 60bb str r3, [r7, #8] + 8001338: 68bb ldr r3, [r7, #8] /**USART2 GPIO Configuration PA2 ------> USART2_TX PA3 ------> USART2_RX */ GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; - 80011fa: 212c movs r1, #44 @ 0x2c - 80011fc: 187b adds r3, r7, r1 - 80011fe: 220c movs r2, #12 - 8001200: 601a str r2, [r3, #0] + 800133a: 212c movs r1, #44 @ 0x2c + 800133c: 187b adds r3, r7, r1 + 800133e: 220c movs r2, #12 + 8001340: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8001202: 187b adds r3, r7, r1 - 8001204: 2202 movs r2, #2 - 8001206: 605a str r2, [r3, #4] + 8001342: 187b adds r3, r7, r1 + 8001344: 2202 movs r2, #2 + 8001346: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001208: 187b adds r3, r7, r1 - 800120a: 2200 movs r2, #0 - 800120c: 609a str r2, [r3, #8] + 8001348: 187b adds r3, r7, r1 + 800134a: 2200 movs r2, #0 + 800134c: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800120e: 187b adds r3, r7, r1 - 8001210: 2200 movs r2, #0 - 8001212: 60da str r2, [r3, #12] + 800134e: 187b adds r3, r7, r1 + 8001350: 2200 movs r2, #0 + 8001352: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF1_USART2; - 8001214: 187b adds r3, r7, r1 - 8001216: 2201 movs r2, #1 - 8001218: 611a str r2, [r3, #16] + 8001354: 187b adds r3, r7, r1 + 8001356: 2201 movs r2, #1 + 8001358: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800121a: 187a adds r2, r7, r1 - 800121c: 23a0 movs r3, #160 @ 0xa0 - 800121e: 05db lsls r3, r3, #23 - 8001220: 0011 movs r1, r2 - 8001222: 0018 movs r0, r3 - 8001224: f000 fb1a bl 800185c + 800135a: 187a adds r2, r7, r1 + 800135c: 23a0 movs r3, #160 @ 0xa0 + 800135e: 05db lsls r3, r3, #23 + 8001360: 0011 movs r1, r2 + 8001362: 0018 movs r0, r3 + 8001364: f000 fb1a bl 800199c /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } - 8001228: 46c0 nop @ (mov r8, r8) - 800122a: 46bd mov sp, r7 - 800122c: b011 add sp, #68 @ 0x44 - 800122e: bd90 pop {r4, r7, pc} - 8001230: 40004400 .word 0x40004400 - 8001234: 40021000 .word 0x40021000 + 8001368: 46c0 nop @ (mov r8, r8) + 800136a: 46bd mov sp, r7 + 800136c: b011 add sp, #68 @ 0x44 + 800136e: bd90 pop {r4, r7, pc} + 8001370: 40004400 .word 0x40004400 + 8001374: 40021000 .word 0x40021000 -08001238 : +08001378 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8001238: b580 push {r7, lr} - 800123a: af00 add r7, sp, #0 + 8001378: b580 push {r7, lr} + 800137a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 800123c: 46c0 nop @ (mov r8, r8) - 800123e: e7fd b.n 800123c + 800137c: 46c0 nop @ (mov r8, r8) + 800137e: e7fd b.n 800137c -08001240 : +08001380 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8001240: b580 push {r7, lr} - 8001242: af00 add r7, sp, #0 + 8001380: b580 push {r7, lr} + 8001382: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8001244: 46c0 nop @ (mov r8, r8) - 8001246: e7fd b.n 8001244 + 8001384: 46c0 nop @ (mov r8, r8) + 8001386: e7fd b.n 8001384 -08001248 : +08001388 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8001248: b580 push {r7, lr} - 800124a: af00 add r7, sp, #0 + 8001388: b580 push {r7, lr} + 800138a: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } - 800124c: 46c0 nop @ (mov r8, r8) - 800124e: 46bd mov sp, r7 - 8001250: bd80 pop {r7, pc} + 800138c: 46c0 nop @ (mov r8, r8) + 800138e: 46bd mov sp, r7 + 8001390: bd80 pop {r7, pc} -08001252 : +08001392 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8001252: b580 push {r7, lr} - 8001254: af00 add r7, sp, #0 + 8001392: b580 push {r7, lr} + 8001394: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8001256: 46c0 nop @ (mov r8, r8) - 8001258: 46bd mov sp, r7 - 800125a: bd80 pop {r7, pc} + 8001396: 46c0 nop @ (mov r8, r8) + 8001398: 46bd mov sp, r7 + 800139a: bd80 pop {r7, pc} -0800125c : +0800139c : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 800125c: b580 push {r7, lr} - 800125e: af00 add r7, sp, #0 + 800139c: b580 push {r7, lr} + 800139e: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8001260: f000 f952 bl 8001508 + 80013a0: f000 f952 bl 8001648 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8001264: 46c0 nop @ (mov r8, r8) - 8001266: 46bd mov sp, r7 - 8001268: bd80 pop {r7, pc} + 80013a4: 46c0 nop @ (mov r8, r8) + 80013a6: 46bd mov sp, r7 + 80013a8: bd80 pop {r7, pc} ... -0800126c : +080013ac : /** * @brief This function handles I2C1 event global interrupt / I2C1 wake-up interrupt through EXTI line 23. */ void I2C1_IRQHandler(void) { - 800126c: b580 push {r7, lr} - 800126e: af00 add r7, sp, #0 + 80013ac: b580 push {r7, lr} + 80013ae: af00 add r7, sp, #0 /* USER CODE BEGIN I2C1_IRQn 0 */ /* USER CODE END I2C1_IRQn 0 */ if (hi2c1.Instance->ISR & (I2C_FLAG_BERR | I2C_FLAG_ARLO | I2C_FLAG_OVR)) { - 8001270: 4b09 ldr r3, [pc, #36] @ (8001298 ) - 8001272: 681b ldr r3, [r3, #0] - 8001274: 699a ldr r2, [r3, #24] - 8001276: 23e0 movs r3, #224 @ 0xe0 - 8001278: 00db lsls r3, r3, #3 - 800127a: 4013 ands r3, r2 - 800127c: d004 beq.n 8001288 + 80013b0: 4b09 ldr r3, [pc, #36] @ (80013d8 ) + 80013b2: 681b ldr r3, [r3, #0] + 80013b4: 699a ldr r2, [r3, #24] + 80013b6: 23e0 movs r3, #224 @ 0xe0 + 80013b8: 00db lsls r3, r3, #3 + 80013ba: 4013 ands r3, r2 + 80013bc: d004 beq.n 80013c8 HAL_I2C_ER_IRQHandler(&hi2c1); - 800127e: 4b06 ldr r3, [pc, #24] @ (8001298 ) - 8001280: 0018 movs r0, r3 - 8001282: f000 fd9f bl 8001dc4 + 80013be: 4b06 ldr r3, [pc, #24] @ (80013d8 ) + 80013c0: 0018 movs r0, r3 + 80013c2: f000 fd2d bl 8001e20 HAL_I2C_EV_IRQHandler(&hi2c1); } /* USER CODE BEGIN I2C1_IRQn 1 */ /* USER CODE END I2C1_IRQn 1 */ } - 8001286: e003 b.n 8001290 + 80013c6: e003 b.n 80013d0 HAL_I2C_EV_IRQHandler(&hi2c1); - 8001288: 4b03 ldr r3, [pc, #12] @ (8001298 ) - 800128a: 0018 movs r0, r3 - 800128c: f000 fd80 bl 8001d90 + 80013c8: 4b03 ldr r3, [pc, #12] @ (80013d8 ) + 80013ca: 0018 movs r0, r3 + 80013cc: f000 fd0e bl 8001dec } - 8001290: 46c0 nop @ (mov r8, r8) - 8001292: 46bd mov sp, r7 - 8001294: bd80 pop {r7, pc} - 8001296: 46c0 nop @ (mov r8, r8) - 8001298: 20000084 .word 0x20000084 + 80013d0: 46c0 nop @ (mov r8, r8) + 80013d2: 46bd mov sp, r7 + 80013d4: bd80 pop {r7, pc} + 80013d6: 46c0 nop @ (mov r8, r8) + 80013d8: 20000084 .word 0x20000084 -0800129c <_read>: +080013dc <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { - 800129c: b580 push {r7, lr} - 800129e: b086 sub sp, #24 - 80012a0: af00 add r7, sp, #0 - 80012a2: 60f8 str r0, [r7, #12] - 80012a4: 60b9 str r1, [r7, #8] - 80012a6: 607a str r2, [r7, #4] + 80013dc: b580 push {r7, lr} + 80013de: b086 sub sp, #24 + 80013e0: af00 add r7, sp, #0 + 80013e2: 60f8 str r0, [r7, #12] + 80013e4: 60b9 str r1, [r7, #8] + 80013e6: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) - 80012a8: 2300 movs r3, #0 - 80012aa: 617b str r3, [r7, #20] - 80012ac: e00a b.n 80012c4 <_read+0x28> + 80013e8: 2300 movs r3, #0 + 80013ea: 617b str r3, [r7, #20] + 80013ec: e00a b.n 8001404 <_read+0x28> { *ptr++ = __io_getchar(); - 80012ae: e000 b.n 80012b2 <_read+0x16> - 80012b0: bf00 nop - 80012b2: 0001 movs r1, r0 - 80012b4: 68bb ldr r3, [r7, #8] - 80012b6: 1c5a adds r2, r3, #1 - 80012b8: 60ba str r2, [r7, #8] - 80012ba: b2ca uxtb r2, r1 - 80012bc: 701a strb r2, [r3, #0] + 80013ee: e000 b.n 80013f2 <_read+0x16> + 80013f0: bf00 nop + 80013f2: 0001 movs r1, r0 + 80013f4: 68bb ldr r3, [r7, #8] + 80013f6: 1c5a adds r2, r3, #1 + 80013f8: 60ba str r2, [r7, #8] + 80013fa: b2ca uxtb r2, r1 + 80013fc: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) - 80012be: 697b ldr r3, [r7, #20] - 80012c0: 3301 adds r3, #1 - 80012c2: 617b str r3, [r7, #20] - 80012c4: 697a ldr r2, [r7, #20] - 80012c6: 687b ldr r3, [r7, #4] - 80012c8: 429a cmp r2, r3 - 80012ca: dbf0 blt.n 80012ae <_read+0x12> + 80013fe: 697b ldr r3, [r7, #20] + 8001400: 3301 adds r3, #1 + 8001402: 617b str r3, [r7, #20] + 8001404: 697a ldr r2, [r7, #20] + 8001406: 687b ldr r3, [r7, #4] + 8001408: 429a cmp r2, r3 + 800140a: dbf0 blt.n 80013ee <_read+0x12> } return len; - 80012cc: 687b ldr r3, [r7, #4] + 800140c: 687b ldr r3, [r7, #4] } - 80012ce: 0018 movs r0, r3 - 80012d0: 46bd mov sp, r7 - 80012d2: b006 add sp, #24 - 80012d4: bd80 pop {r7, pc} + 800140e: 0018 movs r0, r3 + 8001410: 46bd mov sp, r7 + 8001412: b006 add sp, #24 + 8001414: bd80 pop {r7, pc} -080012d6 <_write>: +08001416 <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { - 80012d6: b580 push {r7, lr} - 80012d8: b086 sub sp, #24 - 80012da: af00 add r7, sp, #0 - 80012dc: 60f8 str r0, [r7, #12] - 80012de: 60b9 str r1, [r7, #8] - 80012e0: 607a str r2, [r7, #4] + 8001416: b580 push {r7, lr} + 8001418: b086 sub sp, #24 + 800141a: af00 add r7, sp, #0 + 800141c: 60f8 str r0, [r7, #12] + 800141e: 60b9 str r1, [r7, #8] + 8001420: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) - 80012e2: 2300 movs r3, #0 - 80012e4: 617b str r3, [r7, #20] - 80012e6: e009 b.n 80012fc <_write+0x26> + 8001422: 2300 movs r3, #0 + 8001424: 617b str r3, [r7, #20] + 8001426: e009 b.n 800143c <_write+0x26> { __io_putchar(*ptr++); - 80012e8: 68bb ldr r3, [r7, #8] - 80012ea: 1c5a adds r2, r3, #1 - 80012ec: 60ba str r2, [r7, #8] - 80012ee: 781b ldrb r3, [r3, #0] - 80012f0: 0018 movs r0, r3 - 80012f2: f7ff fb2f bl 8000954 <__io_putchar> + 8001428: 68bb ldr r3, [r7, #8] + 800142a: 1c5a adds r2, r3, #1 + 800142c: 60ba str r2, [r7, #8] + 800142e: 781b ldrb r3, [r3, #0] + 8001430: 0018 movs r0, r3 + 8001432: f7ff fdfb bl 800102c <__io_putchar> for (DataIdx = 0; DataIdx < len; DataIdx++) - 80012f6: 697b ldr r3, [r7, #20] - 80012f8: 3301 adds r3, #1 - 80012fa: 617b str r3, [r7, #20] - 80012fc: 697a ldr r2, [r7, #20] - 80012fe: 687b ldr r3, [r7, #4] - 8001300: 429a cmp r2, r3 - 8001302: dbf1 blt.n 80012e8 <_write+0x12> + 8001436: 697b ldr r3, [r7, #20] + 8001438: 3301 adds r3, #1 + 800143a: 617b str r3, [r7, #20] + 800143c: 697a ldr r2, [r7, #20] + 800143e: 687b ldr r3, [r7, #4] + 8001440: 429a cmp r2, r3 + 8001442: dbf1 blt.n 8001428 <_write+0x12> } return len; - 8001304: 687b ldr r3, [r7, #4] + 8001444: 687b ldr r3, [r7, #4] } - 8001306: 0018 movs r0, r3 - 8001308: 46bd mov sp, r7 - 800130a: b006 add sp, #24 - 800130c: bd80 pop {r7, pc} + 8001446: 0018 movs r0, r3 + 8001448: 46bd mov sp, r7 + 800144a: b006 add sp, #24 + 800144c: bd80 pop {r7, pc} -0800130e <_close>: +0800144e <_close>: int _close(int file) { - 800130e: b580 push {r7, lr} - 8001310: b082 sub sp, #8 - 8001312: af00 add r7, sp, #0 - 8001314: 6078 str r0, [r7, #4] + 800144e: b580 push {r7, lr} + 8001450: b082 sub sp, #8 + 8001452: af00 add r7, sp, #0 + 8001454: 6078 str r0, [r7, #4] (void)file; return -1; - 8001316: 2301 movs r3, #1 - 8001318: 425b negs r3, r3 + 8001456: 2301 movs r3, #1 + 8001458: 425b negs r3, r3 } - 800131a: 0018 movs r0, r3 - 800131c: 46bd mov sp, r7 - 800131e: b002 add sp, #8 - 8001320: bd80 pop {r7, pc} + 800145a: 0018 movs r0, r3 + 800145c: 46bd mov sp, r7 + 800145e: b002 add sp, #8 + 8001460: bd80 pop {r7, pc} -08001322 <_fstat>: +08001462 <_fstat>: int _fstat(int file, struct stat *st) { - 8001322: b580 push {r7, lr} - 8001324: b082 sub sp, #8 - 8001326: af00 add r7, sp, #0 - 8001328: 6078 str r0, [r7, #4] - 800132a: 6039 str r1, [r7, #0] + 8001462: b580 push {r7, lr} + 8001464: b082 sub sp, #8 + 8001466: af00 add r7, sp, #0 + 8001468: 6078 str r0, [r7, #4] + 800146a: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; - 800132c: 683b ldr r3, [r7, #0] - 800132e: 2280 movs r2, #128 @ 0x80 - 8001330: 0192 lsls r2, r2, #6 - 8001332: 605a str r2, [r3, #4] + 800146c: 683b ldr r3, [r7, #0] + 800146e: 2280 movs r2, #128 @ 0x80 + 8001470: 0192 lsls r2, r2, #6 + 8001472: 605a str r2, [r3, #4] return 0; - 8001334: 2300 movs r3, #0 + 8001474: 2300 movs r3, #0 } - 8001336: 0018 movs r0, r3 - 8001338: 46bd mov sp, r7 - 800133a: b002 add sp, #8 - 800133c: bd80 pop {r7, pc} + 8001476: 0018 movs r0, r3 + 8001478: 46bd mov sp, r7 + 800147a: b002 add sp, #8 + 800147c: bd80 pop {r7, pc} -0800133e <_isatty>: +0800147e <_isatty>: int _isatty(int file) { - 800133e: b580 push {r7, lr} - 8001340: b082 sub sp, #8 - 8001342: af00 add r7, sp, #0 - 8001344: 6078 str r0, [r7, #4] + 800147e: b580 push {r7, lr} + 8001480: b082 sub sp, #8 + 8001482: af00 add r7, sp, #0 + 8001484: 6078 str r0, [r7, #4] (void)file; return 1; - 8001346: 2301 movs r3, #1 + 8001486: 2301 movs r3, #1 } - 8001348: 0018 movs r0, r3 - 800134a: 46bd mov sp, r7 - 800134c: b002 add sp, #8 - 800134e: bd80 pop {r7, pc} + 8001488: 0018 movs r0, r3 + 800148a: 46bd mov sp, r7 + 800148c: b002 add sp, #8 + 800148e: bd80 pop {r7, pc} -08001350 <_lseek>: +08001490 <_lseek>: int _lseek(int file, int ptr, int dir) { - 8001350: b580 push {r7, lr} - 8001352: b084 sub sp, #16 - 8001354: af00 add r7, sp, #0 - 8001356: 60f8 str r0, [r7, #12] - 8001358: 60b9 str r1, [r7, #8] - 800135a: 607a str r2, [r7, #4] + 8001490: b580 push {r7, lr} + 8001492: b084 sub sp, #16 + 8001494: af00 add r7, sp, #0 + 8001496: 60f8 str r0, [r7, #12] + 8001498: 60b9 str r1, [r7, #8] + 800149a: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; - 800135c: 2300 movs r3, #0 + 800149c: 2300 movs r3, #0 } - 800135e: 0018 movs r0, r3 - 8001360: 46bd mov sp, r7 - 8001362: b004 add sp, #16 - 8001364: bd80 pop {r7, pc} + 800149e: 0018 movs r0, r3 + 80014a0: 46bd mov sp, r7 + 80014a2: b004 add sp, #16 + 80014a4: bd80 pop {r7, pc} ... -08001368 <_sbrk>: +080014a8 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { - 8001368: b580 push {r7, lr} - 800136a: b086 sub sp, #24 - 800136c: af00 add r7, sp, #0 - 800136e: 6078 str r0, [r7, #4] + 80014a8: b580 push {r7, lr} + 80014aa: b086 sub sp, #24 + 80014ac: af00 add r7, sp, #0 + 80014ae: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; - 8001370: 4a14 ldr r2, [pc, #80] @ (80013c4 <_sbrk+0x5c>) - 8001372: 4b15 ldr r3, [pc, #84] @ (80013c8 <_sbrk+0x60>) - 8001374: 1ad3 subs r3, r2, r3 - 8001376: 617b str r3, [r7, #20] + 80014b0: 4a14 ldr r2, [pc, #80] @ (8001504 <_sbrk+0x5c>) + 80014b2: 4b15 ldr r3, [pc, #84] @ (8001508 <_sbrk+0x60>) + 80014b4: 1ad3 subs r3, r2, r3 + 80014b6: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; - 8001378: 697b ldr r3, [r7, #20] - 800137a: 613b str r3, [r7, #16] + 80014b8: 697b ldr r3, [r7, #20] + 80014ba: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) - 800137c: 4b13 ldr r3, [pc, #76] @ (80013cc <_sbrk+0x64>) - 800137e: 681b ldr r3, [r3, #0] - 8001380: 2b00 cmp r3, #0 - 8001382: d102 bne.n 800138a <_sbrk+0x22> + 80014bc: 4b13 ldr r3, [pc, #76] @ (800150c <_sbrk+0x64>) + 80014be: 681b ldr r3, [r3, #0] + 80014c0: 2b00 cmp r3, #0 + 80014c2: d102 bne.n 80014ca <_sbrk+0x22> { __sbrk_heap_end = &_end; - 8001384: 4b11 ldr r3, [pc, #68] @ (80013cc <_sbrk+0x64>) - 8001386: 4a12 ldr r2, [pc, #72] @ (80013d0 <_sbrk+0x68>) - 8001388: 601a str r2, [r3, #0] + 80014c4: 4b11 ldr r3, [pc, #68] @ (800150c <_sbrk+0x64>) + 80014c6: 4a12 ldr r2, [pc, #72] @ (8001510 <_sbrk+0x68>) + 80014c8: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) - 800138a: 4b10 ldr r3, [pc, #64] @ (80013cc <_sbrk+0x64>) - 800138c: 681a ldr r2, [r3, #0] - 800138e: 687b ldr r3, [r7, #4] - 8001390: 18d3 adds r3, r2, r3 - 8001392: 693a ldr r2, [r7, #16] - 8001394: 429a cmp r2, r3 - 8001396: d207 bcs.n 80013a8 <_sbrk+0x40> + 80014ca: 4b10 ldr r3, [pc, #64] @ (800150c <_sbrk+0x64>) + 80014cc: 681a ldr r2, [r3, #0] + 80014ce: 687b ldr r3, [r7, #4] + 80014d0: 18d3 adds r3, r2, r3 + 80014d2: 693a ldr r2, [r7, #16] + 80014d4: 429a cmp r2, r3 + 80014d6: d207 bcs.n 80014e8 <_sbrk+0x40> { errno = ENOMEM; - 8001398: f004 f846 bl 8005428 <__errno> - 800139c: 0003 movs r3, r0 - 800139e: 220c movs r2, #12 - 80013a0: 601a str r2, [r3, #0] + 80014d8: f004 f938 bl 800574c <__errno> + 80014dc: 0003 movs r3, r0 + 80014de: 220c movs r2, #12 + 80014e0: 601a str r2, [r3, #0] return (void *)-1; - 80013a2: 2301 movs r3, #1 - 80013a4: 425b negs r3, r3 - 80013a6: e009 b.n 80013bc <_sbrk+0x54> + 80014e2: 2301 movs r3, #1 + 80014e4: 425b negs r3, r3 + 80014e6: e009 b.n 80014fc <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; - 80013a8: 4b08 ldr r3, [pc, #32] @ (80013cc <_sbrk+0x64>) - 80013aa: 681b ldr r3, [r3, #0] - 80013ac: 60fb str r3, [r7, #12] + 80014e8: 4b08 ldr r3, [pc, #32] @ (800150c <_sbrk+0x64>) + 80014ea: 681b ldr r3, [r3, #0] + 80014ec: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; - 80013ae: 4b07 ldr r3, [pc, #28] @ (80013cc <_sbrk+0x64>) - 80013b0: 681a ldr r2, [r3, #0] - 80013b2: 687b ldr r3, [r7, #4] - 80013b4: 18d2 adds r2, r2, r3 - 80013b6: 4b05 ldr r3, [pc, #20] @ (80013cc <_sbrk+0x64>) - 80013b8: 601a str r2, [r3, #0] + 80014ee: 4b07 ldr r3, [pc, #28] @ (800150c <_sbrk+0x64>) + 80014f0: 681a ldr r2, [r3, #0] + 80014f2: 687b ldr r3, [r7, #4] + 80014f4: 18d2 adds r2, r2, r3 + 80014f6: 4b05 ldr r3, [pc, #20] @ (800150c <_sbrk+0x64>) + 80014f8: 601a str r2, [r3, #0] return (void *)prev_heap_end; - 80013ba: 68fb ldr r3, [r7, #12] + 80014fa: 68fb ldr r3, [r7, #12] } - 80013bc: 0018 movs r0, r3 - 80013be: 46bd mov sp, r7 - 80013c0: b006 add sp, #24 - 80013c2: bd80 pop {r7, pc} - 80013c4: 20009000 .word 0x20009000 - 80013c8: 00000400 .word 0x00000400 - 80013cc: 200001e4 .word 0x200001e4 - 80013d0: 20000338 .word 0x20000338 + 80014fc: 0018 movs r0, r3 + 80014fe: 46bd mov sp, r7 + 8001500: b006 add sp, #24 + 8001502: bd80 pop {r7, pc} + 8001504: 20009000 .word 0x20009000 + 8001508: 00000400 .word 0x00000400 + 800150c: 200001d4 .word 0x200001d4 + 8001510: 20000328 .word 0x20000328 -080013d4 : +08001514 : * @brief Setup the microcontroller system. * @param None * @retval None */ void SystemInit(void) { - 80013d4: b580 push {r7, lr} - 80013d6: af00 add r7, sp, #0 + 8001514: b580 push {r7, lr} + 8001516: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation */ #endif /* USER_VECT_TAB_ADDRESS */ } - 80013d8: 46c0 nop @ (mov r8, r8) - 80013da: 46bd mov sp, r7 - 80013dc: bd80 pop {r7, pc} + 8001518: 46c0 nop @ (mov r8, r8) + 800151a: 46bd mov sp, r7 + 800151c: bd80 pop {r7, pc} ... -080013e0 : +08001520 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack - 80013e0: 480d ldr r0, [pc, #52] @ (8001418 ) + 8001520: 480d ldr r0, [pc, #52] @ (8001558 ) mov sp, r0 /* set stack pointer */ - 80013e2: 4685 mov sp, r0 + 8001522: 4685 mov sp, r0 /* Call the clock system initialization function.*/ bl SystemInit - 80013e4: f7ff fff6 bl 80013d4 + 8001524: f7ff fff6 bl 8001514 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 80013e8: 480c ldr r0, [pc, #48] @ (800141c ) + 8001528: 480c ldr r0, [pc, #48] @ (800155c ) ldr r1, =_edata - 80013ea: 490d ldr r1, [pc, #52] @ (8001420 ) + 800152a: 490d ldr r1, [pc, #52] @ (8001560 ) ldr r2, =_sidata - 80013ec: 4a0d ldr r2, [pc, #52] @ (8001424 ) + 800152c: 4a0d ldr r2, [pc, #52] @ (8001564 ) movs r3, #0 - 80013ee: 2300 movs r3, #0 + 800152e: 2300 movs r3, #0 b LoopCopyDataInit - 80013f0: e002 b.n 80013f8 + 8001530: e002 b.n 8001538 -080013f2 : +08001532 : CopyDataInit: ldr r4, [r2, r3] - 80013f2: 58d4 ldr r4, [r2, r3] + 8001532: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 80013f4: 50c4 str r4, [r0, r3] + 8001534: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 80013f6: 3304 adds r3, #4 + 8001536: 3304 adds r3, #4 -080013f8 : +08001538 : LoopCopyDataInit: adds r4, r0, r3 - 80013f8: 18c4 adds r4, r0, r3 + 8001538: 18c4 adds r4, r0, r3 cmp r4, r1 - 80013fa: 428c cmp r4, r1 + 800153a: 428c cmp r4, r1 bcc CopyDataInit - 80013fc: d3f9 bcc.n 80013f2 + 800153c: d3f9 bcc.n 8001532 /* Zero fill the bss segment. */ ldr r2, =_sbss - 80013fe: 4a0a ldr r2, [pc, #40] @ (8001428 ) + 800153e: 4a0a ldr r2, [pc, #40] @ (8001568 ) ldr r4, =_ebss - 8001400: 4c0a ldr r4, [pc, #40] @ (800142c ) + 8001540: 4c0a ldr r4, [pc, #40] @ (800156c ) movs r3, #0 - 8001402: 2300 movs r3, #0 + 8001542: 2300 movs r3, #0 b LoopFillZerobss - 8001404: e001 b.n 800140a + 8001544: e001 b.n 800154a -08001406 : +08001546 : FillZerobss: str r3, [r2] - 8001406: 6013 str r3, [r2, #0] + 8001546: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8001408: 3204 adds r2, #4 + 8001548: 3204 adds r2, #4 -0800140a : +0800154a : LoopFillZerobss: cmp r2, r4 - 800140a: 42a2 cmp r2, r4 + 800154a: 42a2 cmp r2, r4 bcc FillZerobss - 800140c: d3fb bcc.n 8001406 + 800154c: d3fb bcc.n 8001546 /* Call static constructors */ bl __libc_init_array - 800140e: f004 f811 bl 8005434 <__libc_init_array> + 800154e: f004 f903 bl 8005758 <__libc_init_array> /* Call the application s entry point.*/ bl main - 8001412: f7fe fff5 bl 8000400
+ 8001552: f7ff fad5 bl 8000b00
-08001416 : +08001556 : LoopForever: b LoopForever - 8001416: e7fe b.n 8001416 + 8001556: e7fe b.n 8001556 ldr r0, =_estack - 8001418: 20009000 .word 0x20009000 + 8001558: 20009000 .word 0x20009000 ldr r0, =_sdata - 800141c: 20000000 .word 0x20000000 + 800155c: 20000000 .word 0x20000000 ldr r1, =_edata - 8001420: 20000068 .word 0x20000068 + 8001560: 20000068 .word 0x20000068 ldr r2, =_sidata - 8001424: 08005fe4 .word 0x08005fe4 + 8001564: 08006304 .word 0x08006304 ldr r2, =_sbss - 8001428: 20000068 .word 0x20000068 + 8001568: 20000068 .word 0x20000068 ldr r4, =_ebss - 800142c: 20000338 .word 0x20000338 + 800156c: 20000328 .word 0x20000328 -08001430 : +08001570 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8001430: e7fe b.n 8001430 + 8001570: e7fe b.n 8001570 ... -08001434 : +08001574 : * each 1ms in the SysTick_Handler() interrupt handler. * * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8001434: b580 push {r7, lr} - 8001436: b082 sub sp, #8 - 8001438: af00 add r7, sp, #0 + 8001574: b580 push {r7, lr} + 8001576: b082 sub sp, #8 + 8001578: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; - 800143a: 1dfb adds r3, r7, #7 - 800143c: 2200 movs r2, #0 - 800143e: 701a strb r2, [r3, #0] + 800157a: 1dfb adds r3, r7, #7 + 800157c: 2200 movs r2, #0 + 800157e: 701a strb r2, [r3, #0] #if (INSTRUCTION_CACHE_ENABLE == 0U) __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); #endif /* INSTRUCTION_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8001440: 4b0b ldr r3, [pc, #44] @ (8001470 ) - 8001442: 681a ldr r2, [r3, #0] - 8001444: 4b0a ldr r3, [pc, #40] @ (8001470 ) - 8001446: 2180 movs r1, #128 @ 0x80 - 8001448: 0049 lsls r1, r1, #1 - 800144a: 430a orrs r2, r1 - 800144c: 601a str r2, [r3, #0] + 8001580: 4b0b ldr r3, [pc, #44] @ (80015b0 ) + 8001582: 681a ldr r2, [r3, #0] + 8001584: 4b0a ldr r3, [pc, #40] @ (80015b0 ) + 8001586: 2180 movs r1, #128 @ 0x80 + 8001588: 0049 lsls r1, r1, #1 + 800158a: 430a orrs r2, r1 + 800158c: 601a str r2, [r3, #0] #endif /* PREFETCH_ENABLE */ /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is HSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 800144e: 2003 movs r0, #3 - 8001450: f000 f810 bl 8001474 - 8001454: 1e03 subs r3, r0, #0 - 8001456: d003 beq.n 8001460 + 800158e: 2003 movs r0, #3 + 8001590: f000 f810 bl 80015b4 + 8001594: 1e03 subs r3, r0, #0 + 8001596: d003 beq.n 80015a0 { status = HAL_ERROR; - 8001458: 1dfb adds r3, r7, #7 - 800145a: 2201 movs r2, #1 - 800145c: 701a strb r2, [r3, #0] - 800145e: e001 b.n 8001464 + 8001598: 1dfb adds r3, r7, #7 + 800159a: 2201 movs r2, #1 + 800159c: 701a strb r2, [r3, #0] + 800159e: e001 b.n 80015a4 } else { /* Init the low level hardware */ HAL_MspInit(); - 8001460: f7ff fdae bl 8000fc0 + 80015a0: f7ff fdae bl 8001100 } /* Return function status */ return status; - 8001464: 1dfb adds r3, r7, #7 - 8001466: 781b ldrb r3, [r3, #0] + 80015a4: 1dfb adds r3, r7, #7 + 80015a6: 781b ldrb r3, [r3, #0] } - 8001468: 0018 movs r0, r3 - 800146a: 46bd mov sp, r7 - 800146c: b002 add sp, #8 - 800146e: bd80 pop {r7, pc} - 8001470: 40022000 .word 0x40022000 + 80015a8: 0018 movs r0, r3 + 80015aa: 46bd mov sp, r7 + 80015ac: b002 add sp, #8 + 80015ae: bd80 pop {r7, pc} + 80015b0: 40022000 .word 0x40022000 -08001474 : +080015b4 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8001474: b590 push {r4, r7, lr} - 8001476: b085 sub sp, #20 - 8001478: af00 add r7, sp, #0 - 800147a: 6078 str r0, [r7, #4] + 80015b4: b590 push {r4, r7, lr} + 80015b6: b085 sub sp, #20 + 80015b8: af00 add r7, sp, #0 + 80015ba: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 800147c: 230f movs r3, #15 - 800147e: 18fb adds r3, r7, r3 - 8001480: 2200 movs r2, #0 - 8001482: 701a strb r2, [r3, #0] + 80015bc: 230f movs r3, #15 + 80015be: 18fb adds r3, r7, r3 + 80015c0: 2200 movs r2, #0 + 80015c2: 701a strb r2, [r3, #0] /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that doesn't take the value zero)*/ if ((uint32_t)uwTickFreq != 0U) - 8001484: 4b1d ldr r3, [pc, #116] @ (80014fc ) - 8001486: 781b ldrb r3, [r3, #0] - 8001488: 2b00 cmp r3, #0 - 800148a: d02b beq.n 80014e4 + 80015c4: 4b1d ldr r3, [pc, #116] @ (800163c ) + 80015c6: 781b ldrb r3, [r3, #0] + 80015c8: 2b00 cmp r3, #0 + 80015ca: d02b beq.n 8001624 { /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U /(uint32_t)uwTickFreq)) == 0U) - 800148c: 4b1c ldr r3, [pc, #112] @ (8001500 ) - 800148e: 681c ldr r4, [r3, #0] - 8001490: 4b1a ldr r3, [pc, #104] @ (80014fc ) - 8001492: 781b ldrb r3, [r3, #0] - 8001494: 0019 movs r1, r3 - 8001496: 23fa movs r3, #250 @ 0xfa - 8001498: 0098 lsls r0, r3, #2 - 800149a: f7fe fe3b bl 8000114 <__udivsi3> - 800149e: 0003 movs r3, r0 - 80014a0: 0019 movs r1, r3 - 80014a2: 0020 movs r0, r4 - 80014a4: f7fe fe36 bl 8000114 <__udivsi3> - 80014a8: 0003 movs r3, r0 - 80014aa: 0018 movs r0, r3 - 80014ac: f000 f953 bl 8001756 - 80014b0: 1e03 subs r3, r0, #0 - 80014b2: d112 bne.n 80014da + 80015cc: 4b1c ldr r3, [pc, #112] @ (8001640 ) + 80015ce: 681c ldr r4, [r3, #0] + 80015d0: 4b1a ldr r3, [pc, #104] @ (800163c ) + 80015d2: 781b ldrb r3, [r3, #0] + 80015d4: 0019 movs r1, r3 + 80015d6: 23fa movs r3, #250 @ 0xfa + 80015d8: 0098 lsls r0, r3, #2 + 80015da: f7fe fd9b bl 8000114 <__udivsi3> + 80015de: 0003 movs r3, r0 + 80015e0: 0019 movs r1, r3 + 80015e2: 0020 movs r0, r4 + 80015e4: f7fe fd96 bl 8000114 <__udivsi3> + 80015e8: 0003 movs r3, r0 + 80015ea: 0018 movs r0, r3 + 80015ec: f000 f953 bl 8001896 + 80015f0: 1e03 subs r3, r0, #0 + 80015f2: d112 bne.n 800161a { /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 80014b4: 687b ldr r3, [r7, #4] - 80014b6: 2b03 cmp r3, #3 - 80014b8: d80a bhi.n 80014d0 + 80015f4: 687b ldr r3, [r7, #4] + 80015f6: 2b03 cmp r3, #3 + 80015f8: d80a bhi.n 8001610 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 80014ba: 6879 ldr r1, [r7, #4] - 80014bc: 2301 movs r3, #1 - 80014be: 425b negs r3, r3 - 80014c0: 2200 movs r2, #0 - 80014c2: 0018 movs r0, r3 - 80014c4: f000 f922 bl 800170c + 80015fa: 6879 ldr r1, [r7, #4] + 80015fc: 2301 movs r3, #1 + 80015fe: 425b negs r3, r3 + 8001600: 2200 movs r2, #0 + 8001602: 0018 movs r0, r3 + 8001604: f000 f922 bl 800184c uwTickPrio = TickPriority; - 80014c8: 4b0e ldr r3, [pc, #56] @ (8001504 ) - 80014ca: 687a ldr r2, [r7, #4] - 80014cc: 601a str r2, [r3, #0] - 80014ce: e00d b.n 80014ec + 8001608: 4b0e ldr r3, [pc, #56] @ (8001644 ) + 800160a: 687a ldr r2, [r7, #4] + 800160c: 601a str r2, [r3, #0] + 800160e: e00d b.n 800162c } else { status = HAL_ERROR; - 80014d0: 230f movs r3, #15 - 80014d2: 18fb adds r3, r7, r3 - 80014d4: 2201 movs r2, #1 - 80014d6: 701a strb r2, [r3, #0] - 80014d8: e008 b.n 80014ec + 8001610: 230f movs r3, #15 + 8001612: 18fb adds r3, r7, r3 + 8001614: 2201 movs r2, #1 + 8001616: 701a strb r2, [r3, #0] + 8001618: e008 b.n 800162c } } else { status = HAL_ERROR; - 80014da: 230f movs r3, #15 - 80014dc: 18fb adds r3, r7, r3 - 80014de: 2201 movs r2, #1 - 80014e0: 701a strb r2, [r3, #0] - 80014e2: e003 b.n 80014ec + 800161a: 230f movs r3, #15 + 800161c: 18fb adds r3, r7, r3 + 800161e: 2201 movs r2, #1 + 8001620: 701a strb r2, [r3, #0] + 8001622: e003 b.n 800162c } } else { status = HAL_ERROR; - 80014e4: 230f movs r3, #15 - 80014e6: 18fb adds r3, r7, r3 - 80014e8: 2201 movs r2, #1 - 80014ea: 701a strb r2, [r3, #0] + 8001624: 230f movs r3, #15 + 8001626: 18fb adds r3, r7, r3 + 8001628: 2201 movs r2, #1 + 800162a: 701a strb r2, [r3, #0] } /* Return function status */ return status; - 80014ec: 230f movs r3, #15 - 80014ee: 18fb adds r3, r7, r3 - 80014f0: 781b ldrb r3, [r3, #0] + 800162c: 230f movs r3, #15 + 800162e: 18fb adds r3, r7, r3 + 8001630: 781b ldrb r3, [r3, #0] } - 80014f2: 0018 movs r0, r3 - 80014f4: 46bd mov sp, r7 - 80014f6: b005 add sp, #20 - 80014f8: bd90 pop {r4, r7, pc} - 80014fa: 46c0 nop @ (mov r8, r8) - 80014fc: 20000008 .word 0x20000008 - 8001500: 20000000 .word 0x20000000 - 8001504: 20000004 .word 0x20000004 + 8001632: 0018 movs r0, r3 + 8001634: 46bd mov sp, r7 + 8001636: b005 add sp, #20 + 8001638: bd90 pop {r4, r7, pc} + 800163a: 46c0 nop @ (mov r8, r8) + 800163c: 20000008 .word 0x20000008 + 8001640: 20000000 .word 0x20000000 + 8001644: 20000004 .word 0x20000004 -08001508 : +08001648 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8001508: b580 push {r7, lr} - 800150a: af00 add r7, sp, #0 + 8001648: b580 push {r7, lr} + 800164a: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; - 800150c: 4b05 ldr r3, [pc, #20] @ (8001524 ) - 800150e: 781b ldrb r3, [r3, #0] - 8001510: 001a movs r2, r3 - 8001512: 4b05 ldr r3, [pc, #20] @ (8001528 ) - 8001514: 681b ldr r3, [r3, #0] - 8001516: 18d2 adds r2, r2, r3 - 8001518: 4b03 ldr r3, [pc, #12] @ (8001528 ) - 800151a: 601a str r2, [r3, #0] + 800164c: 4b05 ldr r3, [pc, #20] @ (8001664 ) + 800164e: 781b ldrb r3, [r3, #0] + 8001650: 001a movs r2, r3 + 8001652: 4b05 ldr r3, [pc, #20] @ (8001668 ) + 8001654: 681b ldr r3, [r3, #0] + 8001656: 18d2 adds r2, r2, r3 + 8001658: 4b03 ldr r3, [pc, #12] @ (8001668 ) + 800165a: 601a str r2, [r3, #0] } - 800151c: 46c0 nop @ (mov r8, r8) - 800151e: 46bd mov sp, r7 - 8001520: bd80 pop {r7, pc} - 8001522: 46c0 nop @ (mov r8, r8) - 8001524: 20000008 .word 0x20000008 - 8001528: 200001e8 .word 0x200001e8 + 800165c: 46c0 nop @ (mov r8, r8) + 800165e: 46bd mov sp, r7 + 8001660: bd80 pop {r7, pc} + 8001662: 46c0 nop @ (mov r8, r8) + 8001664: 20000008 .word 0x20000008 + 8001668: 200001d8 .word 0x200001d8 -0800152c : +0800166c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 800152c: b580 push {r7, lr} - 800152e: af00 add r7, sp, #0 + 800166c: b580 push {r7, lr} + 800166e: af00 add r7, sp, #0 return uwTick; - 8001530: 4b02 ldr r3, [pc, #8] @ (800153c ) - 8001532: 681b ldr r3, [r3, #0] + 8001670: 4b02 ldr r3, [pc, #8] @ (800167c ) + 8001672: 681b ldr r3, [r3, #0] } - 8001534: 0018 movs r0, r3 - 8001536: 46bd mov sp, r7 - 8001538: bd80 pop {r7, pc} - 800153a: 46c0 nop @ (mov r8, r8) - 800153c: 200001e8 .word 0x200001e8 + 8001674: 0018 movs r0, r3 + 8001676: 46bd mov sp, r7 + 8001678: bd80 pop {r7, pc} + 800167a: 46c0 nop @ (mov r8, r8) + 800167c: 200001d8 .word 0x200001d8 -08001540 : +08001680 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 8001540: b580 push {r7, lr} - 8001542: b084 sub sp, #16 - 8001544: af00 add r7, sp, #0 - 8001546: 6078 str r0, [r7, #4] + 8001680: b580 push {r7, lr} + 8001682: b084 sub sp, #16 + 8001684: af00 add r7, sp, #0 + 8001686: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8001548: f7ff fff0 bl 800152c - 800154c: 0003 movs r3, r0 - 800154e: 60bb str r3, [r7, #8] + 8001688: f7ff fff0 bl 800166c + 800168c: 0003 movs r3, r0 + 800168e: 60bb str r3, [r7, #8] uint32_t wait = Delay; - 8001550: 687b ldr r3, [r7, #4] - 8001552: 60fb str r3, [r7, #12] + 8001690: 687b ldr r3, [r7, #4] + 8001692: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 8001554: 68fb ldr r3, [r7, #12] - 8001556: 3301 adds r3, #1 - 8001558: d005 beq.n 8001566 + 8001694: 68fb ldr r3, [r7, #12] + 8001696: 3301 adds r3, #1 + 8001698: d005 beq.n 80016a6 { wait += (uint32_t)(uwTickFreq); - 800155a: 4b0a ldr r3, [pc, #40] @ (8001584 ) - 800155c: 781b ldrb r3, [r3, #0] - 800155e: 001a movs r2, r3 - 8001560: 68fb ldr r3, [r7, #12] - 8001562: 189b adds r3, r3, r2 - 8001564: 60fb str r3, [r7, #12] + 800169a: 4b0a ldr r3, [pc, #40] @ (80016c4 ) + 800169c: 781b ldrb r3, [r3, #0] + 800169e: 001a movs r2, r3 + 80016a0: 68fb ldr r3, [r7, #12] + 80016a2: 189b adds r3, r3, r2 + 80016a4: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) - 8001566: 46c0 nop @ (mov r8, r8) - 8001568: f7ff ffe0 bl 800152c - 800156c: 0002 movs r2, r0 - 800156e: 68bb ldr r3, [r7, #8] - 8001570: 1ad3 subs r3, r2, r3 - 8001572: 68fa ldr r2, [r7, #12] - 8001574: 429a cmp r2, r3 - 8001576: d8f7 bhi.n 8001568 + 80016a6: 46c0 nop @ (mov r8, r8) + 80016a8: f7ff ffe0 bl 800166c + 80016ac: 0002 movs r2, r0 + 80016ae: 68bb ldr r3, [r7, #8] + 80016b0: 1ad3 subs r3, r2, r3 + 80016b2: 68fa ldr r2, [r7, #12] + 80016b4: 429a cmp r2, r3 + 80016b6: d8f7 bhi.n 80016a8 { } } - 8001578: 46c0 nop @ (mov r8, r8) - 800157a: 46c0 nop @ (mov r8, r8) - 800157c: 46bd mov sp, r7 - 800157e: b004 add sp, #16 - 8001580: bd80 pop {r7, pc} - 8001582: 46c0 nop @ (mov r8, r8) - 8001584: 20000008 .word 0x20000008 + 80016b8: 46c0 nop @ (mov r8, r8) + 80016ba: 46c0 nop @ (mov r8, r8) + 80016bc: 46bd mov sp, r7 + 80016be: b004 add sp, #16 + 80016c0: bd80 pop {r7, pc} + 80016c2: 46c0 nop @ (mov r8, r8) + 80016c4: 20000008 .word 0x20000008 -08001588 : +080016c8 : * @arg @ref SYSCFG_UCPD1_STROBE * @arg @ref SYSCFG_UCPD2_STROBE * @retval None */ void HAL_SYSCFG_StrobeDBattpinsConfig(uint32_t ConfigDeadBattery) { - 8001588: b580 push {r7, lr} - 800158a: b082 sub sp, #8 - 800158c: af00 add r7, sp, #0 - 800158e: 6078 str r0, [r7, #4] + 80016c8: b580 push {r7, lr} + 80016ca: b082 sub sp, #8 + 80016cc: af00 add r7, sp, #0 + 80016ce: 6078 str r0, [r7, #4] assert_param(IS_SYSCFG_DBATT_CONFIG(ConfigDeadBattery)); /* Change strobe configuration of GPIO depending on UCPDx dead battery settings */ MODIFY_REG(SYSCFG->CFGR1, (SYSCFG_CFGR1_UCPD1_STROBE | SYSCFG_CFGR1_UCPD2_STROBE), ConfigDeadBattery); - 8001590: 4b06 ldr r3, [pc, #24] @ (80015ac ) - 8001592: 681b ldr r3, [r3, #0] - 8001594: 4a06 ldr r2, [pc, #24] @ (80015b0 ) - 8001596: 4013 ands r3, r2 - 8001598: 0019 movs r1, r3 - 800159a: 4b04 ldr r3, [pc, #16] @ (80015ac ) - 800159c: 687a ldr r2, [r7, #4] - 800159e: 430a orrs r2, r1 - 80015a0: 601a str r2, [r3, #0] + 80016d0: 4b06 ldr r3, [pc, #24] @ (80016ec ) + 80016d2: 681b ldr r3, [r3, #0] + 80016d4: 4a06 ldr r2, [pc, #24] @ (80016f0 ) + 80016d6: 4013 ands r3, r2 + 80016d8: 0019 movs r1, r3 + 80016da: 4b04 ldr r3, [pc, #16] @ (80016ec ) + 80016dc: 687a ldr r2, [r7, #4] + 80016de: 430a orrs r2, r1 + 80016e0: 601a str r2, [r3, #0] } - 80015a2: 46c0 nop @ (mov r8, r8) - 80015a4: 46bd mov sp, r7 - 80015a6: b002 add sp, #8 - 80015a8: bd80 pop {r7, pc} - 80015aa: 46c0 nop @ (mov r8, r8) - 80015ac: 40010000 .word 0x40010000 - 80015b0: fffff9ff .word 0xfffff9ff + 80016e2: 46c0 nop @ (mov r8, r8) + 80016e4: 46bd mov sp, r7 + 80016e6: b002 add sp, #8 + 80016e8: bd80 pop {r7, pc} + 80016ea: 46c0 nop @ (mov r8, r8) + 80016ec: 40010000 .word 0x40010000 + 80016f0: fffff9ff .word 0xfffff9ff -080015b4 <__NVIC_EnableIRQ>: +080016f4 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 80015b4: b580 push {r7, lr} - 80015b6: b082 sub sp, #8 - 80015b8: af00 add r7, sp, #0 - 80015ba: 0002 movs r2, r0 - 80015bc: 1dfb adds r3, r7, #7 - 80015be: 701a strb r2, [r3, #0] + 80016f4: b580 push {r7, lr} + 80016f6: b082 sub sp, #8 + 80016f8: af00 add r7, sp, #0 + 80016fa: 0002 movs r2, r0 + 80016fc: 1dfb adds r3, r7, #7 + 80016fe: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 80015c0: 1dfb adds r3, r7, #7 - 80015c2: 781b ldrb r3, [r3, #0] - 80015c4: 2b7f cmp r3, #127 @ 0x7f - 80015c6: d809 bhi.n 80015dc <__NVIC_EnableIRQ+0x28> + 8001700: 1dfb adds r3, r7, #7 + 8001702: 781b ldrb r3, [r3, #0] + 8001704: 2b7f cmp r3, #127 @ 0x7f + 8001706: d809 bhi.n 800171c <__NVIC_EnableIRQ+0x28> { __COMPILER_BARRIER(); NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 80015c8: 1dfb adds r3, r7, #7 - 80015ca: 781b ldrb r3, [r3, #0] - 80015cc: 001a movs r2, r3 - 80015ce: 231f movs r3, #31 - 80015d0: 401a ands r2, r3 - 80015d2: 4b04 ldr r3, [pc, #16] @ (80015e4 <__NVIC_EnableIRQ+0x30>) - 80015d4: 2101 movs r1, #1 - 80015d6: 4091 lsls r1, r2 - 80015d8: 000a movs r2, r1 - 80015da: 601a str r2, [r3, #0] + 8001708: 1dfb adds r3, r7, #7 + 800170a: 781b ldrb r3, [r3, #0] + 800170c: 001a movs r2, r3 + 800170e: 231f movs r3, #31 + 8001710: 401a ands r2, r3 + 8001712: 4b04 ldr r3, [pc, #16] @ (8001724 <__NVIC_EnableIRQ+0x30>) + 8001714: 2101 movs r1, #1 + 8001716: 4091 lsls r1, r2 + 8001718: 000a movs r2, r1 + 800171a: 601a str r2, [r3, #0] __COMPILER_BARRIER(); } } - 80015dc: 46c0 nop @ (mov r8, r8) - 80015de: 46bd mov sp, r7 - 80015e0: b002 add sp, #8 - 80015e2: bd80 pop {r7, pc} - 80015e4: e000e100 .word 0xe000e100 + 800171c: 46c0 nop @ (mov r8, r8) + 800171e: 46bd mov sp, r7 + 8001720: b002 add sp, #8 + 8001722: bd80 pop {r7, pc} + 8001724: e000e100 .word 0xe000e100 -080015e8 <__NVIC_SetPriority>: +08001728 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 80015e8: b590 push {r4, r7, lr} - 80015ea: b083 sub sp, #12 - 80015ec: af00 add r7, sp, #0 - 80015ee: 0002 movs r2, r0 - 80015f0: 6039 str r1, [r7, #0] - 80015f2: 1dfb adds r3, r7, #7 - 80015f4: 701a strb r2, [r3, #0] + 8001728: b590 push {r4, r7, lr} + 800172a: b083 sub sp, #12 + 800172c: af00 add r7, sp, #0 + 800172e: 0002 movs r2, r0 + 8001730: 6039 str r1, [r7, #0] + 8001732: 1dfb adds r3, r7, #7 + 8001734: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 80015f6: 1dfb adds r3, r7, #7 - 80015f8: 781b ldrb r3, [r3, #0] - 80015fa: 2b7f cmp r3, #127 @ 0x7f - 80015fc: d828 bhi.n 8001650 <__NVIC_SetPriority+0x68> + 8001736: 1dfb adds r3, r7, #7 + 8001738: 781b ldrb r3, [r3, #0] + 800173a: 2b7f cmp r3, #127 @ 0x7f + 800173c: d828 bhi.n 8001790 <__NVIC_SetPriority+0x68> { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 80015fe: 4a2f ldr r2, [pc, #188] @ (80016bc <__NVIC_SetPriority+0xd4>) - 8001600: 1dfb adds r3, r7, #7 - 8001602: 781b ldrb r3, [r3, #0] - 8001604: b25b sxtb r3, r3 - 8001606: 089b lsrs r3, r3, #2 - 8001608: 33c0 adds r3, #192 @ 0xc0 - 800160a: 009b lsls r3, r3, #2 - 800160c: 589b ldr r3, [r3, r2] - 800160e: 1dfa adds r2, r7, #7 - 8001610: 7812 ldrb r2, [r2, #0] - 8001612: 0011 movs r1, r2 - 8001614: 2203 movs r2, #3 - 8001616: 400a ands r2, r1 - 8001618: 00d2 lsls r2, r2, #3 - 800161a: 21ff movs r1, #255 @ 0xff - 800161c: 4091 lsls r1, r2 - 800161e: 000a movs r2, r1 - 8001620: 43d2 mvns r2, r2 - 8001622: 401a ands r2, r3 - 8001624: 0011 movs r1, r2 + 800173e: 4a2f ldr r2, [pc, #188] @ (80017fc <__NVIC_SetPriority+0xd4>) + 8001740: 1dfb adds r3, r7, #7 + 8001742: 781b ldrb r3, [r3, #0] + 8001744: b25b sxtb r3, r3 + 8001746: 089b lsrs r3, r3, #2 + 8001748: 33c0 adds r3, #192 @ 0xc0 + 800174a: 009b lsls r3, r3, #2 + 800174c: 589b ldr r3, [r3, r2] + 800174e: 1dfa adds r2, r7, #7 + 8001750: 7812 ldrb r2, [r2, #0] + 8001752: 0011 movs r1, r2 + 8001754: 2203 movs r2, #3 + 8001756: 400a ands r2, r1 + 8001758: 00d2 lsls r2, r2, #3 + 800175a: 21ff movs r1, #255 @ 0xff + 800175c: 4091 lsls r1, r2 + 800175e: 000a movs r2, r1 + 8001760: 43d2 mvns r2, r2 + 8001762: 401a ands r2, r3 + 8001764: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 8001626: 683b ldr r3, [r7, #0] - 8001628: 019b lsls r3, r3, #6 - 800162a: 22ff movs r2, #255 @ 0xff - 800162c: 401a ands r2, r3 - 800162e: 1dfb adds r3, r7, #7 - 8001630: 781b ldrb r3, [r3, #0] - 8001632: 0018 movs r0, r3 - 8001634: 2303 movs r3, #3 - 8001636: 4003 ands r3, r0 - 8001638: 00db lsls r3, r3, #3 - 800163a: 409a lsls r2, r3 + 8001766: 683b ldr r3, [r7, #0] + 8001768: 019b lsls r3, r3, #6 + 800176a: 22ff movs r2, #255 @ 0xff + 800176c: 401a ands r2, r3 + 800176e: 1dfb adds r3, r7, #7 + 8001770: 781b ldrb r3, [r3, #0] + 8001772: 0018 movs r0, r3 + 8001774: 2303 movs r3, #3 + 8001776: 4003 ands r3, r0 + 8001778: 00db lsls r3, r3, #3 + 800177a: 409a lsls r2, r3 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 800163c: 481f ldr r0, [pc, #124] @ (80016bc <__NVIC_SetPriority+0xd4>) - 800163e: 1dfb adds r3, r7, #7 - 8001640: 781b ldrb r3, [r3, #0] - 8001642: b25b sxtb r3, r3 - 8001644: 089b lsrs r3, r3, #2 - 8001646: 430a orrs r2, r1 - 8001648: 33c0 adds r3, #192 @ 0xc0 - 800164a: 009b lsls r3, r3, #2 - 800164c: 501a str r2, [r3, r0] + 800177c: 481f ldr r0, [pc, #124] @ (80017fc <__NVIC_SetPriority+0xd4>) + 800177e: 1dfb adds r3, r7, #7 + 8001780: 781b ldrb r3, [r3, #0] + 8001782: b25b sxtb r3, r3 + 8001784: 089b lsrs r3, r3, #2 + 8001786: 430a orrs r2, r1 + 8001788: 33c0 adds r3, #192 @ 0xc0 + 800178a: 009b lsls r3, r3, #2 + 800178c: 501a str r2, [r3, r0] else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); } } - 800164e: e031 b.n 80016b4 <__NVIC_SetPriority+0xcc> + 800178e: e031 b.n 80017f4 <__NVIC_SetPriority+0xcc> SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8001650: 4a1b ldr r2, [pc, #108] @ (80016c0 <__NVIC_SetPriority+0xd8>) - 8001652: 1dfb adds r3, r7, #7 - 8001654: 781b ldrb r3, [r3, #0] - 8001656: 0019 movs r1, r3 - 8001658: 230f movs r3, #15 - 800165a: 400b ands r3, r1 - 800165c: 3b08 subs r3, #8 - 800165e: 089b lsrs r3, r3, #2 - 8001660: 3306 adds r3, #6 - 8001662: 009b lsls r3, r3, #2 - 8001664: 18d3 adds r3, r2, r3 - 8001666: 3304 adds r3, #4 - 8001668: 681b ldr r3, [r3, #0] - 800166a: 1dfa adds r2, r7, #7 - 800166c: 7812 ldrb r2, [r2, #0] - 800166e: 0011 movs r1, r2 - 8001670: 2203 movs r2, #3 - 8001672: 400a ands r2, r1 - 8001674: 00d2 lsls r2, r2, #3 - 8001676: 21ff movs r1, #255 @ 0xff - 8001678: 4091 lsls r1, r2 - 800167a: 000a movs r2, r1 - 800167c: 43d2 mvns r2, r2 - 800167e: 401a ands r2, r3 - 8001680: 0011 movs r1, r2 + 8001790: 4a1b ldr r2, [pc, #108] @ (8001800 <__NVIC_SetPriority+0xd8>) + 8001792: 1dfb adds r3, r7, #7 + 8001794: 781b ldrb r3, [r3, #0] + 8001796: 0019 movs r1, r3 + 8001798: 230f movs r3, #15 + 800179a: 400b ands r3, r1 + 800179c: 3b08 subs r3, #8 + 800179e: 089b lsrs r3, r3, #2 + 80017a0: 3306 adds r3, #6 + 80017a2: 009b lsls r3, r3, #2 + 80017a4: 18d3 adds r3, r2, r3 + 80017a6: 3304 adds r3, #4 + 80017a8: 681b ldr r3, [r3, #0] + 80017aa: 1dfa adds r2, r7, #7 + 80017ac: 7812 ldrb r2, [r2, #0] + 80017ae: 0011 movs r1, r2 + 80017b0: 2203 movs r2, #3 + 80017b2: 400a ands r2, r1 + 80017b4: 00d2 lsls r2, r2, #3 + 80017b6: 21ff movs r1, #255 @ 0xff + 80017b8: 4091 lsls r1, r2 + 80017ba: 000a movs r2, r1 + 80017bc: 43d2 mvns r2, r2 + 80017be: 401a ands r2, r3 + 80017c0: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 8001682: 683b ldr r3, [r7, #0] - 8001684: 019b lsls r3, r3, #6 - 8001686: 22ff movs r2, #255 @ 0xff - 8001688: 401a ands r2, r3 - 800168a: 1dfb adds r3, r7, #7 - 800168c: 781b ldrb r3, [r3, #0] - 800168e: 0018 movs r0, r3 - 8001690: 2303 movs r3, #3 - 8001692: 4003 ands r3, r0 - 8001694: 00db lsls r3, r3, #3 - 8001696: 409a lsls r2, r3 + 80017c2: 683b ldr r3, [r7, #0] + 80017c4: 019b lsls r3, r3, #6 + 80017c6: 22ff movs r2, #255 @ 0xff + 80017c8: 401a ands r2, r3 + 80017ca: 1dfb adds r3, r7, #7 + 80017cc: 781b ldrb r3, [r3, #0] + 80017ce: 0018 movs r0, r3 + 80017d0: 2303 movs r3, #3 + 80017d2: 4003 ands r3, r0 + 80017d4: 00db lsls r3, r3, #3 + 80017d6: 409a lsls r2, r3 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8001698: 4809 ldr r0, [pc, #36] @ (80016c0 <__NVIC_SetPriority+0xd8>) - 800169a: 1dfb adds r3, r7, #7 - 800169c: 781b ldrb r3, [r3, #0] - 800169e: 001c movs r4, r3 - 80016a0: 230f movs r3, #15 - 80016a2: 4023 ands r3, r4 - 80016a4: 3b08 subs r3, #8 - 80016a6: 089b lsrs r3, r3, #2 - 80016a8: 430a orrs r2, r1 - 80016aa: 3306 adds r3, #6 - 80016ac: 009b lsls r3, r3, #2 - 80016ae: 18c3 adds r3, r0, r3 - 80016b0: 3304 adds r3, #4 - 80016b2: 601a str r2, [r3, #0] + 80017d8: 4809 ldr r0, [pc, #36] @ (8001800 <__NVIC_SetPriority+0xd8>) + 80017da: 1dfb adds r3, r7, #7 + 80017dc: 781b ldrb r3, [r3, #0] + 80017de: 001c movs r4, r3 + 80017e0: 230f movs r3, #15 + 80017e2: 4023 ands r3, r4 + 80017e4: 3b08 subs r3, #8 + 80017e6: 089b lsrs r3, r3, #2 + 80017e8: 430a orrs r2, r1 + 80017ea: 3306 adds r3, #6 + 80017ec: 009b lsls r3, r3, #2 + 80017ee: 18c3 adds r3, r0, r3 + 80017f0: 3304 adds r3, #4 + 80017f2: 601a str r2, [r3, #0] } - 80016b4: 46c0 nop @ (mov r8, r8) - 80016b6: 46bd mov sp, r7 - 80016b8: b003 add sp, #12 - 80016ba: bd90 pop {r4, r7, pc} - 80016bc: e000e100 .word 0xe000e100 - 80016c0: e000ed00 .word 0xe000ed00 + 80017f4: 46c0 nop @ (mov r8, r8) + 80017f6: 46bd mov sp, r7 + 80017f8: b003 add sp, #12 + 80017fa: bd90 pop {r4, r7, pc} + 80017fc: e000e100 .word 0xe000e100 + 8001800: e000ed00 .word 0xe000ed00 -080016c4 : +08001804 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 80016c4: b580 push {r7, lr} - 80016c6: b082 sub sp, #8 - 80016c8: af00 add r7, sp, #0 - 80016ca: 6078 str r0, [r7, #4] + 8001804: b580 push {r7, lr} + 8001806: b082 sub sp, #8 + 8001808: af00 add r7, sp, #0 + 800180a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 80016cc: 687b ldr r3, [r7, #4] - 80016ce: 1e5a subs r2, r3, #1 - 80016d0: 2380 movs r3, #128 @ 0x80 - 80016d2: 045b lsls r3, r3, #17 - 80016d4: 429a cmp r2, r3 - 80016d6: d301 bcc.n 80016dc + 800180c: 687b ldr r3, [r7, #4] + 800180e: 1e5a subs r2, r3, #1 + 8001810: 2380 movs r3, #128 @ 0x80 + 8001812: 045b lsls r3, r3, #17 + 8001814: 429a cmp r2, r3 + 8001816: d301 bcc.n 800181c { return (1UL); /* Reload value impossible */ - 80016d8: 2301 movs r3, #1 - 80016da: e010 b.n 80016fe + 8001818: 2301 movs r3, #1 + 800181a: e010 b.n 800183e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 80016dc: 4b0a ldr r3, [pc, #40] @ (8001708 ) - 80016de: 687a ldr r2, [r7, #4] - 80016e0: 3a01 subs r2, #1 - 80016e2: 605a str r2, [r3, #4] + 800181c: 4b0a ldr r3, [pc, #40] @ (8001848 ) + 800181e: 687a ldr r2, [r7, #4] + 8001820: 3a01 subs r2, #1 + 8001822: 605a str r2, [r3, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 80016e4: 2301 movs r3, #1 - 80016e6: 425b negs r3, r3 - 80016e8: 2103 movs r1, #3 - 80016ea: 0018 movs r0, r3 - 80016ec: f7ff ff7c bl 80015e8 <__NVIC_SetPriority> + 8001824: 2301 movs r3, #1 + 8001826: 425b negs r3, r3 + 8001828: 2103 movs r1, #3 + 800182a: 0018 movs r0, r3 + 800182c: f7ff ff7c bl 8001728 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 80016f0: 4b05 ldr r3, [pc, #20] @ (8001708 ) - 80016f2: 2200 movs r2, #0 - 80016f4: 609a str r2, [r3, #8] + 8001830: 4b05 ldr r3, [pc, #20] @ (8001848 ) + 8001832: 2200 movs r2, #0 + 8001834: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 80016f6: 4b04 ldr r3, [pc, #16] @ (8001708 ) - 80016f8: 2207 movs r2, #7 - 80016fa: 601a str r2, [r3, #0] + 8001836: 4b04 ldr r3, [pc, #16] @ (8001848 ) + 8001838: 2207 movs r2, #7 + 800183a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 80016fc: 2300 movs r3, #0 + 800183c: 2300 movs r3, #0 } - 80016fe: 0018 movs r0, r3 - 8001700: 46bd mov sp, r7 - 8001702: b002 add sp, #8 - 8001704: bd80 pop {r7, pc} - 8001706: 46c0 nop @ (mov r8, r8) - 8001708: e000e010 .word 0xe000e010 + 800183e: 0018 movs r0, r3 + 8001840: 46bd mov sp, r7 + 8001842: b002 add sp, #8 + 8001844: bd80 pop {r7, pc} + 8001846: 46c0 nop @ (mov r8, r8) + 8001848: e000e010 .word 0xe000e010 -0800170c : +0800184c : * with stm32g0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0+ based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 800170c: b580 push {r7, lr} - 800170e: b084 sub sp, #16 - 8001710: af00 add r7, sp, #0 - 8001712: 60b9 str r1, [r7, #8] - 8001714: 607a str r2, [r7, #4] - 8001716: 210f movs r1, #15 - 8001718: 187b adds r3, r7, r1 - 800171a: 1c02 adds r2, r0, #0 - 800171c: 701a strb r2, [r3, #0] + 800184c: b580 push {r7, lr} + 800184e: b084 sub sp, #16 + 8001850: af00 add r7, sp, #0 + 8001852: 60b9 str r1, [r7, #8] + 8001854: 607a str r2, [r7, #4] + 8001856: 210f movs r1, #15 + 8001858: 187b adds r3, r7, r1 + 800185a: 1c02 adds r2, r0, #0 + 800185c: 701a strb r2, [r3, #0] /* Prevent unused argument(s) compilation warning */ UNUSED(SubPriority); /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn, PreemptPriority); - 800171e: 68ba ldr r2, [r7, #8] - 8001720: 187b adds r3, r7, r1 - 8001722: 781b ldrb r3, [r3, #0] - 8001724: b25b sxtb r3, r3 - 8001726: 0011 movs r1, r2 - 8001728: 0018 movs r0, r3 - 800172a: f7ff ff5d bl 80015e8 <__NVIC_SetPriority> + 800185e: 68ba ldr r2, [r7, #8] + 8001860: 187b adds r3, r7, r1 + 8001862: 781b ldrb r3, [r3, #0] + 8001864: b25b sxtb r3, r3 + 8001866: 0011 movs r1, r2 + 8001868: 0018 movs r0, r3 + 800186a: f7ff ff5d bl 8001728 <__NVIC_SetPriority> } - 800172e: 46c0 nop @ (mov r8, r8) - 8001730: 46bd mov sp, r7 - 8001732: b004 add sp, #16 - 8001734: bd80 pop {r7, pc} + 800186e: 46c0 nop @ (mov r8, r8) + 8001870: 46bd mov sp, r7 + 8001872: b004 add sp, #16 + 8001874: bd80 pop {r7, pc} -08001736 : +08001876 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32g0xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8001736: b580 push {r7, lr} - 8001738: b082 sub sp, #8 - 800173a: af00 add r7, sp, #0 - 800173c: 0002 movs r2, r0 - 800173e: 1dfb adds r3, r7, #7 - 8001740: 701a strb r2, [r3, #0] + 8001876: b580 push {r7, lr} + 8001878: b082 sub sp, #8 + 800187a: af00 add r7, sp, #0 + 800187c: 0002 movs r2, r0 + 800187e: 1dfb adds r3, r7, #7 + 8001880: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8001742: 1dfb adds r3, r7, #7 - 8001744: 781b ldrb r3, [r3, #0] - 8001746: b25b sxtb r3, r3 - 8001748: 0018 movs r0, r3 - 800174a: f7ff ff33 bl 80015b4 <__NVIC_EnableIRQ> + 8001882: 1dfb adds r3, r7, #7 + 8001884: 781b ldrb r3, [r3, #0] + 8001886: b25b sxtb r3, r3 + 8001888: 0018 movs r0, r3 + 800188a: f7ff ff33 bl 80016f4 <__NVIC_EnableIRQ> } - 800174e: 46c0 nop @ (mov r8, r8) - 8001750: 46bd mov sp, r7 - 8001752: b002 add sp, #8 - 8001754: bd80 pop {r7, pc} + 800188e: 46c0 nop @ (mov r8, r8) + 8001890: 46bd mov sp, r7 + 8001892: b002 add sp, #8 + 8001894: bd80 pop {r7, pc} -08001756 : +08001896 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8001756: b580 push {r7, lr} - 8001758: b082 sub sp, #8 - 800175a: af00 add r7, sp, #0 - 800175c: 6078 str r0, [r7, #4] + 8001896: b580 push {r7, lr} + 8001898: b082 sub sp, #8 + 800189a: af00 add r7, sp, #0 + 800189c: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 800175e: 687b ldr r3, [r7, #4] - 8001760: 0018 movs r0, r3 - 8001762: f7ff ffaf bl 80016c4 - 8001766: 0003 movs r3, r0 + 800189e: 687b ldr r3, [r7, #4] + 80018a0: 0018 movs r0, r3 + 80018a2: f7ff ffaf bl 8001804 + 80018a6: 0003 movs r3, r0 } - 8001768: 0018 movs r0, r3 - 800176a: 46bd mov sp, r7 - 800176c: b002 add sp, #8 - 800176e: bd80 pop {r7, pc} + 80018a8: 0018 movs r0, r3 + 80018aa: 46bd mov sp, r7 + 80018ac: b002 add sp, #8 + 80018ae: bd80 pop {r7, pc} -08001770 : +080018b0 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 8001770: b580 push {r7, lr} - 8001772: b084 sub sp, #16 - 8001774: af00 add r7, sp, #0 - 8001776: 6078 str r0, [r7, #4] + 80018b0: b580 push {r7, lr} + 80018b2: b084 sub sp, #16 + 80018b4: af00 add r7, sp, #0 + 80018b6: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8001778: 210f movs r1, #15 - 800177a: 187b adds r3, r7, r1 - 800177c: 2200 movs r2, #0 - 800177e: 701a strb r2, [r3, #0] + 80018b8: 210f movs r1, #15 + 80018ba: 187b adds r3, r7, r1 + 80018bc: 2200 movs r2, #0 + 80018be: 701a strb r2, [r3, #0] if (hdma->State != HAL_DMA_STATE_BUSY) - 8001780: 687b ldr r3, [r7, #4] - 8001782: 2225 movs r2, #37 @ 0x25 - 8001784: 5c9b ldrb r3, [r3, r2] - 8001786: b2db uxtb r3, r3 - 8001788: 2b02 cmp r3, #2 - 800178a: d006 beq.n 800179a + 80018c0: 687b ldr r3, [r7, #4] + 80018c2: 2225 movs r2, #37 @ 0x25 + 80018c4: 5c9b ldrb r3, [r3, r2] + 80018c6: b2db uxtb r3, r3 + 80018c8: 2b02 cmp r3, #2 + 80018ca: d006 beq.n 80018da { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 800178c: 687b ldr r3, [r7, #4] - 800178e: 2204 movs r2, #4 - 8001790: 63da str r2, [r3, #60] @ 0x3c + 80018cc: 687b ldr r3, [r7, #4] + 80018ce: 2204 movs r2, #4 + 80018d0: 63da str r2, [r3, #60] @ 0x3c status = HAL_ERROR; - 8001792: 187b adds r3, r7, r1 - 8001794: 2201 movs r2, #1 - 8001796: 701a strb r2, [r3, #0] - 8001798: e049 b.n 800182e + 80018d2: 187b adds r3, r7, r1 + 80018d4: 2201 movs r2, #1 + 80018d6: 701a strb r2, [r3, #0] + 80018d8: e049 b.n 800196e } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800179a: 687b ldr r3, [r7, #4] - 800179c: 681b ldr r3, [r3, #0] - 800179e: 681a ldr r2, [r3, #0] - 80017a0: 687b ldr r3, [r7, #4] - 80017a2: 681b ldr r3, [r3, #0] - 80017a4: 210e movs r1, #14 - 80017a6: 438a bics r2, r1 - 80017a8: 601a str r2, [r3, #0] + 80018da: 687b ldr r3, [r7, #4] + 80018dc: 681b ldr r3, [r3, #0] + 80018de: 681a ldr r2, [r3, #0] + 80018e0: 687b ldr r3, [r7, #4] + 80018e2: 681b ldr r3, [r3, #0] + 80018e4: 210e movs r1, #14 + 80018e6: 438a bics r2, r1 + 80018e8: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 80017aa: 687b ldr r3, [r7, #4] - 80017ac: 681b ldr r3, [r3, #0] - 80017ae: 681a ldr r2, [r3, #0] - 80017b0: 687b ldr r3, [r7, #4] - 80017b2: 681b ldr r3, [r3, #0] - 80017b4: 2101 movs r1, #1 - 80017b6: 438a bics r2, r1 - 80017b8: 601a str r2, [r3, #0] + 80018ea: 687b ldr r3, [r7, #4] + 80018ec: 681b ldr r3, [r3, #0] + 80018ee: 681a ldr r2, [r3, #0] + 80018f0: 687b ldr r3, [r7, #4] + 80018f2: 681b ldr r3, [r3, #0] + 80018f4: 2101 movs r1, #1 + 80018f6: 438a bics r2, r1 + 80018f8: 601a str r2, [r3, #0] /* disable the DMAMUX sync overrun IT*/ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 80017ba: 687b ldr r3, [r7, #4] - 80017bc: 6c5b ldr r3, [r3, #68] @ 0x44 - 80017be: 681a ldr r2, [r3, #0] - 80017c0: 687b ldr r3, [r7, #4] - 80017c2: 6c5b ldr r3, [r3, #68] @ 0x44 - 80017c4: 491d ldr r1, [pc, #116] @ (800183c ) - 80017c6: 400a ands r2, r1 - 80017c8: 601a str r2, [r3, #0] + 80018fa: 687b ldr r3, [r7, #4] + 80018fc: 6c5b ldr r3, [r3, #68] @ 0x44 + 80018fe: 681a ldr r2, [r3, #0] + 8001900: 687b ldr r3, [r7, #4] + 8001902: 6c5b ldr r3, [r3, #68] @ 0x44 + 8001904: 491d ldr r1, [pc, #116] @ (800197c ) + 8001906: 400a ands r2, r1 + 8001908: 601a str r2, [r3, #0] /* Clear all flags */ #if defined(DMA2) hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); #else __HAL_DMA_CLEAR_FLAG(hdma, ((DMA_FLAG_GI1) << (hdma->ChannelIndex & 0x1CU))); - 80017ca: 4b1d ldr r3, [pc, #116] @ (8001840 ) - 80017cc: 6859 ldr r1, [r3, #4] - 80017ce: 687b ldr r3, [r7, #4] - 80017d0: 6c1b ldr r3, [r3, #64] @ 0x40 - 80017d2: 221c movs r2, #28 - 80017d4: 4013 ands r3, r2 - 80017d6: 2201 movs r2, #1 - 80017d8: 409a lsls r2, r3 - 80017da: 4b19 ldr r3, [pc, #100] @ (8001840 ) - 80017dc: 430a orrs r2, r1 - 80017de: 605a str r2, [r3, #4] + 800190a: 4b1d ldr r3, [pc, #116] @ (8001980 ) + 800190c: 6859 ldr r1, [r3, #4] + 800190e: 687b ldr r3, [r7, #4] + 8001910: 6c1b ldr r3, [r3, #64] @ 0x40 + 8001912: 221c movs r2, #28 + 8001914: 4013 ands r3, r2 + 8001916: 2201 movs r2, #1 + 8001918: 409a lsls r2, r3 + 800191a: 4b19 ldr r3, [pc, #100] @ (8001980 ) + 800191c: 430a orrs r2, r1 + 800191e: 605a str r2, [r3, #4] #endif /* DMA2 */ /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 80017e0: 687b ldr r3, [r7, #4] - 80017e2: 6c9b ldr r3, [r3, #72] @ 0x48 - 80017e4: 687a ldr r2, [r7, #4] - 80017e6: 6cd2 ldr r2, [r2, #76] @ 0x4c - 80017e8: 605a str r2, [r3, #4] + 8001920: 687b ldr r3, [r7, #4] + 8001922: 6c9b ldr r3, [r3, #72] @ 0x48 + 8001924: 687a ldr r2, [r7, #4] + 8001926: 6cd2 ldr r2, [r2, #76] @ 0x4c + 8001928: 605a str r2, [r3, #4] if (hdma->DMAmuxRequestGen != 0U) - 80017ea: 687b ldr r3, [r7, #4] - 80017ec: 6d1b ldr r3, [r3, #80] @ 0x50 - 80017ee: 2b00 cmp r3, #0 - 80017f0: d00c beq.n 800180c + 800192a: 687b ldr r3, [r7, #4] + 800192c: 6d1b ldr r3, [r3, #80] @ 0x50 + 800192e: 2b00 cmp r3, #0 + 8001930: d00c beq.n 800194c { /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ /* disable the request gen overrun IT*/ hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - 80017f2: 687b ldr r3, [r7, #4] - 80017f4: 6d1b ldr r3, [r3, #80] @ 0x50 - 80017f6: 681a ldr r2, [r3, #0] - 80017f8: 687b ldr r3, [r7, #4] - 80017fa: 6d1b ldr r3, [r3, #80] @ 0x50 - 80017fc: 490f ldr r1, [pc, #60] @ (800183c ) - 80017fe: 400a ands r2, r1 - 8001800: 601a str r2, [r3, #0] + 8001932: 687b ldr r3, [r7, #4] + 8001934: 6d1b ldr r3, [r3, #80] @ 0x50 + 8001936: 681a ldr r2, [r3, #0] + 8001938: 687b ldr r3, [r7, #4] + 800193a: 6d1b ldr r3, [r3, #80] @ 0x50 + 800193c: 490f ldr r1, [pc, #60] @ (800197c ) + 800193e: 400a ands r2, r1 + 8001940: 601a str r2, [r3, #0] /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8001802: 687b ldr r3, [r7, #4] - 8001804: 6d5b ldr r3, [r3, #84] @ 0x54 - 8001806: 687a ldr r2, [r7, #4] - 8001808: 6d92 ldr r2, [r2, #88] @ 0x58 - 800180a: 605a str r2, [r3, #4] + 8001942: 687b ldr r3, [r7, #4] + 8001944: 6d5b ldr r3, [r3, #84] @ 0x54 + 8001946: 687a ldr r2, [r7, #4] + 8001948: 6d92 ldr r2, [r2, #88] @ 0x58 + 800194a: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 800180c: 687b ldr r3, [r7, #4] - 800180e: 2225 movs r2, #37 @ 0x25 - 8001810: 2101 movs r1, #1 - 8001812: 5499 strb r1, [r3, r2] + 800194c: 687b ldr r3, [r7, #4] + 800194e: 2225 movs r2, #37 @ 0x25 + 8001950: 2101 movs r1, #1 + 8001952: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8001814: 687b ldr r3, [r7, #4] - 8001816: 2224 movs r2, #36 @ 0x24 - 8001818: 2100 movs r1, #0 - 800181a: 5499 strb r1, [r3, r2] + 8001954: 687b ldr r3, [r7, #4] + 8001956: 2224 movs r2, #36 @ 0x24 + 8001958: 2100 movs r1, #0 + 800195a: 5499 strb r1, [r3, r2] /* Call User Abort callback */ if (hdma->XferAbortCallback != NULL) - 800181c: 687b ldr r3, [r7, #4] - 800181e: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001820: 2b00 cmp r3, #0 - 8001822: d004 beq.n 800182e + 800195c: 687b ldr r3, [r7, #4] + 800195e: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001960: 2b00 cmp r3, #0 + 8001962: d004 beq.n 800196e { hdma->XferAbortCallback(hdma); - 8001824: 687b ldr r3, [r7, #4] - 8001826: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001828: 687a ldr r2, [r7, #4] - 800182a: 0010 movs r0, r2 - 800182c: 4798 blx r3 + 8001964: 687b ldr r3, [r7, #4] + 8001966: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001968: 687a ldr r2, [r7, #4] + 800196a: 0010 movs r0, r2 + 800196c: 4798 blx r3 } } return status; - 800182e: 230f movs r3, #15 - 8001830: 18fb adds r3, r7, r3 - 8001832: 781b ldrb r3, [r3, #0] + 800196e: 230f movs r3, #15 + 8001970: 18fb adds r3, r7, r3 + 8001972: 781b ldrb r3, [r3, #0] } - 8001834: 0018 movs r0, r3 - 8001836: 46bd mov sp, r7 - 8001838: b004 add sp, #16 - 800183a: bd80 pop {r7, pc} - 800183c: fffffeff .word 0xfffffeff - 8001840: 40020000 .word 0x40020000 + 8001974: 0018 movs r0, r3 + 8001976: 46bd mov sp, r7 + 8001978: b004 add sp, #16 + 800197a: bd80 pop {r7, pc} + 800197c: fffffeff .word 0xfffffeff + 8001980: 40020000 .word 0x40020000 -08001844 : +08001984 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL state */ HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) { - 8001844: b580 push {r7, lr} - 8001846: b082 sub sp, #8 - 8001848: af00 add r7, sp, #0 - 800184a: 6078 str r0, [r7, #4] + 8001984: b580 push {r7, lr} + 8001986: b082 sub sp, #8 + 8001988: af00 add r7, sp, #0 + 800198a: 6078 str r0, [r7, #4] /* Return DMA handle state */ return hdma->State; - 800184c: 687b ldr r3, [r7, #4] - 800184e: 2225 movs r2, #37 @ 0x25 - 8001850: 5c9b ldrb r3, [r3, r2] - 8001852: b2db uxtb r3, r3 + 800198c: 687b ldr r3, [r7, #4] + 800198e: 2225 movs r2, #37 @ 0x25 + 8001990: 5c9b ldrb r3, [r3, r2] + 8001992: b2db uxtb r3, r3 } - 8001854: 0018 movs r0, r3 - 8001856: 46bd mov sp, r7 - 8001858: b002 add sp, #8 - 800185a: bd80 pop {r7, pc} + 8001994: 0018 movs r0, r3 + 8001996: 46bd mov sp, r7 + 8001998: b002 add sp, #8 + 800199a: bd80 pop {r7, pc} -0800185c : +0800199c : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 800185c: b580 push {r7, lr} - 800185e: b086 sub sp, #24 - 8001860: af00 add r7, sp, #0 - 8001862: 6078 str r0, [r7, #4] - 8001864: 6039 str r1, [r7, #0] + 800199c: b580 push {r7, lr} + 800199e: b086 sub sp, #24 + 80019a0: af00 add r7, sp, #0 + 80019a2: 6078 str r0, [r7, #4] + 80019a4: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 8001866: 2300 movs r3, #0 - 8001868: 617b str r3, [r7, #20] + 80019a6: 2300 movs r3, #0 + 80019a8: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 800186a: e147 b.n 8001afc + 80019aa: e147 b.n 8001c3c { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); - 800186c: 683b ldr r3, [r7, #0] - 800186e: 681b ldr r3, [r3, #0] - 8001870: 2101 movs r1, #1 - 8001872: 697a ldr r2, [r7, #20] - 8001874: 4091 lsls r1, r2 - 8001876: 000a movs r2, r1 - 8001878: 4013 ands r3, r2 - 800187a: 60fb str r3, [r7, #12] + 80019ac: 683b ldr r3, [r7, #0] + 80019ae: 681b ldr r3, [r3, #0] + 80019b0: 2101 movs r1, #1 + 80019b2: 697a ldr r2, [r7, #20] + 80019b4: 4091 lsls r1, r2 + 80019b6: 000a movs r2, r1 + 80019b8: 4013 ands r3, r2 + 80019ba: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) - 800187c: 68fb ldr r3, [r7, #12] - 800187e: 2b00 cmp r3, #0 - 8001880: d100 bne.n 8001884 - 8001882: e138 b.n 8001af6 + 80019bc: 68fb ldr r3, [r7, #12] + 80019be: 2b00 cmp r3, #0 + 80019c0: d100 bne.n 80019c4 + 80019c2: e138 b.n 8001c36 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 8001884: 683b ldr r3, [r7, #0] - 8001886: 685b ldr r3, [r3, #4] - 8001888: 2203 movs r2, #3 - 800188a: 4013 ands r3, r2 - 800188c: 2b01 cmp r3, #1 - 800188e: d005 beq.n 800189c - 8001890: 683b ldr r3, [r7, #0] - 8001892: 685b ldr r3, [r3, #4] - 8001894: 2203 movs r2, #3 - 8001896: 4013 ands r3, r2 - 8001898: 2b02 cmp r3, #2 - 800189a: d130 bne.n 80018fe + 80019c4: 683b ldr r3, [r7, #0] + 80019c6: 685b ldr r3, [r3, #4] + 80019c8: 2203 movs r2, #3 + 80019ca: 4013 ands r3, r2 + 80019cc: 2b01 cmp r3, #1 + 80019ce: d005 beq.n 80019dc + 80019d0: 683b ldr r3, [r7, #0] + 80019d2: 685b ldr r3, [r3, #4] + 80019d4: 2203 movs r2, #3 + 80019d6: 4013 ands r3, r2 + 80019d8: 2b02 cmp r3, #2 + 80019da: d130 bne.n 8001a3e { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 800189c: 687b ldr r3, [r7, #4] - 800189e: 689b ldr r3, [r3, #8] - 80018a0: 613b str r3, [r7, #16] + 80019dc: 687b ldr r3, [r7, #4] + 80019de: 689b ldr r3, [r3, #8] + 80019e0: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2u)); - 80018a2: 697b ldr r3, [r7, #20] - 80018a4: 005b lsls r3, r3, #1 - 80018a6: 2203 movs r2, #3 - 80018a8: 409a lsls r2, r3 - 80018aa: 0013 movs r3, r2 - 80018ac: 43da mvns r2, r3 - 80018ae: 693b ldr r3, [r7, #16] - 80018b0: 4013 ands r3, r2 - 80018b2: 613b str r3, [r7, #16] - temp |= (GPIO_Init->Speed << (position * 2u)); - 80018b4: 683b ldr r3, [r7, #0] - 80018b6: 68da ldr r2, [r3, #12] - 80018b8: 697b ldr r3, [r7, #20] - 80018ba: 005b lsls r3, r3, #1 - 80018bc: 409a lsls r2, r3 - 80018be: 0013 movs r3, r2 - 80018c0: 693a ldr r2, [r7, #16] - 80018c2: 4313 orrs r3, r2 - 80018c4: 613b str r3, [r7, #16] - GPIOx->OSPEEDR = temp; - 80018c6: 687b ldr r3, [r7, #4] - 80018c8: 693a ldr r2, [r7, #16] - 80018ca: 609a str r2, [r3, #8] - - /* Configure the IO Output Type */ - temp = GPIOx->OTYPER; - 80018cc: 687b ldr r3, [r7, #4] - 80018ce: 685b ldr r3, [r3, #4] - 80018d0: 613b str r3, [r7, #16] - temp &= ~(GPIO_OTYPER_OT0 << position) ; - 80018d2: 2201 movs r2, #1 - 80018d4: 697b ldr r3, [r7, #20] - 80018d6: 409a lsls r2, r3 - 80018d8: 0013 movs r3, r2 - 80018da: 43da mvns r2, r3 - 80018dc: 693b ldr r3, [r7, #16] - 80018de: 4013 ands r3, r2 - 80018e0: 613b str r3, [r7, #16] - temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 80018e2: 683b ldr r3, [r7, #0] - 80018e4: 685b ldr r3, [r3, #4] - 80018e6: 091b lsrs r3, r3, #4 - 80018e8: 2201 movs r2, #1 - 80018ea: 401a ands r2, r3 - 80018ec: 697b ldr r3, [r7, #20] - 80018ee: 409a lsls r2, r3 - 80018f0: 0013 movs r3, r2 - 80018f2: 693a ldr r2, [r7, #16] - 80018f4: 4313 orrs r3, r2 - 80018f6: 613b str r3, [r7, #16] - GPIOx->OTYPER = temp; - 80018f8: 687b ldr r3, [r7, #4] - 80018fa: 693a ldr r2, [r7, #16] - 80018fc: 605a str r2, [r3, #4] - } - - if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 80018fe: 683b ldr r3, [r7, #0] - 8001900: 685b ldr r3, [r3, #4] - 8001902: 2203 movs r2, #3 - 8001904: 4013 ands r3, r2 - 8001906: 2b03 cmp r3, #3 - 8001908: d017 beq.n 800193a - { - /* Check the Pull parameter */ - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - - /* Activate the Pull-up or Pull down resistor for the current IO */ - temp = GPIOx->PUPDR; - 800190a: 687b ldr r3, [r7, #4] - 800190c: 68db ldr r3, [r3, #12] - 800190e: 613b str r3, [r7, #16] - temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2u)); - 8001910: 697b ldr r3, [r7, #20] - 8001912: 005b lsls r3, r3, #1 - 8001914: 2203 movs r2, #3 - 8001916: 409a lsls r2, r3 - 8001918: 0013 movs r3, r2 - 800191a: 43da mvns r2, r3 - 800191c: 693b ldr r3, [r7, #16] - 800191e: 4013 ands r3, r2 - 8001920: 613b str r3, [r7, #16] - temp |= ((GPIO_Init->Pull) << (position * 2u)); - 8001922: 683b ldr r3, [r7, #0] - 8001924: 689a ldr r2, [r3, #8] - 8001926: 697b ldr r3, [r7, #20] - 8001928: 005b lsls r3, r3, #1 - 800192a: 409a lsls r2, r3 - 800192c: 0013 movs r3, r2 - 800192e: 693a ldr r2, [r7, #16] - 8001930: 4313 orrs r3, r2 - 8001932: 613b str r3, [r7, #16] - GPIOx->PUPDR = temp; - 8001934: 687b ldr r3, [r7, #4] - 8001936: 693a ldr r2, [r7, #16] - 8001938: 60da str r2, [r3, #12] - } - - /* In case of Alternate function mode selection */ - if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 800193a: 683b ldr r3, [r7, #0] - 800193c: 685b ldr r3, [r3, #4] - 800193e: 2203 movs r2, #3 - 8001940: 4013 ands r3, r2 - 8001942: 2b02 cmp r3, #2 - 8001944: d123 bne.n 800198e - /* Check the Alternate function parameters */ - assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - - /* Configure Alternate function mapped with the current IO */ - temp = GPIOx->AFR[position >> 3u]; - 8001946: 697b ldr r3, [r7, #20] - 8001948: 08da lsrs r2, r3, #3 - 800194a: 687b ldr r3, [r7, #4] - 800194c: 3208 adds r2, #8 - 800194e: 0092 lsls r2, r2, #2 - 8001950: 58d3 ldr r3, [r2, r3] - 8001952: 613b str r3, [r7, #16] - temp &= ~(0xFu << ((position & 0x07u) * 4u)); - 8001954: 697b ldr r3, [r7, #20] - 8001956: 2207 movs r2, #7 - 8001958: 4013 ands r3, r2 - 800195a: 009b lsls r3, r3, #2 - 800195c: 220f movs r2, #15 - 800195e: 409a lsls r2, r3 - 8001960: 0013 movs r3, r2 - 8001962: 43da mvns r2, r3 - 8001964: 693b ldr r3, [r7, #16] - 8001966: 4013 ands r3, r2 - 8001968: 613b str r3, [r7, #16] - temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); - 800196a: 683b ldr r3, [r7, #0] - 800196c: 691a ldr r2, [r3, #16] - 800196e: 697b ldr r3, [r7, #20] - 8001970: 2107 movs r1, #7 - 8001972: 400b ands r3, r1 - 8001974: 009b lsls r3, r3, #2 - 8001976: 409a lsls r2, r3 - 8001978: 0013 movs r3, r2 - 800197a: 693a ldr r2, [r7, #16] - 800197c: 4313 orrs r3, r2 - 800197e: 613b str r3, [r7, #16] - GPIOx->AFR[position >> 3u] = temp; - 8001980: 697b ldr r3, [r7, #20] - 8001982: 08da lsrs r2, r3, #3 - 8001984: 687b ldr r3, [r7, #4] - 8001986: 3208 adds r2, #8 - 8001988: 0092 lsls r2, r2, #2 - 800198a: 6939 ldr r1, [r7, #16] - 800198c: 50d1 str r1, [r2, r3] - } - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - 800198e: 687b ldr r3, [r7, #4] - 8001990: 681b ldr r3, [r3, #0] - 8001992: 613b str r3, [r7, #16] - temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); - 8001994: 697b ldr r3, [r7, #20] - 8001996: 005b lsls r3, r3, #1 - 8001998: 2203 movs r2, #3 - 800199a: 409a lsls r2, r3 - 800199c: 0013 movs r3, r2 - 800199e: 43da mvns r2, r3 - 80019a0: 693b ldr r3, [r7, #16] - 80019a2: 4013 ands r3, r2 - 80019a4: 613b str r3, [r7, #16] - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); - 80019a6: 683b ldr r3, [r7, #0] - 80019a8: 685b ldr r3, [r3, #4] - 80019aa: 2203 movs r2, #3 - 80019ac: 401a ands r2, r3 - 80019ae: 697b ldr r3, [r7, #20] - 80019b0: 005b lsls r3, r3, #1 - 80019b2: 409a lsls r2, r3 - 80019b4: 0013 movs r3, r2 - 80019b6: 693a ldr r2, [r7, #16] - 80019b8: 4313 orrs r3, r2 - 80019ba: 613b str r3, [r7, #16] - GPIOx->MODER = temp; - 80019bc: 687b ldr r3, [r7, #4] - 80019be: 693a ldr r2, [r7, #16] - 80019c0: 601a str r2, [r3, #0] - - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) - 80019c2: 683b ldr r3, [r7, #0] - 80019c4: 685a ldr r2, [r3, #4] - 80019c6: 23c0 movs r3, #192 @ 0xc0 - 80019c8: 029b lsls r3, r3, #10 - 80019ca: 4013 ands r3, r2 - 80019cc: d100 bne.n 80019d0 - 80019ce: e092 b.n 8001af6 - { - temp = EXTI->EXTICR[position >> 2u]; - 80019d0: 4a50 ldr r2, [pc, #320] @ (8001b14 ) - 80019d2: 697b ldr r3, [r7, #20] - 80019d4: 089b lsrs r3, r3, #2 - 80019d6: 3318 adds r3, #24 - 80019d8: 009b lsls r3, r3, #2 - 80019da: 589b ldr r3, [r3, r2] - 80019dc: 613b str r3, [r7, #16] - temp &= ~(0x0FuL << (8u * (position & 0x03u))); - 80019de: 697b ldr r3, [r7, #20] - 80019e0: 2203 movs r2, #3 - 80019e2: 4013 ands r3, r2 - 80019e4: 00db lsls r3, r3, #3 - 80019e6: 220f movs r2, #15 + 80019e2: 697b ldr r3, [r7, #20] + 80019e4: 005b lsls r3, r3, #1 + 80019e6: 2203 movs r2, #3 80019e8: 409a lsls r2, r3 80019ea: 0013 movs r3, r2 80019ec: 43da mvns r2, r3 80019ee: 693b ldr r3, [r7, #16] 80019f0: 4013 ands r3, r2 80019f2: 613b str r3, [r7, #16] - temp |= (GPIO_GET_INDEX(GPIOx) << (8u * (position & 0x03u))); - 80019f4: 687a ldr r2, [r7, #4] - 80019f6: 23a0 movs r3, #160 @ 0xa0 - 80019f8: 05db lsls r3, r3, #23 - 80019fa: 429a cmp r2, r3 - 80019fc: d013 beq.n 8001a26 - 80019fe: 687b ldr r3, [r7, #4] - 8001a00: 4a45 ldr r2, [pc, #276] @ (8001b18 ) - 8001a02: 4293 cmp r3, r2 - 8001a04: d00d beq.n 8001a22 + temp |= (GPIO_Init->Speed << (position * 2u)); + 80019f4: 683b ldr r3, [r7, #0] + 80019f6: 68da ldr r2, [r3, #12] + 80019f8: 697b ldr r3, [r7, #20] + 80019fa: 005b lsls r3, r3, #1 + 80019fc: 409a lsls r2, r3 + 80019fe: 0013 movs r3, r2 + 8001a00: 693a ldr r2, [r7, #16] + 8001a02: 4313 orrs r3, r2 + 8001a04: 613b str r3, [r7, #16] + GPIOx->OSPEEDR = temp; 8001a06: 687b ldr r3, [r7, #4] - 8001a08: 4a44 ldr r2, [pc, #272] @ (8001b1c ) - 8001a0a: 4293 cmp r3, r2 - 8001a0c: d007 beq.n 8001a1e - 8001a0e: 687b ldr r3, [r7, #4] - 8001a10: 4a43 ldr r2, [pc, #268] @ (8001b20 ) - 8001a12: 4293 cmp r3, r2 - 8001a14: d101 bne.n 8001a1a - 8001a16: 2303 movs r3, #3 - 8001a18: e006 b.n 8001a28 - 8001a1a: 2305 movs r3, #5 - 8001a1c: e004 b.n 8001a28 - 8001a1e: 2302 movs r3, #2 - 8001a20: e002 b.n 8001a28 - 8001a22: 2301 movs r3, #1 - 8001a24: e000 b.n 8001a28 - 8001a26: 2300 movs r3, #0 - 8001a28: 697a ldr r2, [r7, #20] - 8001a2a: 2103 movs r1, #3 - 8001a2c: 400a ands r2, r1 - 8001a2e: 00d2 lsls r2, r2, #3 - 8001a30: 4093 lsls r3, r2 + 8001a08: 693a ldr r2, [r7, #16] + 8001a0a: 609a str r2, [r3, #8] + + /* Configure the IO Output Type */ + temp = GPIOx->OTYPER; + 8001a0c: 687b ldr r3, [r7, #4] + 8001a0e: 685b ldr r3, [r3, #4] + 8001a10: 613b str r3, [r7, #16] + temp &= ~(GPIO_OTYPER_OT0 << position) ; + 8001a12: 2201 movs r2, #1 + 8001a14: 697b ldr r3, [r7, #20] + 8001a16: 409a lsls r2, r3 + 8001a18: 0013 movs r3, r2 + 8001a1a: 43da mvns r2, r3 + 8001a1c: 693b ldr r3, [r7, #16] + 8001a1e: 4013 ands r3, r2 + 8001a20: 613b str r3, [r7, #16] + temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); + 8001a22: 683b ldr r3, [r7, #0] + 8001a24: 685b ldr r3, [r3, #4] + 8001a26: 091b lsrs r3, r3, #4 + 8001a28: 2201 movs r2, #1 + 8001a2a: 401a ands r2, r3 + 8001a2c: 697b ldr r3, [r7, #20] + 8001a2e: 409a lsls r2, r3 + 8001a30: 0013 movs r3, r2 8001a32: 693a ldr r2, [r7, #16] 8001a34: 4313 orrs r3, r2 8001a36: 613b str r3, [r7, #16] + GPIOx->OTYPER = temp; + 8001a38: 687b ldr r3, [r7, #4] + 8001a3a: 693a ldr r2, [r7, #16] + 8001a3c: 605a str r2, [r3, #4] + } + + if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + 8001a3e: 683b ldr r3, [r7, #0] + 8001a40: 685b ldr r3, [r3, #4] + 8001a42: 2203 movs r2, #3 + 8001a44: 4013 ands r3, r2 + 8001a46: 2b03 cmp r3, #3 + 8001a48: d017 beq.n 8001a7a + { + /* Check the Pull parameter */ + assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + + /* Activate the Pull-up or Pull down resistor for the current IO */ + temp = GPIOx->PUPDR; + 8001a4a: 687b ldr r3, [r7, #4] + 8001a4c: 68db ldr r3, [r3, #12] + 8001a4e: 613b str r3, [r7, #16] + temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2u)); + 8001a50: 697b ldr r3, [r7, #20] + 8001a52: 005b lsls r3, r3, #1 + 8001a54: 2203 movs r2, #3 + 8001a56: 409a lsls r2, r3 + 8001a58: 0013 movs r3, r2 + 8001a5a: 43da mvns r2, r3 + 8001a5c: 693b ldr r3, [r7, #16] + 8001a5e: 4013 ands r3, r2 + 8001a60: 613b str r3, [r7, #16] + temp |= ((GPIO_Init->Pull) << (position * 2u)); + 8001a62: 683b ldr r3, [r7, #0] + 8001a64: 689a ldr r2, [r3, #8] + 8001a66: 697b ldr r3, [r7, #20] + 8001a68: 005b lsls r3, r3, #1 + 8001a6a: 409a lsls r2, r3 + 8001a6c: 0013 movs r3, r2 + 8001a6e: 693a ldr r2, [r7, #16] + 8001a70: 4313 orrs r3, r2 + 8001a72: 613b str r3, [r7, #16] + GPIOx->PUPDR = temp; + 8001a74: 687b ldr r3, [r7, #4] + 8001a76: 693a ldr r2, [r7, #16] + 8001a78: 60da str r2, [r3, #12] + } + + /* In case of Alternate function mode selection */ + if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 8001a7a: 683b ldr r3, [r7, #0] + 8001a7c: 685b ldr r3, [r3, #4] + 8001a7e: 2203 movs r2, #3 + 8001a80: 4013 ands r3, r2 + 8001a82: 2b02 cmp r3, #2 + 8001a84: d123 bne.n 8001ace + /* Check the Alternate function parameters */ + assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + + /* Configure Alternate function mapped with the current IO */ + temp = GPIOx->AFR[position >> 3u]; + 8001a86: 697b ldr r3, [r7, #20] + 8001a88: 08da lsrs r2, r3, #3 + 8001a8a: 687b ldr r3, [r7, #4] + 8001a8c: 3208 adds r2, #8 + 8001a8e: 0092 lsls r2, r2, #2 + 8001a90: 58d3 ldr r3, [r2, r3] + 8001a92: 613b str r3, [r7, #16] + temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 8001a94: 697b ldr r3, [r7, #20] + 8001a96: 2207 movs r2, #7 + 8001a98: 4013 ands r3, r2 + 8001a9a: 009b lsls r3, r3, #2 + 8001a9c: 220f movs r2, #15 + 8001a9e: 409a lsls r2, r3 + 8001aa0: 0013 movs r3, r2 + 8001aa2: 43da mvns r2, r3 + 8001aa4: 693b ldr r3, [r7, #16] + 8001aa6: 4013 ands r3, r2 + 8001aa8: 613b str r3, [r7, #16] + temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 8001aaa: 683b ldr r3, [r7, #0] + 8001aac: 691a ldr r2, [r3, #16] + 8001aae: 697b ldr r3, [r7, #20] + 8001ab0: 2107 movs r1, #7 + 8001ab2: 400b ands r3, r1 + 8001ab4: 009b lsls r3, r3, #2 + 8001ab6: 409a lsls r2, r3 + 8001ab8: 0013 movs r3, r2 + 8001aba: 693a ldr r2, [r7, #16] + 8001abc: 4313 orrs r3, r2 + 8001abe: 613b str r3, [r7, #16] + GPIOx->AFR[position >> 3u] = temp; + 8001ac0: 697b ldr r3, [r7, #20] + 8001ac2: 08da lsrs r2, r3, #3 + 8001ac4: 687b ldr r3, [r7, #4] + 8001ac6: 3208 adds r2, #8 + 8001ac8: 0092 lsls r2, r2, #2 + 8001aca: 6939 ldr r1, [r7, #16] + 8001acc: 50d1 str r1, [r2, r3] + } + + /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + temp = GPIOx->MODER; + 8001ace: 687b ldr r3, [r7, #4] + 8001ad0: 681b ldr r3, [r3, #0] + 8001ad2: 613b str r3, [r7, #16] + temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); + 8001ad4: 697b ldr r3, [r7, #20] + 8001ad6: 005b lsls r3, r3, #1 + 8001ad8: 2203 movs r2, #3 + 8001ada: 409a lsls r2, r3 + 8001adc: 0013 movs r3, r2 + 8001ade: 43da mvns r2, r3 + 8001ae0: 693b ldr r3, [r7, #16] + 8001ae2: 4013 ands r3, r2 + 8001ae4: 613b str r3, [r7, #16] + temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 8001ae6: 683b ldr r3, [r7, #0] + 8001ae8: 685b ldr r3, [r3, #4] + 8001aea: 2203 movs r2, #3 + 8001aec: 401a ands r2, r3 + 8001aee: 697b ldr r3, [r7, #20] + 8001af0: 005b lsls r3, r3, #1 + 8001af2: 409a lsls r2, r3 + 8001af4: 0013 movs r3, r2 + 8001af6: 693a ldr r2, [r7, #16] + 8001af8: 4313 orrs r3, r2 + 8001afa: 613b str r3, [r7, #16] + GPIOx->MODER = temp; + 8001afc: 687b ldr r3, [r7, #4] + 8001afe: 693a ldr r2, [r7, #16] + 8001b00: 601a str r2, [r3, #0] + + /*--------------------- EXTI Mode Configuration ------------------------*/ + /* Configure the External Interrupt or event for the current IO */ + if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) + 8001b02: 683b ldr r3, [r7, #0] + 8001b04: 685a ldr r2, [r3, #4] + 8001b06: 23c0 movs r3, #192 @ 0xc0 + 8001b08: 029b lsls r3, r3, #10 + 8001b0a: 4013 ands r3, r2 + 8001b0c: d100 bne.n 8001b10 + 8001b0e: e092 b.n 8001c36 + { + temp = EXTI->EXTICR[position >> 2u]; + 8001b10: 4a50 ldr r2, [pc, #320] @ (8001c54 ) + 8001b12: 697b ldr r3, [r7, #20] + 8001b14: 089b lsrs r3, r3, #2 + 8001b16: 3318 adds r3, #24 + 8001b18: 009b lsls r3, r3, #2 + 8001b1a: 589b ldr r3, [r3, r2] + 8001b1c: 613b str r3, [r7, #16] + temp &= ~(0x0FuL << (8u * (position & 0x03u))); + 8001b1e: 697b ldr r3, [r7, #20] + 8001b20: 2203 movs r2, #3 + 8001b22: 4013 ands r3, r2 + 8001b24: 00db lsls r3, r3, #3 + 8001b26: 220f movs r2, #15 + 8001b28: 409a lsls r2, r3 + 8001b2a: 0013 movs r3, r2 + 8001b2c: 43da mvns r2, r3 + 8001b2e: 693b ldr r3, [r7, #16] + 8001b30: 4013 ands r3, r2 + 8001b32: 613b str r3, [r7, #16] + temp |= (GPIO_GET_INDEX(GPIOx) << (8u * (position & 0x03u))); + 8001b34: 687a ldr r2, [r7, #4] + 8001b36: 23a0 movs r3, #160 @ 0xa0 + 8001b38: 05db lsls r3, r3, #23 + 8001b3a: 429a cmp r2, r3 + 8001b3c: d013 beq.n 8001b66 + 8001b3e: 687b ldr r3, [r7, #4] + 8001b40: 4a45 ldr r2, [pc, #276] @ (8001c58 ) + 8001b42: 4293 cmp r3, r2 + 8001b44: d00d beq.n 8001b62 + 8001b46: 687b ldr r3, [r7, #4] + 8001b48: 4a44 ldr r2, [pc, #272] @ (8001c5c ) + 8001b4a: 4293 cmp r3, r2 + 8001b4c: d007 beq.n 8001b5e + 8001b4e: 687b ldr r3, [r7, #4] + 8001b50: 4a43 ldr r2, [pc, #268] @ (8001c60 ) + 8001b52: 4293 cmp r3, r2 + 8001b54: d101 bne.n 8001b5a + 8001b56: 2303 movs r3, #3 + 8001b58: e006 b.n 8001b68 + 8001b5a: 2305 movs r3, #5 + 8001b5c: e004 b.n 8001b68 + 8001b5e: 2302 movs r3, #2 + 8001b60: e002 b.n 8001b68 + 8001b62: 2301 movs r3, #1 + 8001b64: e000 b.n 8001b68 + 8001b66: 2300 movs r3, #0 + 8001b68: 697a ldr r2, [r7, #20] + 8001b6a: 2103 movs r1, #3 + 8001b6c: 400a ands r2, r1 + 8001b6e: 00d2 lsls r2, r2, #3 + 8001b70: 4093 lsls r3, r2 + 8001b72: 693a ldr r2, [r7, #16] + 8001b74: 4313 orrs r3, r2 + 8001b76: 613b str r3, [r7, #16] EXTI->EXTICR[position >> 2u] = temp; - 8001a38: 4936 ldr r1, [pc, #216] @ (8001b14 ) - 8001a3a: 697b ldr r3, [r7, #20] - 8001a3c: 089b lsrs r3, r3, #2 - 8001a3e: 3318 adds r3, #24 - 8001a40: 009b lsls r3, r3, #2 - 8001a42: 693a ldr r2, [r7, #16] - 8001a44: 505a str r2, [r3, r1] + 8001b78: 4936 ldr r1, [pc, #216] @ (8001c54 ) + 8001b7a: 697b ldr r3, [r7, #20] + 8001b7c: 089b lsrs r3, r3, #2 + 8001b7e: 3318 adds r3, #24 + 8001b80: 009b lsls r3, r3, #2 + 8001b82: 693a ldr r2, [r7, #16] + 8001b84: 505a str r2, [r3, r1] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; - 8001a46: 4b33 ldr r3, [pc, #204] @ (8001b14 ) - 8001a48: 681b ldr r3, [r3, #0] - 8001a4a: 613b str r3, [r7, #16] + 8001b86: 4b33 ldr r3, [pc, #204] @ (8001c54 ) + 8001b88: 681b ldr r3, [r3, #0] + 8001b8a: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001a4c: 68fb ldr r3, [r7, #12] - 8001a4e: 43da mvns r2, r3 - 8001a50: 693b ldr r3, [r7, #16] - 8001a52: 4013 ands r3, r2 - 8001a54: 613b str r3, [r7, #16] + 8001b8c: 68fb ldr r3, [r7, #12] + 8001b8e: 43da mvns r2, r3 + 8001b90: 693b ldr r3, [r7, #16] + 8001b92: 4013 ands r3, r2 + 8001b94: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) - 8001a56: 683b ldr r3, [r7, #0] - 8001a58: 685a ldr r2, [r3, #4] - 8001a5a: 2380 movs r3, #128 @ 0x80 - 8001a5c: 035b lsls r3, r3, #13 - 8001a5e: 4013 ands r3, r2 - 8001a60: d003 beq.n 8001a6a + 8001b96: 683b ldr r3, [r7, #0] + 8001b98: 685a ldr r2, [r3, #4] + 8001b9a: 2380 movs r3, #128 @ 0x80 + 8001b9c: 035b lsls r3, r3, #13 + 8001b9e: 4013 ands r3, r2 + 8001ba0: d003 beq.n 8001baa { temp |= iocurrent; - 8001a62: 693a ldr r2, [r7, #16] - 8001a64: 68fb ldr r3, [r7, #12] - 8001a66: 4313 orrs r3, r2 - 8001a68: 613b str r3, [r7, #16] + 8001ba2: 693a ldr r2, [r7, #16] + 8001ba4: 68fb ldr r3, [r7, #12] + 8001ba6: 4313 orrs r3, r2 + 8001ba8: 613b str r3, [r7, #16] } EXTI->RTSR1 = temp; - 8001a6a: 4b2a ldr r3, [pc, #168] @ (8001b14 ) - 8001a6c: 693a ldr r2, [r7, #16] - 8001a6e: 601a str r2, [r3, #0] + 8001baa: 4b2a ldr r3, [pc, #168] @ (8001c54 ) + 8001bac: 693a ldr r2, [r7, #16] + 8001bae: 601a str r2, [r3, #0] temp = EXTI->FTSR1; - 8001a70: 4b28 ldr r3, [pc, #160] @ (8001b14 ) - 8001a72: 685b ldr r3, [r3, #4] - 8001a74: 613b str r3, [r7, #16] + 8001bb0: 4b28 ldr r3, [pc, #160] @ (8001c54 ) + 8001bb2: 685b ldr r3, [r3, #4] + 8001bb4: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001a76: 68fb ldr r3, [r7, #12] - 8001a78: 43da mvns r2, r3 - 8001a7a: 693b ldr r3, [r7, #16] - 8001a7c: 4013 ands r3, r2 - 8001a7e: 613b str r3, [r7, #16] + 8001bb6: 68fb ldr r3, [r7, #12] + 8001bb8: 43da mvns r2, r3 + 8001bba: 693b ldr r3, [r7, #16] + 8001bbc: 4013 ands r3, r2 + 8001bbe: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) - 8001a80: 683b ldr r3, [r7, #0] - 8001a82: 685a ldr r2, [r3, #4] - 8001a84: 2380 movs r3, #128 @ 0x80 - 8001a86: 039b lsls r3, r3, #14 - 8001a88: 4013 ands r3, r2 - 8001a8a: d003 beq.n 8001a94 + 8001bc0: 683b ldr r3, [r7, #0] + 8001bc2: 685a ldr r2, [r3, #4] + 8001bc4: 2380 movs r3, #128 @ 0x80 + 8001bc6: 039b lsls r3, r3, #14 + 8001bc8: 4013 ands r3, r2 + 8001bca: d003 beq.n 8001bd4 { temp |= iocurrent; - 8001a8c: 693a ldr r2, [r7, #16] - 8001a8e: 68fb ldr r3, [r7, #12] - 8001a90: 4313 orrs r3, r2 - 8001a92: 613b str r3, [r7, #16] + 8001bcc: 693a ldr r2, [r7, #16] + 8001bce: 68fb ldr r3, [r7, #12] + 8001bd0: 4313 orrs r3, r2 + 8001bd2: 613b str r3, [r7, #16] } EXTI->FTSR1 = temp; - 8001a94: 4b1f ldr r3, [pc, #124] @ (8001b14 ) - 8001a96: 693a ldr r2, [r7, #16] - 8001a98: 605a str r2, [r3, #4] + 8001bd4: 4b1f ldr r3, [pc, #124] @ (8001c54 ) + 8001bd6: 693a ldr r2, [r7, #16] + 8001bd8: 605a str r2, [r3, #4] /* Clear EXTI line configuration */ temp = EXTI->EMR1; - 8001a9a: 4a1e ldr r2, [pc, #120] @ (8001b14 ) - 8001a9c: 2384 movs r3, #132 @ 0x84 - 8001a9e: 58d3 ldr r3, [r2, r3] - 8001aa0: 613b str r3, [r7, #16] + 8001bda: 4a1e ldr r2, [pc, #120] @ (8001c54 ) + 8001bdc: 2384 movs r3, #132 @ 0x84 + 8001bde: 58d3 ldr r3, [r2, r3] + 8001be0: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001aa2: 68fb ldr r3, [r7, #12] - 8001aa4: 43da mvns r2, r3 - 8001aa6: 693b ldr r3, [r7, #16] - 8001aa8: 4013 ands r3, r2 - 8001aaa: 613b str r3, [r7, #16] + 8001be2: 68fb ldr r3, [r7, #12] + 8001be4: 43da mvns r2, r3 + 8001be6: 693b ldr r3, [r7, #16] + 8001be8: 4013 ands r3, r2 + 8001bea: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00u) - 8001aac: 683b ldr r3, [r7, #0] - 8001aae: 685a ldr r2, [r3, #4] - 8001ab0: 2380 movs r3, #128 @ 0x80 - 8001ab2: 029b lsls r3, r3, #10 - 8001ab4: 4013 ands r3, r2 - 8001ab6: d003 beq.n 8001ac0 + 8001bec: 683b ldr r3, [r7, #0] + 8001bee: 685a ldr r2, [r3, #4] + 8001bf0: 2380 movs r3, #128 @ 0x80 + 8001bf2: 029b lsls r3, r3, #10 + 8001bf4: 4013 ands r3, r2 + 8001bf6: d003 beq.n 8001c00 { temp |= iocurrent; - 8001ab8: 693a ldr r2, [r7, #16] - 8001aba: 68fb ldr r3, [r7, #12] - 8001abc: 4313 orrs r3, r2 - 8001abe: 613b str r3, [r7, #16] + 8001bf8: 693a ldr r2, [r7, #16] + 8001bfa: 68fb ldr r3, [r7, #12] + 8001bfc: 4313 orrs r3, r2 + 8001bfe: 613b str r3, [r7, #16] } EXTI->EMR1 = temp; - 8001ac0: 4914 ldr r1, [pc, #80] @ (8001b14 ) - 8001ac2: 2284 movs r2, #132 @ 0x84 - 8001ac4: 693b ldr r3, [r7, #16] - 8001ac6: 508b str r3, [r1, r2] + 8001c00: 4914 ldr r1, [pc, #80] @ (8001c54 ) + 8001c02: 2284 movs r2, #132 @ 0x84 + 8001c04: 693b ldr r3, [r7, #16] + 8001c06: 508b str r3, [r1, r2] temp = EXTI->IMR1; - 8001ac8: 4a12 ldr r2, [pc, #72] @ (8001b14 ) - 8001aca: 2380 movs r3, #128 @ 0x80 - 8001acc: 58d3 ldr r3, [r2, r3] - 8001ace: 613b str r3, [r7, #16] + 8001c08: 4a12 ldr r2, [pc, #72] @ (8001c54 ) + 8001c0a: 2380 movs r3, #128 @ 0x80 + 8001c0c: 58d3 ldr r3, [r2, r3] + 8001c0e: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001ad0: 68fb ldr r3, [r7, #12] - 8001ad2: 43da mvns r2, r3 - 8001ad4: 693b ldr r3, [r7, #16] - 8001ad6: 4013 ands r3, r2 - 8001ad8: 613b str r3, [r7, #16] + 8001c10: 68fb ldr r3, [r7, #12] + 8001c12: 43da mvns r2, r3 + 8001c14: 693b ldr r3, [r7, #16] + 8001c16: 4013 ands r3, r2 + 8001c18: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00u) - 8001ada: 683b ldr r3, [r7, #0] - 8001adc: 685a ldr r2, [r3, #4] - 8001ade: 2380 movs r3, #128 @ 0x80 - 8001ae0: 025b lsls r3, r3, #9 - 8001ae2: 4013 ands r3, r2 - 8001ae4: d003 beq.n 8001aee + 8001c1a: 683b ldr r3, [r7, #0] + 8001c1c: 685a ldr r2, [r3, #4] + 8001c1e: 2380 movs r3, #128 @ 0x80 + 8001c20: 025b lsls r3, r3, #9 + 8001c22: 4013 ands r3, r2 + 8001c24: d003 beq.n 8001c2e { temp |= iocurrent; - 8001ae6: 693a ldr r2, [r7, #16] - 8001ae8: 68fb ldr r3, [r7, #12] - 8001aea: 4313 orrs r3, r2 - 8001aec: 613b str r3, [r7, #16] + 8001c26: 693a ldr r2, [r7, #16] + 8001c28: 68fb ldr r3, [r7, #12] + 8001c2a: 4313 orrs r3, r2 + 8001c2c: 613b str r3, [r7, #16] } EXTI->IMR1 = temp; - 8001aee: 4909 ldr r1, [pc, #36] @ (8001b14 ) - 8001af0: 2280 movs r2, #128 @ 0x80 - 8001af2: 693b ldr r3, [r7, #16] - 8001af4: 508b str r3, [r1, r2] + 8001c2e: 4909 ldr r1, [pc, #36] @ (8001c54 ) + 8001c30: 2280 movs r2, #128 @ 0x80 + 8001c32: 693b ldr r3, [r7, #16] + 8001c34: 508b str r3, [r1, r2] } } position++; - 8001af6: 697b ldr r3, [r7, #20] - 8001af8: 3301 adds r3, #1 - 8001afa: 617b str r3, [r7, #20] + 8001c36: 697b ldr r3, [r7, #20] + 8001c38: 3301 adds r3, #1 + 8001c3a: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) - 8001afc: 683b ldr r3, [r7, #0] - 8001afe: 681a ldr r2, [r3, #0] - 8001b00: 697b ldr r3, [r7, #20] - 8001b02: 40da lsrs r2, r3 - 8001b04: 1e13 subs r3, r2, #0 - 8001b06: d000 beq.n 8001b0a - 8001b08: e6b0 b.n 800186c + 8001c3c: 683b ldr r3, [r7, #0] + 8001c3e: 681a ldr r2, [r3, #0] + 8001c40: 697b ldr r3, [r7, #20] + 8001c42: 40da lsrs r2, r3 + 8001c44: 1e13 subs r3, r2, #0 + 8001c46: d000 beq.n 8001c4a + 8001c48: e6b0 b.n 80019ac } } - 8001b0a: 46c0 nop @ (mov r8, r8) - 8001b0c: 46c0 nop @ (mov r8, r8) - 8001b0e: 46bd mov sp, r7 - 8001b10: b006 add sp, #24 - 8001b12: bd80 pop {r7, pc} - 8001b14: 40021800 .word 0x40021800 - 8001b18: 50000400 .word 0x50000400 - 8001b1c: 50000800 .word 0x50000800 - 8001b20: 50000c00 .word 0x50000c00 + 8001c4a: 46c0 nop @ (mov r8, r8) + 8001c4c: 46c0 nop @ (mov r8, r8) + 8001c4e: 46bd mov sp, r7 + 8001c50: b006 add sp, #24 + 8001c52: bd80 pop {r7, pc} + 8001c54: 40021800 .word 0x40021800 + 8001c58: 50000400 .word 0x50000400 + 8001c5c: 50000800 .word 0x50000800 + 8001c60: 50000c00 .word 0x50000c00 -08001b24 : - * @param GPIO_Pin specifies the port bit to read. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval The input port pin value. - */ -GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) -{ - 8001b24: b580 push {r7, lr} - 8001b26: b084 sub sp, #16 - 8001b28: af00 add r7, sp, #0 - 8001b2a: 6078 str r0, [r7, #4] - 8001b2c: 000a movs r2, r1 - 8001b2e: 1cbb adds r3, r7, #2 - 8001b30: 801a strh r2, [r3, #0] - GPIO_PinState bitstatus; - - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - if ((GPIOx->IDR & GPIO_Pin) != 0x00u) - 8001b32: 687b ldr r3, [r7, #4] - 8001b34: 691b ldr r3, [r3, #16] - 8001b36: 1cba adds r2, r7, #2 - 8001b38: 8812 ldrh r2, [r2, #0] - 8001b3a: 4013 ands r3, r2 - 8001b3c: d004 beq.n 8001b48 - { - bitstatus = GPIO_PIN_SET; - 8001b3e: 230f movs r3, #15 - 8001b40: 18fb adds r3, r7, r3 - 8001b42: 2201 movs r2, #1 - 8001b44: 701a strb r2, [r3, #0] - 8001b46: e003 b.n 8001b50 - } - else - { - bitstatus = GPIO_PIN_RESET; - 8001b48: 230f movs r3, #15 - 8001b4a: 18fb adds r3, r7, r3 - 8001b4c: 2200 movs r2, #0 - 8001b4e: 701a strb r2, [r3, #0] - } - return bitstatus; - 8001b50: 230f movs r3, #15 - 8001b52: 18fb adds r3, r7, r3 - 8001b54: 781b ldrb r3, [r3, #0] -} - 8001b56: 0018 movs r0, r3 - 8001b58: 46bd mov sp, r7 - 8001b5a: b004 add sp, #16 - 8001b5c: bd80 pop {r7, pc} - -08001b5e : +08001c64 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8001b5e: b580 push {r7, lr} - 8001b60: b082 sub sp, #8 - 8001b62: af00 add r7, sp, #0 - 8001b64: 6078 str r0, [r7, #4] - 8001b66: 0008 movs r0, r1 - 8001b68: 0011 movs r1, r2 - 8001b6a: 1cbb adds r3, r7, #2 - 8001b6c: 1c02 adds r2, r0, #0 - 8001b6e: 801a strh r2, [r3, #0] - 8001b70: 1c7b adds r3, r7, #1 - 8001b72: 1c0a adds r2, r1, #0 - 8001b74: 701a strb r2, [r3, #0] + 8001c64: b580 push {r7, lr} + 8001c66: b082 sub sp, #8 + 8001c68: af00 add r7, sp, #0 + 8001c6a: 6078 str r0, [r7, #4] + 8001c6c: 0008 movs r0, r1 + 8001c6e: 0011 movs r1, r2 + 8001c70: 1cbb adds r3, r7, #2 + 8001c72: 1c02 adds r2, r0, #0 + 8001c74: 801a strh r2, [r3, #0] + 8001c76: 1c7b adds r3, r7, #1 + 8001c78: 1c0a adds r2, r1, #0 + 8001c7a: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8001b76: 1c7b adds r3, r7, #1 - 8001b78: 781b ldrb r3, [r3, #0] - 8001b7a: 2b00 cmp r3, #0 - 8001b7c: d004 beq.n 8001b88 + 8001c7c: 1c7b adds r3, r7, #1 + 8001c7e: 781b ldrb r3, [r3, #0] + 8001c80: 2b00 cmp r3, #0 + 8001c82: d004 beq.n 8001c8e { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 8001b7e: 1cbb adds r3, r7, #2 - 8001b80: 881a ldrh r2, [r3, #0] - 8001b82: 687b ldr r3, [r7, #4] - 8001b84: 619a str r2, [r3, #24] + 8001c84: 1cbb adds r3, r7, #2 + 8001c86: 881a ldrh r2, [r3, #0] + 8001c88: 687b ldr r3, [r7, #4] + 8001c8a: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } - 8001b86: e003 b.n 8001b90 + 8001c8c: e003 b.n 8001c96 GPIOx->BRR = (uint32_t)GPIO_Pin; - 8001b88: 1cbb adds r3, r7, #2 - 8001b8a: 881a ldrh r2, [r3, #0] - 8001b8c: 687b ldr r3, [r7, #4] - 8001b8e: 629a str r2, [r3, #40] @ 0x28 + 8001c8e: 1cbb adds r3, r7, #2 + 8001c90: 881a ldrh r2, [r3, #0] + 8001c92: 687b ldr r3, [r7, #4] + 8001c94: 629a str r2, [r3, #40] @ 0x28 } - 8001b90: 46c0 nop @ (mov r8, r8) - 8001b92: 46bd mov sp, r7 - 8001b94: b002 add sp, #8 - 8001b96: bd80 pop {r7, pc} + 8001c96: 46c0 nop @ (mov r8, r8) + 8001c98: 46bd mov sp, r7 + 8001c9a: b002 add sp, #8 + 8001c9c: bd80 pop {r7, pc} + ... -08001b98 : +08001ca0 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 8001b98: b580 push {r7, lr} - 8001b9a: b082 sub sp, #8 - 8001b9c: af00 add r7, sp, #0 - 8001b9e: 6078 str r0, [r7, #4] + 8001ca0: b580 push {r7, lr} + 8001ca2: b082 sub sp, #8 + 8001ca4: af00 add r7, sp, #0 + 8001ca6: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) - 8001ba0: 687b ldr r3, [r7, #4] - 8001ba2: 2b00 cmp r3, #0 - 8001ba4: d101 bne.n 8001baa + 8001ca8: 687b ldr r3, [r7, #4] + 8001caa: 2b00 cmp r3, #0 + 8001cac: d101 bne.n 8001cb2 { return HAL_ERROR; - 8001ba6: 2301 movs r3, #1 - 8001ba8: e08f b.n 8001cca + 8001cae: 2301 movs r3, #1 + 8001cb0: e08f b.n 8001dd2 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 8001baa: 687b ldr r3, [r7, #4] - 8001bac: 2241 movs r2, #65 @ 0x41 - 8001bae: 5c9b ldrb r3, [r3, r2] - 8001bb0: b2db uxtb r3, r3 - 8001bb2: 2b00 cmp r3, #0 - 8001bb4: d107 bne.n 8001bc6 + 8001cb2: 687b ldr r3, [r7, #4] + 8001cb4: 2241 movs r2, #65 @ 0x41 + 8001cb6: 5c9b ldrb r3, [r3, r2] + 8001cb8: b2db uxtb r3, r3 + 8001cba: 2b00 cmp r3, #0 + 8001cbc: d107 bne.n 8001cce { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 8001bb6: 687b ldr r3, [r7, #4] - 8001bb8: 2240 movs r2, #64 @ 0x40 - 8001bba: 2100 movs r1, #0 - 8001bbc: 5499 strb r1, [r3, r2] + 8001cbe: 687b ldr r3, [r7, #4] + 8001cc0: 2240 movs r2, #64 @ 0x40 + 8001cc2: 2100 movs r1, #0 + 8001cc4: 5499 strb r1, [r3, r2] /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ HAL_I2C_MspInit(hi2c); - 8001bbe: 687b ldr r3, [r7, #4] - 8001bc0: 0018 movs r0, r3 - 8001bc2: f7ff fa25 bl 8001010 + 8001cc6: 687b ldr r3, [r7, #4] + 8001cc8: 0018 movs r0, r3 + 8001cca: f7ff fa41 bl 8001150 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 8001bc6: 687b ldr r3, [r7, #4] - 8001bc8: 2241 movs r2, #65 @ 0x41 - 8001bca: 2124 movs r1, #36 @ 0x24 - 8001bcc: 5499 strb r1, [r3, r2] + 8001cce: 687b ldr r3, [r7, #4] + 8001cd0: 2241 movs r2, #65 @ 0x41 + 8001cd2: 2124 movs r1, #36 @ 0x24 + 8001cd4: 5499 strb r1, [r3, r2] /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 8001bce: 687b ldr r3, [r7, #4] - 8001bd0: 681b ldr r3, [r3, #0] - 8001bd2: 681a ldr r2, [r3, #0] - 8001bd4: 687b ldr r3, [r7, #4] - 8001bd6: 681b ldr r3, [r3, #0] - 8001bd8: 2101 movs r1, #1 - 8001bda: 438a bics r2, r1 - 8001bdc: 601a str r2, [r3, #0] + 8001cd6: 687b ldr r3, [r7, #4] + 8001cd8: 681b ldr r3, [r3, #0] + 8001cda: 681a ldr r2, [r3, #0] + 8001cdc: 687b ldr r3, [r7, #4] + 8001cde: 681b ldr r3, [r3, #0] + 8001ce0: 2101 movs r1, #1 + 8001ce2: 438a bics r2, r1 + 8001ce4: 601a str r2, [r3, #0] /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; - 8001bde: 687b ldr r3, [r7, #4] - 8001be0: 685a ldr r2, [r3, #4] - 8001be2: 687b ldr r3, [r7, #4] - 8001be4: 681b ldr r3, [r3, #0] - 8001be6: 493b ldr r1, [pc, #236] @ (8001cd4 ) - 8001be8: 400a ands r2, r1 - 8001bea: 611a str r2, [r3, #16] + 8001ce6: 687b ldr r3, [r7, #4] + 8001ce8: 685a ldr r2, [r3, #4] + 8001cea: 687b ldr r3, [r7, #4] + 8001cec: 681b ldr r3, [r3, #0] + 8001cee: 493b ldr r1, [pc, #236] @ (8001ddc ) + 8001cf0: 400a ands r2, r1 + 8001cf2: 611a str r2, [r3, #16] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Disable Own Address1 before set the Own Address1 configuration */ hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - 8001bec: 687b ldr r3, [r7, #4] - 8001bee: 681b ldr r3, [r3, #0] - 8001bf0: 689a ldr r2, [r3, #8] - 8001bf2: 687b ldr r3, [r7, #4] - 8001bf4: 681b ldr r3, [r3, #0] - 8001bf6: 4938 ldr r1, [pc, #224] @ (8001cd8 ) - 8001bf8: 400a ands r2, r1 - 8001bfa: 609a str r2, [r3, #8] + 8001cf4: 687b ldr r3, [r7, #4] + 8001cf6: 681b ldr r3, [r3, #0] + 8001cf8: 689a ldr r2, [r3, #8] + 8001cfa: 687b ldr r3, [r7, #4] + 8001cfc: 681b ldr r3, [r3, #0] + 8001cfe: 4938 ldr r1, [pc, #224] @ (8001de0 ) + 8001d00: 400a ands r2, r1 + 8001d02: 609a str r2, [r3, #8] /* Configure I2Cx: Own Address1 and ack own address1 mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8001bfc: 687b ldr r3, [r7, #4] - 8001bfe: 68db ldr r3, [r3, #12] - 8001c00: 2b01 cmp r3, #1 - 8001c02: d108 bne.n 8001c16 + 8001d04: 687b ldr r3, [r7, #4] + 8001d06: 68db ldr r3, [r3, #12] + 8001d08: 2b01 cmp r3, #1 + 8001d0a: d108 bne.n 8001d1e { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); - 8001c04: 687b ldr r3, [r7, #4] - 8001c06: 689a ldr r2, [r3, #8] - 8001c08: 687b ldr r3, [r7, #4] - 8001c0a: 681b ldr r3, [r3, #0] - 8001c0c: 2180 movs r1, #128 @ 0x80 - 8001c0e: 0209 lsls r1, r1, #8 - 8001c10: 430a orrs r2, r1 - 8001c12: 609a str r2, [r3, #8] - 8001c14: e007 b.n 8001c26 + 8001d0c: 687b ldr r3, [r7, #4] + 8001d0e: 689a ldr r2, [r3, #8] + 8001d10: 687b ldr r3, [r7, #4] + 8001d12: 681b ldr r3, [r3, #0] + 8001d14: 2180 movs r1, #128 @ 0x80 + 8001d16: 0209 lsls r1, r1, #8 + 8001d18: 430a orrs r2, r1 + 8001d1a: 609a str r2, [r3, #8] + 8001d1c: e007 b.n 8001d2e } else /* I2C_ADDRESSINGMODE_10BIT */ { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); - 8001c16: 687b ldr r3, [r7, #4] - 8001c18: 689a ldr r2, [r3, #8] - 8001c1a: 687b ldr r3, [r7, #4] - 8001c1c: 681b ldr r3, [r3, #0] - 8001c1e: 2184 movs r1, #132 @ 0x84 - 8001c20: 0209 lsls r1, r1, #8 - 8001c22: 430a orrs r2, r1 - 8001c24: 609a str r2, [r3, #8] + 8001d1e: 687b ldr r3, [r7, #4] + 8001d20: 689a ldr r2, [r3, #8] + 8001d22: 687b ldr r3, [r7, #4] + 8001d24: 681b ldr r3, [r3, #0] + 8001d26: 2184 movs r1, #132 @ 0x84 + 8001d28: 0209 lsls r1, r1, #8 + 8001d2a: 430a orrs r2, r1 + 8001d2c: 609a str r2, [r3, #8] } /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 8001c26: 687b ldr r3, [r7, #4] - 8001c28: 68db ldr r3, [r3, #12] - 8001c2a: 2b02 cmp r3, #2 - 8001c2c: d109 bne.n 8001c42 + 8001d2e: 687b ldr r3, [r7, #4] + 8001d30: 68db ldr r3, [r3, #12] + 8001d32: 2b02 cmp r3, #2 + 8001d34: d109 bne.n 8001d4a { SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); - 8001c2e: 687b ldr r3, [r7, #4] - 8001c30: 681b ldr r3, [r3, #0] - 8001c32: 685a ldr r2, [r3, #4] - 8001c34: 687b ldr r3, [r7, #4] - 8001c36: 681b ldr r3, [r3, #0] - 8001c38: 2180 movs r1, #128 @ 0x80 - 8001c3a: 0109 lsls r1, r1, #4 - 8001c3c: 430a orrs r2, r1 - 8001c3e: 605a str r2, [r3, #4] - 8001c40: e007 b.n 8001c52 + 8001d36: 687b ldr r3, [r7, #4] + 8001d38: 681b ldr r3, [r3, #0] + 8001d3a: 685a ldr r2, [r3, #4] + 8001d3c: 687b ldr r3, [r7, #4] + 8001d3e: 681b ldr r3, [r3, #0] + 8001d40: 2180 movs r1, #128 @ 0x80 + 8001d42: 0109 lsls r1, r1, #4 + 8001d44: 430a orrs r2, r1 + 8001d46: 605a str r2, [r3, #4] + 8001d48: e007 b.n 8001d5a } else { /* Clear the I2C ADD10 bit */ CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); - 8001c42: 687b ldr r3, [r7, #4] - 8001c44: 681b ldr r3, [r3, #0] - 8001c46: 685a ldr r2, [r3, #4] - 8001c48: 687b ldr r3, [r7, #4] - 8001c4a: 681b ldr r3, [r3, #0] - 8001c4c: 4923 ldr r1, [pc, #140] @ (8001cdc ) - 8001c4e: 400a ands r2, r1 - 8001c50: 605a str r2, [r3, #4] + 8001d4a: 687b ldr r3, [r7, #4] + 8001d4c: 681b ldr r3, [r3, #0] + 8001d4e: 685a ldr r2, [r3, #4] + 8001d50: 687b ldr r3, [r7, #4] + 8001d52: 681b ldr r3, [r3, #0] + 8001d54: 4923 ldr r1, [pc, #140] @ (8001de4 ) + 8001d56: 400a ands r2, r1 + 8001d58: 605a str r2, [r3, #4] } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - 8001c52: 687b ldr r3, [r7, #4] - 8001c54: 681b ldr r3, [r3, #0] - 8001c56: 685a ldr r2, [r3, #4] - 8001c58: 687b ldr r3, [r7, #4] - 8001c5a: 681b ldr r3, [r3, #0] - 8001c5c: 4920 ldr r1, [pc, #128] @ (8001ce0 ) - 8001c5e: 430a orrs r2, r1 - 8001c60: 605a str r2, [r3, #4] + 8001d5a: 687b ldr r3, [r7, #4] + 8001d5c: 681b ldr r3, [r3, #0] + 8001d5e: 685a ldr r2, [r3, #4] + 8001d60: 687b ldr r3, [r7, #4] + 8001d62: 681b ldr r3, [r3, #0] + 8001d64: 4920 ldr r1, [pc, #128] @ (8001de8 ) + 8001d66: 430a orrs r2, r1 + 8001d68: 605a str r2, [r3, #4] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Disable Own Address2 before set the Own Address2 configuration */ hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; - 8001c62: 687b ldr r3, [r7, #4] - 8001c64: 681b ldr r3, [r3, #0] - 8001c66: 68da ldr r2, [r3, #12] - 8001c68: 687b ldr r3, [r7, #4] - 8001c6a: 681b ldr r3, [r3, #0] - 8001c6c: 491a ldr r1, [pc, #104] @ (8001cd8 ) - 8001c6e: 400a ands r2, r1 - 8001c70: 60da str r2, [r3, #12] + 8001d6a: 687b ldr r3, [r7, #4] + 8001d6c: 681b ldr r3, [r3, #0] + 8001d6e: 68da ldr r2, [r3, #12] + 8001d70: 687b ldr r3, [r7, #4] + 8001d72: 681b ldr r3, [r3, #0] + 8001d74: 491a ldr r1, [pc, #104] @ (8001de0 ) + 8001d76: 400a ands r2, r1 + 8001d78: 60da str r2, [r3, #12] /* Configure I2Cx: Dual mode and Own Address2 */ hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ - 8001c72: 687b ldr r3, [r7, #4] - 8001c74: 691a ldr r2, [r3, #16] - 8001c76: 687b ldr r3, [r7, #4] - 8001c78: 695b ldr r3, [r3, #20] - 8001c7a: 431a orrs r2, r3 - 8001c7c: 0011 movs r1, r2 + 8001d7a: 687b ldr r3, [r7, #4] + 8001d7c: 691a ldr r2, [r3, #16] + 8001d7e: 687b ldr r3, [r7, #4] + 8001d80: 695b ldr r3, [r3, #20] + 8001d82: 431a orrs r2, r3 + 8001d84: 0011 movs r1, r2 (hi2c->Init.OwnAddress2Masks << 8)); - 8001c7e: 687b ldr r3, [r7, #4] - 8001c80: 699b ldr r3, [r3, #24] - 8001c82: 021a lsls r2, r3, #8 + 8001d86: 687b ldr r3, [r7, #4] + 8001d88: 699b ldr r3, [r3, #24] + 8001d8a: 021a lsls r2, r3, #8 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ - 8001c84: 687b ldr r3, [r7, #4] - 8001c86: 681b ldr r3, [r3, #0] - 8001c88: 430a orrs r2, r1 - 8001c8a: 60da str r2, [r3, #12] + 8001d8c: 687b ldr r3, [r7, #4] + 8001d8e: 681b ldr r3, [r3, #0] + 8001d90: 430a orrs r2, r1 + 8001d92: 60da str r2, [r3, #12] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); - 8001c8c: 687b ldr r3, [r7, #4] - 8001c8e: 69d9 ldr r1, [r3, #28] - 8001c90: 687b ldr r3, [r7, #4] - 8001c92: 6a1a ldr r2, [r3, #32] - 8001c94: 687b ldr r3, [r7, #4] - 8001c96: 681b ldr r3, [r3, #0] - 8001c98: 430a orrs r2, r1 - 8001c9a: 601a str r2, [r3, #0] + 8001d94: 687b ldr r3, [r7, #4] + 8001d96: 69d9 ldr r1, [r3, #28] + 8001d98: 687b ldr r3, [r7, #4] + 8001d9a: 6a1a ldr r2, [r3, #32] + 8001d9c: 687b ldr r3, [r7, #4] + 8001d9e: 681b ldr r3, [r3, #0] + 8001da0: 430a orrs r2, r1 + 8001da2: 601a str r2, [r3, #0] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8001c9c: 687b ldr r3, [r7, #4] - 8001c9e: 681b ldr r3, [r3, #0] - 8001ca0: 681a ldr r2, [r3, #0] - 8001ca2: 687b ldr r3, [r7, #4] - 8001ca4: 681b ldr r3, [r3, #0] - 8001ca6: 2101 movs r1, #1 - 8001ca8: 430a orrs r2, r1 - 8001caa: 601a str r2, [r3, #0] + 8001da4: 687b ldr r3, [r7, #4] + 8001da6: 681b ldr r3, [r3, #0] + 8001da8: 681a ldr r2, [r3, #0] + 8001daa: 687b ldr r3, [r7, #4] + 8001dac: 681b ldr r3, [r3, #0] + 8001dae: 2101 movs r1, #1 + 8001db0: 430a orrs r2, r1 + 8001db2: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8001cac: 687b ldr r3, [r7, #4] - 8001cae: 2200 movs r2, #0 - 8001cb0: 645a str r2, [r3, #68] @ 0x44 + 8001db4: 687b ldr r3, [r7, #4] + 8001db6: 2200 movs r2, #0 + 8001db8: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; - 8001cb2: 687b ldr r3, [r7, #4] - 8001cb4: 2241 movs r2, #65 @ 0x41 - 8001cb6: 2120 movs r1, #32 - 8001cb8: 5499 strb r1, [r3, r2] + 8001dba: 687b ldr r3, [r7, #4] + 8001dbc: 2241 movs r2, #65 @ 0x41 + 8001dbe: 2120 movs r1, #32 + 8001dc0: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_NONE; - 8001cba: 687b ldr r3, [r7, #4] - 8001cbc: 2200 movs r2, #0 - 8001cbe: 631a str r2, [r3, #48] @ 0x30 + 8001dc2: 687b ldr r3, [r7, #4] + 8001dc4: 2200 movs r2, #0 + 8001dc6: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 8001cc0: 687b ldr r3, [r7, #4] - 8001cc2: 2242 movs r2, #66 @ 0x42 - 8001cc4: 2100 movs r1, #0 - 8001cc6: 5499 strb r1, [r3, r2] + 8001dc8: 687b ldr r3, [r7, #4] + 8001dca: 2242 movs r2, #66 @ 0x42 + 8001dcc: 2100 movs r1, #0 + 8001dce: 5499 strb r1, [r3, r2] return HAL_OK; - 8001cc8: 2300 movs r3, #0 + 8001dd0: 2300 movs r3, #0 } - 8001cca: 0018 movs r0, r3 - 8001ccc: 46bd mov sp, r7 - 8001cce: b002 add sp, #8 - 8001cd0: bd80 pop {r7, pc} - 8001cd2: 46c0 nop @ (mov r8, r8) - 8001cd4: f0ffffff .word 0xf0ffffff - 8001cd8: ffff7fff .word 0xffff7fff - 8001cdc: fffff7ff .word 0xfffff7ff - 8001ce0: 02008000 .word 0x02008000 + 8001dd2: 0018 movs r0, r3 + 8001dd4: 46bd mov sp, r7 + 8001dd6: b002 add sp, #8 + 8001dd8: bd80 pop {r7, pc} + 8001dda: 46c0 nop @ (mov r8, r8) + 8001ddc: f0ffffff .word 0xf0ffffff + 8001de0: ffff7fff .word 0xffff7fff + 8001de4: fffff7ff .word 0xfffff7ff + 8001de8: 02008000 .word 0x02008000 -08001ce4 : - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - 8001ce4: b580 push {r7, lr} - 8001ce6: b084 sub sp, #16 - 8001ce8: af00 add r7, sp, #0 - 8001cea: 60f8 str r0, [r7, #12] - 8001cec: 60b9 str r1, [r7, #8] - 8001cee: 1dbb adds r3, r7, #6 - 8001cf0: 801a strh r2, [r3, #0] - if (hi2c->State == HAL_I2C_STATE_READY) - 8001cf2: 68fb ldr r3, [r7, #12] - 8001cf4: 2241 movs r2, #65 @ 0x41 - 8001cf6: 5c9b ldrb r3, [r3, r2] - 8001cf8: b2db uxtb r3, r3 - 8001cfa: 2b20 cmp r3, #32 - 8001cfc: d13b bne.n 8001d76 - { - /* Process Locked */ - __HAL_LOCK(hi2c); - 8001cfe: 68fb ldr r3, [r7, #12] - 8001d00: 2240 movs r2, #64 @ 0x40 - 8001d02: 5c9b ldrb r3, [r3, r2] - 8001d04: 2b01 cmp r3, #1 - 8001d06: d101 bne.n 8001d0c - 8001d08: 2302 movs r3, #2 - 8001d0a: e035 b.n 8001d78 - 8001d0c: 68fb ldr r3, [r7, #12] - 8001d0e: 2240 movs r2, #64 @ 0x40 - 8001d10: 2101 movs r1, #1 - 8001d12: 5499 strb r1, [r3, r2] - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - 8001d14: 68fb ldr r3, [r7, #12] - 8001d16: 2241 movs r2, #65 @ 0x41 - 8001d18: 2122 movs r1, #34 @ 0x22 - 8001d1a: 5499 strb r1, [r3, r2] - hi2c->Mode = HAL_I2C_MODE_SLAVE; - 8001d1c: 68fb ldr r3, [r7, #12] - 8001d1e: 2242 movs r2, #66 @ 0x42 - 8001d20: 2120 movs r1, #32 - 8001d22: 5499 strb r1, [r3, r2] - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8001d24: 68fb ldr r3, [r7, #12] - 8001d26: 2200 movs r2, #0 - 8001d28: 645a str r2, [r3, #68] @ 0x44 - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - 8001d2a: 68fb ldr r3, [r7, #12] - 8001d2c: 681b ldr r3, [r3, #0] - 8001d2e: 685a ldr r2, [r3, #4] - 8001d30: 68fb ldr r3, [r7, #12] - 8001d32: 681b ldr r3, [r3, #0] - 8001d34: 4912 ldr r1, [pc, #72] @ (8001d80 ) - 8001d36: 400a ands r2, r1 - 8001d38: 605a str r2, [r3, #4] - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - 8001d3a: 68fb ldr r3, [r7, #12] - 8001d3c: 68ba ldr r2, [r7, #8] - 8001d3e: 625a str r2, [r3, #36] @ 0x24 - hi2c->XferCount = Size; - 8001d40: 68fb ldr r3, [r7, #12] - 8001d42: 1dba adds r2, r7, #6 - 8001d44: 8812 ldrh r2, [r2, #0] - 8001d46: 855a strh r2, [r3, #42] @ 0x2a - hi2c->XferSize = hi2c->XferCount; - 8001d48: 68fb ldr r3, [r7, #12] - 8001d4a: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8001d4c: b29a uxth r2, r3 - 8001d4e: 68fb ldr r3, [r7, #12] - 8001d50: 851a strh r2, [r3, #40] @ 0x28 - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8001d52: 68fb ldr r3, [r7, #12] - 8001d54: 4a0b ldr r2, [pc, #44] @ (8001d84 ) - 8001d56: 62da str r2, [r3, #44] @ 0x2c - hi2c->XferISR = I2C_Slave_ISR_IT; - 8001d58: 68fb ldr r3, [r7, #12] - 8001d5a: 4a0b ldr r2, [pc, #44] @ (8001d88 ) - 8001d5c: 635a str r2, [r3, #52] @ 0x34 - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 8001d5e: 68fb ldr r3, [r7, #12] - 8001d60: 2240 movs r2, #64 @ 0x40 - 8001d62: 2100 movs r1, #0 - 8001d64: 5499 strb r1, [r3, r2] - - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | - I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); - 8001d66: 4a09 ldr r2, [pc, #36] @ (8001d8c ) - 8001d68: 68fb ldr r3, [r7, #12] - 8001d6a: 0011 movs r1, r2 - 8001d6c: 0018 movs r0, r3 - 8001d6e: f001 fa81 bl 8003274 - - return HAL_OK; - 8001d72: 2300 movs r3, #0 - 8001d74: e000 b.n 8001d78 - } - else - { - return HAL_BUSY; - 8001d76: 2302 movs r3, #2 - } -} - 8001d78: 0018 movs r0, r3 - 8001d7a: 46bd mov sp, r7 - 8001d7c: b004 add sp, #16 - 8001d7e: bd80 pop {r7, pc} - 8001d80: ffff7fff .word 0xffff7fff - 8001d84: ffff0000 .word 0xffff0000 - 8001d88: 08001f19 .word 0x08001f19 - 8001d8c: 00008002 .word 0x00008002 - -08001d90 : +08001dec : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) /* Derogation MISRAC2012-Rule-8.13 */ { - 8001d90: b580 push {r7, lr} - 8001d92: b084 sub sp, #16 - 8001d94: af00 add r7, sp, #0 - 8001d96: 6078 str r0, [r7, #4] + 8001dec: b580 push {r7, lr} + 8001dee: b084 sub sp, #16 + 8001df0: af00 add r7, sp, #0 + 8001df2: 6078 str r0, [r7, #4] /* Get current IT Flags and IT sources value */ uint32_t itflags = READ_REG(hi2c->Instance->ISR); - 8001d98: 687b ldr r3, [r7, #4] - 8001d9a: 681b ldr r3, [r3, #0] - 8001d9c: 699b ldr r3, [r3, #24] - 8001d9e: 60fb str r3, [r7, #12] + 8001df4: 687b ldr r3, [r7, #4] + 8001df6: 681b ldr r3, [r3, #0] + 8001df8: 699b ldr r3, [r3, #24] + 8001dfa: 60fb str r3, [r7, #12] uint32_t itsources = READ_REG(hi2c->Instance->CR1); - 8001da0: 687b ldr r3, [r7, #4] - 8001da2: 681b ldr r3, [r3, #0] - 8001da4: 681b ldr r3, [r3, #0] - 8001da6: 60bb str r3, [r7, #8] + 8001dfc: 687b ldr r3, [r7, #4] + 8001dfe: 681b ldr r3, [r3, #0] + 8001e00: 681b ldr r3, [r3, #0] + 8001e02: 60bb str r3, [r7, #8] /* I2C events treatment -------------------------------------*/ if (hi2c->XferISR != NULL) - 8001da8: 687b ldr r3, [r7, #4] - 8001daa: 6b5b ldr r3, [r3, #52] @ 0x34 - 8001dac: 2b00 cmp r3, #0 - 8001dae: d005 beq.n 8001dbc + 8001e04: 687b ldr r3, [r7, #4] + 8001e06: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001e08: 2b00 cmp r3, #0 + 8001e0a: d005 beq.n 8001e18 { hi2c->XferISR(hi2c, itflags, itsources); - 8001db0: 687b ldr r3, [r7, #4] - 8001db2: 6b5b ldr r3, [r3, #52] @ 0x34 - 8001db4: 68ba ldr r2, [r7, #8] - 8001db6: 68f9 ldr r1, [r7, #12] - 8001db8: 6878 ldr r0, [r7, #4] - 8001dba: 4798 blx r3 + 8001e0c: 687b ldr r3, [r7, #4] + 8001e0e: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001e10: 68ba ldr r2, [r7, #8] + 8001e12: 68f9 ldr r1, [r7, #12] + 8001e14: 6878 ldr r0, [r7, #4] + 8001e16: 4798 blx r3 } } - 8001dbc: 46c0 nop @ (mov r8, r8) - 8001dbe: 46bd mov sp, r7 - 8001dc0: b004 add sp, #16 - 8001dc2: bd80 pop {r7, pc} + 8001e18: 46c0 nop @ (mov r8, r8) + 8001e1a: 46bd mov sp, r7 + 8001e1c: b004 add sp, #16 + 8001e1e: bd80 pop {r7, pc} -08001dc4 : +08001e20 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) { - 8001dc4: b580 push {r7, lr} - 8001dc6: b086 sub sp, #24 - 8001dc8: af00 add r7, sp, #0 - 8001dca: 6078 str r0, [r7, #4] + 8001e20: b580 push {r7, lr} + 8001e22: b086 sub sp, #24 + 8001e24: af00 add r7, sp, #0 + 8001e26: 6078 str r0, [r7, #4] uint32_t itflags = READ_REG(hi2c->Instance->ISR); - 8001dcc: 687b ldr r3, [r7, #4] - 8001dce: 681b ldr r3, [r3, #0] - 8001dd0: 699b ldr r3, [r3, #24] - 8001dd2: 617b str r3, [r7, #20] + 8001e28: 687b ldr r3, [r7, #4] + 8001e2a: 681b ldr r3, [r3, #0] + 8001e2c: 699b ldr r3, [r3, #24] + 8001e2e: 617b str r3, [r7, #20] uint32_t itsources = READ_REG(hi2c->Instance->CR1); - 8001dd4: 687b ldr r3, [r7, #4] - 8001dd6: 681b ldr r3, [r3, #0] - 8001dd8: 681b ldr r3, [r3, #0] - 8001dda: 613b str r3, [r7, #16] + 8001e30: 687b ldr r3, [r7, #4] + 8001e32: 681b ldr r3, [r3, #0] + 8001e34: 681b ldr r3, [r3, #0] + 8001e36: 613b str r3, [r7, #16] uint32_t tmperror; /* I2C Bus error interrupt occurred ------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ - 8001ddc: 697a ldr r2, [r7, #20] - 8001dde: 2380 movs r3, #128 @ 0x80 - 8001de0: 005b lsls r3, r3, #1 - 8001de2: 4013 ands r3, r2 - 8001de4: d00e beq.n 8001e04 + 8001e38: 697a ldr r2, [r7, #20] + 8001e3a: 2380 movs r3, #128 @ 0x80 + 8001e3c: 005b lsls r3, r3, #1 + 8001e3e: 4013 ands r3, r2 + 8001e40: d00e beq.n 8001e60 (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 8001de6: 693b ldr r3, [r7, #16] - 8001de8: 2280 movs r2, #128 @ 0x80 - 8001dea: 4013 ands r3, r2 + 8001e42: 693b ldr r3, [r7, #16] + 8001e44: 2280 movs r2, #128 @ 0x80 + 8001e46: 4013 ands r3, r2 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ - 8001dec: d00a beq.n 8001e04 + 8001e48: d00a beq.n 8001e60 { hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; - 8001dee: 687b ldr r3, [r7, #4] - 8001df0: 6c5b ldr r3, [r3, #68] @ 0x44 - 8001df2: 2201 movs r2, #1 - 8001df4: 431a orrs r2, r3 - 8001df6: 687b ldr r3, [r7, #4] - 8001df8: 645a str r2, [r3, #68] @ 0x44 + 8001e4a: 687b ldr r3, [r7, #4] + 8001e4c: 6c5b ldr r3, [r3, #68] @ 0x44 + 8001e4e: 2201 movs r2, #1 + 8001e50: 431a orrs r2, r3 + 8001e52: 687b ldr r3, [r7, #4] + 8001e54: 645a str r2, [r3, #68] @ 0x44 /* Clear BERR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); - 8001dfa: 687b ldr r3, [r7, #4] - 8001dfc: 681b ldr r3, [r3, #0] - 8001dfe: 2280 movs r2, #128 @ 0x80 - 8001e00: 0052 lsls r2, r2, #1 - 8001e02: 61da str r2, [r3, #28] + 8001e56: 687b ldr r3, [r7, #4] + 8001e58: 681b ldr r3, [r3, #0] + 8001e5a: 2280 movs r2, #128 @ 0x80 + 8001e5c: 0052 lsls r2, r2, #1 + 8001e5e: 61da str r2, [r3, #28] } /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ - 8001e04: 697a ldr r2, [r7, #20] - 8001e06: 2380 movs r3, #128 @ 0x80 - 8001e08: 00db lsls r3, r3, #3 - 8001e0a: 4013 ands r3, r2 - 8001e0c: d00e beq.n 8001e2c + 8001e60: 697a ldr r2, [r7, #20] + 8001e62: 2380 movs r3, #128 @ 0x80 + 8001e64: 00db lsls r3, r3, #3 + 8001e66: 4013 ands r3, r2 + 8001e68: d00e beq.n 8001e88 (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 8001e0e: 693b ldr r3, [r7, #16] - 8001e10: 2280 movs r2, #128 @ 0x80 - 8001e12: 4013 ands r3, r2 + 8001e6a: 693b ldr r3, [r7, #16] + 8001e6c: 2280 movs r2, #128 @ 0x80 + 8001e6e: 4013 ands r3, r2 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ - 8001e14: d00a beq.n 8001e2c + 8001e70: d00a beq.n 8001e88 { hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; - 8001e16: 687b ldr r3, [r7, #4] - 8001e18: 6c5b ldr r3, [r3, #68] @ 0x44 - 8001e1a: 2208 movs r2, #8 - 8001e1c: 431a orrs r2, r3 - 8001e1e: 687b ldr r3, [r7, #4] - 8001e20: 645a str r2, [r3, #68] @ 0x44 + 8001e72: 687b ldr r3, [r7, #4] + 8001e74: 6c5b ldr r3, [r3, #68] @ 0x44 + 8001e76: 2208 movs r2, #8 + 8001e78: 431a orrs r2, r3 + 8001e7a: 687b ldr r3, [r7, #4] + 8001e7c: 645a str r2, [r3, #68] @ 0x44 /* Clear OVR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); - 8001e22: 687b ldr r3, [r7, #4] - 8001e24: 681b ldr r3, [r3, #0] - 8001e26: 2280 movs r2, #128 @ 0x80 - 8001e28: 00d2 lsls r2, r2, #3 - 8001e2a: 61da str r2, [r3, #28] + 8001e7e: 687b ldr r3, [r7, #4] + 8001e80: 681b ldr r3, [r3, #0] + 8001e82: 2280 movs r2, #128 @ 0x80 + 8001e84: 00d2 lsls r2, r2, #3 + 8001e86: 61da str r2, [r3, #28] } /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ - 8001e2c: 697a ldr r2, [r7, #20] - 8001e2e: 2380 movs r3, #128 @ 0x80 - 8001e30: 009b lsls r3, r3, #2 - 8001e32: 4013 ands r3, r2 - 8001e34: d00e beq.n 8001e54 + 8001e88: 697a ldr r2, [r7, #20] + 8001e8a: 2380 movs r3, #128 @ 0x80 + 8001e8c: 009b lsls r3, r3, #2 + 8001e8e: 4013 ands r3, r2 + 8001e90: d00e beq.n 8001eb0 (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 8001e36: 693b ldr r3, [r7, #16] - 8001e38: 2280 movs r2, #128 @ 0x80 - 8001e3a: 4013 ands r3, r2 + 8001e92: 693b ldr r3, [r7, #16] + 8001e94: 2280 movs r2, #128 @ 0x80 + 8001e96: 4013 ands r3, r2 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ - 8001e3c: d00a beq.n 8001e54 + 8001e98: d00a beq.n 8001eb0 { hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; - 8001e3e: 687b ldr r3, [r7, #4] - 8001e40: 6c5b ldr r3, [r3, #68] @ 0x44 - 8001e42: 2202 movs r2, #2 - 8001e44: 431a orrs r2, r3 - 8001e46: 687b ldr r3, [r7, #4] - 8001e48: 645a str r2, [r3, #68] @ 0x44 + 8001e9a: 687b ldr r3, [r7, #4] + 8001e9c: 6c5b ldr r3, [r3, #68] @ 0x44 + 8001e9e: 2202 movs r2, #2 + 8001ea0: 431a orrs r2, r3 + 8001ea2: 687b ldr r3, [r7, #4] + 8001ea4: 645a str r2, [r3, #68] @ 0x44 /* Clear ARLO flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); - 8001e4a: 687b ldr r3, [r7, #4] - 8001e4c: 681b ldr r3, [r3, #0] - 8001e4e: 2280 movs r2, #128 @ 0x80 - 8001e50: 0092 lsls r2, r2, #2 - 8001e52: 61da str r2, [r3, #28] + 8001ea6: 687b ldr r3, [r7, #4] + 8001ea8: 681b ldr r3, [r3, #0] + 8001eaa: 2280 movs r2, #128 @ 0x80 + 8001eac: 0092 lsls r2, r2, #2 + 8001eae: 61da str r2, [r3, #28] } /* Store current volatile hi2c->ErrorCode, misra rule */ tmperror = hi2c->ErrorCode; - 8001e54: 687b ldr r3, [r7, #4] - 8001e56: 6c5b ldr r3, [r3, #68] @ 0x44 - 8001e58: 60fb str r3, [r7, #12] + 8001eb0: 687b ldr r3, [r7, #4] + 8001eb2: 6c5b ldr r3, [r3, #68] @ 0x44 + 8001eb4: 60fb str r3, [r7, #12] /* Call the Error Callback in case of Error detected */ if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE) - 8001e5a: 68fb ldr r3, [r7, #12] - 8001e5c: 220b movs r2, #11 - 8001e5e: 4013 ands r3, r2 - 8001e60: d005 beq.n 8001e6e + 8001eb6: 68fb ldr r3, [r7, #12] + 8001eb8: 220b movs r2, #11 + 8001eba: 4013 ands r3, r2 + 8001ebc: d005 beq.n 8001eca { I2C_ITError(hi2c, tmperror); - 8001e62: 68fa ldr r2, [r7, #12] - 8001e64: 687b ldr r3, [r7, #4] - 8001e66: 0011 movs r1, r2 - 8001e68: 0018 movs r0, r3 - 8001e6a: f001 f85d bl 8002f28 + 8001ebe: 68fa ldr r2, [r7, #12] + 8001ec0: 687b ldr r3, [r7, #4] + 8001ec2: 0011 movs r1, r2 + 8001ec4: 0018 movs r0, r3 + 8001ec6: f000 fc1d bl 8002704 } } - 8001e6e: 46c0 nop @ (mov r8, r8) - 8001e70: 46bd mov sp, r7 - 8001e72: b006 add sp, #24 - 8001e74: bd80 pop {r7, pc} + 8001eca: 46c0 nop @ (mov r8, r8) + 8001ecc: 46bd mov sp, r7 + 8001ece: b006 add sp, #24 + 8001ed0: bd80 pop {r7, pc} -08001e76 : - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - 8001e76: b580 push {r7, lr} - 8001e78: b082 sub sp, #8 - 8001e7a: af00 add r7, sp, #0 - 8001e7c: 6078 str r0, [r7, #4] - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MasterTxCpltCallback could be implemented in the user file - */ -} - 8001e7e: 46c0 nop @ (mov r8, r8) - 8001e80: 46bd mov sp, r7 - 8001e82: b002 add sp, #8 - 8001e84: bd80 pop {r7, pc} - -08001e86 : - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - 8001e86: b580 push {r7, lr} - 8001e88: b082 sub sp, #8 - 8001e8a: af00 add r7, sp, #0 - 8001e8c: 6078 str r0, [r7, #4] - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MasterRxCpltCallback could be implemented in the user file - */ -} - 8001e8e: 46c0 nop @ (mov r8, r8) - 8001e90: 46bd mov sp, r7 - 8001e92: b002 add sp, #8 - 8001e94: bd80 pop {r7, pc} - -08001e96 : +08001ed2 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) { - 8001e96: b580 push {r7, lr} - 8001e98: b082 sub sp, #8 - 8001e9a: af00 add r7, sp, #0 - 8001e9c: 6078 str r0, [r7, #4] + 8001ed2: b580 push {r7, lr} + 8001ed4: b082 sub sp, #8 + 8001ed6: af00 add r7, sp, #0 + 8001ed8: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file */ } - 8001e9e: 46c0 nop @ (mov r8, r8) - 8001ea0: 46bd mov sp, r7 - 8001ea2: b002 add sp, #8 - 8001ea4: bd80 pop {r7, pc} + 8001eda: 46c0 nop @ (mov r8, r8) + 8001edc: 46bd mov sp, r7 + 8001ede: b002 add sp, #8 + 8001ee0: bd80 pop {r7, pc} -08001ea6 : +08001ee2 : * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION * @param AddrMatchCode Address Match Code * @retval None */ __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { - 8001ea6: b580 push {r7, lr} - 8001ea8: b082 sub sp, #8 - 8001eaa: af00 add r7, sp, #0 - 8001eac: 6078 str r0, [r7, #4] - 8001eae: 0008 movs r0, r1 - 8001eb0: 0011 movs r1, r2 - 8001eb2: 1cfb adds r3, r7, #3 - 8001eb4: 1c02 adds r2, r0, #0 - 8001eb6: 701a strb r2, [r3, #0] - 8001eb8: 003b movs r3, r7 - 8001eba: 1c0a adds r2, r1, #0 - 8001ebc: 801a strh r2, [r3, #0] + 8001ee2: b580 push {r7, lr} + 8001ee4: b082 sub sp, #8 + 8001ee6: af00 add r7, sp, #0 + 8001ee8: 6078 str r0, [r7, #4] + 8001eea: 0008 movs r0, r1 + 8001eec: 0011 movs r1, r2 + 8001eee: 1cfb adds r3, r7, #3 + 8001ef0: 1c02 adds r2, r0, #0 + 8001ef2: 701a strb r2, [r3, #0] + 8001ef4: 003b movs r3, r7 + 8001ef6: 1c0a adds r2, r1, #0 + 8001ef8: 801a strh r2, [r3, #0] UNUSED(AddrMatchCode); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AddrCallback() could be implemented in the user file */ } - 8001ebe: 46c0 nop @ (mov r8, r8) - 8001ec0: 46bd mov sp, r7 - 8001ec2: b002 add sp, #8 - 8001ec4: bd80 pop {r7, pc} + 8001efa: 46c0 nop @ (mov r8, r8) + 8001efc: 46bd mov sp, r7 + 8001efe: b002 add sp, #8 + 8001f00: bd80 pop {r7, pc} -08001ec6 : +08001f02 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) { - 8001ec6: b580 push {r7, lr} - 8001ec8: b082 sub sp, #8 - 8001eca: af00 add r7, sp, #0 - 8001ecc: 6078 str r0, [r7, #4] + 8001f02: b580 push {r7, lr} + 8001f04: b082 sub sp, #8 + 8001f06: af00 add r7, sp, #0 + 8001f08: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ListenCpltCallback() could be implemented in the user file */ } - 8001ece: 46c0 nop @ (mov r8, r8) - 8001ed0: 46bd mov sp, r7 - 8001ed2: b002 add sp, #8 - 8001ed4: bd80 pop {r7, pc} + 8001f0a: 46c0 nop @ (mov r8, r8) + 8001f0c: 46bd mov sp, r7 + 8001f0e: b002 add sp, #8 + 8001f10: bd80 pop {r7, pc} -08001ed6 : - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - 8001ed6: b580 push {r7, lr} - 8001ed8: b082 sub sp, #8 - 8001eda: af00 add r7, sp, #0 - 8001edc: 6078 str r0, [r7, #4] - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MemTxCpltCallback could be implemented in the user file - */ -} - 8001ede: 46c0 nop @ (mov r8, r8) - 8001ee0: 46bd mov sp, r7 - 8001ee2: b002 add sp, #8 - 8001ee4: bd80 pop {r7, pc} - -08001ee6 : - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - 8001ee6: b580 push {r7, lr} - 8001ee8: b082 sub sp, #8 - 8001eea: af00 add r7, sp, #0 - 8001eec: 6078 str r0, [r7, #4] - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MemRxCpltCallback could be implemented in the user file - */ -} - 8001eee: 46c0 nop @ (mov r8, r8) - 8001ef0: 46bd mov sp, r7 - 8001ef2: b002 add sp, #8 - 8001ef4: bd80 pop {r7, pc} - -08001ef6 : +08001f12 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) { - 8001ef6: b580 push {r7, lr} - 8001ef8: b082 sub sp, #8 - 8001efa: af00 add r7, sp, #0 - 8001efc: 6078 str r0, [r7, #4] + 8001f12: b580 push {r7, lr} + 8001f14: b082 sub sp, #8 + 8001f16: af00 add r7, sp, #0 + 8001f18: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ErrorCallback could be implemented in the user file */ } - 8001efe: 46c0 nop @ (mov r8, r8) - 8001f00: 46bd mov sp, r7 - 8001f02: b002 add sp, #8 - 8001f04: bd80 pop {r7, pc} + 8001f1a: 46c0 nop @ (mov r8, r8) + 8001f1c: 46bd mov sp, r7 + 8001f1e: b002 add sp, #8 + 8001f20: bd80 pop {r7, pc} -08001f06 : +08001f22 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) { - 8001f06: b580 push {r7, lr} - 8001f08: b082 sub sp, #8 - 8001f0a: af00 add r7, sp, #0 - 8001f0c: 6078 str r0, [r7, #4] + 8001f22: b580 push {r7, lr} + 8001f24: b082 sub sp, #8 + 8001f26: af00 add r7, sp, #0 + 8001f28: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AbortCpltCallback could be implemented in the user file */ } - 8001f0e: 46c0 nop @ (mov r8, r8) - 8001f10: 46bd mov sp, r7 - 8001f12: b002 add sp, #8 - 8001f14: bd80 pop {r7, pc} + 8001f2a: 46c0 nop @ (mov r8, r8) + 8001f2c: 46bd mov sp, r7 + 8001f2e: b002 add sp, #8 + 8001f30: bd80 pop {r7, pc} ... -08001f18 : +08001f34 : * @param ITSources Interrupt sources enabled. * @retval HAL status */ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) { - 8001f18: b580 push {r7, lr} - 8001f1a: b086 sub sp, #24 - 8001f1c: af00 add r7, sp, #0 - 8001f1e: 60f8 str r0, [r7, #12] - 8001f20: 60b9 str r1, [r7, #8] - 8001f22: 607a str r2, [r7, #4] + 8001f34: b580 push {r7, lr} + 8001f36: b086 sub sp, #24 + 8001f38: af00 add r7, sp, #0 + 8001f3a: 60f8 str r0, [r7, #12] + 8001f3c: 60b9 str r1, [r7, #8] + 8001f3e: 607a str r2, [r7, #4] uint32_t tmpoptions = hi2c->XferOptions; - 8001f24: 68fb ldr r3, [r7, #12] - 8001f26: 6adb ldr r3, [r3, #44] @ 0x2c - 8001f28: 617b str r3, [r7, #20] + 8001f40: 68fb ldr r3, [r7, #12] + 8001f42: 6adb ldr r3, [r3, #44] @ 0x2c + 8001f44: 617b str r3, [r7, #20] uint32_t tmpITFlags = ITFlags; - 8001f2a: 68bb ldr r3, [r7, #8] - 8001f2c: 613b str r3, [r7, #16] + 8001f46: 68bb ldr r3, [r7, #8] + 8001f48: 613b str r3, [r7, #16] /* Process locked */ __HAL_LOCK(hi2c); - 8001f2e: 68fb ldr r3, [r7, #12] - 8001f30: 2240 movs r2, #64 @ 0x40 - 8001f32: 5c9b ldrb r3, [r3, r2] - 8001f34: 2b01 cmp r3, #1 - 8001f36: d101 bne.n 8001f3c - 8001f38: 2302 movs r3, #2 - 8001f3a: e0e7 b.n 800210c - 8001f3c: 68fb ldr r3, [r7, #12] - 8001f3e: 2240 movs r2, #64 @ 0x40 - 8001f40: 2101 movs r1, #1 - 8001f42: 5499 strb r1, [r3, r2] + 8001f4a: 68fb ldr r3, [r7, #12] + 8001f4c: 2240 movs r2, #64 @ 0x40 + 8001f4e: 5c9b ldrb r3, [r3, r2] + 8001f50: 2b01 cmp r3, #1 + 8001f52: d101 bne.n 8001f58 + 8001f54: 2302 movs r3, #2 + 8001f56: e0e7 b.n 8002128 + 8001f58: 68fb ldr r3, [r7, #12] + 8001f5a: 2240 movs r2, #64 @ 0x40 + 8001f5c: 2101 movs r1, #1 + 8001f5e: 5499 strb r1, [r3, r2] /* Check if STOPF is set */ if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ - 8001f44: 693b ldr r3, [r7, #16] - 8001f46: 2220 movs r2, #32 - 8001f48: 4013 ands r3, r2 - 8001f4a: d00a beq.n 8001f62 + 8001f60: 693b ldr r3, [r7, #16] + 8001f62: 2220 movs r2, #32 + 8001f64: 4013 ands r3, r2 + 8001f66: d00a beq.n 8001f7e (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - 8001f4c: 687b ldr r3, [r7, #4] - 8001f4e: 2220 movs r2, #32 - 8001f50: 4013 ands r3, r2 + 8001f68: 687b ldr r3, [r7, #4] + 8001f6a: 2220 movs r2, #32 + 8001f6c: 4013 ands r3, r2 if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ - 8001f52: d006 beq.n 8001f62 + 8001f6e: d006 beq.n 8001f7e { /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, tmpITFlags); - 8001f54: 693a ldr r2, [r7, #16] - 8001f56: 68fb ldr r3, [r7, #12] - 8001f58: 0011 movs r1, r2 - 8001f5a: 0018 movs r0, r3 - 8001f5c: f000 fe04 bl 8002b68 - 8001f60: e0cf b.n 8002102 + 8001f70: 693a ldr r2, [r7, #16] + 8001f72: 68fb ldr r3, [r7, #12] + 8001f74: 0011 movs r1, r2 + 8001f76: 0018 movs r0, r3 + 8001f78: f000 f9e4 bl 8002344 + 8001f7c: e0cf b.n 800211e } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 8001f62: 693b ldr r3, [r7, #16] - 8001f64: 2210 movs r2, #16 - 8001f66: 4013 ands r3, r2 - 8001f68: d052 beq.n 8002010 + 8001f7e: 693b ldr r3, [r7, #16] + 8001f80: 2210 movs r2, #16 + 8001f82: 4013 ands r3, r2 + 8001f84: d052 beq.n 800202c (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) - 8001f6a: 687b ldr r3, [r7, #4] - 8001f6c: 2210 movs r2, #16 - 8001f6e: 4013 ands r3, r2 + 8001f86: 687b ldr r3, [r7, #4] + 8001f88: 2210 movs r2, #16 + 8001f8a: 4013 ands r3, r2 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 8001f70: d04e beq.n 8002010 + 8001f8c: d04e beq.n 800202c { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ /* Mean XferCount == 0*/ /* So clear Flag NACKF only */ if (hi2c->XferCount == 0U) - 8001f72: 68fb ldr r3, [r7, #12] - 8001f74: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8001f76: b29b uxth r3, r3 - 8001f78: 2b00 cmp r3, #0 - 8001f7a: d12d bne.n 8001fd8 + 8001f8e: 68fb ldr r3, [r7, #12] + 8001f90: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8001f92: b29b uxth r3, r3 + 8001f94: 2b00 cmp r3, #0 + 8001f96: d12d bne.n 8001ff4 { if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) - 8001f7c: 68fb ldr r3, [r7, #12] - 8001f7e: 2241 movs r2, #65 @ 0x41 - 8001f80: 5c9b ldrb r3, [r3, r2] - 8001f82: b2db uxtb r3, r3 - 8001f84: 2b28 cmp r3, #40 @ 0x28 - 8001f86: d10b bne.n 8001fa0 - 8001f88: 697a ldr r2, [r7, #20] - 8001f8a: 2380 movs r3, #128 @ 0x80 - 8001f8c: 049b lsls r3, r3, #18 - 8001f8e: 429a cmp r2, r3 - 8001f90: d106 bne.n 8001fa0 + 8001f98: 68fb ldr r3, [r7, #12] + 8001f9a: 2241 movs r2, #65 @ 0x41 + 8001f9c: 5c9b ldrb r3, [r3, r2] + 8001f9e: b2db uxtb r3, r3 + 8001fa0: 2b28 cmp r3, #40 @ 0x28 + 8001fa2: d10b bne.n 8001fbc + 8001fa4: 697a ldr r2, [r7, #20] + 8001fa6: 2380 movs r3, #128 @ 0x80 + 8001fa8: 049b lsls r3, r3, #18 + 8001faa: 429a cmp r2, r3 + 8001fac: d106 bne.n 8001fbc /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */ { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); - 8001f92: 693a ldr r2, [r7, #16] - 8001f94: 68fb ldr r3, [r7, #12] - 8001f96: 0011 movs r1, r2 - 8001f98: 0018 movs r0, r3 - 8001f9a: f000 ff6d bl 8002e78 - 8001f9e: e036 b.n 800200e + 8001fae: 693a ldr r2, [r7, #16] + 8001fb0: 68fb ldr r3, [r7, #12] + 8001fb2: 0011 movs r1, r2 + 8001fb4: 0018 movs r0, r3 + 8001fb6: f000 fb4d bl 8002654 + 8001fba: e036 b.n 800202a } else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) - 8001fa0: 68fb ldr r3, [r7, #12] - 8001fa2: 2241 movs r2, #65 @ 0x41 - 8001fa4: 5c9b ldrb r3, [r3, r2] - 8001fa6: b2db uxtb r3, r3 - 8001fa8: 2b29 cmp r3, #41 @ 0x29 - 8001faa: d110 bne.n 8001fce - 8001fac: 697b ldr r3, [r7, #20] - 8001fae: 4a59 ldr r2, [pc, #356] @ (8002114 ) - 8001fb0: 4293 cmp r3, r2 - 8001fb2: d00c beq.n 8001fce + 8001fbc: 68fb ldr r3, [r7, #12] + 8001fbe: 2241 movs r2, #65 @ 0x41 + 8001fc0: 5c9b ldrb r3, [r3, r2] + 8001fc2: b2db uxtb r3, r3 + 8001fc4: 2b29 cmp r3, #41 @ 0x29 + 8001fc6: d110 bne.n 8001fea + 8001fc8: 697b ldr r3, [r7, #20] + 8001fca: 4a59 ldr r2, [pc, #356] @ (8002130 ) + 8001fcc: 4293 cmp r3, r2 + 8001fce: d00c beq.n 8001fea { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8001fb4: 68fb ldr r3, [r7, #12] - 8001fb6: 681b ldr r3, [r3, #0] - 8001fb8: 2210 movs r2, #16 - 8001fba: 61da str r2, [r3, #28] + 8001fd0: 68fb ldr r3, [r7, #12] + 8001fd2: 681b ldr r3, [r3, #0] + 8001fd4: 2210 movs r2, #16 + 8001fd6: 61da str r2, [r3, #28] /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 8001fbc: 68fb ldr r3, [r7, #12] - 8001fbe: 0018 movs r0, r3 - 8001fc0: f001 f8dd bl 800317e + 8001fd8: 68fb ldr r3, [r7, #12] + 8001fda: 0018 movs r0, r3 + 8001fdc: f000 fcbd bl 800295a /* Last Byte is Transmitted */ /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 8001fc4: 68fb ldr r3, [r7, #12] - 8001fc6: 0018 movs r0, r3 - 8001fc8: f000 fc9c bl 8002904 - 8001fcc: e01f b.n 800200e + 8001fe0: 68fb ldr r3, [r7, #12] + 8001fe2: 0018 movs r0, r3 + 8001fe4: f000 f94a bl 800227c + 8001fe8: e01f b.n 800202a } else { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8001fce: 68fb ldr r3, [r7, #12] - 8001fd0: 681b ldr r3, [r3, #0] - 8001fd2: 2210 movs r2, #16 - 8001fd4: 61da str r2, [r3, #28] + 8001fea: 68fb ldr r3, [r7, #12] + 8001fec: 681b ldr r3, [r3, #0] + 8001fee: 2210 movs r2, #16 + 8001ff0: 61da str r2, [r3, #28] if (hi2c->XferCount == 0U) - 8001fd6: e091 b.n 80020fc + 8001ff2: e091 b.n 8002118 } else { /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8001fd8: 68fb ldr r3, [r7, #12] - 8001fda: 681b ldr r3, [r3, #0] - 8001fdc: 2210 movs r2, #16 - 8001fde: 61da str r2, [r3, #28] + 8001ff4: 68fb ldr r3, [r7, #12] + 8001ff6: 681b ldr r3, [r3, #0] + 8001ff8: 2210 movs r2, #16 + 8001ffa: 61da str r2, [r3, #28] /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8001fe0: 68fb ldr r3, [r7, #12] - 8001fe2: 6c5b ldr r3, [r3, #68] @ 0x44 - 8001fe4: 2204 movs r2, #4 - 8001fe6: 431a orrs r2, r3 - 8001fe8: 68fb ldr r3, [r7, #12] - 8001fea: 645a str r2, [r3, #68] @ 0x44 + 8001ffc: 68fb ldr r3, [r7, #12] + 8001ffe: 6c5b ldr r3, [r3, #68] @ 0x44 + 8002000: 2204 movs r2, #4 + 8002002: 431a orrs r2, r3 + 8002004: 68fb ldr r3, [r7, #12] + 8002006: 645a str r2, [r3, #68] @ 0x44 if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) - 8001fec: 697b ldr r3, [r7, #20] - 8001fee: 2b00 cmp r3, #0 - 8001ff0: d005 beq.n 8001ffe - 8001ff2: 697a ldr r2, [r7, #20] - 8001ff4: 2380 movs r3, #128 @ 0x80 - 8001ff6: 045b lsls r3, r3, #17 - 8001ff8: 429a cmp r2, r3 - 8001ffa: d000 beq.n 8001ffe - 8001ffc: e07e b.n 80020fc + 8002008: 697b ldr r3, [r7, #20] + 800200a: 2b00 cmp r3, #0 + 800200c: d005 beq.n 800201a + 800200e: 697a ldr r2, [r7, #20] + 8002010: 2380 movs r3, #128 @ 0x80 + 8002012: 045b lsls r3, r3, #17 + 8002014: 429a cmp r2, r3 + 8002016: d000 beq.n 800201a + 8002018: e07e b.n 8002118 { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, hi2c->ErrorCode); - 8001ffe: 68fb ldr r3, [r7, #12] - 8002000: 6c5a ldr r2, [r3, #68] @ 0x44 - 8002002: 68fb ldr r3, [r7, #12] - 8002004: 0011 movs r1, r2 - 8002006: 0018 movs r0, r3 - 8002008: f000 ff8e bl 8002f28 + 800201a: 68fb ldr r3, [r7, #12] + 800201c: 6c5a ldr r2, [r3, #68] @ 0x44 + 800201e: 68fb ldr r3, [r7, #12] + 8002020: 0011 movs r1, r2 + 8002022: 0018 movs r0, r3 + 8002024: f000 fb6e bl 8002704 if (hi2c->XferCount == 0U) - 800200c: e076 b.n 80020fc - 800200e: e075 b.n 80020fc + 8002028: e076 b.n 8002118 + 800202a: e075 b.n 8002118 } } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ - 8002010: 693b ldr r3, [r7, #16] - 8002012: 2204 movs r2, #4 - 8002014: 4013 ands r3, r2 - 8002016: d02f beq.n 8002078 + 800202c: 693b ldr r3, [r7, #16] + 800202e: 2204 movs r2, #4 + 8002030: 4013 ands r3, r2 + 8002032: d02f beq.n 8002094 (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) - 8002018: 687b ldr r3, [r7, #4] - 800201a: 2204 movs r2, #4 - 800201c: 4013 ands r3, r2 + 8002034: 687b ldr r3, [r7, #4] + 8002036: 2204 movs r2, #4 + 8002038: 4013 ands r3, r2 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ - 800201e: d02b beq.n 8002078 + 800203a: d02b beq.n 8002094 { if (hi2c->XferCount > 0U) - 8002020: 68fb ldr r3, [r7, #12] - 8002022: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002024: b29b uxth r3, r3 - 8002026: 2b00 cmp r3, #0 - 8002028: d018 beq.n 800205c + 800203c: 68fb ldr r3, [r7, #12] + 800203e: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8002040: b29b uxth r3, r3 + 8002042: 2b00 cmp r3, #0 + 8002044: d018 beq.n 8002078 { /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 800202a: 68fb ldr r3, [r7, #12] - 800202c: 681b ldr r3, [r3, #0] - 800202e: 6a5a ldr r2, [r3, #36] @ 0x24 - 8002030: 68fb ldr r3, [r7, #12] - 8002032: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002034: b2d2 uxtb r2, r2 - 8002036: 701a strb r2, [r3, #0] + 8002046: 68fb ldr r3, [r7, #12] + 8002048: 681b ldr r3, [r3, #0] + 800204a: 6a5a ldr r2, [r3, #36] @ 0x24 + 800204c: 68fb ldr r3, [r7, #12] + 800204e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002050: b2d2 uxtb r2, r2 + 8002052: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8002038: 68fb ldr r3, [r7, #12] - 800203a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800203c: 1c5a adds r2, r3, #1 - 800203e: 68fb ldr r3, [r7, #12] - 8002040: 625a str r2, [r3, #36] @ 0x24 + 8002054: 68fb ldr r3, [r7, #12] + 8002056: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002058: 1c5a adds r2, r3, #1 + 800205a: 68fb ldr r3, [r7, #12] + 800205c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferSize--; - 8002042: 68fb ldr r3, [r7, #12] - 8002044: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8002046: 3b01 subs r3, #1 - 8002048: b29a uxth r2, r3 - 800204a: 68fb ldr r3, [r7, #12] - 800204c: 851a strh r2, [r3, #40] @ 0x28 + 800205e: 68fb ldr r3, [r7, #12] + 8002060: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8002062: 3b01 subs r3, #1 + 8002064: b29a uxth r2, r3 + 8002066: 68fb ldr r3, [r7, #12] + 8002068: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800204e: 68fb ldr r3, [r7, #12] - 8002050: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002052: b29b uxth r3, r3 - 8002054: 3b01 subs r3, #1 - 8002056: b29a uxth r2, r3 - 8002058: 68fb ldr r3, [r7, #12] - 800205a: 855a strh r2, [r3, #42] @ 0x2a + 800206a: 68fb ldr r3, [r7, #12] + 800206c: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800206e: b29b uxth r3, r3 + 8002070: 3b01 subs r3, #1 + 8002072: b29a uxth r2, r3 + 8002074: 68fb ldr r3, [r7, #12] + 8002076: 855a strh r2, [r3, #42] @ 0x2a } if ((hi2c->XferCount == 0U) && \ - 800205c: 68fb ldr r3, [r7, #12] - 800205e: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002060: b29b uxth r3, r3 - 8002062: 2b00 cmp r3, #0 - 8002064: d14c bne.n 8002100 - 8002066: 697b ldr r3, [r7, #20] - 8002068: 4a2a ldr r2, [pc, #168] @ (8002114 ) - 800206a: 4293 cmp r3, r2 - 800206c: d048 beq.n 8002100 + 8002078: 68fb ldr r3, [r7, #12] + 800207a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800207c: b29b uxth r3, r3 + 800207e: 2b00 cmp r3, #0 + 8002080: d14c bne.n 800211c + 8002082: 697b ldr r3, [r7, #20] + 8002084: 4a2a ldr r2, [pc, #168] @ (8002130 ) + 8002086: 4293 cmp r3, r2 + 8002088: d048 beq.n 800211c (tmpoptions != I2C_NO_OPTION_FRAME)) { /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 800206e: 68fb ldr r3, [r7, #12] - 8002070: 0018 movs r0, r3 - 8002072: f000 fc47 bl 8002904 + 800208a: 68fb ldr r3, [r7, #12] + 800208c: 0018 movs r0, r3 + 800208e: f000 f8f5 bl 800227c if ((hi2c->XferCount == 0U) && \ - 8002076: e043 b.n 8002100 + 8002092: e043 b.n 800211c } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ - 8002078: 693b ldr r3, [r7, #16] - 800207a: 2208 movs r2, #8 - 800207c: 4013 ands r3, r2 - 800207e: d00a beq.n 8002096 + 8002094: 693b ldr r3, [r7, #16] + 8002096: 2208 movs r2, #8 + 8002098: 4013 ands r3, r2 + 800209a: d00a beq.n 80020b2 (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) - 8002080: 687b ldr r3, [r7, #4] - 8002082: 2208 movs r2, #8 - 8002084: 4013 ands r3, r2 + 800209c: 687b ldr r3, [r7, #4] + 800209e: 2208 movs r2, #8 + 80020a0: 4013 ands r3, r2 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ - 8002086: d006 beq.n 8002096 + 80020a2: d006 beq.n 80020b2 { I2C_ITAddrCplt(hi2c, tmpITFlags); - 8002088: 693a ldr r2, [r7, #16] - 800208a: 68fb ldr r3, [r7, #12] - 800208c: 0011 movs r1, r2 - 800208e: 0018 movs r0, r3 - 8002090: f000 fb52 bl 8002738 - 8002094: e035 b.n 8002102 + 80020a4: 693a ldr r2, [r7, #16] + 80020a6: 68fb ldr r3, [r7, #12] + 80020a8: 0011 movs r1, r2 + 80020aa: 0018 movs r0, r3 + 80020ac: f000 f842 bl 8002134 + 80020b0: e035 b.n 800211e } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - 8002096: 693b ldr r3, [r7, #16] - 8002098: 2202 movs r2, #2 - 800209a: 4013 ands r3, r2 - 800209c: d031 beq.n 8002102 + 80020b2: 693b ldr r3, [r7, #16] + 80020b4: 2202 movs r2, #2 + 80020b6: 4013 ands r3, r2 + 80020b8: d031 beq.n 800211e (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) - 800209e: 687b ldr r3, [r7, #4] - 80020a0: 2202 movs r2, #2 - 80020a2: 4013 ands r3, r2 + 80020ba: 687b ldr r3, [r7, #4] + 80020bc: 2202 movs r2, #2 + 80020be: 4013 ands r3, r2 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - 80020a4: d02d beq.n 8002102 + 80020c0: d02d beq.n 800211e { /* Write data to TXDR only if XferCount not reach "0" */ /* A TXIS flag can be set, during STOP treatment */ /* Check if all Data have already been sent */ /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ if (hi2c->XferCount > 0U) - 80020a6: 68fb ldr r3, [r7, #12] - 80020a8: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80020aa: b29b uxth r3, r3 - 80020ac: 2b00 cmp r3, #0 - 80020ae: d018 beq.n 80020e2 + 80020c2: 68fb ldr r3, [r7, #12] + 80020c4: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80020c6: b29b uxth r3, r3 + 80020c8: 2b00 cmp r3, #0 + 80020ca: d018 beq.n 80020fe { /* Write data to TXDR */ hi2c->Instance->TXDR = *hi2c->pBuffPtr; - 80020b0: 68fb ldr r3, [r7, #12] - 80020b2: 6a5b ldr r3, [r3, #36] @ 0x24 - 80020b4: 781a ldrb r2, [r3, #0] - 80020b6: 68fb ldr r3, [r7, #12] - 80020b8: 681b ldr r3, [r3, #0] - 80020ba: 629a str r2, [r3, #40] @ 0x28 + 80020cc: 68fb ldr r3, [r7, #12] + 80020ce: 6a5b ldr r3, [r3, #36] @ 0x24 + 80020d0: 781a ldrb r2, [r3, #0] + 80020d2: 68fb ldr r3, [r7, #12] + 80020d4: 681b ldr r3, [r3, #0] + 80020d6: 629a str r2, [r3, #40] @ 0x28 /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80020bc: 68fb ldr r3, [r7, #12] - 80020be: 6a5b ldr r3, [r3, #36] @ 0x24 - 80020c0: 1c5a adds r2, r3, #1 - 80020c2: 68fb ldr r3, [r7, #12] - 80020c4: 625a str r2, [r3, #36] @ 0x24 + 80020d8: 68fb ldr r3, [r7, #12] + 80020da: 6a5b ldr r3, [r3, #36] @ 0x24 + 80020dc: 1c5a adds r2, r3, #1 + 80020de: 68fb ldr r3, [r7, #12] + 80020e0: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; - 80020c6: 68fb ldr r3, [r7, #12] - 80020c8: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80020ca: b29b uxth r3, r3 - 80020cc: 3b01 subs r3, #1 - 80020ce: b29a uxth r2, r3 - 80020d0: 68fb ldr r3, [r7, #12] - 80020d2: 855a strh r2, [r3, #42] @ 0x2a + 80020e2: 68fb ldr r3, [r7, #12] + 80020e4: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80020e6: b29b uxth r3, r3 + 80020e8: 3b01 subs r3, #1 + 80020ea: b29a uxth r2, r3 + 80020ec: 68fb ldr r3, [r7, #12] + 80020ee: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 80020d4: 68fb ldr r3, [r7, #12] - 80020d6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80020d8: 3b01 subs r3, #1 - 80020da: b29a uxth r2, r3 - 80020dc: 68fb ldr r3, [r7, #12] - 80020de: 851a strh r2, [r3, #40] @ 0x28 - 80020e0: e00f b.n 8002102 + 80020f0: 68fb ldr r3, [r7, #12] + 80020f2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80020f4: 3b01 subs r3, #1 + 80020f6: b29a uxth r2, r3 + 80020f8: 68fb ldr r3, [r7, #12] + 80020fa: 851a strh r2, [r3, #40] @ 0x28 + 80020fc: e00f b.n 800211e } else { if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) - 80020e2: 697a ldr r2, [r7, #20] - 80020e4: 2380 movs r3, #128 @ 0x80 - 80020e6: 045b lsls r3, r3, #17 - 80020e8: 429a cmp r2, r3 - 80020ea: d002 beq.n 80020f2 - 80020ec: 697b ldr r3, [r7, #20] - 80020ee: 2b00 cmp r3, #0 - 80020f0: d107 bne.n 8002102 + 80020fe: 697a ldr r2, [r7, #20] + 8002100: 2380 movs r3, #128 @ 0x80 + 8002102: 045b lsls r3, r3, #17 + 8002104: 429a cmp r2, r3 + 8002106: d002 beq.n 800210e + 8002108: 697b ldr r3, [r7, #20] + 800210a: 2b00 cmp r3, #0 + 800210c: d107 bne.n 800211e { /* Last Byte is Transmitted */ /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 80020f2: 68fb ldr r3, [r7, #12] - 80020f4: 0018 movs r0, r3 - 80020f6: f000 fc05 bl 8002904 - 80020fa: e002 b.n 8002102 + 800210e: 68fb ldr r3, [r7, #12] + 8002110: 0018 movs r0, r3 + 8002112: f000 f8b3 bl 800227c + 8002116: e002 b.n 800211e if (hi2c->XferCount == 0U) - 80020fc: 46c0 nop @ (mov r8, r8) - 80020fe: e000 b.n 8002102 + 8002118: 46c0 nop @ (mov r8, r8) + 800211a: e000 b.n 800211e if ((hi2c->XferCount == 0U) && \ - 8002100: 46c0 nop @ (mov r8, r8) + 800211c: 46c0 nop @ (mov r8, r8) { /* Nothing to do */ } /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8002102: 68fb ldr r3, [r7, #12] - 8002104: 2240 movs r2, #64 @ 0x40 - 8002106: 2100 movs r1, #0 - 8002108: 5499 strb r1, [r3, r2] + 800211e: 68fb ldr r3, [r7, #12] + 8002120: 2240 movs r2, #64 @ 0x40 + 8002122: 2100 movs r1, #0 + 8002124: 5499 strb r1, [r3, r2] return HAL_OK; - 800210a: 2300 movs r3, #0 + 8002126: 2300 movs r3, #0 } - 800210c: 0018 movs r0, r3 - 800210e: 46bd mov sp, r7 - 8002110: b006 add sp, #24 - 8002112: bd80 pop {r7, pc} - 8002114: ffff0000 .word 0xffff0000 + 8002128: 0018 movs r0, r3 + 800212a: 46bd mov sp, r7 + 800212c: b006 add sp, #24 + 800212e: bd80 pop {r7, pc} + 8002130: ffff0000 .word 0xffff0000 -08002118 : - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, - uint32_t ITSources) -{ - 8002118: b590 push {r4, r7, lr} - 800211a: b089 sub sp, #36 @ 0x24 - 800211c: af02 add r7, sp, #8 - 800211e: 60f8 str r0, [r7, #12] - 8002120: 60b9 str r1, [r7, #8] - 8002122: 607a str r2, [r7, #4] - uint16_t devaddress; - uint32_t xfermode; - - /* Process Locked */ - __HAL_LOCK(hi2c); - 8002124: 68fb ldr r3, [r7, #12] - 8002126: 2240 movs r2, #64 @ 0x40 - 8002128: 5c9b ldrb r3, [r3, r2] - 800212a: 2b01 cmp r3, #1 - 800212c: d101 bne.n 8002132 - 800212e: 2302 movs r3, #2 - 8002130: e0e7 b.n 8002302 - 8002132: 68fb ldr r3, [r7, #12] - 8002134: 2240 movs r2, #64 @ 0x40 - 8002136: 2101 movs r1, #1 - 8002138: 5499 strb r1, [r3, r2] - - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - 800213a: 68bb ldr r3, [r7, #8] - 800213c: 2210 movs r2, #16 - 800213e: 4013 ands r3, r2 - 8002140: d017 beq.n 8002172 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) - 8002142: 687b ldr r3, [r7, #4] - 8002144: 2210 movs r2, #16 - 8002146: 4013 ands r3, r2 - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - 8002148: d013 beq.n 8002172 - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 800214a: 68fb ldr r3, [r7, #12] - 800214c: 681b ldr r3, [r3, #0] - 800214e: 2210 movs r2, #16 - 8002150: 61da str r2, [r3, #28] - - /* Set corresponding Error Code */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8002152: 68fb ldr r3, [r7, #12] - 8002154: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002156: 2204 movs r2, #4 - 8002158: 431a orrs r2, r3 - 800215a: 68fb ldr r3, [r7, #12] - 800215c: 645a str r2, [r3, #68] @ 0x44 - - /* No need to generate STOP, it is automatically done */ - /* But enable STOP interrupt, to treat it */ - /* Error callback will be send during stop flag treatment */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - 800215e: 68fb ldr r3, [r7, #12] - 8002160: 2120 movs r1, #32 - 8002162: 0018 movs r0, r3 - 8002164: f001 f886 bl 8003274 - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - 8002168: 68fb ldr r3, [r7, #12] - 800216a: 0018 movs r0, r3 - 800216c: f001 f807 bl 800317e - 8002170: e0c2 b.n 80022f8 - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ - 8002172: 68bb ldr r3, [r7, #8] - 8002174: 2280 movs r2, #128 @ 0x80 - 8002176: 4013 ands r3, r2 - 8002178: d100 bne.n 800217c - 800217a: e07c b.n 8002276 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) - 800217c: 687b ldr r3, [r7, #4] - 800217e: 2240 movs r2, #64 @ 0x40 - 8002180: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ - 8002182: d100 bne.n 8002186 - 8002184: e077 b.n 8002276 - { - /* Disable TC interrupt */ - __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); - 8002186: 68fb ldr r3, [r7, #12] - 8002188: 681b ldr r3, [r3, #0] - 800218a: 681a ldr r2, [r3, #0] - 800218c: 68fb ldr r3, [r7, #12] - 800218e: 681b ldr r3, [r3, #0] - 8002190: 2140 movs r1, #64 @ 0x40 - 8002192: 438a bics r2, r1 - 8002194: 601a str r2, [r3, #0] - - if (hi2c->XferCount != 0U) - 8002196: 68fb ldr r3, [r7, #12] - 8002198: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800219a: b29b uxth r3, r3 - 800219c: 2b00 cmp r3, #0 - 800219e: d055 beq.n 800224c - { - /* Recover Slave address */ - devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); - 80021a0: 68fb ldr r3, [r7, #12] - 80021a2: 681b ldr r3, [r3, #0] - 80021a4: 685b ldr r3, [r3, #4] - 80021a6: b29a uxth r2, r3 - 80021a8: 2312 movs r3, #18 - 80021aa: 18fb adds r3, r7, r3 - 80021ac: 0592 lsls r2, r2, #22 - 80021ae: 0d92 lsrs r2, r2, #22 - 80021b0: 801a strh r2, [r3, #0] - - /* Prepare the new XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - 80021b2: 68fb ldr r3, [r7, #12] - 80021b4: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80021b6: b29b uxth r3, r3 - 80021b8: 2bff cmp r3, #255 @ 0xff - 80021ba: d906 bls.n 80021ca - { - hi2c->XferSize = MAX_NBYTE_SIZE; - 80021bc: 68fb ldr r3, [r7, #12] - 80021be: 22ff movs r2, #255 @ 0xff - 80021c0: 851a strh r2, [r3, #40] @ 0x28 - xfermode = I2C_RELOAD_MODE; - 80021c2: 2380 movs r3, #128 @ 0x80 - 80021c4: 045b lsls r3, r3, #17 - 80021c6: 617b str r3, [r7, #20] - 80021c8: e010 b.n 80021ec - } - else - { - hi2c->XferSize = hi2c->XferCount; - 80021ca: 68fb ldr r3, [r7, #12] - 80021cc: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80021ce: b29a uxth r2, r3 - 80021d0: 68fb ldr r3, [r7, #12] - 80021d2: 851a strh r2, [r3, #40] @ 0x28 - if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - 80021d4: 68fb ldr r3, [r7, #12] - 80021d6: 6adb ldr r3, [r3, #44] @ 0x2c - 80021d8: 4a4c ldr r2, [pc, #304] @ (800230c ) - 80021da: 4293 cmp r3, r2 - 80021dc: d003 beq.n 80021e6 - { - xfermode = hi2c->XferOptions; - 80021de: 68fb ldr r3, [r7, #12] - 80021e0: 6adb ldr r3, [r3, #44] @ 0x2c - 80021e2: 617b str r3, [r7, #20] - 80021e4: e002 b.n 80021ec - } - else - { - xfermode = I2C_AUTOEND_MODE; - 80021e6: 2380 movs r3, #128 @ 0x80 - 80021e8: 049b lsls r3, r3, #18 - 80021ea: 617b str r3, [r7, #20] - } - } - - /* Set the new XferSize in Nbytes register */ - I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); - 80021ec: 68fb ldr r3, [r7, #12] - 80021ee: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80021f0: b2da uxtb r2, r3 - 80021f2: 697c ldr r4, [r7, #20] - 80021f4: 2312 movs r3, #18 - 80021f6: 18fb adds r3, r7, r3 - 80021f8: 8819 ldrh r1, [r3, #0] - 80021fa: 68f8 ldr r0, [r7, #12] - 80021fc: 2300 movs r3, #0 - 80021fe: 9300 str r3, [sp, #0] - 8002200: 0023 movs r3, r4 - 8002202: f000 fffd bl 8003200 - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - 8002206: 68fb ldr r3, [r7, #12] - 8002208: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800220a: b29a uxth r2, r3 - 800220c: 68fb ldr r3, [r7, #12] - 800220e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8002210: 1ad3 subs r3, r2, r3 - 8002212: b29a uxth r2, r3 - 8002214: 68fb ldr r3, [r7, #12] - 8002216: 855a strh r2, [r3, #42] @ 0x2a - - /* Enable DMA Request */ - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 8002218: 68fb ldr r3, [r7, #12] - 800221a: 2241 movs r2, #65 @ 0x41 - 800221c: 5c9b ldrb r3, [r3, r2] - 800221e: b2db uxtb r3, r3 - 8002220: 2b22 cmp r3, #34 @ 0x22 - 8002222: d109 bne.n 8002238 - { - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - 8002224: 68fb ldr r3, [r7, #12] - 8002226: 681b ldr r3, [r3, #0] - 8002228: 681a ldr r2, [r3, #0] - 800222a: 68fb ldr r3, [r7, #12] - 800222c: 681b ldr r3, [r3, #0] - 800222e: 2180 movs r1, #128 @ 0x80 - 8002230: 0209 lsls r1, r1, #8 - 8002232: 430a orrs r2, r1 - 8002234: 601a str r2, [r3, #0] - if (hi2c->XferCount != 0U) - 8002236: e05f b.n 80022f8 - } - else - { - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - 8002238: 68fb ldr r3, [r7, #12] - 800223a: 681b ldr r3, [r3, #0] - 800223c: 681a ldr r2, [r3, #0] - 800223e: 68fb ldr r3, [r7, #12] - 8002240: 681b ldr r3, [r3, #0] - 8002242: 2180 movs r1, #128 @ 0x80 - 8002244: 01c9 lsls r1, r1, #7 - 8002246: 430a orrs r2, r1 - 8002248: 601a str r2, [r3, #0] - if (hi2c->XferCount != 0U) - 800224a: e055 b.n 80022f8 - } - } - else - { - /* Call TxCpltCallback() if no stop mode is set */ - if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) - 800224c: 68fb ldr r3, [r7, #12] - 800224e: 681b ldr r3, [r3, #0] - 8002250: 685a ldr r2, [r3, #4] - 8002252: 2380 movs r3, #128 @ 0x80 - 8002254: 049b lsls r3, r3, #18 - 8002256: 401a ands r2, r3 - 8002258: 2380 movs r3, #128 @ 0x80 - 800225a: 049b lsls r3, r3, #18 - 800225c: 429a cmp r2, r3 - 800225e: d004 beq.n 800226a - { - /* Call I2C Master Sequential complete process */ - I2C_ITMasterSeqCplt(hi2c); - 8002260: 68fb ldr r3, [r7, #12] - 8002262: 0018 movs r0, r3 - 8002264: f000 fb0c bl 8002880 - if (hi2c->XferCount != 0U) - 8002268: e046 b.n 80022f8 - } - else - { - /* Wrong size Status regarding TCR flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - 800226a: 68fb ldr r3, [r7, #12] - 800226c: 2140 movs r1, #64 @ 0x40 - 800226e: 0018 movs r0, r3 - 8002270: f000 fe5a bl 8002f28 - if (hi2c->XferCount != 0U) - 8002274: e040 b.n 80022f8 - } - } - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ - 8002276: 68bb ldr r3, [r7, #8] - 8002278: 2240 movs r2, #64 @ 0x40 - 800227a: 4013 ands r3, r2 - 800227c: d02c beq.n 80022d8 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) - 800227e: 687b ldr r3, [r7, #4] - 8002280: 2240 movs r2, #64 @ 0x40 - 8002282: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ - 8002284: d028 beq.n 80022d8 - { - if (hi2c->XferCount == 0U) - 8002286: 68fb ldr r3, [r7, #12] - 8002288: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800228a: b29b uxth r3, r3 - 800228c: 2b00 cmp r3, #0 - 800228e: d11d bne.n 80022cc - { - if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) - 8002290: 68fb ldr r3, [r7, #12] - 8002292: 681b ldr r3, [r3, #0] - 8002294: 685a ldr r2, [r3, #4] - 8002296: 2380 movs r3, #128 @ 0x80 - 8002298: 049b lsls r3, r3, #18 - 800229a: 401a ands r2, r3 - 800229c: 2380 movs r3, #128 @ 0x80 - 800229e: 049b lsls r3, r3, #18 - 80022a0: 429a cmp r2, r3 - 80022a2: d028 beq.n 80022f6 - { - /* Generate a stop condition in case of no transfer option */ - if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) - 80022a4: 68fb ldr r3, [r7, #12] - 80022a6: 6adb ldr r3, [r3, #44] @ 0x2c - 80022a8: 4a18 ldr r2, [pc, #96] @ (800230c ) - 80022aa: 4293 cmp r3, r2 - 80022ac: d109 bne.n 80022c2 - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - 80022ae: 68fb ldr r3, [r7, #12] - 80022b0: 681b ldr r3, [r3, #0] - 80022b2: 685a ldr r2, [r3, #4] - 80022b4: 68fb ldr r3, [r7, #12] - 80022b6: 681b ldr r3, [r3, #0] - 80022b8: 2180 movs r1, #128 @ 0x80 - 80022ba: 01c9 lsls r1, r1, #7 - 80022bc: 430a orrs r2, r1 - 80022be: 605a str r2, [r3, #4] - if (hi2c->XferCount == 0U) - 80022c0: e019 b.n 80022f6 - } - else - { - /* Call I2C Master Sequential complete process */ - I2C_ITMasterSeqCplt(hi2c); - 80022c2: 68fb ldr r3, [r7, #12] - 80022c4: 0018 movs r0, r3 - 80022c6: f000 fadb bl 8002880 - if (hi2c->XferCount == 0U) - 80022ca: e014 b.n 80022f6 - } - else - { - /* Wrong size Status regarding TC flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - 80022cc: 68fb ldr r3, [r7, #12] - 80022ce: 2140 movs r1, #64 @ 0x40 - 80022d0: 0018 movs r0, r3 - 80022d2: f000 fe29 bl 8002f28 - if (hi2c->XferCount == 0U) - 80022d6: e00e b.n 80022f6 - } - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ - 80022d8: 68bb ldr r3, [r7, #8] - 80022da: 2220 movs r2, #32 - 80022dc: 4013 ands r3, r2 - 80022de: d00b beq.n 80022f8 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - 80022e0: 687b ldr r3, [r7, #4] - 80022e2: 2220 movs r2, #32 - 80022e4: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ - 80022e6: d007 beq.n 80022f8 - { - /* Call I2C Master complete process */ - I2C_ITMasterCplt(hi2c, ITFlags); - 80022e8: 68ba ldr r2, [r7, #8] - 80022ea: 68fb ldr r3, [r7, #12] - 80022ec: 0011 movs r1, r2 - 80022ee: 0018 movs r0, r3 - 80022f0: f000 fb6c bl 80029cc - 80022f4: e000 b.n 80022f8 - if (hi2c->XferCount == 0U) - 80022f6: 46c0 nop @ (mov r8, r8) - { - /* Nothing to do */ - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 80022f8: 68fb ldr r3, [r7, #12] - 80022fa: 2240 movs r2, #64 @ 0x40 - 80022fc: 2100 movs r1, #0 - 80022fe: 5499 strb r1, [r3, r2] - - return HAL_OK; - 8002300: 2300 movs r3, #0 -} - 8002302: 0018 movs r0, r3 - 8002304: 46bd mov sp, r7 - 8002306: b007 add sp, #28 - 8002308: bd90 pop {r4, r7, pc} - 800230a: 46c0 nop @ (mov r8, r8) - 800230c: ffff0000 .word 0xffff0000 - -08002310 : - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, - uint32_t ITSources) -{ - 8002310: b590 push {r4, r7, lr} - 8002312: b089 sub sp, #36 @ 0x24 - 8002314: af02 add r7, sp, #8 - 8002316: 60f8 str r0, [r7, #12] - 8002318: 60b9 str r1, [r7, #8] - 800231a: 607a str r2, [r7, #4] - uint32_t direction = I2C_GENERATE_START_WRITE; - 800231c: 4b90 ldr r3, [pc, #576] @ (8002560 ) - 800231e: 617b str r3, [r7, #20] - - /* Process Locked */ - __HAL_LOCK(hi2c); - 8002320: 68fb ldr r3, [r7, #12] - 8002322: 2240 movs r2, #64 @ 0x40 - 8002324: 5c9b ldrb r3, [r3, r2] - 8002326: 2b01 cmp r3, #1 - 8002328: d101 bne.n 800232e - 800232a: 2302 movs r3, #2 - 800232c: e113 b.n 8002556 - 800232e: 68fb ldr r3, [r7, #12] - 8002330: 2240 movs r2, #64 @ 0x40 - 8002332: 2101 movs r1, #1 - 8002334: 5499 strb r1, [r3, r2] - - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - 8002336: 68bb ldr r3, [r7, #8] - 8002338: 2210 movs r2, #16 - 800233a: 4013 ands r3, r2 - 800233c: d017 beq.n 800236e - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) - 800233e: 687b ldr r3, [r7, #4] - 8002340: 2210 movs r2, #16 - 8002342: 4013 ands r3, r2 - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - 8002344: d013 beq.n 800236e - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002346: 68fb ldr r3, [r7, #12] - 8002348: 681b ldr r3, [r3, #0] - 800234a: 2210 movs r2, #16 - 800234c: 61da str r2, [r3, #28] - - /* Set corresponding Error Code */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 800234e: 68fb ldr r3, [r7, #12] - 8002350: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002352: 2204 movs r2, #4 - 8002354: 431a orrs r2, r3 - 8002356: 68fb ldr r3, [r7, #12] - 8002358: 645a str r2, [r3, #68] @ 0x44 - - /* No need to generate STOP, it is automatically done */ - /* But enable STOP interrupt, to treat it */ - /* Error callback will be send during stop flag treatment */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - 800235a: 68fb ldr r3, [r7, #12] - 800235c: 2120 movs r1, #32 - 800235e: 0018 movs r0, r3 - 8002360: f000 ff88 bl 8003274 - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - 8002364: 68fb ldr r3, [r7, #12] - 8002366: 0018 movs r0, r3 - 8002368: f000 ff09 bl 800317e - 800236c: e0ee b.n 800254c - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TXIS) != RESET) && \ - 800236e: 68bb ldr r3, [r7, #8] - 8002370: 2202 movs r2, #2 - 8002372: 4013 ands r3, r2 - 8002374: d00d beq.n 8002392 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) - 8002376: 687b ldr r3, [r7, #4] - 8002378: 2202 movs r2, #2 - 800237a: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TXIS) != RESET) && \ - 800237c: d009 beq.n 8002392 - { - /* Write LSB part of Memory Address */ - hi2c->Instance->TXDR = hi2c->Memaddress; - 800237e: 68fb ldr r3, [r7, #12] - 8002380: 681b ldr r3, [r3, #0] - 8002382: 68fa ldr r2, [r7, #12] - 8002384: 6d12 ldr r2, [r2, #80] @ 0x50 - 8002386: 629a str r2, [r3, #40] @ 0x28 - - /* Reset Memaddress content */ - hi2c->Memaddress = 0xFFFFFFFFU; - 8002388: 68fb ldr r3, [r7, #12] - 800238a: 2201 movs r2, #1 - 800238c: 4252 negs r2, r2 - 800238e: 651a str r2, [r3, #80] @ 0x50 - 8002390: e0dc b.n 800254c - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ - 8002392: 68bb ldr r3, [r7, #8] - 8002394: 2280 movs r2, #128 @ 0x80 - 8002396: 4013 ands r3, r2 - 8002398: d063 beq.n 8002462 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) - 800239a: 687b ldr r3, [r7, #4] - 800239c: 2240 movs r2, #64 @ 0x40 - 800239e: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ - 80023a0: d05f beq.n 8002462 - { - /* Disable Interrupt related to address step */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - 80023a2: 68fb ldr r3, [r7, #12] - 80023a4: 2101 movs r1, #1 - 80023a6: 0018 movs r0, r3 - 80023a8: f000 ffee bl 8003388 - - /* Enable only Error interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - 80023ac: 68fb ldr r3, [r7, #12] - 80023ae: 2110 movs r1, #16 - 80023b0: 0018 movs r0, r3 - 80023b2: f000 ff5f bl 8003274 - - if (hi2c->XferCount != 0U) - 80023b6: 68fb ldr r3, [r7, #12] - 80023b8: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80023ba: b29b uxth r3, r3 - 80023bc: 2b00 cmp r3, #0 - 80023be: d04a beq.n 8002456 - { - /* Prepare the new XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - 80023c0: 68fb ldr r3, [r7, #12] - 80023c2: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80023c4: b29b uxth r3, r3 - 80023c6: 2bff cmp r3, #255 @ 0xff - 80023c8: d910 bls.n 80023ec - { - hi2c->XferSize = MAX_NBYTE_SIZE; - 80023ca: 68fb ldr r3, [r7, #12] - 80023cc: 22ff movs r2, #255 @ 0xff - 80023ce: 851a strh r2, [r3, #40] @ 0x28 - I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, - 80023d0: 68fb ldr r3, [r7, #12] - 80023d2: 6cdb ldr r3, [r3, #76] @ 0x4c - 80023d4: b299 uxth r1, r3 - 80023d6: 68fb ldr r3, [r7, #12] - 80023d8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80023da: b2da uxtb r2, r3 - 80023dc: 2380 movs r3, #128 @ 0x80 - 80023de: 045b lsls r3, r3, #17 - 80023e0: 68f8 ldr r0, [r7, #12] - 80023e2: 2400 movs r4, #0 - 80023e4: 9400 str r4, [sp, #0] - 80023e6: f000 ff0b bl 8003200 - 80023ea: e011 b.n 8002410 - I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - 80023ec: 68fb ldr r3, [r7, #12] - 80023ee: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80023f0: b29a uxth r2, r3 - 80023f2: 68fb ldr r3, [r7, #12] - 80023f4: 851a strh r2, [r3, #40] @ 0x28 - I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, - 80023f6: 68fb ldr r3, [r7, #12] - 80023f8: 6cdb ldr r3, [r3, #76] @ 0x4c - 80023fa: b299 uxth r1, r3 - 80023fc: 68fb ldr r3, [r7, #12] - 80023fe: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8002400: b2da uxtb r2, r3 - 8002402: 2380 movs r3, #128 @ 0x80 - 8002404: 049b lsls r3, r3, #18 - 8002406: 68f8 ldr r0, [r7, #12] - 8002408: 2400 movs r4, #0 - 800240a: 9400 str r4, [sp, #0] - 800240c: f000 fef8 bl 8003200 - I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - 8002410: 68fb ldr r3, [r7, #12] - 8002412: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002414: b29a uxth r2, r3 - 8002416: 68fb ldr r3, [r7, #12] - 8002418: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800241a: 1ad3 subs r3, r2, r3 - 800241c: b29a uxth r2, r3 - 800241e: 68fb ldr r3, [r7, #12] - 8002420: 855a strh r2, [r3, #42] @ 0x2a - - /* Enable DMA Request */ - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 8002422: 68fb ldr r3, [r7, #12] - 8002424: 2241 movs r2, #65 @ 0x41 - 8002426: 5c9b ldrb r3, [r3, r2] - 8002428: b2db uxtb r3, r3 - 800242a: 2b22 cmp r3, #34 @ 0x22 - 800242c: d109 bne.n 8002442 - { - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - 800242e: 68fb ldr r3, [r7, #12] - 8002430: 681b ldr r3, [r3, #0] - 8002432: 681a ldr r2, [r3, #0] - 8002434: 68fb ldr r3, [r7, #12] - 8002436: 681b ldr r3, [r3, #0] - 8002438: 2180 movs r1, #128 @ 0x80 - 800243a: 0209 lsls r1, r1, #8 - 800243c: 430a orrs r2, r1 - 800243e: 601a str r2, [r3, #0] - if (hi2c->XferCount != 0U) - 8002440: e084 b.n 800254c - } - else - { - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - 8002442: 68fb ldr r3, [r7, #12] - 8002444: 681b ldr r3, [r3, #0] - 8002446: 681a ldr r2, [r3, #0] - 8002448: 68fb ldr r3, [r7, #12] - 800244a: 681b ldr r3, [r3, #0] - 800244c: 2180 movs r1, #128 @ 0x80 - 800244e: 01c9 lsls r1, r1, #7 - 8002450: 430a orrs r2, r1 - 8002452: 601a str r2, [r3, #0] - if (hi2c->XferCount != 0U) - 8002454: e07a b.n 800254c - } - else - { - /* Wrong size Status regarding TCR flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - 8002456: 68fb ldr r3, [r7, #12] - 8002458: 2140 movs r1, #64 @ 0x40 - 800245a: 0018 movs r0, r3 - 800245c: f000 fd64 bl 8002f28 - if (hi2c->XferCount != 0U) - 8002460: e074 b.n 800254c - } - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ - 8002462: 68bb ldr r3, [r7, #8] - 8002464: 2240 movs r2, #64 @ 0x40 - 8002466: 4013 ands r3, r2 - 8002468: d062 beq.n 8002530 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) - 800246a: 687b ldr r3, [r7, #4] - 800246c: 2240 movs r2, #64 @ 0x40 - 800246e: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ - 8002470: d05e beq.n 8002530 - { - /* Disable Interrupt related to address step */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - 8002472: 68fb ldr r3, [r7, #12] - 8002474: 2101 movs r1, #1 - 8002476: 0018 movs r0, r3 - 8002478: f000 ff86 bl 8003388 - - /* Enable only Error and NACK interrupt for data transfer */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - 800247c: 68fb ldr r3, [r7, #12] - 800247e: 2110 movs r1, #16 - 8002480: 0018 movs r0, r3 - 8002482: f000 fef7 bl 8003274 - - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 8002486: 68fb ldr r3, [r7, #12] - 8002488: 2241 movs r2, #65 @ 0x41 - 800248a: 5c9b ldrb r3, [r3, r2] - 800248c: b2db uxtb r3, r3 - 800248e: 2b22 cmp r3, #34 @ 0x22 - 8002490: d101 bne.n 8002496 - { - direction = I2C_GENERATE_START_READ; - 8002492: 4b34 ldr r3, [pc, #208] @ (8002564 ) - 8002494: 617b str r3, [r7, #20] - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - 8002496: 68fb ldr r3, [r7, #12] - 8002498: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800249a: b29b uxth r3, r3 - 800249c: 2bff cmp r3, #255 @ 0xff - 800249e: d911 bls.n 80024c4 - { - hi2c->XferSize = MAX_NBYTE_SIZE; - 80024a0: 68fb ldr r3, [r7, #12] - 80024a2: 22ff movs r2, #255 @ 0xff - 80024a4: 851a strh r2, [r3, #40] @ 0x28 - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, - 80024a6: 68fb ldr r3, [r7, #12] - 80024a8: 6cdb ldr r3, [r3, #76] @ 0x4c - 80024aa: b299 uxth r1, r3 - 80024ac: 68fb ldr r3, [r7, #12] - 80024ae: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80024b0: b2da uxtb r2, r3 - 80024b2: 2380 movs r3, #128 @ 0x80 - 80024b4: 045c lsls r4, r3, #17 - 80024b6: 68f8 ldr r0, [r7, #12] - 80024b8: 697b ldr r3, [r7, #20] - 80024ba: 9300 str r3, [sp, #0] - 80024bc: 0023 movs r3, r4 - 80024be: f000 fe9f bl 8003200 - 80024c2: e012 b.n 80024ea - I2C_RELOAD_MODE, direction); - } - else - { - hi2c->XferSize = hi2c->XferCount; - 80024c4: 68fb ldr r3, [r7, #12] - 80024c6: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80024c8: b29a uxth r2, r3 - 80024ca: 68fb ldr r3, [r7, #12] - 80024cc: 851a strh r2, [r3, #40] @ 0x28 - - /* Set NBYTES to write and generate RESTART */ - I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, - 80024ce: 68fb ldr r3, [r7, #12] - 80024d0: 6cdb ldr r3, [r3, #76] @ 0x4c - 80024d2: b299 uxth r1, r3 - 80024d4: 68fb ldr r3, [r7, #12] - 80024d6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80024d8: b2da uxtb r2, r3 - 80024da: 2380 movs r3, #128 @ 0x80 - 80024dc: 049c lsls r4, r3, #18 - 80024de: 68f8 ldr r0, [r7, #12] - 80024e0: 697b ldr r3, [r7, #20] - 80024e2: 9300 str r3, [sp, #0] - 80024e4: 0023 movs r3, r4 - 80024e6: f000 fe8b bl 8003200 - I2C_AUTOEND_MODE, direction); - } - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - 80024ea: 68fb ldr r3, [r7, #12] - 80024ec: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80024ee: b29a uxth r2, r3 - 80024f0: 68fb ldr r3, [r7, #12] - 80024f2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80024f4: 1ad3 subs r3, r2, r3 - 80024f6: b29a uxth r2, r3 - 80024f8: 68fb ldr r3, [r7, #12] - 80024fa: 855a strh r2, [r3, #42] @ 0x2a - - /* Enable DMA Request */ - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 80024fc: 68fb ldr r3, [r7, #12] - 80024fe: 2241 movs r2, #65 @ 0x41 - 8002500: 5c9b ldrb r3, [r3, r2] - 8002502: b2db uxtb r3, r3 - 8002504: 2b22 cmp r3, #34 @ 0x22 - 8002506: d109 bne.n 800251c - { - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - 8002508: 68fb ldr r3, [r7, #12] - 800250a: 681b ldr r3, [r3, #0] - 800250c: 681a ldr r2, [r3, #0] - 800250e: 68fb ldr r3, [r7, #12] - 8002510: 681b ldr r3, [r3, #0] - 8002512: 2180 movs r1, #128 @ 0x80 - 8002514: 0209 lsls r1, r1, #8 - 8002516: 430a orrs r2, r1 - 8002518: 601a str r2, [r3, #0] - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 800251a: e017 b.n 800254c - } - else - { - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - 800251c: 68fb ldr r3, [r7, #12] - 800251e: 681b ldr r3, [r3, #0] - 8002520: 681a ldr r2, [r3, #0] - 8002522: 68fb ldr r3, [r7, #12] - 8002524: 681b ldr r3, [r3, #0] - 8002526: 2180 movs r1, #128 @ 0x80 - 8002528: 01c9 lsls r1, r1, #7 - 800252a: 430a orrs r2, r1 - 800252c: 601a str r2, [r3, #0] - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 800252e: e00d b.n 800254c - } - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ - 8002530: 68bb ldr r3, [r7, #8] - 8002532: 2220 movs r2, #32 - 8002534: 4013 ands r3, r2 - 8002536: d009 beq.n 800254c - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - 8002538: 687b ldr r3, [r7, #4] - 800253a: 2220 movs r2, #32 - 800253c: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ - 800253e: d005 beq.n 800254c - { - /* Call I2C Master complete process */ - I2C_ITMasterCplt(hi2c, ITFlags); - 8002540: 68ba ldr r2, [r7, #8] - 8002542: 68fb ldr r3, [r7, #12] - 8002544: 0011 movs r1, r2 - 8002546: 0018 movs r0, r3 - 8002548: f000 fa40 bl 80029cc - { - /* Nothing to do */ - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 800254c: 68fb ldr r3, [r7, #12] - 800254e: 2240 movs r2, #64 @ 0x40 - 8002550: 2100 movs r1, #0 - 8002552: 5499 strb r1, [r3, r2] - - return HAL_OK; - 8002554: 2300 movs r3, #0 -} - 8002556: 0018 movs r0, r3 - 8002558: 46bd mov sp, r7 - 800255a: b007 add sp, #28 - 800255c: bd90 pop {r4, r7, pc} - 800255e: 46c0 nop @ (mov r8, r8) - 8002560: 80002000 .word 0x80002000 - 8002564: 80002400 .word 0x80002400 - -08002568 : - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, - uint32_t ITSources) -{ - 8002568: b580 push {r7, lr} - 800256a: b088 sub sp, #32 - 800256c: af00 add r7, sp, #0 - 800256e: 60f8 str r0, [r7, #12] - 8002570: 60b9 str r1, [r7, #8] - 8002572: 607a str r2, [r7, #4] - uint32_t tmpoptions = hi2c->XferOptions; - 8002574: 68fb ldr r3, [r7, #12] - 8002576: 6adb ldr r3, [r3, #44] @ 0x2c - 8002578: 61bb str r3, [r7, #24] - uint32_t treatdmanack = 0U; - 800257a: 2300 movs r3, #0 - 800257c: 61fb str r3, [r7, #28] - HAL_I2C_StateTypeDef tmpstate; - - /* Process locked */ - __HAL_LOCK(hi2c); - 800257e: 68fb ldr r3, [r7, #12] - 8002580: 2240 movs r2, #64 @ 0x40 - 8002582: 5c9b ldrb r3, [r3, r2] - 8002584: 2b01 cmp r3, #1 - 8002586: d101 bne.n 800258c - 8002588: 2302 movs r3, #2 - 800258a: e0ce b.n 800272a - 800258c: 68fb ldr r3, [r7, #12] - 800258e: 2240 movs r2, #64 @ 0x40 - 8002590: 2101 movs r1, #1 - 8002592: 5499 strb r1, [r3, r2] - - /* Check if STOPF is set */ - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ - 8002594: 68bb ldr r3, [r7, #8] - 8002596: 2220 movs r2, #32 - 8002598: 4013 ands r3, r2 - 800259a: d00a beq.n 80025b2 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - 800259c: 687b ldr r3, [r7, #4] - 800259e: 2220 movs r2, #32 - 80025a0: 4013 ands r3, r2 - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ - 80025a2: d006 beq.n 80025b2 - { - /* Call I2C Slave complete process */ - I2C_ITSlaveCplt(hi2c, ITFlags); - 80025a4: 68ba ldr r2, [r7, #8] - 80025a6: 68fb ldr r3, [r7, #12] - 80025a8: 0011 movs r1, r2 - 80025aa: 0018 movs r0, r3 - 80025ac: f000 fadc bl 8002b68 - 80025b0: e0b6 b.n 8002720 - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - 80025b2: 68bb ldr r3, [r7, #8] - 80025b4: 2210 movs r2, #16 - 80025b6: 4013 ands r3, r2 - 80025b8: d100 bne.n 80025bc - 80025ba: e0a3 b.n 8002704 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) - 80025bc: 687b ldr r3, [r7, #4] - 80025be: 2210 movs r2, #16 - 80025c0: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - 80025c2: d100 bne.n 80025c6 - 80025c4: e09e b.n 8002704 - { - /* Check that I2C transfer finished */ - /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ - /* Mean XferCount == 0 */ - /* So clear Flag NACKF only */ - if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || - 80025c6: 687a ldr r2, [r7, #4] - 80025c8: 2380 movs r3, #128 @ 0x80 - 80025ca: 01db lsls r3, r3, #7 - 80025cc: 4013 ands r3, r2 - 80025ce: d105 bne.n 80025dc - (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) - 80025d0: 687a ldr r2, [r7, #4] - 80025d2: 2380 movs r3, #128 @ 0x80 - 80025d4: 021b lsls r3, r3, #8 - 80025d6: 4013 ands r3, r2 - if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || - 80025d8: d100 bne.n 80025dc - 80025da: e08c b.n 80026f6 - { - /* Split check of hdmarx, for MISRA compliance */ - if (hi2c->hdmarx != NULL) - 80025dc: 68fb ldr r3, [r7, #12] - 80025de: 6bdb ldr r3, [r3, #60] @ 0x3c - 80025e0: 2b00 cmp r3, #0 - 80025e2: d00c beq.n 80025fe - { - if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET) - 80025e4: 687a ldr r2, [r7, #4] - 80025e6: 2380 movs r3, #128 @ 0x80 - 80025e8: 021b lsls r3, r3, #8 - 80025ea: 4013 ands r3, r2 - 80025ec: d007 beq.n 80025fe - { - if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) - 80025ee: 68fb ldr r3, [r7, #12] - 80025f0: 6bdb ldr r3, [r3, #60] @ 0x3c - 80025f2: 681b ldr r3, [r3, #0] - 80025f4: 685b ldr r3, [r3, #4] - 80025f6: 2b00 cmp r3, #0 - 80025f8: d101 bne.n 80025fe - { - treatdmanack = 1U; - 80025fa: 2301 movs r3, #1 - 80025fc: 61fb str r3, [r7, #28] - } - } - } - - /* Split check of hdmatx, for MISRA compliance */ - if (hi2c->hdmatx != NULL) - 80025fe: 68fb ldr r3, [r7, #12] - 8002600: 6b9b ldr r3, [r3, #56] @ 0x38 - 8002602: 2b00 cmp r3, #0 - 8002604: d00c beq.n 8002620 - { - if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) - 8002606: 687a ldr r2, [r7, #4] - 8002608: 2380 movs r3, #128 @ 0x80 - 800260a: 01db lsls r3, r3, #7 - 800260c: 4013 ands r3, r2 - 800260e: d007 beq.n 8002620 - { - if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx) == 0U) - 8002610: 68fb ldr r3, [r7, #12] - 8002612: 6b9b ldr r3, [r3, #56] @ 0x38 - 8002614: 681b ldr r3, [r3, #0] - 8002616: 685b ldr r3, [r3, #4] - 8002618: 2b00 cmp r3, #0 - 800261a: d101 bne.n 8002620 - { - treatdmanack = 1U; - 800261c: 2301 movs r3, #1 - 800261e: 61fb str r3, [r7, #28] - } - } - } - - if (treatdmanack == 1U) - 8002620: 69fb ldr r3, [r7, #28] - 8002622: 2b01 cmp r3, #1 - 8002624: d12d bne.n 8002682 - { - if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) - 8002626: 68fb ldr r3, [r7, #12] - 8002628: 2241 movs r2, #65 @ 0x41 - 800262a: 5c9b ldrb r3, [r3, r2] - 800262c: b2db uxtb r3, r3 - 800262e: 2b28 cmp r3, #40 @ 0x28 - 8002630: d10b bne.n 800264a - 8002632: 69ba ldr r2, [r7, #24] - 8002634: 2380 movs r3, #128 @ 0x80 - 8002636: 049b lsls r3, r3, #18 - 8002638: 429a cmp r2, r3 - 800263a: d106 bne.n 800264a - /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for - Warning[Pa134]: left and right operands are identical */ - { - /* Call I2C Listen complete process */ - I2C_ITListenCplt(hi2c, ITFlags); - 800263c: 68ba ldr r2, [r7, #8] - 800263e: 68fb ldr r3, [r7, #12] - 8002640: 0011 movs r1, r2 - 8002642: 0018 movs r0, r3 - 8002644: f000 fc18 bl 8002e78 - 8002648: e054 b.n 80026f4 - } - else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) - 800264a: 68fb ldr r3, [r7, #12] - 800264c: 2241 movs r2, #65 @ 0x41 - 800264e: 5c9b ldrb r3, [r3, r2] - 8002650: b2db uxtb r3, r3 - 8002652: 2b29 cmp r3, #41 @ 0x29 - 8002654: d110 bne.n 8002678 - 8002656: 69bb ldr r3, [r7, #24] - 8002658: 4a36 ldr r2, [pc, #216] @ (8002734 ) - 800265a: 4293 cmp r3, r2 - 800265c: d00c beq.n 8002678 - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 800265e: 68fb ldr r3, [r7, #12] - 8002660: 681b ldr r3, [r3, #0] - 8002662: 2210 movs r2, #16 - 8002664: 61da str r2, [r3, #28] - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - 8002666: 68fb ldr r3, [r7, #12] - 8002668: 0018 movs r0, r3 - 800266a: f000 fd88 bl 800317e - - /* Last Byte is Transmitted */ - /* Call I2C Slave Sequential complete process */ - I2C_ITSlaveSeqCplt(hi2c); - 800266e: 68fb ldr r3, [r7, #12] - 8002670: 0018 movs r0, r3 - 8002672: f000 f947 bl 8002904 - 8002676: e03d b.n 80026f4 - } - else - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002678: 68fb ldr r3, [r7, #12] - 800267a: 681b ldr r3, [r3, #0] - 800267c: 2210 movs r2, #16 - 800267e: 61da str r2, [r3, #28] - if (treatdmanack == 1U) - 8002680: e03e b.n 8002700 - } - else - { - /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002682: 68fb ldr r3, [r7, #12] - 8002684: 681b ldr r3, [r3, #0] - 8002686: 2210 movs r2, #16 - 8002688: 61da str r2, [r3, #28] - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 800268a: 68fb ldr r3, [r7, #12] - 800268c: 6c5b ldr r3, [r3, #68] @ 0x44 - 800268e: 2204 movs r2, #4 - 8002690: 431a orrs r2, r3 - 8002692: 68fb ldr r3, [r7, #12] - 8002694: 645a str r2, [r3, #68] @ 0x44 - - /* Store current hi2c->State, solve MISRA2012-Rule-13.5 */ - tmpstate = hi2c->State; - 8002696: 2317 movs r3, #23 - 8002698: 18fb adds r3, r7, r3 - 800269a: 68fa ldr r2, [r7, #12] - 800269c: 2141 movs r1, #65 @ 0x41 - 800269e: 5c52 ldrb r2, [r2, r1] - 80026a0: 701a strb r2, [r3, #0] - - if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) - 80026a2: 69bb ldr r3, [r7, #24] - 80026a4: 2b00 cmp r3, #0 - 80026a6: d004 beq.n 80026b2 - 80026a8: 69ba ldr r2, [r7, #24] - 80026aa: 2380 movs r3, #128 @ 0x80 - 80026ac: 045b lsls r3, r3, #17 - 80026ae: 429a cmp r2, r3 - 80026b0: d126 bne.n 8002700 - { - if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) - 80026b2: 2217 movs r2, #23 - 80026b4: 18bb adds r3, r7, r2 - 80026b6: 781b ldrb r3, [r3, #0] - 80026b8: 2b21 cmp r3, #33 @ 0x21 - 80026ba: d003 beq.n 80026c4 - 80026bc: 18bb adds r3, r7, r2 - 80026be: 781b ldrb r3, [r3, #0] - 80026c0: 2b29 cmp r3, #41 @ 0x29 - 80026c2: d103 bne.n 80026cc - { - hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - 80026c4: 68fb ldr r3, [r7, #12] - 80026c6: 2221 movs r2, #33 @ 0x21 - 80026c8: 631a str r2, [r3, #48] @ 0x30 - 80026ca: e00b b.n 80026e4 - } - else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) - 80026cc: 2217 movs r2, #23 - 80026ce: 18bb adds r3, r7, r2 - 80026d0: 781b ldrb r3, [r3, #0] - 80026d2: 2b22 cmp r3, #34 @ 0x22 - 80026d4: d003 beq.n 80026de - 80026d6: 18bb adds r3, r7, r2 - 80026d8: 781b ldrb r3, [r3, #0] - 80026da: 2b2a cmp r3, #42 @ 0x2a - 80026dc: d102 bne.n 80026e4 - { - hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - 80026de: 68fb ldr r3, [r7, #12] - 80026e0: 2222 movs r2, #34 @ 0x22 - 80026e2: 631a str r2, [r3, #48] @ 0x30 - { - /* Do nothing */ - } - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, hi2c->ErrorCode); - 80026e4: 68fb ldr r3, [r7, #12] - 80026e6: 6c5a ldr r2, [r3, #68] @ 0x44 - 80026e8: 68fb ldr r3, [r7, #12] - 80026ea: 0011 movs r1, r2 - 80026ec: 0018 movs r0, r3 - 80026ee: f000 fc1b bl 8002f28 - if (treatdmanack == 1U) - 80026f2: e005 b.n 8002700 - 80026f4: e004 b.n 8002700 - } - } - else - { - /* Only Clear NACK Flag, no DMA treatment is pending */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 80026f6: 68fb ldr r3, [r7, #12] - 80026f8: 681b ldr r3, [r3, #0] - 80026fa: 2210 movs r2, #16 - 80026fc: 61da str r2, [r3, #28] - if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || - 80026fe: e00f b.n 8002720 - if (treatdmanack == 1U) - 8002700: 46c0 nop @ (mov r8, r8) - if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || - 8002702: e00d b.n 8002720 - } - } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \ - 8002704: 68bb ldr r3, [r7, #8] - 8002706: 2208 movs r2, #8 - 8002708: 4013 ands r3, r2 - 800270a: d009 beq.n 8002720 - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) - 800270c: 687b ldr r3, [r7, #4] - 800270e: 2208 movs r2, #8 - 8002710: 4013 ands r3, r2 - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \ - 8002712: d005 beq.n 8002720 - { - I2C_ITAddrCplt(hi2c, ITFlags); - 8002714: 68ba ldr r2, [r7, #8] - 8002716: 68fb ldr r3, [r7, #12] - 8002718: 0011 movs r1, r2 - 800271a: 0018 movs r0, r3 - 800271c: f000 f80c bl 8002738 - { - /* Nothing to do */ - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 8002720: 68fb ldr r3, [r7, #12] - 8002722: 2240 movs r2, #64 @ 0x40 - 8002724: 2100 movs r1, #0 - 8002726: 5499 strb r1, [r3, r2] - - return HAL_OK; - 8002728: 2300 movs r3, #0 -} - 800272a: 0018 movs r0, r3 - 800272c: 46bd mov sp, r7 - 800272e: b008 add sp, #32 - 8002730: bd80 pop {r7, pc} - 8002732: 46c0 nop @ (mov r8, r8) - 8002734: ffff0000 .word 0xffff0000 - -08002738 : +08002134 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 8002738: b5b0 push {r4, r5, r7, lr} - 800273a: b084 sub sp, #16 - 800273c: af00 add r7, sp, #0 - 800273e: 6078 str r0, [r7, #4] - 8002740: 6039 str r1, [r7, #0] + 8002134: b5b0 push {r4, r5, r7, lr} + 8002136: b084 sub sp, #16 + 8002138: af00 add r7, sp, #0 + 800213a: 6078 str r0, [r7, #4] + 800213c: 6039 str r1, [r7, #0] /* Prevent unused argument(s) compilation warning */ UNUSED(ITFlags); /* In case of Listen state, need to inform upper layer of address match code event */ if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) - 8002742: 687b ldr r3, [r7, #4] - 8002744: 2241 movs r2, #65 @ 0x41 - 8002746: 5c9b ldrb r3, [r3, r2] - 8002748: b2db uxtb r3, r3 - 800274a: 001a movs r2, r3 - 800274c: 2328 movs r3, #40 @ 0x28 - 800274e: 4013 ands r3, r2 - 8002750: 2b28 cmp r3, #40 @ 0x28 - 8002752: d000 beq.n 8002756 - 8002754: e088 b.n 8002868 + 800213e: 687b ldr r3, [r7, #4] + 8002140: 2241 movs r2, #65 @ 0x41 + 8002142: 5c9b ldrb r3, [r3, r2] + 8002144: b2db uxtb r3, r3 + 8002146: 001a movs r2, r3 + 8002148: 2328 movs r3, #40 @ 0x28 + 800214a: 4013 ands r3, r2 + 800214c: 2b28 cmp r3, #40 @ 0x28 + 800214e: d000 beq.n 8002152 + 8002150: e088 b.n 8002264 { transferdirection = I2C_GET_DIR(hi2c); - 8002756: 687b ldr r3, [r7, #4] - 8002758: 681b ldr r3, [r3, #0] - 800275a: 699b ldr r3, [r3, #24] - 800275c: 0c1b lsrs r3, r3, #16 - 800275e: b2da uxtb r2, r3 - 8002760: 250f movs r5, #15 - 8002762: 197b adds r3, r7, r5 - 8002764: 2101 movs r1, #1 - 8002766: 400a ands r2, r1 - 8002768: 701a strb r2, [r3, #0] + 8002152: 687b ldr r3, [r7, #4] + 8002154: 681b ldr r3, [r3, #0] + 8002156: 699b ldr r3, [r3, #24] + 8002158: 0c1b lsrs r3, r3, #16 + 800215a: b2da uxtb r2, r3 + 800215c: 250f movs r5, #15 + 800215e: 197b adds r3, r7, r5 + 8002160: 2101 movs r1, #1 + 8002162: 400a ands r2, r1 + 8002164: 701a strb r2, [r3, #0] slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); - 800276a: 687b ldr r3, [r7, #4] - 800276c: 681b ldr r3, [r3, #0] - 800276e: 699b ldr r3, [r3, #24] - 8002770: 0c1b lsrs r3, r3, #16 - 8002772: b29a uxth r2, r3 - 8002774: 200c movs r0, #12 - 8002776: 183b adds r3, r7, r0 - 8002778: 21fe movs r1, #254 @ 0xfe - 800277a: 400a ands r2, r1 - 800277c: 801a strh r2, [r3, #0] + 8002166: 687b ldr r3, [r7, #4] + 8002168: 681b ldr r3, [r3, #0] + 800216a: 699b ldr r3, [r3, #24] + 800216c: 0c1b lsrs r3, r3, #16 + 800216e: b29a uxth r2, r3 + 8002170: 200c movs r0, #12 + 8002172: 183b adds r3, r7, r0 + 8002174: 21fe movs r1, #254 @ 0xfe + 8002176: 400a ands r2, r1 + 8002178: 801a strh r2, [r3, #0] ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); - 800277e: 687b ldr r3, [r7, #4] - 8002780: 681b ldr r3, [r3, #0] - 8002782: 689b ldr r3, [r3, #8] - 8002784: b29a uxth r2, r3 - 8002786: 240a movs r4, #10 - 8002788: 193b adds r3, r7, r4 - 800278a: 0592 lsls r2, r2, #22 - 800278c: 0d92 lsrs r2, r2, #22 - 800278e: 801a strh r2, [r3, #0] + 800217a: 687b ldr r3, [r7, #4] + 800217c: 681b ldr r3, [r3, #0] + 800217e: 689b ldr r3, [r3, #8] + 8002180: b29a uxth r2, r3 + 8002182: 240a movs r4, #10 + 8002184: 193b adds r3, r7, r4 + 8002186: 0592 lsls r2, r2, #22 + 8002188: 0d92 lsrs r2, r2, #22 + 800218a: 801a strh r2, [r3, #0] ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); - 8002790: 687b ldr r3, [r7, #4] - 8002792: 681b ldr r3, [r3, #0] - 8002794: 68db ldr r3, [r3, #12] - 8002796: b29a uxth r2, r3 - 8002798: 2308 movs r3, #8 - 800279a: 18fb adds r3, r7, r3 - 800279c: 21fe movs r1, #254 @ 0xfe - 800279e: 400a ands r2, r1 - 80027a0: 801a strh r2, [r3, #0] + 800218c: 687b ldr r3, [r7, #4] + 800218e: 681b ldr r3, [r3, #0] + 8002190: 68db ldr r3, [r3, #12] + 8002192: b29a uxth r2, r3 + 8002194: 2308 movs r3, #8 + 8002196: 18fb adds r3, r7, r3 + 8002198: 21fe movs r1, #254 @ 0xfe + 800219a: 400a ands r2, r1 + 800219c: 801a strh r2, [r3, #0] /* If 10bits addressing mode is selected */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 80027a2: 687b ldr r3, [r7, #4] - 80027a4: 68db ldr r3, [r3, #12] - 80027a6: 2b02 cmp r3, #2 - 80027a8: d148 bne.n 800283c + 800219e: 687b ldr r3, [r7, #4] + 80021a0: 68db ldr r3, [r3, #12] + 80021a2: 2b02 cmp r3, #2 + 80021a4: d148 bne.n 8002238 { if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) - 80027aa: 0021 movs r1, r4 - 80027ac: 187b adds r3, r7, r1 - 80027ae: 881b ldrh r3, [r3, #0] - 80027b0: 09db lsrs r3, r3, #7 - 80027b2: b29a uxth r2, r3 - 80027b4: 183b adds r3, r7, r0 - 80027b6: 881b ldrh r3, [r3, #0] - 80027b8: 4053 eors r3, r2 - 80027ba: b29b uxth r3, r3 - 80027bc: 001a movs r2, r3 - 80027be: 2306 movs r3, #6 - 80027c0: 4013 ands r3, r2 - 80027c2: d120 bne.n 8002806 + 80021a6: 0021 movs r1, r4 + 80021a8: 187b adds r3, r7, r1 + 80021aa: 881b ldrh r3, [r3, #0] + 80021ac: 09db lsrs r3, r3, #7 + 80021ae: b29a uxth r2, r3 + 80021b0: 183b adds r3, r7, r0 + 80021b2: 881b ldrh r3, [r3, #0] + 80021b4: 4053 eors r3, r2 + 80021b6: b29b uxth r3, r3 + 80021b8: 001a movs r2, r3 + 80021ba: 2306 movs r3, #6 + 80021bc: 4013 ands r3, r2 + 80021be: d120 bne.n 8002202 { slaveaddrcode = ownadd1code; - 80027c4: 183b adds r3, r7, r0 - 80027c6: 187a adds r2, r7, r1 - 80027c8: 8812 ldrh r2, [r2, #0] - 80027ca: 801a strh r2, [r3, #0] + 80021c0: 183b adds r3, r7, r0 + 80021c2: 187a adds r2, r7, r1 + 80021c4: 8812 ldrh r2, [r2, #0] + 80021c6: 801a strh r2, [r3, #0] hi2c->AddrEventCount++; - 80027cc: 687b ldr r3, [r7, #4] - 80027ce: 6c9b ldr r3, [r3, #72] @ 0x48 - 80027d0: 1c5a adds r2, r3, #1 - 80027d2: 687b ldr r3, [r7, #4] - 80027d4: 649a str r2, [r3, #72] @ 0x48 + 80021c8: 687b ldr r3, [r7, #4] + 80021ca: 6c9b ldr r3, [r3, #72] @ 0x48 + 80021cc: 1c5a adds r2, r3, #1 + 80021ce: 687b ldr r3, [r7, #4] + 80021d0: 649a str r2, [r3, #72] @ 0x48 if (hi2c->AddrEventCount == 2U) - 80027d6: 687b ldr r3, [r7, #4] - 80027d8: 6c9b ldr r3, [r3, #72] @ 0x48 - 80027da: 2b02 cmp r3, #2 - 80027dc: d14c bne.n 8002878 + 80021d2: 687b ldr r3, [r7, #4] + 80021d4: 6c9b ldr r3, [r3, #72] @ 0x48 + 80021d6: 2b02 cmp r3, #2 + 80021d8: d14c bne.n 8002274 { /* Reset Address Event counter */ hi2c->AddrEventCount = 0U; - 80027de: 687b ldr r3, [r7, #4] - 80027e0: 2200 movs r2, #0 - 80027e2: 649a str r2, [r3, #72] @ 0x48 + 80021da: 687b ldr r3, [r7, #4] + 80021dc: 2200 movs r2, #0 + 80021de: 649a str r2, [r3, #72] @ 0x48 /* Clear ADDR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 80027e4: 687b ldr r3, [r7, #4] - 80027e6: 681b ldr r3, [r3, #0] - 80027e8: 2208 movs r2, #8 - 80027ea: 61da str r2, [r3, #28] + 80021e0: 687b ldr r3, [r7, #4] + 80021e2: 681b ldr r3, [r3, #0] + 80021e4: 2208 movs r2, #8 + 80021e6: 61da str r2, [r3, #28] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80027ec: 687b ldr r3, [r7, #4] - 80027ee: 2240 movs r2, #64 @ 0x40 - 80027f0: 2100 movs r1, #0 - 80027f2: 5499 strb r1, [r3, r2] + 80021e8: 687b ldr r3, [r7, #4] + 80021ea: 2240 movs r2, #64 @ 0x40 + 80021ec: 2100 movs r1, #0 + 80021ee: 5499 strb r1, [r3, r2] /* Call Slave Addr callback */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); #else HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 80027f4: 183b adds r3, r7, r0 - 80027f6: 881a ldrh r2, [r3, #0] - 80027f8: 197b adds r3, r7, r5 - 80027fa: 7819 ldrb r1, [r3, #0] - 80027fc: 687b ldr r3, [r7, #4] - 80027fe: 0018 movs r0, r3 - 8002800: f7ff fb51 bl 8001ea6 + 80021f0: 183b adds r3, r7, r0 + 80021f2: 881a ldrh r2, [r3, #0] + 80021f4: 197b adds r3, r7, r5 + 80021f6: 7819 ldrb r1, [r3, #0] + 80021f8: 687b ldr r3, [r7, #4] + 80021fa: 0018 movs r0, r3 + 80021fc: f7ff fe71 bl 8001ee2 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); /* Process Unlocked */ __HAL_UNLOCK(hi2c); } } - 8002804: e038 b.n 8002878 + 8002200: e038 b.n 8002274 slaveaddrcode = ownadd2code; - 8002806: 240c movs r4, #12 - 8002808: 193b adds r3, r7, r4 - 800280a: 2208 movs r2, #8 - 800280c: 18ba adds r2, r7, r2 - 800280e: 8812 ldrh r2, [r2, #0] - 8002810: 801a strh r2, [r3, #0] + 8002202: 240c movs r4, #12 + 8002204: 193b adds r3, r7, r4 + 8002206: 2208 movs r2, #8 + 8002208: 18ba adds r2, r7, r2 + 800220a: 8812 ldrh r2, [r2, #0] + 800220c: 801a strh r2, [r3, #0] I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - 8002812: 2380 movs r3, #128 @ 0x80 - 8002814: 021a lsls r2, r3, #8 - 8002816: 687b ldr r3, [r7, #4] - 8002818: 0011 movs r1, r2 - 800281a: 0018 movs r0, r3 - 800281c: f000 fdb4 bl 8003388 + 800220e: 2380 movs r3, #128 @ 0x80 + 8002210: 021a lsls r2, r3, #8 + 8002212: 687b ldr r3, [r7, #4] + 8002214: 0011 movs r1, r2 + 8002216: 0018 movs r0, r3 + 8002218: f000 fbe0 bl 80029dc __HAL_UNLOCK(hi2c); - 8002820: 687b ldr r3, [r7, #4] - 8002822: 2240 movs r2, #64 @ 0x40 - 8002824: 2100 movs r1, #0 - 8002826: 5499 strb r1, [r3, r2] + 800221c: 687b ldr r3, [r7, #4] + 800221e: 2240 movs r2, #64 @ 0x40 + 8002220: 2100 movs r1, #0 + 8002222: 5499 strb r1, [r3, r2] HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 8002828: 193b adds r3, r7, r4 - 800282a: 881a ldrh r2, [r3, #0] - 800282c: 230f movs r3, #15 - 800282e: 18fb adds r3, r7, r3 - 8002830: 7819 ldrb r1, [r3, #0] - 8002832: 687b ldr r3, [r7, #4] - 8002834: 0018 movs r0, r3 - 8002836: f7ff fb36 bl 8001ea6 + 8002224: 193b adds r3, r7, r4 + 8002226: 881a ldrh r2, [r3, #0] + 8002228: 230f movs r3, #15 + 800222a: 18fb adds r3, r7, r3 + 800222c: 7819 ldrb r1, [r3, #0] + 800222e: 687b ldr r3, [r7, #4] + 8002230: 0018 movs r0, r3 + 8002232: f7ff fe56 bl 8001ee2 } - 800283a: e01d b.n 8002878 + 8002236: e01d b.n 8002274 I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - 800283c: 2380 movs r3, #128 @ 0x80 - 800283e: 021a lsls r2, r3, #8 - 8002840: 687b ldr r3, [r7, #4] - 8002842: 0011 movs r1, r2 - 8002844: 0018 movs r0, r3 - 8002846: f000 fd9f bl 8003388 + 8002238: 2380 movs r3, #128 @ 0x80 + 800223a: 021a lsls r2, r3, #8 + 800223c: 687b ldr r3, [r7, #4] + 800223e: 0011 movs r1, r2 + 8002240: 0018 movs r0, r3 + 8002242: f000 fbcb bl 80029dc __HAL_UNLOCK(hi2c); - 800284a: 687b ldr r3, [r7, #4] - 800284c: 2240 movs r2, #64 @ 0x40 - 800284e: 2100 movs r1, #0 - 8002850: 5499 strb r1, [r3, r2] + 8002246: 687b ldr r3, [r7, #4] + 8002248: 2240 movs r2, #64 @ 0x40 + 800224a: 2100 movs r1, #0 + 800224c: 5499 strb r1, [r3, r2] HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 8002852: 230c movs r3, #12 - 8002854: 18fb adds r3, r7, r3 - 8002856: 881a ldrh r2, [r3, #0] - 8002858: 230f movs r3, #15 - 800285a: 18fb adds r3, r7, r3 - 800285c: 7819 ldrb r1, [r3, #0] - 800285e: 687b ldr r3, [r7, #4] - 8002860: 0018 movs r0, r3 - 8002862: f7ff fb20 bl 8001ea6 + 800224e: 230c movs r3, #12 + 8002250: 18fb adds r3, r7, r3 + 8002252: 881a ldrh r2, [r3, #0] + 8002254: 230f movs r3, #15 + 8002256: 18fb adds r3, r7, r3 + 8002258: 7819 ldrb r1, [r3, #0] + 800225a: 687b ldr r3, [r7, #4] + 800225c: 0018 movs r0, r3 + 800225e: f7ff fe40 bl 8001ee2 } - 8002866: e007 b.n 8002878 + 8002262: e007 b.n 8002274 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 8002868: 687b ldr r3, [r7, #4] - 800286a: 681b ldr r3, [r3, #0] - 800286c: 2208 movs r2, #8 - 800286e: 61da str r2, [r3, #28] + 8002264: 687b ldr r3, [r7, #4] + 8002266: 681b ldr r3, [r3, #0] + 8002268: 2208 movs r2, #8 + 800226a: 61da str r2, [r3, #28] __HAL_UNLOCK(hi2c); - 8002870: 687b ldr r3, [r7, #4] - 8002872: 2240 movs r2, #64 @ 0x40 - 8002874: 2100 movs r1, #0 - 8002876: 5499 strb r1, [r3, r2] + 800226c: 687b ldr r3, [r7, #4] + 800226e: 2240 movs r2, #64 @ 0x40 + 8002270: 2100 movs r1, #0 + 8002272: 5499 strb r1, [r3, r2] } - 8002878: 46c0 nop @ (mov r8, r8) - 800287a: 46bd mov sp, r7 - 800287c: b004 add sp, #16 - 800287e: bdb0 pop {r4, r5, r7, pc} + 8002274: 46c0 nop @ (mov r8, r8) + 8002276: 46bd mov sp, r7 + 8002278: b004 add sp, #16 + 800227a: bdb0 pop {r4, r5, r7, pc} -08002880 : - * @brief I2C Master sequential complete process. - * @param hi2c I2C handle. - * @retval None - */ -static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c) -{ - 8002880: b580 push {r7, lr} - 8002882: b082 sub sp, #8 - 8002884: af00 add r7, sp, #0 - 8002886: 6078 str r0, [r7, #4] - /* Reset I2C handle mode */ - hi2c->Mode = HAL_I2C_MODE_NONE; - 8002888: 687b ldr r3, [r7, #4] - 800288a: 2242 movs r2, #66 @ 0x42 - 800288c: 2100 movs r1, #0 - 800288e: 5499 strb r1, [r3, r2] - - /* No Generate Stop, to permit restart mode */ - /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ - if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - 8002890: 687b ldr r3, [r7, #4] - 8002892: 2241 movs r2, #65 @ 0x41 - 8002894: 5c9b ldrb r3, [r3, r2] - 8002896: b2db uxtb r3, r3 - 8002898: 2b21 cmp r3, #33 @ 0x21 - 800289a: d117 bne.n 80028cc - { - hi2c->State = HAL_I2C_STATE_READY; - 800289c: 687b ldr r3, [r7, #4] - 800289e: 2241 movs r2, #65 @ 0x41 - 80028a0: 2120 movs r1, #32 - 80028a2: 5499 strb r1, [r3, r2] - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; - 80028a4: 687b ldr r3, [r7, #4] - 80028a6: 2211 movs r2, #17 - 80028a8: 631a str r2, [r3, #48] @ 0x30 - hi2c->XferISR = NULL; - 80028aa: 687b ldr r3, [r7, #4] - 80028ac: 2200 movs r2, #0 - 80028ae: 635a str r2, [r3, #52] @ 0x34 - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - 80028b0: 687b ldr r3, [r7, #4] - 80028b2: 2101 movs r1, #1 - 80028b4: 0018 movs r0, r3 - 80028b6: f000 fd67 bl 8003388 - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 80028ba: 687b ldr r3, [r7, #4] - 80028bc: 2240 movs r2, #64 @ 0x40 - 80028be: 2100 movs r1, #0 - 80028c0: 5499 strb r1, [r3, r2] - - /* Call the corresponding callback to inform upper layer of End of Transfer */ -#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) - hi2c->MasterTxCpltCallback(hi2c); -#else - HAL_I2C_MasterTxCpltCallback(hi2c); - 80028c2: 687b ldr r3, [r7, #4] - 80028c4: 0018 movs r0, r3 - 80028c6: f7ff fad6 bl 8001e76 - hi2c->MasterRxCpltCallback(hi2c); -#else - HAL_I2C_MasterRxCpltCallback(hi2c); -#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ - } -} - 80028ca: e016 b.n 80028fa - hi2c->State = HAL_I2C_STATE_READY; - 80028cc: 687b ldr r3, [r7, #4] - 80028ce: 2241 movs r2, #65 @ 0x41 - 80028d0: 2120 movs r1, #32 - 80028d2: 5499 strb r1, [r3, r2] - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; - 80028d4: 687b ldr r3, [r7, #4] - 80028d6: 2212 movs r2, #18 - 80028d8: 631a str r2, [r3, #48] @ 0x30 - hi2c->XferISR = NULL; - 80028da: 687b ldr r3, [r7, #4] - 80028dc: 2200 movs r2, #0 - 80028de: 635a str r2, [r3, #52] @ 0x34 - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - 80028e0: 687b ldr r3, [r7, #4] - 80028e2: 2102 movs r1, #2 - 80028e4: 0018 movs r0, r3 - 80028e6: f000 fd4f bl 8003388 - __HAL_UNLOCK(hi2c); - 80028ea: 687b ldr r3, [r7, #4] - 80028ec: 2240 movs r2, #64 @ 0x40 - 80028ee: 2100 movs r1, #0 - 80028f0: 5499 strb r1, [r3, r2] - HAL_I2C_MasterRxCpltCallback(hi2c); - 80028f2: 687b ldr r3, [r7, #4] - 80028f4: 0018 movs r0, r3 - 80028f6: f7ff fac6 bl 8001e86 -} - 80028fa: 46c0 nop @ (mov r8, r8) - 80028fc: 46bd mov sp, r7 - 80028fe: b002 add sp, #8 - 8002900: bd80 pop {r7, pc} - ... - -08002904 : +0800227c : * @brief I2C Slave sequential complete process. * @param hi2c I2C handle. * @retval None */ static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) { - 8002904: b580 push {r7, lr} - 8002906: b084 sub sp, #16 - 8002908: af00 add r7, sp, #0 - 800290a: 6078 str r0, [r7, #4] + 800227c: b580 push {r7, lr} + 800227e: b084 sub sp, #16 + 8002280: af00 add r7, sp, #0 + 8002282: 6078 str r0, [r7, #4] uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); - 800290c: 687b ldr r3, [r7, #4] - 800290e: 681b ldr r3, [r3, #0] - 8002910: 681b ldr r3, [r3, #0] - 8002912: 60fb str r3, [r7, #12] + 8002284: 687b ldr r3, [r7, #4] + 8002286: 681b ldr r3, [r3, #0] + 8002288: 681b ldr r3, [r3, #0] + 800228a: 60fb str r3, [r7, #12] /* Reset I2C handle mode */ hi2c->Mode = HAL_I2C_MODE_NONE; - 8002914: 687b ldr r3, [r7, #4] - 8002916: 2242 movs r2, #66 @ 0x42 - 8002918: 2100 movs r1, #0 - 800291a: 5499 strb r1, [r3, r2] + 800228c: 687b ldr r3, [r7, #4] + 800228e: 2242 movs r2, #66 @ 0x42 + 8002290: 2100 movs r1, #0 + 8002292: 5499 strb r1, [r3, r2] /* If a DMA is ongoing, Update handle size context */ if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) - 800291c: 68fa ldr r2, [r7, #12] - 800291e: 2380 movs r3, #128 @ 0x80 - 8002920: 01db lsls r3, r3, #7 - 8002922: 4013 ands r3, r2 - 8002924: d008 beq.n 8002938 + 8002294: 68fa ldr r2, [r7, #12] + 8002296: 2380 movs r3, #128 @ 0x80 + 8002298: 01db lsls r3, r3, #7 + 800229a: 4013 ands r3, r2 + 800229c: d008 beq.n 80022b0 { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 8002926: 687b ldr r3, [r7, #4] - 8002928: 681b ldr r3, [r3, #0] - 800292a: 681a ldr r2, [r3, #0] - 800292c: 687b ldr r3, [r7, #4] - 800292e: 681b ldr r3, [r3, #0] - 8002930: 4924 ldr r1, [pc, #144] @ (80029c4 ) - 8002932: 400a ands r2, r1 - 8002934: 601a str r2, [r3, #0] - 8002936: e00c b.n 8002952 + 800229e: 687b ldr r3, [r7, #4] + 80022a0: 681b ldr r3, [r3, #0] + 80022a2: 681a ldr r2, [r3, #0] + 80022a4: 687b ldr r3, [r7, #4] + 80022a6: 681b ldr r3, [r3, #0] + 80022a8: 4924 ldr r1, [pc, #144] @ (800233c ) + 80022aa: 400a ands r2, r1 + 80022ac: 601a str r2, [r3, #0] + 80022ae: e00c b.n 80022ca } else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) - 8002938: 68fa ldr r2, [r7, #12] - 800293a: 2380 movs r3, #128 @ 0x80 - 800293c: 021b lsls r3, r3, #8 - 800293e: 4013 ands r3, r2 - 8002940: d007 beq.n 8002952 + 80022b0: 68fa ldr r2, [r7, #12] + 80022b2: 2380 movs r3, #128 @ 0x80 + 80022b4: 021b lsls r3, r3, #8 + 80022b6: 4013 ands r3, r2 + 80022b8: d007 beq.n 80022ca { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 8002942: 687b ldr r3, [r7, #4] - 8002944: 681b ldr r3, [r3, #0] - 8002946: 681a ldr r2, [r3, #0] - 8002948: 687b ldr r3, [r7, #4] - 800294a: 681b ldr r3, [r3, #0] - 800294c: 491e ldr r1, [pc, #120] @ (80029c8 ) - 800294e: 400a ands r2, r1 - 8002950: 601a str r2, [r3, #0] + 80022ba: 687b ldr r3, [r7, #4] + 80022bc: 681b ldr r3, [r3, #0] + 80022be: 681a ldr r2, [r3, #0] + 80022c0: 687b ldr r3, [r7, #4] + 80022c2: 681b ldr r3, [r3, #0] + 80022c4: 491e ldr r1, [pc, #120] @ (8002340 ) + 80022c6: 400a ands r2, r1 + 80022c8: 601a str r2, [r3, #0] else { /* Do nothing */ } if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - 8002952: 687b ldr r3, [r7, #4] - 8002954: 2241 movs r2, #65 @ 0x41 - 8002956: 5c9b ldrb r3, [r3, r2] - 8002958: b2db uxtb r3, r3 - 800295a: 2b29 cmp r3, #41 @ 0x29 - 800295c: d114 bne.n 8002988 + 80022ca: 687b ldr r3, [r7, #4] + 80022cc: 2241 movs r2, #65 @ 0x41 + 80022ce: 5c9b ldrb r3, [r3, r2] + 80022d0: b2db uxtb r3, r3 + 80022d2: 2b29 cmp r3, #41 @ 0x29 + 80022d4: d114 bne.n 8002300 { /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ hi2c->State = HAL_I2C_STATE_LISTEN; - 800295e: 687b ldr r3, [r7, #4] - 8002960: 2241 movs r2, #65 @ 0x41 - 8002962: 2128 movs r1, #40 @ 0x28 - 8002964: 5499 strb r1, [r3, r2] + 80022d6: 687b ldr r3, [r7, #4] + 80022d8: 2241 movs r2, #65 @ 0x41 + 80022da: 2128 movs r1, #40 @ 0x28 + 80022dc: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - 8002966: 687b ldr r3, [r7, #4] - 8002968: 2221 movs r2, #33 @ 0x21 - 800296a: 631a str r2, [r3, #48] @ 0x30 + 80022de: 687b ldr r3, [r7, #4] + 80022e0: 2221 movs r2, #33 @ 0x21 + 80022e2: 631a str r2, [r3, #48] @ 0x30 /* Disable Interrupts */ I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - 800296c: 687b ldr r3, [r7, #4] - 800296e: 2101 movs r1, #1 - 8002970: 0018 movs r0, r3 - 8002972: f000 fd09 bl 8003388 + 80022e4: 687b ldr r3, [r7, #4] + 80022e6: 2101 movs r1, #1 + 80022e8: 0018 movs r0, r3 + 80022ea: f000 fb77 bl 80029dc /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8002976: 687b ldr r3, [r7, #4] - 8002978: 2240 movs r2, #64 @ 0x40 - 800297a: 2100 movs r1, #0 - 800297c: 5499 strb r1, [r3, r2] + 80022ee: 687b ldr r3, [r7, #4] + 80022f0: 2240 movs r2, #64 @ 0x40 + 80022f2: 2100 movs r1, #0 + 80022f4: 5499 strb r1, [r3, r2] /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->SlaveTxCpltCallback(hi2c); #else HAL_I2C_SlaveTxCpltCallback(hi2c); - 800297e: 687b ldr r3, [r7, #4] - 8002980: 0018 movs r0, r3 - 8002982: f7ff fa88 bl 8001e96 + 80022f6: 687b ldr r3, [r7, #4] + 80022f8: 0018 movs r0, r3 + 80022fa: f7ff fdea bl 8001ed2 } else { /* Nothing to do */ } } - 8002986: e019 b.n 80029bc + 80022fe: e019 b.n 8002334 else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) - 8002988: 687b ldr r3, [r7, #4] - 800298a: 2241 movs r2, #65 @ 0x41 - 800298c: 5c9b ldrb r3, [r3, r2] - 800298e: b2db uxtb r3, r3 - 8002990: 2b2a cmp r3, #42 @ 0x2a - 8002992: d113 bne.n 80029bc + 8002300: 687b ldr r3, [r7, #4] + 8002302: 2241 movs r2, #65 @ 0x41 + 8002304: 5c9b ldrb r3, [r3, r2] + 8002306: b2db uxtb r3, r3 + 8002308: 2b2a cmp r3, #42 @ 0x2a + 800230a: d113 bne.n 8002334 hi2c->State = HAL_I2C_STATE_LISTEN; - 8002994: 687b ldr r3, [r7, #4] - 8002996: 2241 movs r2, #65 @ 0x41 - 8002998: 2128 movs r1, #40 @ 0x28 - 800299a: 5499 strb r1, [r3, r2] + 800230c: 687b ldr r3, [r7, #4] + 800230e: 2241 movs r2, #65 @ 0x41 + 8002310: 2128 movs r1, #40 @ 0x28 + 8002312: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - 800299c: 687b ldr r3, [r7, #4] - 800299e: 2222 movs r2, #34 @ 0x22 - 80029a0: 631a str r2, [r3, #48] @ 0x30 + 8002314: 687b ldr r3, [r7, #4] + 8002316: 2222 movs r2, #34 @ 0x22 + 8002318: 631a str r2, [r3, #48] @ 0x30 I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - 80029a2: 687b ldr r3, [r7, #4] - 80029a4: 2102 movs r1, #2 - 80029a6: 0018 movs r0, r3 - 80029a8: f000 fcee bl 8003388 + 800231a: 687b ldr r3, [r7, #4] + 800231c: 2102 movs r1, #2 + 800231e: 0018 movs r0, r3 + 8002320: f000 fb5c bl 80029dc __HAL_UNLOCK(hi2c); - 80029ac: 687b ldr r3, [r7, #4] - 80029ae: 2240 movs r2, #64 @ 0x40 - 80029b0: 2100 movs r1, #0 - 80029b2: 5499 strb r1, [r3, r2] + 8002324: 687b ldr r3, [r7, #4] + 8002326: 2240 movs r2, #64 @ 0x40 + 8002328: 2100 movs r1, #0 + 800232a: 5499 strb r1, [r3, r2] HAL_I2C_SlaveRxCpltCallback(hi2c); - 80029b4: 687b ldr r3, [r7, #4] - 80029b6: 0018 movs r0, r3 - 80029b8: f7fd ffe0 bl 800097c + 800232c: 687b ldr r3, [r7, #4] + 800232e: 0018 movs r0, r3 + 8002330: f7fe fe90 bl 8001054 } - 80029bc: 46c0 nop @ (mov r8, r8) - 80029be: 46bd mov sp, r7 - 80029c0: b004 add sp, #16 - 80029c2: bd80 pop {r7, pc} - 80029c4: ffffbfff .word 0xffffbfff - 80029c8: ffff7fff .word 0xffff7fff + 8002334: 46c0 nop @ (mov r8, r8) + 8002336: 46bd mov sp, r7 + 8002338: b004 add sp, #16 + 800233a: bd80 pop {r7, pc} + 800233c: ffffbfff .word 0xffffbfff + 8002340: ffff7fff .word 0xffff7fff -080029cc : - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - 80029cc: b580 push {r7, lr} - 80029ce: b086 sub sp, #24 - 80029d0: af00 add r7, sp, #0 - 80029d2: 6078 str r0, [r7, #4] - 80029d4: 6039 str r1, [r7, #0] - uint32_t tmperror; - uint32_t tmpITFlags = ITFlags; - 80029d6: 683b ldr r3, [r7, #0] - 80029d8: 617b str r3, [r7, #20] - __IO uint32_t tmpreg; - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 80029da: 687b ldr r3, [r7, #4] - 80029dc: 681b ldr r3, [r3, #0] - 80029de: 2220 movs r2, #32 - 80029e0: 61da str r2, [r3, #28] - - /* Disable Interrupts and Store Previous state */ - if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - 80029e2: 687b ldr r3, [r7, #4] - 80029e4: 2241 movs r2, #65 @ 0x41 - 80029e6: 5c9b ldrb r3, [r3, r2] - 80029e8: b2db uxtb r3, r3 - 80029ea: 2b21 cmp r3, #33 @ 0x21 - 80029ec: d108 bne.n 8002a00 - { - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - 80029ee: 687b ldr r3, [r7, #4] - 80029f0: 2101 movs r1, #1 - 80029f2: 0018 movs r0, r3 - 80029f4: f000 fcc8 bl 8003388 - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; - 80029f8: 687b ldr r3, [r7, #4] - 80029fa: 2211 movs r2, #17 - 80029fc: 631a str r2, [r3, #48] @ 0x30 - 80029fe: e00d b.n 8002a1c - } - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 8002a00: 687b ldr r3, [r7, #4] - 8002a02: 2241 movs r2, #65 @ 0x41 - 8002a04: 5c9b ldrb r3, [r3, r2] - 8002a06: b2db uxtb r3, r3 - 8002a08: 2b22 cmp r3, #34 @ 0x22 - 8002a0a: d107 bne.n 8002a1c - { - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - 8002a0c: 687b ldr r3, [r7, #4] - 8002a0e: 2102 movs r1, #2 - 8002a10: 0018 movs r0, r3 - 8002a12: f000 fcb9 bl 8003388 - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; - 8002a16: 687b ldr r3, [r7, #4] - 8002a18: 2212 movs r2, #18 - 8002a1a: 631a str r2, [r3, #48] @ 0x30 - { - /* Do nothing */ - } - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - 8002a1c: 687b ldr r3, [r7, #4] - 8002a1e: 681b ldr r3, [r3, #0] - 8002a20: 685a ldr r2, [r3, #4] - 8002a22: 687b ldr r3, [r7, #4] - 8002a24: 681b ldr r3, [r3, #0] - 8002a26: 494e ldr r1, [pc, #312] @ (8002b60 ) - 8002a28: 400a ands r2, r1 - 8002a2a: 605a str r2, [r3, #4] - - /* Reset handle parameters */ - hi2c->XferISR = NULL; - 8002a2c: 687b ldr r3, [r7, #4] - 8002a2e: 2200 movs r2, #0 - 8002a30: 635a str r2, [r3, #52] @ 0x34 - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8002a32: 687b ldr r3, [r7, #4] - 8002a34: 4a4b ldr r2, [pc, #300] @ (8002b64 ) - 8002a36: 62da str r2, [r3, #44] @ 0x2c - - if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) - 8002a38: 697b ldr r3, [r7, #20] - 8002a3a: 2210 movs r2, #16 - 8002a3c: 4013 ands r3, r2 - 8002a3e: d009 beq.n 8002a54 - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002a40: 687b ldr r3, [r7, #4] - 8002a42: 681b ldr r3, [r3, #0] - 8002a44: 2210 movs r2, #16 - 8002a46: 61da str r2, [r3, #28] - - /* Set acknowledge error code */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8002a48: 687b ldr r3, [r7, #4] - 8002a4a: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002a4c: 2204 movs r2, #4 - 8002a4e: 431a orrs r2, r3 - 8002a50: 687b ldr r3, [r7, #4] - 8002a52: 645a str r2, [r3, #68] @ 0x44 - } - - /* Fetch Last receive data if any */ - if ((hi2c->State == HAL_I2C_STATE_ABORT) && (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET)) - 8002a54: 687b ldr r3, [r7, #4] - 8002a56: 2241 movs r2, #65 @ 0x41 - 8002a58: 5c9b ldrb r3, [r3, r2] - 8002a5a: b2db uxtb r3, r3 - 8002a5c: 2b60 cmp r3, #96 @ 0x60 - 8002a5e: d109 bne.n 8002a74 - 8002a60: 697b ldr r3, [r7, #20] - 8002a62: 2204 movs r2, #4 - 8002a64: 4013 ands r3, r2 - 8002a66: d005 beq.n 8002a74 - { - /* Read data from RXDR */ - tmpreg = (uint8_t)hi2c->Instance->RXDR; - 8002a68: 687b ldr r3, [r7, #4] - 8002a6a: 681b ldr r3, [r3, #0] - 8002a6c: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002a6e: b2db uxtb r3, r3 - 8002a70: 60fb str r3, [r7, #12] - UNUSED(tmpreg); - 8002a72: 68fb ldr r3, [r7, #12] - } - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - 8002a74: 687b ldr r3, [r7, #4] - 8002a76: 0018 movs r0, r3 - 8002a78: f000 fb81 bl 800317e - - /* Store current volatile hi2c->ErrorCode, misra rule */ - tmperror = hi2c->ErrorCode; - 8002a7c: 687b ldr r3, [r7, #4] - 8002a7e: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002a80: 613b str r3, [r7, #16] - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE)) - 8002a82: 687b ldr r3, [r7, #4] - 8002a84: 2241 movs r2, #65 @ 0x41 - 8002a86: 5c9b ldrb r3, [r3, r2] - 8002a88: b2db uxtb r3, r3 - 8002a8a: 2b60 cmp r3, #96 @ 0x60 - 8002a8c: d002 beq.n 8002a94 - 8002a8e: 693b ldr r3, [r7, #16] - 8002a90: 2b00 cmp r3, #0 - 8002a92: d007 beq.n 8002aa4 - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, hi2c->ErrorCode); - 8002a94: 687b ldr r3, [r7, #4] - 8002a96: 6c5a ldr r2, [r3, #68] @ 0x44 - 8002a98: 687b ldr r3, [r7, #4] - 8002a9a: 0011 movs r1, r2 - 8002a9c: 0018 movs r0, r3 - 8002a9e: f000 fa43 bl 8002f28 - } - else - { - /* Nothing to do */ - } -} - 8002aa2: e058 b.n 8002b56 - else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - 8002aa4: 687b ldr r3, [r7, #4] - 8002aa6: 2241 movs r2, #65 @ 0x41 - 8002aa8: 5c9b ldrb r3, [r3, r2] - 8002aaa: b2db uxtb r3, r3 - 8002aac: 2b21 cmp r3, #33 @ 0x21 - 8002aae: d126 bne.n 8002afe - hi2c->State = HAL_I2C_STATE_READY; - 8002ab0: 687b ldr r3, [r7, #4] - 8002ab2: 2241 movs r2, #65 @ 0x41 - 8002ab4: 2120 movs r1, #32 - 8002ab6: 5499 strb r1, [r3, r2] - hi2c->PreviousState = I2C_STATE_NONE; - 8002ab8: 687b ldr r3, [r7, #4] - 8002aba: 2200 movs r2, #0 - 8002abc: 631a str r2, [r3, #48] @ 0x30 - if (hi2c->Mode == HAL_I2C_MODE_MEM) - 8002abe: 687b ldr r3, [r7, #4] - 8002ac0: 2242 movs r2, #66 @ 0x42 - 8002ac2: 5c9b ldrb r3, [r3, r2] - 8002ac4: b2db uxtb r3, r3 - 8002ac6: 2b40 cmp r3, #64 @ 0x40 - 8002ac8: d10c bne.n 8002ae4 - hi2c->Mode = HAL_I2C_MODE_NONE; - 8002aca: 687b ldr r3, [r7, #4] - 8002acc: 2242 movs r2, #66 @ 0x42 - 8002ace: 2100 movs r1, #0 - 8002ad0: 5499 strb r1, [r3, r2] - __HAL_UNLOCK(hi2c); - 8002ad2: 687b ldr r3, [r7, #4] - 8002ad4: 2240 movs r2, #64 @ 0x40 - 8002ad6: 2100 movs r1, #0 - 8002ad8: 5499 strb r1, [r3, r2] - HAL_I2C_MemTxCpltCallback(hi2c); - 8002ada: 687b ldr r3, [r7, #4] - 8002adc: 0018 movs r0, r3 - 8002ade: f7ff f9fa bl 8001ed6 -} - 8002ae2: e038 b.n 8002b56 - hi2c->Mode = HAL_I2C_MODE_NONE; - 8002ae4: 687b ldr r3, [r7, #4] - 8002ae6: 2242 movs r2, #66 @ 0x42 - 8002ae8: 2100 movs r1, #0 - 8002aea: 5499 strb r1, [r3, r2] - __HAL_UNLOCK(hi2c); - 8002aec: 687b ldr r3, [r7, #4] - 8002aee: 2240 movs r2, #64 @ 0x40 - 8002af0: 2100 movs r1, #0 - 8002af2: 5499 strb r1, [r3, r2] - HAL_I2C_MasterTxCpltCallback(hi2c); - 8002af4: 687b ldr r3, [r7, #4] - 8002af6: 0018 movs r0, r3 - 8002af8: f7ff f9bd bl 8001e76 -} - 8002afc: e02b b.n 8002b56 - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 8002afe: 687b ldr r3, [r7, #4] - 8002b00: 2241 movs r2, #65 @ 0x41 - 8002b02: 5c9b ldrb r3, [r3, r2] - 8002b04: b2db uxtb r3, r3 - 8002b06: 2b22 cmp r3, #34 @ 0x22 - 8002b08: d125 bne.n 8002b56 - hi2c->State = HAL_I2C_STATE_READY; - 8002b0a: 687b ldr r3, [r7, #4] - 8002b0c: 2241 movs r2, #65 @ 0x41 - 8002b0e: 2120 movs r1, #32 - 8002b10: 5499 strb r1, [r3, r2] - hi2c->PreviousState = I2C_STATE_NONE; - 8002b12: 687b ldr r3, [r7, #4] - 8002b14: 2200 movs r2, #0 - 8002b16: 631a str r2, [r3, #48] @ 0x30 - if (hi2c->Mode == HAL_I2C_MODE_MEM) - 8002b18: 687b ldr r3, [r7, #4] - 8002b1a: 2242 movs r2, #66 @ 0x42 - 8002b1c: 5c9b ldrb r3, [r3, r2] - 8002b1e: b2db uxtb r3, r3 - 8002b20: 2b40 cmp r3, #64 @ 0x40 - 8002b22: d10c bne.n 8002b3e - hi2c->Mode = HAL_I2C_MODE_NONE; - 8002b24: 687b ldr r3, [r7, #4] - 8002b26: 2242 movs r2, #66 @ 0x42 - 8002b28: 2100 movs r1, #0 - 8002b2a: 5499 strb r1, [r3, r2] - __HAL_UNLOCK(hi2c); - 8002b2c: 687b ldr r3, [r7, #4] - 8002b2e: 2240 movs r2, #64 @ 0x40 - 8002b30: 2100 movs r1, #0 - 8002b32: 5499 strb r1, [r3, r2] - HAL_I2C_MemRxCpltCallback(hi2c); - 8002b34: 687b ldr r3, [r7, #4] - 8002b36: 0018 movs r0, r3 - 8002b38: f7ff f9d5 bl 8001ee6 -} - 8002b3c: e00b b.n 8002b56 - hi2c->Mode = HAL_I2C_MODE_NONE; - 8002b3e: 687b ldr r3, [r7, #4] - 8002b40: 2242 movs r2, #66 @ 0x42 - 8002b42: 2100 movs r1, #0 - 8002b44: 5499 strb r1, [r3, r2] - __HAL_UNLOCK(hi2c); - 8002b46: 687b ldr r3, [r7, #4] - 8002b48: 2240 movs r2, #64 @ 0x40 - 8002b4a: 2100 movs r1, #0 - 8002b4c: 5499 strb r1, [r3, r2] - HAL_I2C_MasterRxCpltCallback(hi2c); - 8002b4e: 687b ldr r3, [r7, #4] - 8002b50: 0018 movs r0, r3 - 8002b52: f7ff f998 bl 8001e86 -} - 8002b56: 46c0 nop @ (mov r8, r8) - 8002b58: 46bd mov sp, r7 - 8002b5a: b006 add sp, #24 - 8002b5c: bd80 pop {r7, pc} - 8002b5e: 46c0 nop @ (mov r8, r8) - 8002b60: fe00e800 .word 0xfe00e800 - 8002b64: ffff0000 .word 0xffff0000 - -08002b68 : +08002344 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 8002b68: b580 push {r7, lr} - 8002b6a: b086 sub sp, #24 - 8002b6c: af00 add r7, sp, #0 - 8002b6e: 6078 str r0, [r7, #4] - 8002b70: 6039 str r1, [r7, #0] + 8002344: b580 push {r7, lr} + 8002346: b086 sub sp, #24 + 8002348: af00 add r7, sp, #0 + 800234a: 6078 str r0, [r7, #4] + 800234c: 6039 str r1, [r7, #0] uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); - 8002b72: 687b ldr r3, [r7, #4] - 8002b74: 681b ldr r3, [r3, #0] - 8002b76: 681b ldr r3, [r3, #0] - 8002b78: 613b str r3, [r7, #16] + 800234e: 687b ldr r3, [r7, #4] + 8002350: 681b ldr r3, [r3, #0] + 8002352: 681b ldr r3, [r3, #0] + 8002354: 613b str r3, [r7, #16] uint32_t tmpITFlags = ITFlags; - 8002b7a: 683b ldr r3, [r7, #0] - 8002b7c: 617b str r3, [r7, #20] + 8002356: 683b ldr r3, [r7, #0] + 8002358: 617b str r3, [r7, #20] uint32_t tmpoptions = hi2c->XferOptions; - 8002b7e: 687b ldr r3, [r7, #4] - 8002b80: 6adb ldr r3, [r3, #44] @ 0x2c - 8002b82: 60fb str r3, [r7, #12] + 800235a: 687b ldr r3, [r7, #4] + 800235c: 6adb ldr r3, [r3, #44] @ 0x2c + 800235e: 60fb str r3, [r7, #12] HAL_I2C_StateTypeDef tmpstate = hi2c->State; - 8002b84: 200b movs r0, #11 - 8002b86: 183b adds r3, r7, r0 - 8002b88: 687a ldr r2, [r7, #4] - 8002b8a: 2141 movs r1, #65 @ 0x41 - 8002b8c: 5c52 ldrb r2, [r2, r1] - 8002b8e: 701a strb r2, [r3, #0] + 8002360: 200b movs r0, #11 + 8002362: 183b adds r3, r7, r0 + 8002364: 687a ldr r2, [r7, #4] + 8002366: 2141 movs r1, #65 @ 0x41 + 8002368: 5c52 ldrb r2, [r2, r1] + 800236a: 701a strb r2, [r3, #0] /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 8002b90: 687b ldr r3, [r7, #4] - 8002b92: 681b ldr r3, [r3, #0] - 8002b94: 2220 movs r2, #32 - 8002b96: 61da str r2, [r3, #28] + 800236c: 687b ldr r3, [r7, #4] + 800236e: 681b ldr r3, [r3, #0] + 8002370: 2220 movs r2, #32 + 8002372: 61da str r2, [r3, #28] /* Disable Interrupts and Store Previous state */ if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) - 8002b98: 183b adds r3, r7, r0 - 8002b9a: 781b ldrb r3, [r3, #0] - 8002b9c: 2b21 cmp r3, #33 @ 0x21 - 8002b9e: d003 beq.n 8002ba8 - 8002ba0: 183b adds r3, r7, r0 - 8002ba2: 781b ldrb r3, [r3, #0] - 8002ba4: 2b29 cmp r3, #41 @ 0x29 - 8002ba6: d109 bne.n 8002bbc + 8002374: 183b adds r3, r7, r0 + 8002376: 781b ldrb r3, [r3, #0] + 8002378: 2b21 cmp r3, #33 @ 0x21 + 800237a: d003 beq.n 8002384 + 800237c: 183b adds r3, r7, r0 + 800237e: 781b ldrb r3, [r3, #0] + 8002380: 2b29 cmp r3, #41 @ 0x29 + 8002382: d109 bne.n 8002398 { I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); - 8002ba8: 4aac ldr r2, [pc, #688] @ (8002e5c ) - 8002baa: 687b ldr r3, [r7, #4] - 8002bac: 0011 movs r1, r2 - 8002bae: 0018 movs r0, r3 - 8002bb0: f000 fbea bl 8003388 + 8002384: 4aac ldr r2, [pc, #688] @ (8002638 ) + 8002386: 687b ldr r3, [r7, #4] + 8002388: 0011 movs r1, r2 + 800238a: 0018 movs r0, r3 + 800238c: f000 fb26 bl 80029dc hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - 8002bb4: 687b ldr r3, [r7, #4] - 8002bb6: 2221 movs r2, #33 @ 0x21 - 8002bb8: 631a str r2, [r3, #48] @ 0x30 - 8002bba: e020 b.n 8002bfe + 8002390: 687b ldr r3, [r7, #4] + 8002392: 2221 movs r2, #33 @ 0x21 + 8002394: 631a str r2, [r3, #48] @ 0x30 + 8002396: e020 b.n 80023da } else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) - 8002bbc: 220b movs r2, #11 - 8002bbe: 18bb adds r3, r7, r2 - 8002bc0: 781b ldrb r3, [r3, #0] - 8002bc2: 2b22 cmp r3, #34 @ 0x22 - 8002bc4: d003 beq.n 8002bce - 8002bc6: 18bb adds r3, r7, r2 - 8002bc8: 781b ldrb r3, [r3, #0] - 8002bca: 2b2a cmp r3, #42 @ 0x2a - 8002bcc: d109 bne.n 8002be2 + 8002398: 220b movs r2, #11 + 800239a: 18bb adds r3, r7, r2 + 800239c: 781b ldrb r3, [r3, #0] + 800239e: 2b22 cmp r3, #34 @ 0x22 + 80023a0: d003 beq.n 80023aa + 80023a2: 18bb adds r3, r7, r2 + 80023a4: 781b ldrb r3, [r3, #0] + 80023a6: 2b2a cmp r3, #42 @ 0x2a + 80023a8: d109 bne.n 80023be { I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); - 8002bce: 4aa4 ldr r2, [pc, #656] @ (8002e60 ) - 8002bd0: 687b ldr r3, [r7, #4] - 8002bd2: 0011 movs r1, r2 - 8002bd4: 0018 movs r0, r3 - 8002bd6: f000 fbd7 bl 8003388 + 80023aa: 4aa4 ldr r2, [pc, #656] @ (800263c ) + 80023ac: 687b ldr r3, [r7, #4] + 80023ae: 0011 movs r1, r2 + 80023b0: 0018 movs r0, r3 + 80023b2: f000 fb13 bl 80029dc hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - 8002bda: 687b ldr r3, [r7, #4] - 8002bdc: 2222 movs r2, #34 @ 0x22 - 8002bde: 631a str r2, [r3, #48] @ 0x30 - 8002be0: e00d b.n 8002bfe + 80023b6: 687b ldr r3, [r7, #4] + 80023b8: 2222 movs r2, #34 @ 0x22 + 80023ba: 631a str r2, [r3, #48] @ 0x30 + 80023bc: e00d b.n 80023da } else if (tmpstate == HAL_I2C_STATE_LISTEN) - 8002be2: 230b movs r3, #11 - 8002be4: 18fb adds r3, r7, r3 - 8002be6: 781b ldrb r3, [r3, #0] - 8002be8: 2b28 cmp r3, #40 @ 0x28 - 8002bea: d108 bne.n 8002bfe + 80023be: 230b movs r3, #11 + 80023c0: 18fb adds r3, r7, r3 + 80023c2: 781b ldrb r3, [r3, #0] + 80023c4: 2b28 cmp r3, #40 @ 0x28 + 80023c6: d108 bne.n 80023da { I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); - 8002bec: 4a9d ldr r2, [pc, #628] @ (8002e64 ) - 8002bee: 687b ldr r3, [r7, #4] - 8002bf0: 0011 movs r1, r2 - 8002bf2: 0018 movs r0, r3 - 8002bf4: f000 fbc8 bl 8003388 + 80023c8: 4a9d ldr r2, [pc, #628] @ (8002640 ) + 80023ca: 687b ldr r3, [r7, #4] + 80023cc: 0011 movs r1, r2 + 80023ce: 0018 movs r0, r3 + 80023d0: f000 fb04 bl 80029dc hi2c->PreviousState = I2C_STATE_NONE; - 8002bf8: 687b ldr r3, [r7, #4] - 8002bfa: 2200 movs r2, #0 - 8002bfc: 631a str r2, [r3, #48] @ 0x30 + 80023d4: 687b ldr r3, [r7, #4] + 80023d6: 2200 movs r2, #0 + 80023d8: 631a str r2, [r3, #48] @ 0x30 { /* Do nothing */ } /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; - 8002bfe: 687b ldr r3, [r7, #4] - 8002c00: 681b ldr r3, [r3, #0] - 8002c02: 685a ldr r2, [r3, #4] - 8002c04: 687b ldr r3, [r7, #4] - 8002c06: 681b ldr r3, [r3, #0] - 8002c08: 2180 movs r1, #128 @ 0x80 - 8002c0a: 0209 lsls r1, r1, #8 - 8002c0c: 430a orrs r2, r1 - 8002c0e: 605a str r2, [r3, #4] + 80023da: 687b ldr r3, [r7, #4] + 80023dc: 681b ldr r3, [r3, #0] + 80023de: 685a ldr r2, [r3, #4] + 80023e0: 687b ldr r3, [r7, #4] + 80023e2: 681b ldr r3, [r3, #0] + 80023e4: 2180 movs r1, #128 @ 0x80 + 80023e6: 0209 lsls r1, r1, #8 + 80023e8: 430a orrs r2, r1 + 80023ea: 605a str r2, [r3, #4] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); - 8002c10: 687b ldr r3, [r7, #4] - 8002c12: 681b ldr r3, [r3, #0] - 8002c14: 685a ldr r2, [r3, #4] - 8002c16: 687b ldr r3, [r7, #4] - 8002c18: 681b ldr r3, [r3, #0] - 8002c1a: 4993 ldr r1, [pc, #588] @ (8002e68 ) - 8002c1c: 400a ands r2, r1 - 8002c1e: 605a str r2, [r3, #4] + 80023ec: 687b ldr r3, [r7, #4] + 80023ee: 681b ldr r3, [r3, #0] + 80023f0: 685a ldr r2, [r3, #4] + 80023f2: 687b ldr r3, [r7, #4] + 80023f4: 681b ldr r3, [r3, #0] + 80023f6: 4993 ldr r1, [pc, #588] @ (8002644 ) + 80023f8: 400a ands r2, r1 + 80023fa: 605a str r2, [r3, #4] /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 8002c20: 687b ldr r3, [r7, #4] - 8002c22: 0018 movs r0, r3 - 8002c24: f000 faab bl 800317e + 80023fc: 687b ldr r3, [r7, #4] + 80023fe: 0018 movs r0, r3 + 8002400: f000 faab bl 800295a /* If a DMA is ongoing, Update handle size context */ if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) - 8002c28: 693a ldr r2, [r7, #16] - 8002c2a: 2380 movs r3, #128 @ 0x80 - 8002c2c: 01db lsls r3, r3, #7 - 8002c2e: 4013 ands r3, r2 - 8002c30: d013 beq.n 8002c5a + 8002404: 693a ldr r2, [r7, #16] + 8002406: 2380 movs r3, #128 @ 0x80 + 8002408: 01db lsls r3, r3, #7 + 800240a: 4013 ands r3, r2 + 800240c: d013 beq.n 8002436 { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 8002c32: 687b ldr r3, [r7, #4] - 8002c34: 681b ldr r3, [r3, #0] - 8002c36: 681a ldr r2, [r3, #0] - 8002c38: 687b ldr r3, [r7, #4] - 8002c3a: 681b ldr r3, [r3, #0] - 8002c3c: 498b ldr r1, [pc, #556] @ (8002e6c ) - 8002c3e: 400a ands r2, r1 - 8002c40: 601a str r2, [r3, #0] + 800240e: 687b ldr r3, [r7, #4] + 8002410: 681b ldr r3, [r3, #0] + 8002412: 681a ldr r2, [r3, #0] + 8002414: 687b ldr r3, [r7, #4] + 8002416: 681b ldr r3, [r3, #0] + 8002418: 498b ldr r1, [pc, #556] @ (8002648 ) + 800241a: 400a ands r2, r1 + 800241c: 601a str r2, [r3, #0] if (hi2c->hdmatx != NULL) - 8002c42: 687b ldr r3, [r7, #4] - 8002c44: 6b9b ldr r3, [r3, #56] @ 0x38 - 8002c46: 2b00 cmp r3, #0 - 8002c48: d01f beq.n 8002c8a + 800241e: 687b ldr r3, [r7, #4] + 8002420: 6b9b ldr r3, [r3, #56] @ 0x38 + 8002422: 2b00 cmp r3, #0 + 8002424: d01f beq.n 8002466 { hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); - 8002c4a: 687b ldr r3, [r7, #4] - 8002c4c: 6b9b ldr r3, [r3, #56] @ 0x38 - 8002c4e: 681b ldr r3, [r3, #0] - 8002c50: 685b ldr r3, [r3, #4] - 8002c52: b29a uxth r2, r3 - 8002c54: 687b ldr r3, [r7, #4] - 8002c56: 855a strh r2, [r3, #42] @ 0x2a - 8002c58: e017 b.n 8002c8a + 8002426: 687b ldr r3, [r7, #4] + 8002428: 6b9b ldr r3, [r3, #56] @ 0x38 + 800242a: 681b ldr r3, [r3, #0] + 800242c: 685b ldr r3, [r3, #4] + 800242e: b29a uxth r2, r3 + 8002430: 687b ldr r3, [r7, #4] + 8002432: 855a strh r2, [r3, #42] @ 0x2a + 8002434: e017 b.n 8002466 } } else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) - 8002c5a: 693a ldr r2, [r7, #16] - 8002c5c: 2380 movs r3, #128 @ 0x80 - 8002c5e: 021b lsls r3, r3, #8 - 8002c60: 4013 ands r3, r2 - 8002c62: d012 beq.n 8002c8a + 8002436: 693a ldr r2, [r7, #16] + 8002438: 2380 movs r3, #128 @ 0x80 + 800243a: 021b lsls r3, r3, #8 + 800243c: 4013 ands r3, r2 + 800243e: d012 beq.n 8002466 { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 8002c64: 687b ldr r3, [r7, #4] - 8002c66: 681b ldr r3, [r3, #0] - 8002c68: 681a ldr r2, [r3, #0] - 8002c6a: 687b ldr r3, [r7, #4] - 8002c6c: 681b ldr r3, [r3, #0] - 8002c6e: 4980 ldr r1, [pc, #512] @ (8002e70 ) - 8002c70: 400a ands r2, r1 - 8002c72: 601a str r2, [r3, #0] + 8002440: 687b ldr r3, [r7, #4] + 8002442: 681b ldr r3, [r3, #0] + 8002444: 681a ldr r2, [r3, #0] + 8002446: 687b ldr r3, [r7, #4] + 8002448: 681b ldr r3, [r3, #0] + 800244a: 4980 ldr r1, [pc, #512] @ (800264c ) + 800244c: 400a ands r2, r1 + 800244e: 601a str r2, [r3, #0] if (hi2c->hdmarx != NULL) - 8002c74: 687b ldr r3, [r7, #4] - 8002c76: 6bdb ldr r3, [r3, #60] @ 0x3c - 8002c78: 2b00 cmp r3, #0 - 8002c7a: d006 beq.n 8002c8a + 8002450: 687b ldr r3, [r7, #4] + 8002452: 6bdb ldr r3, [r3, #60] @ 0x3c + 8002454: 2b00 cmp r3, #0 + 8002456: d006 beq.n 8002466 { hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); - 8002c7c: 687b ldr r3, [r7, #4] - 8002c7e: 6bdb ldr r3, [r3, #60] @ 0x3c - 8002c80: 681b ldr r3, [r3, #0] - 8002c82: 685b ldr r3, [r3, #4] - 8002c84: b29a uxth r2, r3 - 8002c86: 687b ldr r3, [r7, #4] - 8002c88: 855a strh r2, [r3, #42] @ 0x2a + 8002458: 687b ldr r3, [r7, #4] + 800245a: 6bdb ldr r3, [r3, #60] @ 0x3c + 800245c: 681b ldr r3, [r3, #0] + 800245e: 685b ldr r3, [r3, #4] + 8002460: b29a uxth r2, r3 + 8002462: 687b ldr r3, [r7, #4] + 8002464: 855a strh r2, [r3, #42] @ 0x2a { /* Do nothing */ } /* Store Last receive data if any */ if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) - 8002c8a: 697b ldr r3, [r7, #20] - 8002c8c: 2204 movs r2, #4 - 8002c8e: 4013 ands r3, r2 - 8002c90: d020 beq.n 8002cd4 + 8002466: 697b ldr r3, [r7, #20] + 8002468: 2204 movs r2, #4 + 800246a: 4013 ands r3, r2 + 800246c: d020 beq.n 80024b0 { /* Remove RXNE flag on temporary variable as read done */ tmpITFlags &= ~I2C_FLAG_RXNE; - 8002c92: 697b ldr r3, [r7, #20] - 8002c94: 2204 movs r2, #4 - 8002c96: 4393 bics r3, r2 - 8002c98: 617b str r3, [r7, #20] + 800246e: 697b ldr r3, [r7, #20] + 8002470: 2204 movs r2, #4 + 8002472: 4393 bics r3, r2 + 8002474: 617b str r3, [r7, #20] /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 8002c9a: 687b ldr r3, [r7, #4] - 8002c9c: 681b ldr r3, [r3, #0] - 8002c9e: 6a5a ldr r2, [r3, #36] @ 0x24 - 8002ca0: 687b ldr r3, [r7, #4] - 8002ca2: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002ca4: b2d2 uxtb r2, r2 - 8002ca6: 701a strb r2, [r3, #0] + 8002476: 687b ldr r3, [r7, #4] + 8002478: 681b ldr r3, [r3, #0] + 800247a: 6a5a ldr r2, [r3, #36] @ 0x24 + 800247c: 687b ldr r3, [r7, #4] + 800247e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002480: b2d2 uxtb r2, r2 + 8002482: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8002ca8: 687b ldr r3, [r7, #4] - 8002caa: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002cac: 1c5a adds r2, r3, #1 - 8002cae: 687b ldr r3, [r7, #4] - 8002cb0: 625a str r2, [r3, #36] @ 0x24 + 8002484: 687b ldr r3, [r7, #4] + 8002486: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002488: 1c5a adds r2, r3, #1 + 800248a: 687b ldr r3, [r7, #4] + 800248c: 625a str r2, [r3, #36] @ 0x24 if ((hi2c->XferSize > 0U)) - 8002cb2: 687b ldr r3, [r7, #4] - 8002cb4: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8002cb6: 2b00 cmp r3, #0 - 8002cb8: d00c beq.n 8002cd4 + 800248e: 687b ldr r3, [r7, #4] + 8002490: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8002492: 2b00 cmp r3, #0 + 8002494: d00c beq.n 80024b0 { hi2c->XferSize--; - 8002cba: 687b ldr r3, [r7, #4] - 8002cbc: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8002cbe: 3b01 subs r3, #1 - 8002cc0: b29a uxth r2, r3 - 8002cc2: 687b ldr r3, [r7, #4] - 8002cc4: 851a strh r2, [r3, #40] @ 0x28 + 8002496: 687b ldr r3, [r7, #4] + 8002498: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800249a: 3b01 subs r3, #1 + 800249c: b29a uxth r2, r3 + 800249e: 687b ldr r3, [r7, #4] + 80024a0: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8002cc6: 687b ldr r3, [r7, #4] - 8002cc8: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002cca: b29b uxth r3, r3 - 8002ccc: 3b01 subs r3, #1 - 8002cce: b29a uxth r2, r3 - 8002cd0: 687b ldr r3, [r7, #4] - 8002cd2: 855a strh r2, [r3, #42] @ 0x2a + 80024a2: 687b ldr r3, [r7, #4] + 80024a4: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80024a6: b29b uxth r3, r3 + 80024a8: 3b01 subs r3, #1 + 80024aa: b29a uxth r2, r3 + 80024ac: 687b ldr r3, [r7, #4] + 80024ae: 855a strh r2, [r3, #42] @ 0x2a } } /* All data are not transferred, so set error code accordingly */ if (hi2c->XferCount != 0U) - 8002cd4: 687b ldr r3, [r7, #4] - 8002cd6: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002cd8: b29b uxth r3, r3 - 8002cda: 2b00 cmp r3, #0 - 8002cdc: d005 beq.n 8002cea + 80024b0: 687b ldr r3, [r7, #4] + 80024b2: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80024b4: b29b uxth r3, r3 + 80024b6: 2b00 cmp r3, #0 + 80024b8: d005 beq.n 80024c6 { /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8002cde: 687b ldr r3, [r7, #4] - 8002ce0: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002ce2: 2204 movs r2, #4 - 8002ce4: 431a orrs r2, r3 - 8002ce6: 687b ldr r3, [r7, #4] - 8002ce8: 645a str r2, [r3, #68] @ 0x44 + 80024ba: 687b ldr r3, [r7, #4] + 80024bc: 6c5b ldr r3, [r3, #68] @ 0x44 + 80024be: 2204 movs r2, #4 + 80024c0: 431a orrs r2, r3 + 80024c2: 687b ldr r3, [r7, #4] + 80024c4: 645a str r2, [r3, #68] @ 0x44 } if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 8002cea: 697b ldr r3, [r7, #20] - 8002cec: 2210 movs r2, #16 - 8002cee: 4013 ands r3, r2 - 8002cf0: d04f beq.n 8002d92 + 80024c6: 697b ldr r3, [r7, #20] + 80024c8: 2210 movs r2, #16 + 80024ca: 4013 ands r3, r2 + 80024cc: d04f beq.n 800256e (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) - 8002cf2: 693b ldr r3, [r7, #16] - 8002cf4: 2210 movs r2, #16 - 8002cf6: 4013 ands r3, r2 + 80024ce: 693b ldr r3, [r7, #16] + 80024d0: 2210 movs r2, #16 + 80024d2: 4013 ands r3, r2 if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 8002cf8: d04b beq.n 8002d92 + 80024d4: d04b beq.n 800256e { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ /* Mean XferCount == 0*/ /* So clear Flag NACKF only */ if (hi2c->XferCount == 0U) - 8002cfa: 687b ldr r3, [r7, #4] - 8002cfc: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002cfe: b29b uxth r3, r3 - 8002d00: 2b00 cmp r3, #0 - 8002d02: d12d bne.n 8002d60 + 80024d6: 687b ldr r3, [r7, #4] + 80024d8: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80024da: b29b uxth r3, r3 + 80024dc: 2b00 cmp r3, #0 + 80024de: d12d bne.n 800253c { if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) - 8002d04: 687b ldr r3, [r7, #4] - 8002d06: 2241 movs r2, #65 @ 0x41 - 8002d08: 5c9b ldrb r3, [r3, r2] - 8002d0a: b2db uxtb r3, r3 - 8002d0c: 2b28 cmp r3, #40 @ 0x28 - 8002d0e: d10b bne.n 8002d28 - 8002d10: 68fa ldr r2, [r7, #12] - 8002d12: 2380 movs r3, #128 @ 0x80 - 8002d14: 049b lsls r3, r3, #18 - 8002d16: 429a cmp r2, r3 - 8002d18: d106 bne.n 8002d28 + 80024e0: 687b ldr r3, [r7, #4] + 80024e2: 2241 movs r2, #65 @ 0x41 + 80024e4: 5c9b ldrb r3, [r3, r2] + 80024e6: b2db uxtb r3, r3 + 80024e8: 2b28 cmp r3, #40 @ 0x28 + 80024ea: d10b bne.n 8002504 + 80024ec: 68fa ldr r2, [r7, #12] + 80024ee: 2380 movs r3, #128 @ 0x80 + 80024f0: 049b lsls r3, r3, #18 + 80024f2: 429a cmp r2, r3 + 80024f4: d106 bne.n 8002504 /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */ { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); - 8002d1a: 697a ldr r2, [r7, #20] - 8002d1c: 687b ldr r3, [r7, #4] - 8002d1e: 0011 movs r1, r2 - 8002d20: 0018 movs r0, r3 - 8002d22: f000 f8a9 bl 8002e78 - 8002d26: e034 b.n 8002d92 + 80024f6: 697a ldr r2, [r7, #20] + 80024f8: 687b ldr r3, [r7, #4] + 80024fa: 0011 movs r1, r2 + 80024fc: 0018 movs r0, r3 + 80024fe: f000 f8a9 bl 8002654 + 8002502: e034 b.n 800256e } else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) - 8002d28: 687b ldr r3, [r7, #4] - 8002d2a: 2241 movs r2, #65 @ 0x41 - 8002d2c: 5c9b ldrb r3, [r3, r2] - 8002d2e: b2db uxtb r3, r3 - 8002d30: 2b29 cmp r3, #41 @ 0x29 - 8002d32: d110 bne.n 8002d56 - 8002d34: 68fb ldr r3, [r7, #12] - 8002d36: 4a4f ldr r2, [pc, #316] @ (8002e74 ) - 8002d38: 4293 cmp r3, r2 - 8002d3a: d00c beq.n 8002d56 + 8002504: 687b ldr r3, [r7, #4] + 8002506: 2241 movs r2, #65 @ 0x41 + 8002508: 5c9b ldrb r3, [r3, r2] + 800250a: b2db uxtb r3, r3 + 800250c: 2b29 cmp r3, #41 @ 0x29 + 800250e: d110 bne.n 8002532 + 8002510: 68fb ldr r3, [r7, #12] + 8002512: 4a4f ldr r2, [pc, #316] @ (8002650 ) + 8002514: 4293 cmp r3, r2 + 8002516: d00c beq.n 8002532 { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002d3c: 687b ldr r3, [r7, #4] - 8002d3e: 681b ldr r3, [r3, #0] - 8002d40: 2210 movs r2, #16 - 8002d42: 61da str r2, [r3, #28] + 8002518: 687b ldr r3, [r7, #4] + 800251a: 681b ldr r3, [r3, #0] + 800251c: 2210 movs r2, #16 + 800251e: 61da str r2, [r3, #28] /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 8002d44: 687b ldr r3, [r7, #4] - 8002d46: 0018 movs r0, r3 - 8002d48: f000 fa19 bl 800317e + 8002520: 687b ldr r3, [r7, #4] + 8002522: 0018 movs r0, r3 + 8002524: f000 fa19 bl 800295a /* Last Byte is Transmitted */ /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 8002d4c: 687b ldr r3, [r7, #4] - 8002d4e: 0018 movs r0, r3 - 8002d50: f7ff fdd8 bl 8002904 - 8002d54: e01d b.n 8002d92 + 8002528: 687b ldr r3, [r7, #4] + 800252a: 0018 movs r0, r3 + 800252c: f7ff fea6 bl 800227c + 8002530: e01d b.n 800256e } else { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002d56: 687b ldr r3, [r7, #4] - 8002d58: 681b ldr r3, [r3, #0] - 8002d5a: 2210 movs r2, #16 - 8002d5c: 61da str r2, [r3, #28] - 8002d5e: e018 b.n 8002d92 + 8002532: 687b ldr r3, [r7, #4] + 8002534: 681b ldr r3, [r3, #0] + 8002536: 2210 movs r2, #16 + 8002538: 61da str r2, [r3, #28] + 800253a: e018 b.n 800256e } else { /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002d60: 687b ldr r3, [r7, #4] - 8002d62: 681b ldr r3, [r3, #0] - 8002d64: 2210 movs r2, #16 - 8002d66: 61da str r2, [r3, #28] + 800253c: 687b ldr r3, [r7, #4] + 800253e: 681b ldr r3, [r3, #0] + 8002540: 2210 movs r2, #16 + 8002542: 61da str r2, [r3, #28] /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8002d68: 687b ldr r3, [r7, #4] - 8002d6a: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002d6c: 2204 movs r2, #4 - 8002d6e: 431a orrs r2, r3 - 8002d70: 687b ldr r3, [r7, #4] - 8002d72: 645a str r2, [r3, #68] @ 0x44 + 8002544: 687b ldr r3, [r7, #4] + 8002546: 6c5b ldr r3, [r3, #68] @ 0x44 + 8002548: 2204 movs r2, #4 + 800254a: 431a orrs r2, r3 + 800254c: 687b ldr r3, [r7, #4] + 800254e: 645a str r2, [r3, #68] @ 0x44 if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) - 8002d74: 68fb ldr r3, [r7, #12] - 8002d76: 2b00 cmp r3, #0 - 8002d78: d004 beq.n 8002d84 - 8002d7a: 68fa ldr r2, [r7, #12] - 8002d7c: 2380 movs r3, #128 @ 0x80 - 8002d7e: 045b lsls r3, r3, #17 - 8002d80: 429a cmp r2, r3 - 8002d82: d106 bne.n 8002d92 + 8002550: 68fb ldr r3, [r7, #12] + 8002552: 2b00 cmp r3, #0 + 8002554: d004 beq.n 8002560 + 8002556: 68fa ldr r2, [r7, #12] + 8002558: 2380 movs r3, #128 @ 0x80 + 800255a: 045b lsls r3, r3, #17 + 800255c: 429a cmp r2, r3 + 800255e: d106 bne.n 800256e { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, hi2c->ErrorCode); - 8002d84: 687b ldr r3, [r7, #4] - 8002d86: 6c5a ldr r2, [r3, #68] @ 0x44 - 8002d88: 687b ldr r3, [r7, #4] - 8002d8a: 0011 movs r1, r2 - 8002d8c: 0018 movs r0, r3 - 8002d8e: f000 f8cb bl 8002f28 + 8002560: 687b ldr r3, [r7, #4] + 8002562: 6c5a ldr r2, [r3, #68] @ 0x44 + 8002564: 687b ldr r3, [r7, #4] + 8002566: 0011 movs r1, r2 + 8002568: 0018 movs r0, r3 + 800256a: f000 f8cb bl 8002704 } } } hi2c->Mode = HAL_I2C_MODE_NONE; - 8002d92: 687b ldr r3, [r7, #4] - 8002d94: 2242 movs r2, #66 @ 0x42 - 8002d96: 2100 movs r1, #0 - 8002d98: 5499 strb r1, [r3, r2] + 800256e: 687b ldr r3, [r7, #4] + 8002570: 2242 movs r2, #66 @ 0x42 + 8002572: 2100 movs r1, #0 + 8002574: 5499 strb r1, [r3, r2] hi2c->XferISR = NULL; - 8002d9a: 687b ldr r3, [r7, #4] - 8002d9c: 2200 movs r2, #0 - 8002d9e: 635a str r2, [r3, #52] @ 0x34 + 8002576: 687b ldr r3, [r7, #4] + 8002578: 2200 movs r2, #0 + 800257a: 635a str r2, [r3, #52] @ 0x34 if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) - 8002da0: 687b ldr r3, [r7, #4] - 8002da2: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002da4: 2b00 cmp r3, #0 - 8002da6: d013 beq.n 8002dd0 + 800257c: 687b ldr r3, [r7, #4] + 800257e: 6c5b ldr r3, [r3, #68] @ 0x44 + 8002580: 2b00 cmp r3, #0 + 8002582: d013 beq.n 80025ac { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, hi2c->ErrorCode); - 8002da8: 687b ldr r3, [r7, #4] - 8002daa: 6c5a ldr r2, [r3, #68] @ 0x44 - 8002dac: 687b ldr r3, [r7, #4] - 8002dae: 0011 movs r1, r2 - 8002db0: 0018 movs r0, r3 - 8002db2: f000 f8b9 bl 8002f28 + 8002584: 687b ldr r3, [r7, #4] + 8002586: 6c5a ldr r2, [r3, #68] @ 0x44 + 8002588: 687b ldr r3, [r7, #4] + 800258a: 0011 movs r1, r2 + 800258c: 0018 movs r0, r3 + 800258e: f000 f8b9 bl 8002704 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ if (hi2c->State == HAL_I2C_STATE_LISTEN) - 8002db6: 687b ldr r3, [r7, #4] - 8002db8: 2241 movs r2, #65 @ 0x41 - 8002dba: 5c9b ldrb r3, [r3, r2] - 8002dbc: b2db uxtb r3, r3 - 8002dbe: 2b28 cmp r3, #40 @ 0x28 - 8002dc0: d147 bne.n 8002e52 + 8002592: 687b ldr r3, [r7, #4] + 8002594: 2241 movs r2, #65 @ 0x41 + 8002596: 5c9b ldrb r3, [r3, r2] + 8002598: b2db uxtb r3, r3 + 800259a: 2b28 cmp r3, #40 @ 0x28 + 800259c: d147 bne.n 800262e { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); - 8002dc2: 697a ldr r2, [r7, #20] - 8002dc4: 687b ldr r3, [r7, #4] - 8002dc6: 0011 movs r1, r2 - 8002dc8: 0018 movs r0, r3 - 8002dca: f000 f855 bl 8002e78 + 800259e: 697a ldr r2, [r7, #20] + 80025a0: 687b ldr r3, [r7, #4] + 80025a2: 0011 movs r1, r2 + 80025a4: 0018 movs r0, r3 + 80025a6: f000 f855 bl 8002654 hi2c->SlaveTxCpltCallback(hi2c); #else HAL_I2C_SlaveTxCpltCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } - 8002dce: e040 b.n 8002e52 + 80025aa: e040 b.n 800262e else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - 8002dd0: 687b ldr r3, [r7, #4] - 8002dd2: 6adb ldr r3, [r3, #44] @ 0x2c - 8002dd4: 4a27 ldr r2, [pc, #156] @ (8002e74 ) - 8002dd6: 4293 cmp r3, r2 - 8002dd8: d016 beq.n 8002e08 + 80025ac: 687b ldr r3, [r7, #4] + 80025ae: 6adb ldr r3, [r3, #44] @ 0x2c + 80025b0: 4a27 ldr r2, [pc, #156] @ (8002650 ) + 80025b2: 4293 cmp r3, r2 + 80025b4: d016 beq.n 80025e4 I2C_ITSlaveSeqCplt(hi2c); - 8002dda: 687b ldr r3, [r7, #4] - 8002ddc: 0018 movs r0, r3 - 8002dde: f7ff fd91 bl 8002904 + 80025b6: 687b ldr r3, [r7, #4] + 80025b8: 0018 movs r0, r3 + 80025ba: f7ff fe5f bl 800227c hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8002de2: 687b ldr r3, [r7, #4] - 8002de4: 4a23 ldr r2, [pc, #140] @ (8002e74 ) - 8002de6: 62da str r2, [r3, #44] @ 0x2c + 80025be: 687b ldr r3, [r7, #4] + 80025c0: 4a23 ldr r2, [pc, #140] @ (8002650 ) + 80025c2: 62da str r2, [r3, #44] @ 0x2c hi2c->State = HAL_I2C_STATE_READY; - 8002de8: 687b ldr r3, [r7, #4] - 8002dea: 2241 movs r2, #65 @ 0x41 - 8002dec: 2120 movs r1, #32 - 8002dee: 5499 strb r1, [r3, r2] + 80025c4: 687b ldr r3, [r7, #4] + 80025c6: 2241 movs r2, #65 @ 0x41 + 80025c8: 2120 movs r1, #32 + 80025ca: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_NONE; - 8002df0: 687b ldr r3, [r7, #4] - 8002df2: 2200 movs r2, #0 - 8002df4: 631a str r2, [r3, #48] @ 0x30 + 80025cc: 687b ldr r3, [r7, #4] + 80025ce: 2200 movs r2, #0 + 80025d0: 631a str r2, [r3, #48] @ 0x30 __HAL_UNLOCK(hi2c); - 8002df6: 687b ldr r3, [r7, #4] - 8002df8: 2240 movs r2, #64 @ 0x40 - 8002dfa: 2100 movs r1, #0 - 8002dfc: 5499 strb r1, [r3, r2] + 80025d2: 687b ldr r3, [r7, #4] + 80025d4: 2240 movs r2, #64 @ 0x40 + 80025d6: 2100 movs r1, #0 + 80025d8: 5499 strb r1, [r3, r2] HAL_I2C_ListenCpltCallback(hi2c); - 8002dfe: 687b ldr r3, [r7, #4] - 8002e00: 0018 movs r0, r3 - 8002e02: f7ff f860 bl 8001ec6 + 80025da: 687b ldr r3, [r7, #4] + 80025dc: 0018 movs r0, r3 + 80025de: f7ff fc90 bl 8001f02 } - 8002e06: e024 b.n 8002e52 + 80025e2: e024 b.n 800262e else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 8002e08: 687b ldr r3, [r7, #4] - 8002e0a: 2241 movs r2, #65 @ 0x41 - 8002e0c: 5c9b ldrb r3, [r3, r2] - 8002e0e: b2db uxtb r3, r3 - 8002e10: 2b22 cmp r3, #34 @ 0x22 - 8002e12: d10f bne.n 8002e34 + 80025e4: 687b ldr r3, [r7, #4] + 80025e6: 2241 movs r2, #65 @ 0x41 + 80025e8: 5c9b ldrb r3, [r3, r2] + 80025ea: b2db uxtb r3, r3 + 80025ec: 2b22 cmp r3, #34 @ 0x22 + 80025ee: d10f bne.n 8002610 hi2c->State = HAL_I2C_STATE_READY; - 8002e14: 687b ldr r3, [r7, #4] - 8002e16: 2241 movs r2, #65 @ 0x41 - 8002e18: 2120 movs r1, #32 - 8002e1a: 5499 strb r1, [r3, r2] + 80025f0: 687b ldr r3, [r7, #4] + 80025f2: 2241 movs r2, #65 @ 0x41 + 80025f4: 2120 movs r1, #32 + 80025f6: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_NONE; - 8002e1c: 687b ldr r3, [r7, #4] - 8002e1e: 2200 movs r2, #0 - 8002e20: 631a str r2, [r3, #48] @ 0x30 + 80025f8: 687b ldr r3, [r7, #4] + 80025fa: 2200 movs r2, #0 + 80025fc: 631a str r2, [r3, #48] @ 0x30 __HAL_UNLOCK(hi2c); - 8002e22: 687b ldr r3, [r7, #4] - 8002e24: 2240 movs r2, #64 @ 0x40 - 8002e26: 2100 movs r1, #0 - 8002e28: 5499 strb r1, [r3, r2] + 80025fe: 687b ldr r3, [r7, #4] + 8002600: 2240 movs r2, #64 @ 0x40 + 8002602: 2100 movs r1, #0 + 8002604: 5499 strb r1, [r3, r2] HAL_I2C_SlaveRxCpltCallback(hi2c); - 8002e2a: 687b ldr r3, [r7, #4] - 8002e2c: 0018 movs r0, r3 - 8002e2e: f7fd fda5 bl 800097c + 8002606: 687b ldr r3, [r7, #4] + 8002608: 0018 movs r0, r3 + 800260a: f7fe fd23 bl 8001054 } - 8002e32: e00e b.n 8002e52 + 800260e: e00e b.n 800262e hi2c->State = HAL_I2C_STATE_READY; - 8002e34: 687b ldr r3, [r7, #4] - 8002e36: 2241 movs r2, #65 @ 0x41 - 8002e38: 2120 movs r1, #32 - 8002e3a: 5499 strb r1, [r3, r2] + 8002610: 687b ldr r3, [r7, #4] + 8002612: 2241 movs r2, #65 @ 0x41 + 8002614: 2120 movs r1, #32 + 8002616: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_NONE; - 8002e3c: 687b ldr r3, [r7, #4] - 8002e3e: 2200 movs r2, #0 - 8002e40: 631a str r2, [r3, #48] @ 0x30 + 8002618: 687b ldr r3, [r7, #4] + 800261a: 2200 movs r2, #0 + 800261c: 631a str r2, [r3, #48] @ 0x30 __HAL_UNLOCK(hi2c); - 8002e42: 687b ldr r3, [r7, #4] - 8002e44: 2240 movs r2, #64 @ 0x40 - 8002e46: 2100 movs r1, #0 - 8002e48: 5499 strb r1, [r3, r2] + 800261e: 687b ldr r3, [r7, #4] + 8002620: 2240 movs r2, #64 @ 0x40 + 8002622: 2100 movs r1, #0 + 8002624: 5499 strb r1, [r3, r2] HAL_I2C_SlaveTxCpltCallback(hi2c); - 8002e4a: 687b ldr r3, [r7, #4] - 8002e4c: 0018 movs r0, r3 - 8002e4e: f7ff f822 bl 8001e96 + 8002626: 687b ldr r3, [r7, #4] + 8002628: 0018 movs r0, r3 + 800262a: f7ff fc52 bl 8001ed2 } - 8002e52: 46c0 nop @ (mov r8, r8) - 8002e54: 46bd mov sp, r7 - 8002e56: b006 add sp, #24 - 8002e58: bd80 pop {r7, pc} - 8002e5a: 46c0 nop @ (mov r8, r8) - 8002e5c: 00008001 .word 0x00008001 - 8002e60: 00008002 .word 0x00008002 - 8002e64: 00008003 .word 0x00008003 - 8002e68: fe00e800 .word 0xfe00e800 - 8002e6c: ffffbfff .word 0xffffbfff - 8002e70: ffff7fff .word 0xffff7fff - 8002e74: ffff0000 .word 0xffff0000 + 800262e: 46c0 nop @ (mov r8, r8) + 8002630: 46bd mov sp, r7 + 8002632: b006 add sp, #24 + 8002634: bd80 pop {r7, pc} + 8002636: 46c0 nop @ (mov r8, r8) + 8002638: 00008001 .word 0x00008001 + 800263c: 00008002 .word 0x00008002 + 8002640: 00008003 .word 0x00008003 + 8002644: fe00e800 .word 0xfe00e800 + 8002648: ffffbfff .word 0xffffbfff + 800264c: ffff7fff .word 0xffff7fff + 8002650: ffff0000 .word 0xffff0000 -08002e78 : +08002654 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 8002e78: b580 push {r7, lr} - 8002e7a: b082 sub sp, #8 - 8002e7c: af00 add r7, sp, #0 - 8002e7e: 6078 str r0, [r7, #4] - 8002e80: 6039 str r1, [r7, #0] + 8002654: b580 push {r7, lr} + 8002656: b082 sub sp, #8 + 8002658: af00 add r7, sp, #0 + 800265a: 6078 str r0, [r7, #4] + 800265c: 6039 str r1, [r7, #0] /* Reset handle parameters */ hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8002e82: 687b ldr r3, [r7, #4] - 8002e84: 4a26 ldr r2, [pc, #152] @ (8002f20 ) - 8002e86: 62da str r2, [r3, #44] @ 0x2c + 800265e: 687b ldr r3, [r7, #4] + 8002660: 4a26 ldr r2, [pc, #152] @ (80026fc ) + 8002662: 62da str r2, [r3, #44] @ 0x2c hi2c->PreviousState = I2C_STATE_NONE; - 8002e88: 687b ldr r3, [r7, #4] - 8002e8a: 2200 movs r2, #0 - 8002e8c: 631a str r2, [r3, #48] @ 0x30 + 8002664: 687b ldr r3, [r7, #4] + 8002666: 2200 movs r2, #0 + 8002668: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8002e8e: 687b ldr r3, [r7, #4] - 8002e90: 2241 movs r2, #65 @ 0x41 - 8002e92: 2120 movs r1, #32 - 8002e94: 5499 strb r1, [r3, r2] + 800266a: 687b ldr r3, [r7, #4] + 800266c: 2241 movs r2, #65 @ 0x41 + 800266e: 2120 movs r1, #32 + 8002670: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_NONE; - 8002e96: 687b ldr r3, [r7, #4] - 8002e98: 2242 movs r2, #66 @ 0x42 - 8002e9a: 2100 movs r1, #0 - 8002e9c: 5499 strb r1, [r3, r2] + 8002672: 687b ldr r3, [r7, #4] + 8002674: 2242 movs r2, #66 @ 0x42 + 8002676: 2100 movs r1, #0 + 8002678: 5499 strb r1, [r3, r2] hi2c->XferISR = NULL; - 8002e9e: 687b ldr r3, [r7, #4] - 8002ea0: 2200 movs r2, #0 - 8002ea2: 635a str r2, [r3, #52] @ 0x34 + 800267a: 687b ldr r3, [r7, #4] + 800267c: 2200 movs r2, #0 + 800267e: 635a str r2, [r3, #52] @ 0x34 /* Store Last receive data if any */ if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) - 8002ea4: 683b ldr r3, [r7, #0] - 8002ea6: 2204 movs r2, #4 - 8002ea8: 4013 ands r3, r2 - 8002eaa: d022 beq.n 8002ef2 + 8002680: 683b ldr r3, [r7, #0] + 8002682: 2204 movs r2, #4 + 8002684: 4013 ands r3, r2 + 8002686: d022 beq.n 80026ce { /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 8002eac: 687b ldr r3, [r7, #4] - 8002eae: 681b ldr r3, [r3, #0] - 8002eb0: 6a5a ldr r2, [r3, #36] @ 0x24 - 8002eb2: 687b ldr r3, [r7, #4] - 8002eb4: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002eb6: b2d2 uxtb r2, r2 - 8002eb8: 701a strb r2, [r3, #0] + 8002688: 687b ldr r3, [r7, #4] + 800268a: 681b ldr r3, [r3, #0] + 800268c: 6a5a ldr r2, [r3, #36] @ 0x24 + 800268e: 687b ldr r3, [r7, #4] + 8002690: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002692: b2d2 uxtb r2, r2 + 8002694: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8002eba: 687b ldr r3, [r7, #4] - 8002ebc: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002ebe: 1c5a adds r2, r3, #1 - 8002ec0: 687b ldr r3, [r7, #4] - 8002ec2: 625a str r2, [r3, #36] @ 0x24 + 8002696: 687b ldr r3, [r7, #4] + 8002698: 6a5b ldr r3, [r3, #36] @ 0x24 + 800269a: 1c5a adds r2, r3, #1 + 800269c: 687b ldr r3, [r7, #4] + 800269e: 625a str r2, [r3, #36] @ 0x24 if ((hi2c->XferSize > 0U)) - 8002ec4: 687b ldr r3, [r7, #4] - 8002ec6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8002ec8: 2b00 cmp r3, #0 - 8002eca: d012 beq.n 8002ef2 + 80026a0: 687b ldr r3, [r7, #4] + 80026a2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80026a4: 2b00 cmp r3, #0 + 80026a6: d012 beq.n 80026ce { hi2c->XferSize--; - 8002ecc: 687b ldr r3, [r7, #4] - 8002ece: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8002ed0: 3b01 subs r3, #1 - 8002ed2: b29a uxth r2, r3 - 8002ed4: 687b ldr r3, [r7, #4] - 8002ed6: 851a strh r2, [r3, #40] @ 0x28 + 80026a8: 687b ldr r3, [r7, #4] + 80026aa: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80026ac: 3b01 subs r3, #1 + 80026ae: b29a uxth r2, r3 + 80026b0: 687b ldr r3, [r7, #4] + 80026b2: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8002ed8: 687b ldr r3, [r7, #4] - 8002eda: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8002edc: b29b uxth r3, r3 - 8002ede: 3b01 subs r3, #1 - 8002ee0: b29a uxth r2, r3 - 8002ee2: 687b ldr r3, [r7, #4] - 8002ee4: 855a strh r2, [r3, #42] @ 0x2a + 80026b4: 687b ldr r3, [r7, #4] + 80026b6: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80026b8: b29b uxth r3, r3 + 80026ba: 3b01 subs r3, #1 + 80026bc: b29a uxth r2, r3 + 80026be: 687b ldr r3, [r7, #4] + 80026c0: 855a strh r2, [r3, #42] @ 0x2a /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8002ee6: 687b ldr r3, [r7, #4] - 8002ee8: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002eea: 2204 movs r2, #4 - 8002eec: 431a orrs r2, r3 - 8002eee: 687b ldr r3, [r7, #4] - 8002ef0: 645a str r2, [r3, #68] @ 0x44 + 80026c2: 687b ldr r3, [r7, #4] + 80026c4: 6c5b ldr r3, [r3, #68] @ 0x44 + 80026c6: 2204 movs r2, #4 + 80026c8: 431a orrs r2, r3 + 80026ca: 687b ldr r3, [r7, #4] + 80026cc: 645a str r2, [r3, #68] @ 0x44 } } /* Disable all Interrupts*/ I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 8002ef2: 4a0c ldr r2, [pc, #48] @ (8002f24 ) - 8002ef4: 687b ldr r3, [r7, #4] - 8002ef6: 0011 movs r1, r2 - 8002ef8: 0018 movs r0, r3 - 8002efa: f000 fa45 bl 8003388 + 80026ce: 4a0c ldr r2, [pc, #48] @ (8002700 ) + 80026d0: 687b ldr r3, [r7, #4] + 80026d2: 0011 movs r1, r2 + 80026d4: 0018 movs r0, r3 + 80026d6: f000 f981 bl 80029dc /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002efe: 687b ldr r3, [r7, #4] - 8002f00: 681b ldr r3, [r3, #0] - 8002f02: 2210 movs r2, #16 - 8002f04: 61da str r2, [r3, #28] + 80026da: 687b ldr r3, [r7, #4] + 80026dc: 681b ldr r3, [r3, #0] + 80026de: 2210 movs r2, #16 + 80026e0: 61da str r2, [r3, #28] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8002f06: 687b ldr r3, [r7, #4] - 8002f08: 2240 movs r2, #64 @ 0x40 - 8002f0a: 2100 movs r1, #0 - 8002f0c: 5499 strb r1, [r3, r2] + 80026e2: 687b ldr r3, [r7, #4] + 80026e4: 2240 movs r2, #64 @ 0x40 + 80026e6: 2100 movs r1, #0 + 80026e8: 5499 strb r1, [r3, r2] /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->ListenCpltCallback(hi2c); #else HAL_I2C_ListenCpltCallback(hi2c); - 8002f0e: 687b ldr r3, [r7, #4] - 8002f10: 0018 movs r0, r3 - 8002f12: f7fe ffd8 bl 8001ec6 + 80026ea: 687b ldr r3, [r7, #4] + 80026ec: 0018 movs r0, r3 + 80026ee: f7ff fc08 bl 8001f02 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } - 8002f16: 46c0 nop @ (mov r8, r8) - 8002f18: 46bd mov sp, r7 - 8002f1a: b002 add sp, #8 - 8002f1c: bd80 pop {r7, pc} - 8002f1e: 46c0 nop @ (mov r8, r8) - 8002f20: ffff0000 .word 0xffff0000 - 8002f24: 00008003 .word 0x00008003 + 80026f2: 46c0 nop @ (mov r8, r8) + 80026f4: 46bd mov sp, r7 + 80026f6: b002 add sp, #8 + 80026f8: bd80 pop {r7, pc} + 80026fa: 46c0 nop @ (mov r8, r8) + 80026fc: ffff0000 .word 0xffff0000 + 8002700: 00008003 .word 0x00008003 -08002f28 : +08002704 : * @param hi2c I2C handle. * @param ErrorCode Error code to handle. * @retval None */ static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) { - 8002f28: b580 push {r7, lr} - 8002f2a: b084 sub sp, #16 - 8002f2c: af00 add r7, sp, #0 - 8002f2e: 6078 str r0, [r7, #4] - 8002f30: 6039 str r1, [r7, #0] + 8002704: b580 push {r7, lr} + 8002706: b084 sub sp, #16 + 8002708: af00 add r7, sp, #0 + 800270a: 6078 str r0, [r7, #4] + 800270c: 6039 str r1, [r7, #0] HAL_I2C_StateTypeDef tmpstate = hi2c->State; - 8002f32: 200f movs r0, #15 - 8002f34: 183b adds r3, r7, r0 - 8002f36: 687a ldr r2, [r7, #4] - 8002f38: 2141 movs r1, #65 @ 0x41 - 8002f3a: 5c52 ldrb r2, [r2, r1] - 8002f3c: 701a strb r2, [r3, #0] + 800270e: 200f movs r0, #15 + 8002710: 183b adds r3, r7, r0 + 8002712: 687a ldr r2, [r7, #4] + 8002714: 2141 movs r1, #65 @ 0x41 + 8002716: 5c52 ldrb r2, [r2, r1] + 8002718: 701a strb r2, [r3, #0] uint32_t tmppreviousstate; /* Reset handle parameters */ hi2c->Mode = HAL_I2C_MODE_NONE; - 8002f3e: 687b ldr r3, [r7, #4] - 8002f40: 2242 movs r2, #66 @ 0x42 - 8002f42: 2100 movs r1, #0 - 8002f44: 5499 strb r1, [r3, r2] + 800271a: 687b ldr r3, [r7, #4] + 800271c: 2242 movs r2, #66 @ 0x42 + 800271e: 2100 movs r1, #0 + 8002720: 5499 strb r1, [r3, r2] hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8002f46: 687b ldr r3, [r7, #4] - 8002f48: 4a72 ldr r2, [pc, #456] @ (8003114 ) - 8002f4a: 62da str r2, [r3, #44] @ 0x2c + 8002722: 687b ldr r3, [r7, #4] + 8002724: 4a72 ldr r2, [pc, #456] @ (80028f0 ) + 8002726: 62da str r2, [r3, #44] @ 0x2c hi2c->XferCount = 0U; - 8002f4c: 687b ldr r3, [r7, #4] - 8002f4e: 2200 movs r2, #0 - 8002f50: 855a strh r2, [r3, #42] @ 0x2a + 8002728: 687b ldr r3, [r7, #4] + 800272a: 2200 movs r2, #0 + 800272c: 855a strh r2, [r3, #42] @ 0x2a /* Set new error code */ hi2c->ErrorCode |= ErrorCode; - 8002f52: 687b ldr r3, [r7, #4] - 8002f54: 6c5a ldr r2, [r3, #68] @ 0x44 - 8002f56: 683b ldr r3, [r7, #0] - 8002f58: 431a orrs r2, r3 - 8002f5a: 687b ldr r3, [r7, #4] - 8002f5c: 645a str r2, [r3, #68] @ 0x44 + 800272e: 687b ldr r3, [r7, #4] + 8002730: 6c5a ldr r2, [r3, #68] @ 0x44 + 8002732: 683b ldr r3, [r7, #0] + 8002734: 431a orrs r2, r3 + 8002736: 687b ldr r3, [r7, #4] + 8002738: 645a str r2, [r3, #68] @ 0x44 /* Disable Interrupts */ if ((tmpstate == HAL_I2C_STATE_LISTEN) || - 8002f5e: 183b adds r3, r7, r0 - 8002f60: 781b ldrb r3, [r3, #0] - 8002f62: 2b28 cmp r3, #40 @ 0x28 - 8002f64: d007 beq.n 8002f76 - 8002f66: 183b adds r3, r7, r0 - 8002f68: 781b ldrb r3, [r3, #0] - 8002f6a: 2b29 cmp r3, #41 @ 0x29 - 8002f6c: d003 beq.n 8002f76 + 800273a: 183b adds r3, r7, r0 + 800273c: 781b ldrb r3, [r3, #0] + 800273e: 2b28 cmp r3, #40 @ 0x28 + 8002740: d007 beq.n 8002752 + 8002742: 183b adds r3, r7, r0 + 8002744: 781b ldrb r3, [r3, #0] + 8002746: 2b29 cmp r3, #41 @ 0x29 + 8002748: d003 beq.n 8002752 (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || - 8002f6e: 183b adds r3, r7, r0 - 8002f70: 781b ldrb r3, [r3, #0] - 8002f72: 2b2a cmp r3, #42 @ 0x2a - 8002f74: d10c bne.n 8002f90 + 800274a: 183b adds r3, r7, r0 + 800274c: 781b ldrb r3, [r3, #0] + 800274e: 2b2a cmp r3, #42 @ 0x2a + 8002750: d10c bne.n 800276c (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) { /* Disable all interrupts, except interrupts related to LISTEN state */ I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 8002f76: 687b ldr r3, [r7, #4] - 8002f78: 2103 movs r1, #3 - 8002f7a: 0018 movs r0, r3 - 8002f7c: f000 fa04 bl 8003388 + 8002752: 687b ldr r3, [r7, #4] + 8002754: 2103 movs r1, #3 + 8002756: 0018 movs r0, r3 + 8002758: f000 f940 bl 80029dc /* keep HAL_I2C_STATE_LISTEN if set */ hi2c->State = HAL_I2C_STATE_LISTEN; - 8002f80: 687b ldr r3, [r7, #4] - 8002f82: 2241 movs r2, #65 @ 0x41 - 8002f84: 2128 movs r1, #40 @ 0x28 - 8002f86: 5499 strb r1, [r3, r2] + 800275c: 687b ldr r3, [r7, #4] + 800275e: 2241 movs r2, #65 @ 0x41 + 8002760: 2128 movs r1, #40 @ 0x28 + 8002762: 5499 strb r1, [r3, r2] hi2c->XferISR = I2C_Slave_ISR_IT; - 8002f88: 687b ldr r3, [r7, #4] - 8002f8a: 4a63 ldr r2, [pc, #396] @ (8003118 ) - 8002f8c: 635a str r2, [r3, #52] @ 0x34 - 8002f8e: e032 b.n 8002ff6 + 8002764: 687b ldr r3, [r7, #4] + 8002766: 4a63 ldr r2, [pc, #396] @ (80028f4 ) + 8002768: 635a str r2, [r3, #52] @ 0x34 + 800276a: e032 b.n 80027d2 } else { /* Disable all interrupts */ I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 8002f90: 4a62 ldr r2, [pc, #392] @ (800311c ) - 8002f92: 687b ldr r3, [r7, #4] - 8002f94: 0011 movs r1, r2 - 8002f96: 0018 movs r0, r3 - 8002f98: f000 f9f6 bl 8003388 + 800276c: 4a62 ldr r2, [pc, #392] @ (80028f8 ) + 800276e: 687b ldr r3, [r7, #4] + 8002770: 0011 movs r1, r2 + 8002772: 0018 movs r0, r3 + 8002774: f000 f932 bl 80029dc /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 8002f9c: 687b ldr r3, [r7, #4] - 8002f9e: 0018 movs r0, r3 - 8002fa0: f000 f8ed bl 800317e + 8002778: 687b ldr r3, [r7, #4] + 800277a: 0018 movs r0, r3 + 800277c: f000 f8ed bl 800295a /* If state is an abort treatment on going, don't change state */ /* This change will be do later */ if (hi2c->State != HAL_I2C_STATE_ABORT) - 8002fa4: 687b ldr r3, [r7, #4] - 8002fa6: 2241 movs r2, #65 @ 0x41 - 8002fa8: 5c9b ldrb r3, [r3, r2] - 8002faa: b2db uxtb r3, r3 - 8002fac: 2b60 cmp r3, #96 @ 0x60 - 8002fae: d01f beq.n 8002ff0 + 8002780: 687b ldr r3, [r7, #4] + 8002782: 2241 movs r2, #65 @ 0x41 + 8002784: 5c9b ldrb r3, [r3, r2] + 8002786: b2db uxtb r3, r3 + 8002788: 2b60 cmp r3, #96 @ 0x60 + 800278a: d01f beq.n 80027cc { /* Set HAL_I2C_STATE_READY */ hi2c->State = HAL_I2C_STATE_READY; - 8002fb0: 687b ldr r3, [r7, #4] - 8002fb2: 2241 movs r2, #65 @ 0x41 - 8002fb4: 2120 movs r1, #32 - 8002fb6: 5499 strb r1, [r3, r2] + 800278c: 687b ldr r3, [r7, #4] + 800278e: 2241 movs r2, #65 @ 0x41 + 8002790: 2120 movs r1, #32 + 8002792: 5499 strb r1, [r3, r2] /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - 8002fb8: 687b ldr r3, [r7, #4] - 8002fba: 681b ldr r3, [r3, #0] - 8002fbc: 699b ldr r3, [r3, #24] - 8002fbe: 2220 movs r2, #32 - 8002fc0: 4013 ands r3, r2 - 8002fc2: 2b20 cmp r3, #32 - 8002fc4: d114 bne.n 8002ff0 + 8002794: 687b ldr r3, [r7, #4] + 8002796: 681b ldr r3, [r3, #0] + 8002798: 699b ldr r3, [r3, #24] + 800279a: 2220 movs r2, #32 + 800279c: 4013 ands r3, r2 + 800279e: 2b20 cmp r3, #32 + 80027a0: d114 bne.n 80027cc { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8002fc6: 687b ldr r3, [r7, #4] - 8002fc8: 681b ldr r3, [r3, #0] - 8002fca: 699b ldr r3, [r3, #24] - 8002fcc: 2210 movs r2, #16 - 8002fce: 4013 ands r3, r2 - 8002fd0: 2b10 cmp r3, #16 - 8002fd2: d109 bne.n 8002fe8 + 80027a2: 687b ldr r3, [r7, #4] + 80027a4: 681b ldr r3, [r3, #0] + 80027a6: 699b ldr r3, [r3, #24] + 80027a8: 2210 movs r2, #16 + 80027aa: 4013 ands r3, r2 + 80027ac: 2b10 cmp r3, #16 + 80027ae: d109 bne.n 80027c4 { __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8002fd4: 687b ldr r3, [r7, #4] - 8002fd6: 681b ldr r3, [r3, #0] - 8002fd8: 2210 movs r2, #16 - 8002fda: 61da str r2, [r3, #28] + 80027b0: 687b ldr r3, [r7, #4] + 80027b2: 681b ldr r3, [r3, #0] + 80027b4: 2210 movs r2, #16 + 80027b6: 61da str r2, [r3, #28] hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8002fdc: 687b ldr r3, [r7, #4] - 8002fde: 6c5b ldr r3, [r3, #68] @ 0x44 - 8002fe0: 2204 movs r2, #4 - 8002fe2: 431a orrs r2, r3 - 8002fe4: 687b ldr r3, [r7, #4] - 8002fe6: 645a str r2, [r3, #68] @ 0x44 + 80027b8: 687b ldr r3, [r7, #4] + 80027ba: 6c5b ldr r3, [r3, #68] @ 0x44 + 80027bc: 2204 movs r2, #4 + 80027be: 431a orrs r2, r3 + 80027c0: 687b ldr r3, [r7, #4] + 80027c2: 645a str r2, [r3, #68] @ 0x44 } /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 8002fe8: 687b ldr r3, [r7, #4] - 8002fea: 681b ldr r3, [r3, #0] - 8002fec: 2220 movs r2, #32 - 8002fee: 61da str r2, [r3, #28] + 80027c4: 687b ldr r3, [r7, #4] + 80027c6: 681b ldr r3, [r3, #0] + 80027c8: 2220 movs r2, #32 + 80027ca: 61da str r2, [r3, #28] } } hi2c->XferISR = NULL; - 8002ff0: 687b ldr r3, [r7, #4] - 8002ff2: 2200 movs r2, #0 - 8002ff4: 635a str r2, [r3, #52] @ 0x34 + 80027cc: 687b ldr r3, [r7, #4] + 80027ce: 2200 movs r2, #0 + 80027d0: 635a str r2, [r3, #52] @ 0x34 } /* Abort DMA TX transfer if any */ tmppreviousstate = hi2c->PreviousState; - 8002ff6: 687b ldr r3, [r7, #4] - 8002ff8: 6b1b ldr r3, [r3, #48] @ 0x30 - 8002ffa: 60bb str r3, [r7, #8] + 80027d2: 687b ldr r3, [r7, #4] + 80027d4: 6b1b ldr r3, [r3, #48] @ 0x30 + 80027d6: 60bb str r3, [r7, #8] if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \ - 8002ffc: 687b ldr r3, [r7, #4] - 8002ffe: 6b9b ldr r3, [r3, #56] @ 0x38 - 8003000: 2b00 cmp r3, #0 - 8003002: d03b beq.n 800307c - 8003004: 68bb ldr r3, [r7, #8] - 8003006: 2b11 cmp r3, #17 - 8003008: d002 beq.n 8003010 - 800300a: 68bb ldr r3, [r7, #8] - 800300c: 2b21 cmp r3, #33 @ 0x21 - 800300e: d135 bne.n 800307c + 80027d8: 687b ldr r3, [r7, #4] + 80027da: 6b9b ldr r3, [r3, #56] @ 0x38 + 80027dc: 2b00 cmp r3, #0 + 80027de: d03b beq.n 8002858 + 80027e0: 68bb ldr r3, [r7, #8] + 80027e2: 2b11 cmp r3, #17 + 80027e4: d002 beq.n 80027ec + 80027e6: 68bb ldr r3, [r7, #8] + 80027e8: 2b21 cmp r3, #33 @ 0x21 + 80027ea: d135 bne.n 8002858 (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) { if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) - 8003010: 687b ldr r3, [r7, #4] - 8003012: 681b ldr r3, [r3, #0] - 8003014: 681a ldr r2, [r3, #0] - 8003016: 2380 movs r3, #128 @ 0x80 - 8003018: 01db lsls r3, r3, #7 - 800301a: 401a ands r2, r3 - 800301c: 2380 movs r3, #128 @ 0x80 - 800301e: 01db lsls r3, r3, #7 - 8003020: 429a cmp r2, r3 - 8003022: d107 bne.n 8003034 + 80027ec: 687b ldr r3, [r7, #4] + 80027ee: 681b ldr r3, [r3, #0] + 80027f0: 681a ldr r2, [r3, #0] + 80027f2: 2380 movs r3, #128 @ 0x80 + 80027f4: 01db lsls r3, r3, #7 + 80027f6: 401a ands r2, r3 + 80027f8: 2380 movs r3, #128 @ 0x80 + 80027fa: 01db lsls r3, r3, #7 + 80027fc: 429a cmp r2, r3 + 80027fe: d107 bne.n 8002810 { hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 8003024: 687b ldr r3, [r7, #4] - 8003026: 681b ldr r3, [r3, #0] - 8003028: 681a ldr r2, [r3, #0] - 800302a: 687b ldr r3, [r7, #4] - 800302c: 681b ldr r3, [r3, #0] - 800302e: 493c ldr r1, [pc, #240] @ (8003120 ) - 8003030: 400a ands r2, r1 - 8003032: 601a str r2, [r3, #0] + 8002800: 687b ldr r3, [r7, #4] + 8002802: 681b ldr r3, [r3, #0] + 8002804: 681a ldr r2, [r3, #0] + 8002806: 687b ldr r3, [r7, #4] + 8002808: 681b ldr r3, [r3, #0] + 800280a: 493c ldr r1, [pc, #240] @ (80028fc ) + 800280c: 400a ands r2, r1 + 800280e: 601a str r2, [r3, #0] } if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 8003034: 687b ldr r3, [r7, #4] - 8003036: 6b9b ldr r3, [r3, #56] @ 0x38 - 8003038: 0018 movs r0, r3 - 800303a: f7fe fc03 bl 8001844 - 800303e: 0003 movs r3, r0 - 8003040: 2b01 cmp r3, #1 - 8003042: d016 beq.n 8003072 + 8002810: 687b ldr r3, [r7, #4] + 8002812: 6b9b ldr r3, [r3, #56] @ 0x38 + 8002814: 0018 movs r0, r3 + 8002816: f7ff f8b5 bl 8001984 + 800281a: 0003 movs r3, r0 + 800281c: 2b01 cmp r3, #1 + 800281e: d016 beq.n 800284e { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; - 8003044: 687b ldr r3, [r7, #4] - 8003046: 6b9b ldr r3, [r3, #56] @ 0x38 - 8003048: 4a36 ldr r2, [pc, #216] @ (8003124 ) - 800304a: 639a str r2, [r3, #56] @ 0x38 + 8002820: 687b ldr r3, [r7, #4] + 8002822: 6b9b ldr r3, [r3, #56] @ 0x38 + 8002824: 4a36 ldr r2, [pc, #216] @ (8002900 ) + 8002826: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800304c: 687b ldr r3, [r7, #4] - 800304e: 2240 movs r2, #64 @ 0x40 - 8003050: 2100 movs r1, #0 - 8003052: 5499 strb r1, [r3, r2] + 8002828: 687b ldr r3, [r7, #4] + 800282a: 2240 movs r2, #64 @ 0x40 + 800282c: 2100 movs r1, #0 + 800282e: 5499 strb r1, [r3, r2] /* Abort DMA TX */ if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) - 8003054: 687b ldr r3, [r7, #4] - 8003056: 6b9b ldr r3, [r3, #56] @ 0x38 - 8003058: 0018 movs r0, r3 - 800305a: f7fe fb89 bl 8001770 - 800305e: 1e03 subs r3, r0, #0 - 8003060: d051 beq.n 8003106 + 8002830: 687b ldr r3, [r7, #4] + 8002832: 6b9b ldr r3, [r3, #56] @ 0x38 + 8002834: 0018 movs r0, r3 + 8002836: f7ff f83b bl 80018b0 + 800283a: 1e03 subs r3, r0, #0 + 800283c: d051 beq.n 80028e2 { /* Call Directly XferAbortCallback function in case of error */ hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); - 8003062: 687b ldr r3, [r7, #4] - 8003064: 6b9b ldr r3, [r3, #56] @ 0x38 - 8003066: 6b9a ldr r2, [r3, #56] @ 0x38 - 8003068: 687b ldr r3, [r7, #4] - 800306a: 6b9b ldr r3, [r3, #56] @ 0x38 - 800306c: 0018 movs r0, r3 - 800306e: 4790 blx r2 + 800283e: 687b ldr r3, [r7, #4] + 8002840: 6b9b ldr r3, [r3, #56] @ 0x38 + 8002842: 6b9a ldr r2, [r3, #56] @ 0x38 + 8002844: 687b ldr r3, [r7, #4] + 8002846: 6b9b ldr r3, [r3, #56] @ 0x38 + 8002848: 0018 movs r0, r3 + 800284a: 4790 blx r2 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 8003070: e049 b.n 8003106 + 800284c: e049 b.n 80028e2 } } else { I2C_TreatErrorCallback(hi2c); - 8003072: 687b ldr r3, [r7, #4] - 8003074: 0018 movs r0, r3 - 8003076: f000 f859 bl 800312c + 800284e: 687b ldr r3, [r7, #4] + 8002850: 0018 movs r0, r3 + 8002852: f000 f859 bl 8002908 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 800307a: e044 b.n 8003106 + 8002856: e044 b.n 80028e2 } } /* Abort DMA RX transfer if any */ else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \ - 800307c: 687b ldr r3, [r7, #4] - 800307e: 6bdb ldr r3, [r3, #60] @ 0x3c - 8003080: 2b00 cmp r3, #0 - 8003082: d03b beq.n 80030fc - 8003084: 68bb ldr r3, [r7, #8] - 8003086: 2b12 cmp r3, #18 - 8003088: d002 beq.n 8003090 - 800308a: 68bb ldr r3, [r7, #8] - 800308c: 2b22 cmp r3, #34 @ 0x22 - 800308e: d135 bne.n 80030fc + 8002858: 687b ldr r3, [r7, #4] + 800285a: 6bdb ldr r3, [r3, #60] @ 0x3c + 800285c: 2b00 cmp r3, #0 + 800285e: d03b beq.n 80028d8 + 8002860: 68bb ldr r3, [r7, #8] + 8002862: 2b12 cmp r3, #18 + 8002864: d002 beq.n 800286c + 8002866: 68bb ldr r3, [r7, #8] + 8002868: 2b22 cmp r3, #34 @ 0x22 + 800286a: d135 bne.n 80028d8 (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) { if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) - 8003090: 687b ldr r3, [r7, #4] - 8003092: 681b ldr r3, [r3, #0] - 8003094: 681a ldr r2, [r3, #0] - 8003096: 2380 movs r3, #128 @ 0x80 - 8003098: 021b lsls r3, r3, #8 - 800309a: 401a ands r2, r3 - 800309c: 2380 movs r3, #128 @ 0x80 - 800309e: 021b lsls r3, r3, #8 - 80030a0: 429a cmp r2, r3 - 80030a2: d107 bne.n 80030b4 + 800286c: 687b ldr r3, [r7, #4] + 800286e: 681b ldr r3, [r3, #0] + 8002870: 681a ldr r2, [r3, #0] + 8002872: 2380 movs r3, #128 @ 0x80 + 8002874: 021b lsls r3, r3, #8 + 8002876: 401a ands r2, r3 + 8002878: 2380 movs r3, #128 @ 0x80 + 800287a: 021b lsls r3, r3, #8 + 800287c: 429a cmp r2, r3 + 800287e: d107 bne.n 8002890 { hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 80030a4: 687b ldr r3, [r7, #4] - 80030a6: 681b ldr r3, [r3, #0] - 80030a8: 681a ldr r2, [r3, #0] - 80030aa: 687b ldr r3, [r7, #4] - 80030ac: 681b ldr r3, [r3, #0] - 80030ae: 491e ldr r1, [pc, #120] @ (8003128 ) - 80030b0: 400a ands r2, r1 - 80030b2: 601a str r2, [r3, #0] + 8002880: 687b ldr r3, [r7, #4] + 8002882: 681b ldr r3, [r3, #0] + 8002884: 681a ldr r2, [r3, #0] + 8002886: 687b ldr r3, [r7, #4] + 8002888: 681b ldr r3, [r3, #0] + 800288a: 491e ldr r1, [pc, #120] @ (8002904 ) + 800288c: 400a ands r2, r1 + 800288e: 601a str r2, [r3, #0] } if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 80030b4: 687b ldr r3, [r7, #4] - 80030b6: 6bdb ldr r3, [r3, #60] @ 0x3c - 80030b8: 0018 movs r0, r3 - 80030ba: f7fe fbc3 bl 8001844 - 80030be: 0003 movs r3, r0 - 80030c0: 2b01 cmp r3, #1 - 80030c2: d016 beq.n 80030f2 + 8002890: 687b ldr r3, [r7, #4] + 8002892: 6bdb ldr r3, [r3, #60] @ 0x3c + 8002894: 0018 movs r0, r3 + 8002896: f7ff f875 bl 8001984 + 800289a: 0003 movs r3, r0 + 800289c: 2b01 cmp r3, #1 + 800289e: d016 beq.n 80028ce { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; - 80030c4: 687b ldr r3, [r7, #4] - 80030c6: 6bdb ldr r3, [r3, #60] @ 0x3c - 80030c8: 4a16 ldr r2, [pc, #88] @ (8003124 ) - 80030ca: 639a str r2, [r3, #56] @ 0x38 + 80028a0: 687b ldr r3, [r7, #4] + 80028a2: 6bdb ldr r3, [r3, #60] @ 0x3c + 80028a4: 4a16 ldr r2, [pc, #88] @ (8002900 ) + 80028a6: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80030cc: 687b ldr r3, [r7, #4] - 80030ce: 2240 movs r2, #64 @ 0x40 - 80030d0: 2100 movs r1, #0 - 80030d2: 5499 strb r1, [r3, r2] + 80028a8: 687b ldr r3, [r7, #4] + 80028aa: 2240 movs r2, #64 @ 0x40 + 80028ac: 2100 movs r1, #0 + 80028ae: 5499 strb r1, [r3, r2] /* Abort DMA RX */ if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) - 80030d4: 687b ldr r3, [r7, #4] - 80030d6: 6bdb ldr r3, [r3, #60] @ 0x3c - 80030d8: 0018 movs r0, r3 - 80030da: f7fe fb49 bl 8001770 - 80030de: 1e03 subs r3, r0, #0 - 80030e0: d013 beq.n 800310a + 80028b0: 687b ldr r3, [r7, #4] + 80028b2: 6bdb ldr r3, [r3, #60] @ 0x3c + 80028b4: 0018 movs r0, r3 + 80028b6: f7fe fffb bl 80018b0 + 80028ba: 1e03 subs r3, r0, #0 + 80028bc: d013 beq.n 80028e6 { /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); - 80030e2: 687b ldr r3, [r7, #4] - 80030e4: 6bdb ldr r3, [r3, #60] @ 0x3c - 80030e6: 6b9a ldr r2, [r3, #56] @ 0x38 - 80030e8: 687b ldr r3, [r7, #4] - 80030ea: 6bdb ldr r3, [r3, #60] @ 0x3c - 80030ec: 0018 movs r0, r3 - 80030ee: 4790 blx r2 + 80028be: 687b ldr r3, [r7, #4] + 80028c0: 6bdb ldr r3, [r3, #60] @ 0x3c + 80028c2: 6b9a ldr r2, [r3, #56] @ 0x38 + 80028c4: 687b ldr r3, [r7, #4] + 80028c6: 6bdb ldr r3, [r3, #60] @ 0x3c + 80028c8: 0018 movs r0, r3 + 80028ca: 4790 blx r2 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 80030f0: e00b b.n 800310a + 80028cc: e00b b.n 80028e6 } } else { I2C_TreatErrorCallback(hi2c); - 80030f2: 687b ldr r3, [r7, #4] - 80030f4: 0018 movs r0, r3 - 80030f6: f000 f819 bl 800312c + 80028ce: 687b ldr r3, [r7, #4] + 80028d0: 0018 movs r0, r3 + 80028d2: f000 f819 bl 8002908 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 80030fa: e006 b.n 800310a + 80028d6: e006 b.n 80028e6 } } else { I2C_TreatErrorCallback(hi2c); - 80030fc: 687b ldr r3, [r7, #4] - 80030fe: 0018 movs r0, r3 - 8003100: f000 f814 bl 800312c + 80028d8: 687b ldr r3, [r7, #4] + 80028da: 0018 movs r0, r3 + 80028dc: f000 f814 bl 8002908 } } - 8003104: e002 b.n 800310c + 80028e0: e002 b.n 80028e8 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 8003106: 46c0 nop @ (mov r8, r8) - 8003108: e000 b.n 800310c + 80028e2: 46c0 nop @ (mov r8, r8) + 80028e4: e000 b.n 80028e8 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 800310a: 46c0 nop @ (mov r8, r8) + 80028e6: 46c0 nop @ (mov r8, r8) } - 800310c: 46c0 nop @ (mov r8, r8) - 800310e: 46bd mov sp, r7 - 8003110: b004 add sp, #16 - 8003112: bd80 pop {r7, pc} - 8003114: ffff0000 .word 0xffff0000 - 8003118: 08001f19 .word 0x08001f19 - 800311c: 00008003 .word 0x00008003 - 8003120: ffffbfff .word 0xffffbfff - 8003124: 080031c3 .word 0x080031c3 - 8003128: ffff7fff .word 0xffff7fff + 80028e8: 46c0 nop @ (mov r8, r8) + 80028ea: 46bd mov sp, r7 + 80028ec: b004 add sp, #16 + 80028ee: bd80 pop {r7, pc} + 80028f0: ffff0000 .word 0xffff0000 + 80028f4: 08001f35 .word 0x08001f35 + 80028f8: 00008003 .word 0x00008003 + 80028fc: ffffbfff .word 0xffffbfff + 8002900: 0800299f .word 0x0800299f + 8002904: ffff7fff .word 0xffff7fff -0800312c : +08002908 : * @brief I2C Error callback treatment. * @param hi2c I2C handle. * @retval None */ static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c) { - 800312c: b580 push {r7, lr} - 800312e: b082 sub sp, #8 - 8003130: af00 add r7, sp, #0 - 8003132: 6078 str r0, [r7, #4] + 8002908: b580 push {r7, lr} + 800290a: b082 sub sp, #8 + 800290c: af00 add r7, sp, #0 + 800290e: 6078 str r0, [r7, #4] if (hi2c->State == HAL_I2C_STATE_ABORT) - 8003134: 687b ldr r3, [r7, #4] - 8003136: 2241 movs r2, #65 @ 0x41 - 8003138: 5c9b ldrb r3, [r3, r2] - 800313a: b2db uxtb r3, r3 - 800313c: 2b60 cmp r3, #96 @ 0x60 - 800313e: d10f bne.n 8003160 + 8002910: 687b ldr r3, [r7, #4] + 8002912: 2241 movs r2, #65 @ 0x41 + 8002914: 5c9b ldrb r3, [r3, r2] + 8002916: b2db uxtb r3, r3 + 8002918: 2b60 cmp r3, #96 @ 0x60 + 800291a: d10f bne.n 800293c { hi2c->State = HAL_I2C_STATE_READY; - 8003140: 687b ldr r3, [r7, #4] - 8003142: 2241 movs r2, #65 @ 0x41 - 8003144: 2120 movs r1, #32 - 8003146: 5499 strb r1, [r3, r2] + 800291c: 687b ldr r3, [r7, #4] + 800291e: 2241 movs r2, #65 @ 0x41 + 8002920: 2120 movs r1, #32 + 8002922: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_NONE; - 8003148: 687b ldr r3, [r7, #4] - 800314a: 2200 movs r2, #0 - 800314c: 631a str r2, [r3, #48] @ 0x30 + 8002924: 687b ldr r3, [r7, #4] + 8002926: 2200 movs r2, #0 + 8002928: 631a str r2, [r3, #48] @ 0x30 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800314e: 687b ldr r3, [r7, #4] - 8003150: 2240 movs r2, #64 @ 0x40 - 8003152: 2100 movs r1, #0 - 8003154: 5499 strb r1, [r3, r2] + 800292a: 687b ldr r3, [r7, #4] + 800292c: 2240 movs r2, #64 @ 0x40 + 800292e: 2100 movs r1, #0 + 8002930: 5499 strb r1, [r3, r2] /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AbortCpltCallback(hi2c); #else HAL_I2C_AbortCpltCallback(hi2c); - 8003156: 687b ldr r3, [r7, #4] - 8003158: 0018 movs r0, r3 - 800315a: f7fe fed4 bl 8001f06 + 8002932: 687b ldr r3, [r7, #4] + 8002934: 0018 movs r0, r3 + 8002936: f7ff faf4 bl 8001f22 hi2c->ErrorCallback(hi2c); #else HAL_I2C_ErrorCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } - 800315e: e00a b.n 8003176 + 800293a: e00a b.n 8002952 hi2c->PreviousState = I2C_STATE_NONE; - 8003160: 687b ldr r3, [r7, #4] - 8003162: 2200 movs r2, #0 - 8003164: 631a str r2, [r3, #48] @ 0x30 + 800293c: 687b ldr r3, [r7, #4] + 800293e: 2200 movs r2, #0 + 8002940: 631a str r2, [r3, #48] @ 0x30 __HAL_UNLOCK(hi2c); - 8003166: 687b ldr r3, [r7, #4] - 8003168: 2240 movs r2, #64 @ 0x40 - 800316a: 2100 movs r1, #0 - 800316c: 5499 strb r1, [r3, r2] + 8002942: 687b ldr r3, [r7, #4] + 8002944: 2240 movs r2, #64 @ 0x40 + 8002946: 2100 movs r1, #0 + 8002948: 5499 strb r1, [r3, r2] HAL_I2C_ErrorCallback(hi2c); - 800316e: 687b ldr r3, [r7, #4] - 8003170: 0018 movs r0, r3 - 8003172: f7fe fec0 bl 8001ef6 + 800294a: 687b ldr r3, [r7, #4] + 800294c: 0018 movs r0, r3 + 800294e: f7ff fae0 bl 8001f12 } - 8003176: 46c0 nop @ (mov r8, r8) - 8003178: 46bd mov sp, r7 - 800317a: b002 add sp, #8 - 800317c: bd80 pop {r7, pc} + 8002952: 46c0 nop @ (mov r8, r8) + 8002954: 46bd mov sp, r7 + 8002956: b002 add sp, #8 + 8002958: bd80 pop {r7, pc} -0800317e : +0800295a : * @brief I2C Tx data register flush process. * @param hi2c I2C handle. * @retval None */ static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) { - 800317e: b580 push {r7, lr} - 8003180: b082 sub sp, #8 - 8003182: af00 add r7, sp, #0 - 8003184: 6078 str r0, [r7, #4] + 800295a: b580 push {r7, lr} + 800295c: b082 sub sp, #8 + 800295e: af00 add r7, sp, #0 + 8002960: 6078 str r0, [r7, #4] /* If a pending TXIS flag is set */ /* Write a dummy data in TXDR to clear it */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) - 8003186: 687b ldr r3, [r7, #4] - 8003188: 681b ldr r3, [r3, #0] - 800318a: 699b ldr r3, [r3, #24] - 800318c: 2202 movs r2, #2 - 800318e: 4013 ands r3, r2 - 8003190: 2b02 cmp r3, #2 - 8003192: d103 bne.n 800319c + 8002962: 687b ldr r3, [r7, #4] + 8002964: 681b ldr r3, [r3, #0] + 8002966: 699b ldr r3, [r3, #24] + 8002968: 2202 movs r2, #2 + 800296a: 4013 ands r3, r2 + 800296c: 2b02 cmp r3, #2 + 800296e: d103 bne.n 8002978 { hi2c->Instance->TXDR = 0x00U; - 8003194: 687b ldr r3, [r7, #4] - 8003196: 681b ldr r3, [r3, #0] - 8003198: 2200 movs r2, #0 - 800319a: 629a str r2, [r3, #40] @ 0x28 + 8002970: 687b ldr r3, [r7, #4] + 8002972: 681b ldr r3, [r3, #0] + 8002974: 2200 movs r2, #0 + 8002976: 629a str r2, [r3, #40] @ 0x28 } /* Flush TX register if not empty */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 800319c: 687b ldr r3, [r7, #4] - 800319e: 681b ldr r3, [r3, #0] - 80031a0: 699b ldr r3, [r3, #24] - 80031a2: 2201 movs r2, #1 - 80031a4: 4013 ands r3, r2 - 80031a6: 2b01 cmp r3, #1 - 80031a8: d007 beq.n 80031ba + 8002978: 687b ldr r3, [r7, #4] + 800297a: 681b ldr r3, [r3, #0] + 800297c: 699b ldr r3, [r3, #24] + 800297e: 2201 movs r2, #1 + 8002980: 4013 ands r3, r2 + 8002982: 2b01 cmp r3, #1 + 8002984: d007 beq.n 8002996 { __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); - 80031aa: 687b ldr r3, [r7, #4] - 80031ac: 681b ldr r3, [r3, #0] - 80031ae: 699a ldr r2, [r3, #24] - 80031b0: 687b ldr r3, [r7, #4] - 80031b2: 681b ldr r3, [r3, #0] - 80031b4: 2101 movs r1, #1 - 80031b6: 430a orrs r2, r1 - 80031b8: 619a str r2, [r3, #24] + 8002986: 687b ldr r3, [r7, #4] + 8002988: 681b ldr r3, [r3, #0] + 800298a: 699a ldr r2, [r3, #24] + 800298c: 687b ldr r3, [r7, #4] + 800298e: 681b ldr r3, [r3, #0] + 8002990: 2101 movs r1, #1 + 8002992: 430a orrs r2, r1 + 8002994: 619a str r2, [r3, #24] } } - 80031ba: 46c0 nop @ (mov r8, r8) - 80031bc: 46bd mov sp, r7 - 80031be: b002 add sp, #8 - 80031c0: bd80 pop {r7, pc} + 8002996: 46c0 nop @ (mov r8, r8) + 8002998: 46bd mov sp, r7 + 800299a: b002 add sp, #8 + 800299c: bd80 pop {r7, pc} -080031c2 : +0800299e : * (To be called at end of DMA Abort procedure). * @param hdma DMA handle. * @retval None */ static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) { - 80031c2: b580 push {r7, lr} - 80031c4: b084 sub sp, #16 - 80031c6: af00 add r7, sp, #0 - 80031c8: 6078 str r0, [r7, #4] + 800299e: b580 push {r7, lr} + 80029a0: b084 sub sp, #16 + 80029a2: af00 add r7, sp, #0 + 80029a4: 6078 str r0, [r7, #4] /* Derogation MISRAC2012-Rule-11.5 */ I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); - 80031ca: 687b ldr r3, [r7, #4] - 80031cc: 6a9b ldr r3, [r3, #40] @ 0x28 - 80031ce: 60fb str r3, [r7, #12] + 80029a6: 687b ldr r3, [r7, #4] + 80029a8: 6a9b ldr r3, [r3, #40] @ 0x28 + 80029aa: 60fb str r3, [r7, #12] /* Reset AbortCpltCallback */ if (hi2c->hdmatx != NULL) - 80031d0: 68fb ldr r3, [r7, #12] - 80031d2: 6b9b ldr r3, [r3, #56] @ 0x38 - 80031d4: 2b00 cmp r3, #0 - 80031d6: d003 beq.n 80031e0 + 80029ac: 68fb ldr r3, [r7, #12] + 80029ae: 6b9b ldr r3, [r3, #56] @ 0x38 + 80029b0: 2b00 cmp r3, #0 + 80029b2: d003 beq.n 80029bc { hi2c->hdmatx->XferAbortCallback = NULL; - 80031d8: 68fb ldr r3, [r7, #12] - 80031da: 6b9b ldr r3, [r3, #56] @ 0x38 - 80031dc: 2200 movs r2, #0 - 80031de: 639a str r2, [r3, #56] @ 0x38 + 80029b4: 68fb ldr r3, [r7, #12] + 80029b6: 6b9b ldr r3, [r3, #56] @ 0x38 + 80029b8: 2200 movs r2, #0 + 80029ba: 639a str r2, [r3, #56] @ 0x38 } if (hi2c->hdmarx != NULL) - 80031e0: 68fb ldr r3, [r7, #12] - 80031e2: 6bdb ldr r3, [r3, #60] @ 0x3c - 80031e4: 2b00 cmp r3, #0 - 80031e6: d003 beq.n 80031f0 + 80029bc: 68fb ldr r3, [r7, #12] + 80029be: 6bdb ldr r3, [r3, #60] @ 0x3c + 80029c0: 2b00 cmp r3, #0 + 80029c2: d003 beq.n 80029cc { hi2c->hdmarx->XferAbortCallback = NULL; - 80031e8: 68fb ldr r3, [r7, #12] - 80031ea: 6bdb ldr r3, [r3, #60] @ 0x3c - 80031ec: 2200 movs r2, #0 - 80031ee: 639a str r2, [r3, #56] @ 0x38 + 80029c4: 68fb ldr r3, [r7, #12] + 80029c6: 6bdb ldr r3, [r3, #60] @ 0x3c + 80029c8: 2200 movs r2, #0 + 80029ca: 639a str r2, [r3, #56] @ 0x38 } I2C_TreatErrorCallback(hi2c); - 80031f0: 68fb ldr r3, [r7, #12] - 80031f2: 0018 movs r0, r3 - 80031f4: f7ff ff9a bl 800312c + 80029cc: 68fb ldr r3, [r7, #12] + 80029ce: 0018 movs r0, r3 + 80029d0: f7ff ff9a bl 8002908 } - 80031f8: 46c0 nop @ (mov r8, r8) - 80031fa: 46bd mov sp, r7 - 80031fc: b004 add sp, #16 - 80031fe: bd80 pop {r7, pc} + 80029d4: 46c0 nop @ (mov r8, r8) + 80029d6: 46bd mov sp, r7 + 80029d8: b004 add sp, #16 + 80029da: bd80 pop {r7, pc} -08003200 : - * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. - * @retval None - */ -static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, - uint32_t Request) -{ - 8003200: b590 push {r4, r7, lr} - 8003202: b087 sub sp, #28 - 8003204: af00 add r7, sp, #0 - 8003206: 60f8 str r0, [r7, #12] - 8003208: 0008 movs r0, r1 - 800320a: 0011 movs r1, r2 - 800320c: 607b str r3, [r7, #4] - 800320e: 240a movs r4, #10 - 8003210: 193b adds r3, r7, r4 - 8003212: 1c02 adds r2, r0, #0 - 8003214: 801a strh r2, [r3, #0] - 8003216: 2009 movs r0, #9 - 8003218: 183b adds r3, r7, r0 - 800321a: 1c0a adds r2, r1, #0 - 800321c: 701a strb r2, [r3, #0] - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_TRANSFER_MODE(Mode)); - assert_param(IS_TRANSFER_REQUEST(Request)); - - /* Declaration of tmp to prevent undefined behavior of volatile usage */ - uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ - 800321e: 193b adds r3, r7, r4 - 8003220: 881b ldrh r3, [r3, #0] - 8003222: 059b lsls r3, r3, #22 - 8003224: 0d9a lsrs r2, r3, #22 - (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ - 8003226: 183b adds r3, r7, r0 - 8003228: 781b ldrb r3, [r3, #0] - 800322a: 0419 lsls r1, r3, #16 - 800322c: 23ff movs r3, #255 @ 0xff - 800322e: 041b lsls r3, r3, #16 - 8003230: 400b ands r3, r1 - uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ - 8003232: 431a orrs r2, r3 - (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ - 8003234: 687b ldr r3, [r7, #4] - 8003236: 431a orrs r2, r3 - uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ - 8003238: 6abb ldr r3, [r7, #40] @ 0x28 - 800323a: 4313 orrs r3, r2 - 800323c: 005b lsls r3, r3, #1 - 800323e: 085b lsrs r3, r3, #1 - 8003240: 617b str r3, [r7, #20] - (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); - - /* update CR2 register */ - MODIFY_REG(hi2c->Instance->CR2, \ - 8003242: 68fb ldr r3, [r7, #12] - 8003244: 681b ldr r3, [r3, #0] - 8003246: 685b ldr r3, [r3, #4] - 8003248: 6aba ldr r2, [r7, #40] @ 0x28 - 800324a: 0d51 lsrs r1, r2, #21 - 800324c: 2280 movs r2, #128 @ 0x80 - 800324e: 00d2 lsls r2, r2, #3 - 8003250: 400a ands r2, r1 - 8003252: 4907 ldr r1, [pc, #28] @ (8003270 ) - 8003254: 430a orrs r2, r1 - 8003256: 43d2 mvns r2, r2 - 8003258: 401a ands r2, r3 - 800325a: 0011 movs r1, r2 - 800325c: 68fb ldr r3, [r7, #12] - 800325e: 681b ldr r3, [r3, #0] - 8003260: 697a ldr r2, [r7, #20] - 8003262: 430a orrs r2, r1 - 8003264: 605a str r2, [r3, #4] - ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ - (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ - I2C_CR2_START | I2C_CR2_STOP)), tmp); -} - 8003266: 46c0 nop @ (mov r8, r8) - 8003268: 46bd mov sp, r7 - 800326a: b007 add sp, #28 - 800326c: bd90 pop {r4, r7, pc} - 800326e: 46c0 nop @ (mov r8, r8) - 8003270: 03ff63ff .word 0x03ff63ff - -08003274 : - * the configuration information for the specified I2C. - * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. - * @retval None - */ -static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) -{ - 8003274: b580 push {r7, lr} - 8003276: b084 sub sp, #16 - 8003278: af00 add r7, sp, #0 - 800327a: 6078 str r0, [r7, #4] - 800327c: 000a movs r2, r1 - 800327e: 1cbb adds r3, r7, #2 - 8003280: 801a strh r2, [r3, #0] - uint32_t tmpisr = 0U; - 8003282: 2300 movs r3, #0 - 8003284: 60fb str r3, [r7, #12] - - if ((hi2c->XferISR != I2C_Master_ISR_DMA) && \ - 8003286: 687b ldr r3, [r7, #4] - 8003288: 6b5a ldr r2, [r3, #52] @ 0x34 - 800328a: 4b3c ldr r3, [pc, #240] @ (800337c ) - 800328c: 429a cmp r2, r3 - 800328e: d035 beq.n 80032fc - (hi2c->XferISR != I2C_Slave_ISR_DMA) && \ - 8003290: 687b ldr r3, [r7, #4] - 8003292: 6b5a ldr r2, [r3, #52] @ 0x34 - if ((hi2c->XferISR != I2C_Master_ISR_DMA) && \ - 8003294: 4b3a ldr r3, [pc, #232] @ (8003380 ) - 8003296: 429a cmp r2, r3 - 8003298: d030 beq.n 80032fc - (hi2c->XferISR != I2C_Mem_ISR_DMA)) - 800329a: 687b ldr r3, [r7, #4] - 800329c: 6b5a ldr r2, [r3, #52] @ 0x34 - (hi2c->XferISR != I2C_Slave_ISR_DMA) && \ - 800329e: 4b39 ldr r3, [pc, #228] @ (8003384 ) - 80032a0: 429a cmp r2, r3 - 80032a2: d02b beq.n 80032fc - { - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - 80032a4: 1cbb adds r3, r7, #2 - 80032a6: 2200 movs r2, #0 - 80032a8: 5e9b ldrsh r3, [r3, r2] - 80032aa: 2b00 cmp r3, #0 - 80032ac: da03 bge.n 80032b6 - { - /* Enable ERR, STOP, NACK and ADDR interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 80032ae: 68fb ldr r3, [r7, #12] - 80032b0: 22b8 movs r2, #184 @ 0xb8 - 80032b2: 4313 orrs r3, r2 - 80032b4: 60fb str r3, [r7, #12] - } - - if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - 80032b6: 1cbb adds r3, r7, #2 - 80032b8: 881b ldrh r3, [r3, #0] - 80032ba: 2201 movs r2, #1 - 80032bc: 4013 ands r3, r2 - 80032be: d003 beq.n 80032c8 - { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; - 80032c0: 68fb ldr r3, [r7, #12] - 80032c2: 22f2 movs r2, #242 @ 0xf2 - 80032c4: 4313 orrs r3, r2 - 80032c6: 60fb str r3, [r7, #12] - } - - if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - 80032c8: 1cbb adds r3, r7, #2 - 80032ca: 881b ldrh r3, [r3, #0] - 80032cc: 2202 movs r2, #2 - 80032ce: 4013 ands r3, r2 - 80032d0: d003 beq.n 80032da - { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; - 80032d2: 68fb ldr r3, [r7, #12] - 80032d4: 22f4 movs r2, #244 @ 0xf4 - 80032d6: 4313 orrs r3, r2 - 80032d8: 60fb str r3, [r7, #12] - } - - if (InterruptRequest == I2C_XFER_ERROR_IT) - 80032da: 1cbb adds r3, r7, #2 - 80032dc: 881b ldrh r3, [r3, #0] - 80032de: 2b10 cmp r3, #16 - 80032e0: d103 bne.n 80032ea - { - /* Enable ERR and NACK interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - 80032e2: 68fb ldr r3, [r7, #12] - 80032e4: 2290 movs r2, #144 @ 0x90 - 80032e6: 4313 orrs r3, r2 - 80032e8: 60fb str r3, [r7, #12] - } - - if (InterruptRequest == I2C_XFER_CPLT_IT) - 80032ea: 1cbb adds r3, r7, #2 - 80032ec: 881b ldrh r3, [r3, #0] - 80032ee: 2b20 cmp r3, #32 - 80032f0: d137 bne.n 8003362 - { - /* Enable STOP interrupts */ - tmpisr |= I2C_IT_STOPI; - 80032f2: 68fb ldr r3, [r7, #12] - 80032f4: 2220 movs r2, #32 - 80032f6: 4313 orrs r3, r2 - 80032f8: 60fb str r3, [r7, #12] - if (InterruptRequest == I2C_XFER_CPLT_IT) - 80032fa: e032 b.n 8003362 - } - } - - else - { - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - 80032fc: 1cbb adds r3, r7, #2 - 80032fe: 2200 movs r2, #0 - 8003300: 5e9b ldrsh r3, [r3, r2] - 8003302: 2b00 cmp r3, #0 - 8003304: da03 bge.n 800330e - { - /* Enable ERR, STOP, NACK and ADDR interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 8003306: 68fb ldr r3, [r7, #12] - 8003308: 22b8 movs r2, #184 @ 0xb8 - 800330a: 4313 orrs r3, r2 - 800330c: 60fb str r3, [r7, #12] - } - - if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - 800330e: 1cbb adds r3, r7, #2 - 8003310: 881b ldrh r3, [r3, #0] - 8003312: 2201 movs r2, #1 - 8003314: 4013 ands r3, r2 - 8003316: d003 beq.n 8003320 - { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; - 8003318: 68fb ldr r3, [r7, #12] - 800331a: 22f2 movs r2, #242 @ 0xf2 - 800331c: 4313 orrs r3, r2 - 800331e: 60fb str r3, [r7, #12] - } - - if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - 8003320: 1cbb adds r3, r7, #2 - 8003322: 881b ldrh r3, [r3, #0] - 8003324: 2202 movs r2, #2 - 8003326: 4013 ands r3, r2 - 8003328: d003 beq.n 8003332 - { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; - 800332a: 68fb ldr r3, [r7, #12] - 800332c: 22f4 movs r2, #244 @ 0xf4 - 800332e: 4313 orrs r3, r2 - 8003330: 60fb str r3, [r7, #12] - } - - if (InterruptRequest == I2C_XFER_ERROR_IT) - 8003332: 1cbb adds r3, r7, #2 - 8003334: 881b ldrh r3, [r3, #0] - 8003336: 2b10 cmp r3, #16 - 8003338: d103 bne.n 8003342 - { - /* Enable ERR and NACK interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - 800333a: 68fb ldr r3, [r7, #12] - 800333c: 2290 movs r2, #144 @ 0x90 - 800333e: 4313 orrs r3, r2 - 8003340: 60fb str r3, [r7, #12] - } - - if (InterruptRequest == I2C_XFER_CPLT_IT) - 8003342: 1cbb adds r3, r7, #2 - 8003344: 881b ldrh r3, [r3, #0] - 8003346: 2b20 cmp r3, #32 - 8003348: d103 bne.n 8003352 - { - /* Enable STOP interrupts */ - tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); - 800334a: 68fb ldr r3, [r7, #12] - 800334c: 2260 movs r2, #96 @ 0x60 - 800334e: 4313 orrs r3, r2 - 8003350: 60fb str r3, [r7, #12] - } - - if (InterruptRequest == I2C_XFER_RELOAD_IT) - 8003352: 1cbb adds r3, r7, #2 - 8003354: 881b ldrh r3, [r3, #0] - 8003356: 2b40 cmp r3, #64 @ 0x40 - 8003358: d103 bne.n 8003362 - { - /* Enable TC interrupts */ - tmpisr |= I2C_IT_TCI; - 800335a: 68fb ldr r3, [r7, #12] - 800335c: 2240 movs r2, #64 @ 0x40 - 800335e: 4313 orrs r3, r2 - 8003360: 60fb str r3, [r7, #12] - } - - /* Enable interrupts only at the end */ - /* to avoid the risk of I2C interrupt handle execution before */ - /* all interrupts requested done */ - __HAL_I2C_ENABLE_IT(hi2c, tmpisr); - 8003362: 687b ldr r3, [r7, #4] - 8003364: 681b ldr r3, [r3, #0] - 8003366: 6819 ldr r1, [r3, #0] - 8003368: 687b ldr r3, [r7, #4] - 800336a: 681b ldr r3, [r3, #0] - 800336c: 68fa ldr r2, [r7, #12] - 800336e: 430a orrs r2, r1 - 8003370: 601a str r2, [r3, #0] -} - 8003372: 46c0 nop @ (mov r8, r8) - 8003374: 46bd mov sp, r7 - 8003376: b004 add sp, #16 - 8003378: bd80 pop {r7, pc} - 800337a: 46c0 nop @ (mov r8, r8) - 800337c: 08002119 .word 0x08002119 - 8003380: 08002569 .word 0x08002569 - 8003384: 08002311 .word 0x08002311 - -08003388 : +080029dc : * the configuration information for the specified I2C. * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. * @retval None */ static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) { - 8003388: b580 push {r7, lr} - 800338a: b084 sub sp, #16 - 800338c: af00 add r7, sp, #0 - 800338e: 6078 str r0, [r7, #4] - 8003390: 000a movs r2, r1 - 8003392: 1cbb adds r3, r7, #2 - 8003394: 801a strh r2, [r3, #0] + 80029dc: b580 push {r7, lr} + 80029de: b084 sub sp, #16 + 80029e0: af00 add r7, sp, #0 + 80029e2: 6078 str r0, [r7, #4] + 80029e4: 000a movs r2, r1 + 80029e6: 1cbb adds r3, r7, #2 + 80029e8: 801a strh r2, [r3, #0] uint32_t tmpisr = 0U; - 8003396: 2300 movs r3, #0 - 8003398: 60fb str r3, [r7, #12] + 80029ea: 2300 movs r3, #0 + 80029ec: 60fb str r3, [r7, #12] if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - 800339a: 1cbb adds r3, r7, #2 - 800339c: 881b ldrh r3, [r3, #0] - 800339e: 2201 movs r2, #1 - 80033a0: 4013 ands r3, r2 - 80033a2: d010 beq.n 80033c6 + 80029ee: 1cbb adds r3, r7, #2 + 80029f0: 881b ldrh r3, [r3, #0] + 80029f2: 2201 movs r2, #1 + 80029f4: 4013 ands r3, r2 + 80029f6: d010 beq.n 8002a1a { /* Disable TC and TXI interrupts */ tmpisr |= I2C_IT_TCI | I2C_IT_TXI; - 80033a4: 68fb ldr r3, [r7, #12] - 80033a6: 2242 movs r2, #66 @ 0x42 - 80033a8: 4313 orrs r3, r2 - 80033aa: 60fb str r3, [r7, #12] + 80029f8: 68fb ldr r3, [r7, #12] + 80029fa: 2242 movs r2, #66 @ 0x42 + 80029fc: 4313 orrs r3, r2 + 80029fe: 60fb str r3, [r7, #12] if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) - 80033ac: 687b ldr r3, [r7, #4] - 80033ae: 2241 movs r2, #65 @ 0x41 - 80033b0: 5c9b ldrb r3, [r3, r2] - 80033b2: b2db uxtb r3, r3 - 80033b4: 001a movs r2, r3 - 80033b6: 2328 movs r3, #40 @ 0x28 - 80033b8: 4013 ands r3, r2 - 80033ba: 2b28 cmp r3, #40 @ 0x28 - 80033bc: d003 beq.n 80033c6 + 8002a00: 687b ldr r3, [r7, #4] + 8002a02: 2241 movs r2, #65 @ 0x41 + 8002a04: 5c9b ldrb r3, [r3, r2] + 8002a06: b2db uxtb r3, r3 + 8002a08: 001a movs r2, r3 + 8002a0a: 2328 movs r3, #40 @ 0x28 + 8002a0c: 4013 ands r3, r2 + 8002a0e: 2b28 cmp r3, #40 @ 0x28 + 8002a10: d003 beq.n 8002a1a { /* Disable NACK and STOP interrupts */ tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 80033be: 68fb ldr r3, [r7, #12] - 80033c0: 22b0 movs r2, #176 @ 0xb0 - 80033c2: 4313 orrs r3, r2 - 80033c4: 60fb str r3, [r7, #12] + 8002a12: 68fb ldr r3, [r7, #12] + 8002a14: 22b0 movs r2, #176 @ 0xb0 + 8002a16: 4313 orrs r3, r2 + 8002a18: 60fb str r3, [r7, #12] } } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - 80033c6: 1cbb adds r3, r7, #2 - 80033c8: 881b ldrh r3, [r3, #0] - 80033ca: 2202 movs r2, #2 - 80033cc: 4013 ands r3, r2 - 80033ce: d010 beq.n 80033f2 + 8002a1a: 1cbb adds r3, r7, #2 + 8002a1c: 881b ldrh r3, [r3, #0] + 8002a1e: 2202 movs r2, #2 + 8002a20: 4013 ands r3, r2 + 8002a22: d010 beq.n 8002a46 { /* Disable TC and RXI interrupts */ tmpisr |= I2C_IT_TCI | I2C_IT_RXI; - 80033d0: 68fb ldr r3, [r7, #12] - 80033d2: 2244 movs r2, #68 @ 0x44 - 80033d4: 4313 orrs r3, r2 - 80033d6: 60fb str r3, [r7, #12] + 8002a24: 68fb ldr r3, [r7, #12] + 8002a26: 2244 movs r2, #68 @ 0x44 + 8002a28: 4313 orrs r3, r2 + 8002a2a: 60fb str r3, [r7, #12] if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) - 80033d8: 687b ldr r3, [r7, #4] - 80033da: 2241 movs r2, #65 @ 0x41 - 80033dc: 5c9b ldrb r3, [r3, r2] - 80033de: b2db uxtb r3, r3 - 80033e0: 001a movs r2, r3 - 80033e2: 2328 movs r3, #40 @ 0x28 - 80033e4: 4013 ands r3, r2 - 80033e6: 2b28 cmp r3, #40 @ 0x28 - 80033e8: d003 beq.n 80033f2 + 8002a2c: 687b ldr r3, [r7, #4] + 8002a2e: 2241 movs r2, #65 @ 0x41 + 8002a30: 5c9b ldrb r3, [r3, r2] + 8002a32: b2db uxtb r3, r3 + 8002a34: 001a movs r2, r3 + 8002a36: 2328 movs r3, #40 @ 0x28 + 8002a38: 4013 ands r3, r2 + 8002a3a: 2b28 cmp r3, #40 @ 0x28 + 8002a3c: d003 beq.n 8002a46 { /* Disable NACK and STOP interrupts */ tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 80033ea: 68fb ldr r3, [r7, #12] - 80033ec: 22b0 movs r2, #176 @ 0xb0 - 80033ee: 4313 orrs r3, r2 - 80033f0: 60fb str r3, [r7, #12] + 8002a3e: 68fb ldr r3, [r7, #12] + 8002a40: 22b0 movs r2, #176 @ 0xb0 + 8002a42: 4313 orrs r3, r2 + 8002a44: 60fb str r3, [r7, #12] } } if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - 80033f2: 1cbb adds r3, r7, #2 - 80033f4: 2200 movs r2, #0 - 80033f6: 5e9b ldrsh r3, [r3, r2] - 80033f8: 2b00 cmp r3, #0 - 80033fa: da03 bge.n 8003404 + 8002a46: 1cbb adds r3, r7, #2 + 8002a48: 2200 movs r2, #0 + 8002a4a: 5e9b ldrsh r3, [r3, r2] + 8002a4c: 2b00 cmp r3, #0 + 8002a4e: da03 bge.n 8002a58 { /* Disable ADDR, NACK and STOP interrupts */ tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 80033fc: 68fb ldr r3, [r7, #12] - 80033fe: 22b8 movs r2, #184 @ 0xb8 - 8003400: 4313 orrs r3, r2 - 8003402: 60fb str r3, [r7, #12] + 8002a50: 68fb ldr r3, [r7, #12] + 8002a52: 22b8 movs r2, #184 @ 0xb8 + 8002a54: 4313 orrs r3, r2 + 8002a56: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_ERROR_IT) - 8003404: 1cbb adds r3, r7, #2 - 8003406: 881b ldrh r3, [r3, #0] - 8003408: 2b10 cmp r3, #16 - 800340a: d103 bne.n 8003414 + 8002a58: 1cbb adds r3, r7, #2 + 8002a5a: 881b ldrh r3, [r3, #0] + 8002a5c: 2b10 cmp r3, #16 + 8002a5e: d103 bne.n 8002a68 { /* Enable ERR and NACK interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - 800340c: 68fb ldr r3, [r7, #12] - 800340e: 2290 movs r2, #144 @ 0x90 - 8003410: 4313 orrs r3, r2 - 8003412: 60fb str r3, [r7, #12] + 8002a60: 68fb ldr r3, [r7, #12] + 8002a62: 2290 movs r2, #144 @ 0x90 + 8002a64: 4313 orrs r3, r2 + 8002a66: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_CPLT_IT) - 8003414: 1cbb adds r3, r7, #2 - 8003416: 881b ldrh r3, [r3, #0] - 8003418: 2b20 cmp r3, #32 - 800341a: d103 bne.n 8003424 + 8002a68: 1cbb adds r3, r7, #2 + 8002a6a: 881b ldrh r3, [r3, #0] + 8002a6c: 2b20 cmp r3, #32 + 8002a6e: d103 bne.n 8002a78 { /* Enable STOP interrupts */ tmpisr |= I2C_IT_STOPI; - 800341c: 68fb ldr r3, [r7, #12] - 800341e: 2220 movs r2, #32 - 8003420: 4313 orrs r3, r2 - 8003422: 60fb str r3, [r7, #12] + 8002a70: 68fb ldr r3, [r7, #12] + 8002a72: 2220 movs r2, #32 + 8002a74: 4313 orrs r3, r2 + 8002a76: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_RELOAD_IT) - 8003424: 1cbb adds r3, r7, #2 - 8003426: 881b ldrh r3, [r3, #0] - 8003428: 2b40 cmp r3, #64 @ 0x40 - 800342a: d103 bne.n 8003434 + 8002a78: 1cbb adds r3, r7, #2 + 8002a7a: 881b ldrh r3, [r3, #0] + 8002a7c: 2b40 cmp r3, #64 @ 0x40 + 8002a7e: d103 bne.n 8002a88 { /* Enable TC interrupts */ tmpisr |= I2C_IT_TCI; - 800342c: 68fb ldr r3, [r7, #12] - 800342e: 2240 movs r2, #64 @ 0x40 - 8003430: 4313 orrs r3, r2 - 8003432: 60fb str r3, [r7, #12] + 8002a80: 68fb ldr r3, [r7, #12] + 8002a82: 2240 movs r2, #64 @ 0x40 + 8002a84: 4313 orrs r3, r2 + 8002a86: 60fb str r3, [r7, #12] } /* Disable interrupts only at the end */ /* to avoid a breaking situation like at "t" time */ /* all disable interrupts request are not done */ __HAL_I2C_DISABLE_IT(hi2c, tmpisr); - 8003434: 687b ldr r3, [r7, #4] - 8003436: 681b ldr r3, [r3, #0] - 8003438: 681a ldr r2, [r3, #0] - 800343a: 68fb ldr r3, [r7, #12] - 800343c: 43d9 mvns r1, r3 - 800343e: 687b ldr r3, [r7, #4] - 8003440: 681b ldr r3, [r3, #0] - 8003442: 400a ands r2, r1 - 8003444: 601a str r2, [r3, #0] + 8002a88: 687b ldr r3, [r7, #4] + 8002a8a: 681b ldr r3, [r3, #0] + 8002a8c: 681a ldr r2, [r3, #0] + 8002a8e: 68fb ldr r3, [r7, #12] + 8002a90: 43d9 mvns r1, r3 + 8002a92: 687b ldr r3, [r7, #4] + 8002a94: 681b ldr r3, [r3, #0] + 8002a96: 400a ands r2, r1 + 8002a98: 601a str r2, [r3, #0] } - 8003446: 46c0 nop @ (mov r8, r8) - 8003448: 46bd mov sp, r7 - 800344a: b004 add sp, #16 - 800344c: bd80 pop {r7, pc} + 8002a9a: 46c0 nop @ (mov r8, r8) + 8002a9c: 46bd mov sp, r7 + 8002a9e: b004 add sp, #16 + 8002aa0: bd80 pop {r7, pc} ... -08003450 : +08002aa4 : * the configuration information for the specified I2Cx peripheral. * @param AnalogFilter New state of the Analog filter. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) { - 8003450: b580 push {r7, lr} - 8003452: b082 sub sp, #8 - 8003454: af00 add r7, sp, #0 - 8003456: 6078 str r0, [r7, #4] - 8003458: 6039 str r1, [r7, #0] + 8002aa4: b580 push {r7, lr} + 8002aa6: b082 sub sp, #8 + 8002aa8: af00 add r7, sp, #0 + 8002aaa: 6078 str r0, [r7, #4] + 8002aac: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); if (hi2c->State == HAL_I2C_STATE_READY) - 800345a: 687b ldr r3, [r7, #4] - 800345c: 2241 movs r2, #65 @ 0x41 - 800345e: 5c9b ldrb r3, [r3, r2] - 8003460: b2db uxtb r3, r3 - 8003462: 2b20 cmp r3, #32 - 8003464: d138 bne.n 80034d8 + 8002aae: 687b ldr r3, [r7, #4] + 8002ab0: 2241 movs r2, #65 @ 0x41 + 8002ab2: 5c9b ldrb r3, [r3, r2] + 8002ab4: b2db uxtb r3, r3 + 8002ab6: 2b20 cmp r3, #32 + 8002ab8: d138 bne.n 8002b2c { /* Process Locked */ __HAL_LOCK(hi2c); - 8003466: 687b ldr r3, [r7, #4] - 8003468: 2240 movs r2, #64 @ 0x40 - 800346a: 5c9b ldrb r3, [r3, r2] - 800346c: 2b01 cmp r3, #1 - 800346e: d101 bne.n 8003474 - 8003470: 2302 movs r3, #2 - 8003472: e032 b.n 80034da - 8003474: 687b ldr r3, [r7, #4] - 8003476: 2240 movs r2, #64 @ 0x40 - 8003478: 2101 movs r1, #1 - 800347a: 5499 strb r1, [r3, r2] + 8002aba: 687b ldr r3, [r7, #4] + 8002abc: 2240 movs r2, #64 @ 0x40 + 8002abe: 5c9b ldrb r3, [r3, r2] + 8002ac0: 2b01 cmp r3, #1 + 8002ac2: d101 bne.n 8002ac8 + 8002ac4: 2302 movs r3, #2 + 8002ac6: e032 b.n 8002b2e + 8002ac8: 687b ldr r3, [r7, #4] + 8002aca: 2240 movs r2, #64 @ 0x40 + 8002acc: 2101 movs r1, #1 + 8002ace: 5499 strb r1, [r3, r2] hi2c->State = HAL_I2C_STATE_BUSY; - 800347c: 687b ldr r3, [r7, #4] - 800347e: 2241 movs r2, #65 @ 0x41 - 8003480: 2124 movs r1, #36 @ 0x24 - 8003482: 5499 strb r1, [r3, r2] + 8002ad0: 687b ldr r3, [r7, #4] + 8002ad2: 2241 movs r2, #65 @ 0x41 + 8002ad4: 2124 movs r1, #36 @ 0x24 + 8002ad6: 5499 strb r1, [r3, r2] /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 8003484: 687b ldr r3, [r7, #4] - 8003486: 681b ldr r3, [r3, #0] - 8003488: 681a ldr r2, [r3, #0] - 800348a: 687b ldr r3, [r7, #4] - 800348c: 681b ldr r3, [r3, #0] - 800348e: 2101 movs r1, #1 - 8003490: 438a bics r2, r1 - 8003492: 601a str r2, [r3, #0] + 8002ad8: 687b ldr r3, [r7, #4] + 8002ada: 681b ldr r3, [r3, #0] + 8002adc: 681a ldr r2, [r3, #0] + 8002ade: 687b ldr r3, [r7, #4] + 8002ae0: 681b ldr r3, [r3, #0] + 8002ae2: 2101 movs r1, #1 + 8002ae4: 438a bics r2, r1 + 8002ae6: 601a str r2, [r3, #0] /* Reset I2Cx ANOFF bit */ hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); - 8003494: 687b ldr r3, [r7, #4] - 8003496: 681b ldr r3, [r3, #0] - 8003498: 681a ldr r2, [r3, #0] - 800349a: 687b ldr r3, [r7, #4] - 800349c: 681b ldr r3, [r3, #0] - 800349e: 4911 ldr r1, [pc, #68] @ (80034e4 ) - 80034a0: 400a ands r2, r1 - 80034a2: 601a str r2, [r3, #0] + 8002ae8: 687b ldr r3, [r7, #4] + 8002aea: 681b ldr r3, [r3, #0] + 8002aec: 681a ldr r2, [r3, #0] + 8002aee: 687b ldr r3, [r7, #4] + 8002af0: 681b ldr r3, [r3, #0] + 8002af2: 4911 ldr r1, [pc, #68] @ (8002b38 ) + 8002af4: 400a ands r2, r1 + 8002af6: 601a str r2, [r3, #0] /* Set analog filter bit*/ hi2c->Instance->CR1 |= AnalogFilter; - 80034a4: 687b ldr r3, [r7, #4] - 80034a6: 681b ldr r3, [r3, #0] - 80034a8: 6819 ldr r1, [r3, #0] - 80034aa: 687b ldr r3, [r7, #4] - 80034ac: 681b ldr r3, [r3, #0] - 80034ae: 683a ldr r2, [r7, #0] - 80034b0: 430a orrs r2, r1 - 80034b2: 601a str r2, [r3, #0] + 8002af8: 687b ldr r3, [r7, #4] + 8002afa: 681b ldr r3, [r3, #0] + 8002afc: 6819 ldr r1, [r3, #0] + 8002afe: 687b ldr r3, [r7, #4] + 8002b00: 681b ldr r3, [r3, #0] + 8002b02: 683a ldr r2, [r7, #0] + 8002b04: 430a orrs r2, r1 + 8002b06: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); - 80034b4: 687b ldr r3, [r7, #4] - 80034b6: 681b ldr r3, [r3, #0] - 80034b8: 681a ldr r2, [r3, #0] - 80034ba: 687b ldr r3, [r7, #4] - 80034bc: 681b ldr r3, [r3, #0] - 80034be: 2101 movs r1, #1 - 80034c0: 430a orrs r2, r1 - 80034c2: 601a str r2, [r3, #0] + 8002b08: 687b ldr r3, [r7, #4] + 8002b0a: 681b ldr r3, [r3, #0] + 8002b0c: 681a ldr r2, [r3, #0] + 8002b0e: 687b ldr r3, [r7, #4] + 8002b10: 681b ldr r3, [r3, #0] + 8002b12: 2101 movs r1, #1 + 8002b14: 430a orrs r2, r1 + 8002b16: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 80034c4: 687b ldr r3, [r7, #4] - 80034c6: 2241 movs r2, #65 @ 0x41 - 80034c8: 2120 movs r1, #32 - 80034ca: 5499 strb r1, [r3, r2] + 8002b18: 687b ldr r3, [r7, #4] + 8002b1a: 2241 movs r2, #65 @ 0x41 + 8002b1c: 2120 movs r1, #32 + 8002b1e: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80034cc: 687b ldr r3, [r7, #4] - 80034ce: 2240 movs r2, #64 @ 0x40 - 80034d0: 2100 movs r1, #0 - 80034d2: 5499 strb r1, [r3, r2] + 8002b20: 687b ldr r3, [r7, #4] + 8002b22: 2240 movs r2, #64 @ 0x40 + 8002b24: 2100 movs r1, #0 + 8002b26: 5499 strb r1, [r3, r2] return HAL_OK; - 80034d4: 2300 movs r3, #0 - 80034d6: e000 b.n 80034da + 8002b28: 2300 movs r3, #0 + 8002b2a: e000 b.n 8002b2e } else { return HAL_BUSY; - 80034d8: 2302 movs r3, #2 + 8002b2c: 2302 movs r3, #2 } } - 80034da: 0018 movs r0, r3 - 80034dc: 46bd mov sp, r7 - 80034de: b002 add sp, #8 - 80034e0: bd80 pop {r7, pc} - 80034e2: 46c0 nop @ (mov r8, r8) - 80034e4: ffffefff .word 0xffffefff + 8002b2e: 0018 movs r0, r3 + 8002b30: 46bd mov sp, r7 + 8002b32: b002 add sp, #8 + 8002b34: bd80 pop {r7, pc} + 8002b36: 46c0 nop @ (mov r8, r8) + 8002b38: ffffefff .word 0xffffefff -080034e8 : +08002b3c : * the configuration information for the specified I2Cx peripheral. * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) { - 80034e8: b580 push {r7, lr} - 80034ea: b084 sub sp, #16 - 80034ec: af00 add r7, sp, #0 - 80034ee: 6078 str r0, [r7, #4] - 80034f0: 6039 str r1, [r7, #0] + 8002b3c: b580 push {r7, lr} + 8002b3e: b084 sub sp, #16 + 8002b40: af00 add r7, sp, #0 + 8002b42: 6078 str r0, [r7, #4] + 8002b44: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); if (hi2c->State == HAL_I2C_STATE_READY) - 80034f2: 687b ldr r3, [r7, #4] - 80034f4: 2241 movs r2, #65 @ 0x41 - 80034f6: 5c9b ldrb r3, [r3, r2] - 80034f8: b2db uxtb r3, r3 - 80034fa: 2b20 cmp r3, #32 - 80034fc: d139 bne.n 8003572 + 8002b46: 687b ldr r3, [r7, #4] + 8002b48: 2241 movs r2, #65 @ 0x41 + 8002b4a: 5c9b ldrb r3, [r3, r2] + 8002b4c: b2db uxtb r3, r3 + 8002b4e: 2b20 cmp r3, #32 + 8002b50: d139 bne.n 8002bc6 { /* Process Locked */ __HAL_LOCK(hi2c); - 80034fe: 687b ldr r3, [r7, #4] - 8003500: 2240 movs r2, #64 @ 0x40 - 8003502: 5c9b ldrb r3, [r3, r2] - 8003504: 2b01 cmp r3, #1 - 8003506: d101 bne.n 800350c - 8003508: 2302 movs r3, #2 - 800350a: e033 b.n 8003574 - 800350c: 687b ldr r3, [r7, #4] - 800350e: 2240 movs r2, #64 @ 0x40 - 8003510: 2101 movs r1, #1 - 8003512: 5499 strb r1, [r3, r2] + 8002b52: 687b ldr r3, [r7, #4] + 8002b54: 2240 movs r2, #64 @ 0x40 + 8002b56: 5c9b ldrb r3, [r3, r2] + 8002b58: 2b01 cmp r3, #1 + 8002b5a: d101 bne.n 8002b60 + 8002b5c: 2302 movs r3, #2 + 8002b5e: e033 b.n 8002bc8 + 8002b60: 687b ldr r3, [r7, #4] + 8002b62: 2240 movs r2, #64 @ 0x40 + 8002b64: 2101 movs r1, #1 + 8002b66: 5499 strb r1, [r3, r2] hi2c->State = HAL_I2C_STATE_BUSY; - 8003514: 687b ldr r3, [r7, #4] - 8003516: 2241 movs r2, #65 @ 0x41 - 8003518: 2124 movs r1, #36 @ 0x24 - 800351a: 5499 strb r1, [r3, r2] + 8002b68: 687b ldr r3, [r7, #4] + 8002b6a: 2241 movs r2, #65 @ 0x41 + 8002b6c: 2124 movs r1, #36 @ 0x24 + 8002b6e: 5499 strb r1, [r3, r2] /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 800351c: 687b ldr r3, [r7, #4] - 800351e: 681b ldr r3, [r3, #0] - 8003520: 681a ldr r2, [r3, #0] - 8003522: 687b ldr r3, [r7, #4] - 8003524: 681b ldr r3, [r3, #0] - 8003526: 2101 movs r1, #1 - 8003528: 438a bics r2, r1 - 800352a: 601a str r2, [r3, #0] + 8002b70: 687b ldr r3, [r7, #4] + 8002b72: 681b ldr r3, [r3, #0] + 8002b74: 681a ldr r2, [r3, #0] + 8002b76: 687b ldr r3, [r7, #4] + 8002b78: 681b ldr r3, [r3, #0] + 8002b7a: 2101 movs r1, #1 + 8002b7c: 438a bics r2, r1 + 8002b7e: 601a str r2, [r3, #0] /* Get the old register value */ tmpreg = hi2c->Instance->CR1; - 800352c: 687b ldr r3, [r7, #4] - 800352e: 681b ldr r3, [r3, #0] - 8003530: 681b ldr r3, [r3, #0] - 8003532: 60fb str r3, [r7, #12] + 8002b80: 687b ldr r3, [r7, #4] + 8002b82: 681b ldr r3, [r3, #0] + 8002b84: 681b ldr r3, [r3, #0] + 8002b86: 60fb str r3, [r7, #12] /* Reset I2Cx DNF bits [11:8] */ tmpreg &= ~(I2C_CR1_DNF); - 8003534: 68fb ldr r3, [r7, #12] - 8003536: 4a11 ldr r2, [pc, #68] @ (800357c ) - 8003538: 4013 ands r3, r2 - 800353a: 60fb str r3, [r7, #12] + 8002b88: 68fb ldr r3, [r7, #12] + 8002b8a: 4a11 ldr r2, [pc, #68] @ (8002bd0 ) + 8002b8c: 4013 ands r3, r2 + 8002b8e: 60fb str r3, [r7, #12] /* Set I2Cx DNF coefficient */ tmpreg |= DigitalFilter << 8U; - 800353c: 683b ldr r3, [r7, #0] - 800353e: 021b lsls r3, r3, #8 - 8003540: 68fa ldr r2, [r7, #12] - 8003542: 4313 orrs r3, r2 - 8003544: 60fb str r3, [r7, #12] + 8002b90: 683b ldr r3, [r7, #0] + 8002b92: 021b lsls r3, r3, #8 + 8002b94: 68fa ldr r2, [r7, #12] + 8002b96: 4313 orrs r3, r2 + 8002b98: 60fb str r3, [r7, #12] /* Store the new register value */ hi2c->Instance->CR1 = tmpreg; - 8003546: 687b ldr r3, [r7, #4] - 8003548: 681b ldr r3, [r3, #0] - 800354a: 68fa ldr r2, [r7, #12] - 800354c: 601a str r2, [r3, #0] + 8002b9a: 687b ldr r3, [r7, #4] + 8002b9c: 681b ldr r3, [r3, #0] + 8002b9e: 68fa ldr r2, [r7, #12] + 8002ba0: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); - 800354e: 687b ldr r3, [r7, #4] - 8003550: 681b ldr r3, [r3, #0] - 8003552: 681a ldr r2, [r3, #0] - 8003554: 687b ldr r3, [r7, #4] - 8003556: 681b ldr r3, [r3, #0] - 8003558: 2101 movs r1, #1 - 800355a: 430a orrs r2, r1 - 800355c: 601a str r2, [r3, #0] + 8002ba2: 687b ldr r3, [r7, #4] + 8002ba4: 681b ldr r3, [r3, #0] + 8002ba6: 681a ldr r2, [r3, #0] + 8002ba8: 687b ldr r3, [r7, #4] + 8002baa: 681b ldr r3, [r3, #0] + 8002bac: 2101 movs r1, #1 + 8002bae: 430a orrs r2, r1 + 8002bb0: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 800355e: 687b ldr r3, [r7, #4] - 8003560: 2241 movs r2, #65 @ 0x41 - 8003562: 2120 movs r1, #32 - 8003564: 5499 strb r1, [r3, r2] + 8002bb2: 687b ldr r3, [r7, #4] + 8002bb4: 2241 movs r2, #65 @ 0x41 + 8002bb6: 2120 movs r1, #32 + 8002bb8: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003566: 687b ldr r3, [r7, #4] - 8003568: 2240 movs r2, #64 @ 0x40 - 800356a: 2100 movs r1, #0 - 800356c: 5499 strb r1, [r3, r2] + 8002bba: 687b ldr r3, [r7, #4] + 8002bbc: 2240 movs r2, #64 @ 0x40 + 8002bbe: 2100 movs r1, #0 + 8002bc0: 5499 strb r1, [r3, r2] return HAL_OK; - 800356e: 2300 movs r3, #0 - 8003570: e000 b.n 8003574 + 8002bc2: 2300 movs r3, #0 + 8002bc4: e000 b.n 8002bc8 } else { return HAL_BUSY; - 8003572: 2302 movs r3, #2 + 8002bc6: 2302 movs r3, #2 } } - 8003574: 0018 movs r0, r3 - 8003576: 46bd mov sp, r7 - 8003578: b004 add sp, #16 - 800357a: bd80 pop {r7, pc} - 800357c: fffff0ff .word 0xfffff0ff + 8002bc8: 0018 movs r0, r3 + 8002bca: 46bd mov sp, r7 + 8002bcc: b004 add sp, #16 + 8002bce: bd80 pop {r7, pc} + 8002bd0: fffff0ff .word 0xfffff0ff -08003580 : +08002bd4 : * cleared before returning the status. If the flag is not cleared within * 6 microseconds, HAL_TIMEOUT status is reported. * @retval HAL Status */ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) { - 8003580: b580 push {r7, lr} - 8003582: b084 sub sp, #16 - 8003584: af00 add r7, sp, #0 - 8003586: 6078 str r0, [r7, #4] + 8002bd4: b580 push {r7, lr} + 8002bd6: b084 sub sp, #16 + 8002bd8: af00 add r7, sp, #0 + 8002bda: 6078 str r0, [r7, #4] uint32_t wait_loop_index; assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); /* Modify voltage scaling range */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); - 8003588: 4b19 ldr r3, [pc, #100] @ (80035f0 ) - 800358a: 681b ldr r3, [r3, #0] - 800358c: 4a19 ldr r2, [pc, #100] @ (80035f4 ) - 800358e: 4013 ands r3, r2 - 8003590: 0019 movs r1, r3 - 8003592: 4b17 ldr r3, [pc, #92] @ (80035f0 ) - 8003594: 687a ldr r2, [r7, #4] - 8003596: 430a orrs r2, r1 - 8003598: 601a str r2, [r3, #0] + 8002bdc: 4b19 ldr r3, [pc, #100] @ (8002c44 ) + 8002bde: 681b ldr r3, [r3, #0] + 8002be0: 4a19 ldr r2, [pc, #100] @ (8002c48 ) + 8002be2: 4013 ands r3, r2 + 8002be4: 0019 movs r1, r3 + 8002be6: 4b17 ldr r3, [pc, #92] @ (8002c44 ) + 8002be8: 687a ldr r2, [r7, #4] + 8002bea: 430a orrs r2, r1 + 8002bec: 601a str r2, [r3, #0] /* In case of Range 1 selected, we need to ensure that main regulator reaches new value */ if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) - 800359a: 687a ldr r2, [r7, #4] - 800359c: 2380 movs r3, #128 @ 0x80 - 800359e: 009b lsls r3, r3, #2 - 80035a0: 429a cmp r2, r3 - 80035a2: d11f bne.n 80035e4 + 8002bee: 687a ldr r2, [r7, #4] + 8002bf0: 2380 movs r3, #128 @ 0x80 + 8002bf2: 009b lsls r3, r3, #2 + 8002bf4: 429a cmp r2, r3 + 8002bf6: d11f bne.n 8002c38 { /* Set timeout value */ wait_loop_index = ((PWR_VOSF_SETTING_DELAY_6_US * SystemCoreClock) / 1000000U) + 1U; - 80035a4: 4b14 ldr r3, [pc, #80] @ (80035f8 ) - 80035a6: 681a ldr r2, [r3, #0] - 80035a8: 0013 movs r3, r2 - 80035aa: 005b lsls r3, r3, #1 - 80035ac: 189b adds r3, r3, r2 - 80035ae: 005b lsls r3, r3, #1 - 80035b0: 4912 ldr r1, [pc, #72] @ (80035fc ) - 80035b2: 0018 movs r0, r3 - 80035b4: f7fc fdae bl 8000114 <__udivsi3> - 80035b8: 0003 movs r3, r0 - 80035ba: 3301 adds r3, #1 - 80035bc: 60fb str r3, [r7, #12] + 8002bf8: 4b14 ldr r3, [pc, #80] @ (8002c4c ) + 8002bfa: 681a ldr r2, [r3, #0] + 8002bfc: 0013 movs r3, r2 + 8002bfe: 005b lsls r3, r3, #1 + 8002c00: 189b adds r3, r3, r2 + 8002c02: 005b lsls r3, r3, #1 + 8002c04: 4912 ldr r1, [pc, #72] @ (8002c50 ) + 8002c06: 0018 movs r0, r3 + 8002c08: f7fd fa84 bl 8000114 <__udivsi3> + 8002c0c: 0003 movs r3, r0 + 8002c0e: 3301 adds r3, #1 + 8002c10: 60fb str r3, [r7, #12] /* Wait until VOSF is reset */ while (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - 80035be: e008 b.n 80035d2 + 8002c12: e008 b.n 8002c26 { if (wait_loop_index != 0U) - 80035c0: 68fb ldr r3, [r7, #12] - 80035c2: 2b00 cmp r3, #0 - 80035c4: d003 beq.n 80035ce + 8002c14: 68fb ldr r3, [r7, #12] + 8002c16: 2b00 cmp r3, #0 + 8002c18: d003 beq.n 8002c22 { wait_loop_index--; - 80035c6: 68fb ldr r3, [r7, #12] - 80035c8: 3b01 subs r3, #1 - 80035ca: 60fb str r3, [r7, #12] - 80035cc: e001 b.n 80035d2 + 8002c1a: 68fb ldr r3, [r7, #12] + 8002c1c: 3b01 subs r3, #1 + 8002c1e: 60fb str r3, [r7, #12] + 8002c20: e001 b.n 8002c26 } else { return HAL_TIMEOUT; - 80035ce: 2303 movs r3, #3 - 80035d0: e009 b.n 80035e6 + 8002c22: 2303 movs r3, #3 + 8002c24: e009 b.n 8002c3a while (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - 80035d2: 4b07 ldr r3, [pc, #28] @ (80035f0 ) - 80035d4: 695a ldr r2, [r3, #20] - 80035d6: 2380 movs r3, #128 @ 0x80 - 80035d8: 00db lsls r3, r3, #3 - 80035da: 401a ands r2, r3 - 80035dc: 2380 movs r3, #128 @ 0x80 - 80035de: 00db lsls r3, r3, #3 - 80035e0: 429a cmp r2, r3 - 80035e2: d0ed beq.n 80035c0 + 8002c26: 4b07 ldr r3, [pc, #28] @ (8002c44 ) + 8002c28: 695a ldr r2, [r3, #20] + 8002c2a: 2380 movs r3, #128 @ 0x80 + 8002c2c: 00db lsls r3, r3, #3 + 8002c2e: 401a ands r2, r3 + 8002c30: 2380 movs r3, #128 @ 0x80 + 8002c32: 00db lsls r3, r3, #3 + 8002c34: 429a cmp r2, r3 + 8002c36: d0ed beq.n 8002c14 } } } return HAL_OK; - 80035e4: 2300 movs r3, #0 + 8002c38: 2300 movs r3, #0 } - 80035e6: 0018 movs r0, r3 - 80035e8: 46bd mov sp, r7 - 80035ea: b004 add sp, #16 - 80035ec: bd80 pop {r7, pc} - 80035ee: 46c0 nop @ (mov r8, r8) - 80035f0: 40007000 .word 0x40007000 - 80035f4: fffff9ff .word 0xfffff9ff - 80035f8: 20000000 .word 0x20000000 - 80035fc: 000f4240 .word 0x000f4240 + 8002c3a: 0018 movs r0, r3 + 8002c3c: 46bd mov sp, r7 + 8002c3e: b004 add sp, #16 + 8002c40: bd80 pop {r7, pc} + 8002c42: 46c0 nop @ (mov r8, r8) + 8002c44: 40007000 .word 0x40007000 + 8002c48: fffff9ff .word 0xfffff9ff + 8002c4c: 20000000 .word 0x20000000 + 8002c50: 000f4240 .word 0x000f4240 -08003600 : +08002c54 : * @arg @ref LL_RCC_APB1_DIV_4 * @arg @ref LL_RCC_APB1_DIV_8 * @arg @ref LL_RCC_APB1_DIV_16 */ __STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void) { - 8003600: b580 push {r7, lr} - 8003602: af00 add r7, sp, #0 + 8002c54: b580 push {r7, lr} + 8002c56: af00 add r7, sp, #0 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE)); - 8003604: 4b03 ldr r3, [pc, #12] @ (8003614 ) - 8003606: 689a ldr r2, [r3, #8] - 8003608: 23e0 movs r3, #224 @ 0xe0 - 800360a: 01db lsls r3, r3, #7 - 800360c: 4013 ands r3, r2 + 8002c58: 4b03 ldr r3, [pc, #12] @ (8002c68 ) + 8002c5a: 689a ldr r2, [r3, #8] + 8002c5c: 23e0 movs r3, #224 @ 0xe0 + 8002c5e: 01db lsls r3, r3, #7 + 8002c60: 4013 ands r3, r2 } - 800360e: 0018 movs r0, r3 - 8003610: 46bd mov sp, r7 - 8003612: bd80 pop {r7, pc} - 8003614: 40021000 .word 0x40021000 + 8002c62: 0018 movs r0, r3 + 8002c64: 46bd mov sp, r7 + 8002c66: bd80 pop {r7, pc} + 8002c68: 40021000 .word 0x40021000 -08003618 : +08002c6c : * supported by this function. User should request a transition to LSE Off * first and then to LSE On or LSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8003618: b580 push {r7, lr} - 800361a: b088 sub sp, #32 - 800361c: af00 add r7, sp, #0 - 800361e: 6078 str r0, [r7, #4] + 8002c6c: b580 push {r7, lr} + 8002c6e: b088 sub sp, #32 + 8002c70: af00 add r7, sp, #0 + 8002c72: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t temp_sysclksrc; uint32_t temp_pllckcfg; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 8003620: 687b ldr r3, [r7, #4] - 8003622: 2b00 cmp r3, #0 - 8003624: d101 bne.n 800362a + 8002c74: 687b ldr r3, [r7, #4] + 8002c76: 2b00 cmp r3, #0 + 8002c78: d101 bne.n 8002c7e { return HAL_ERROR; - 8003626: 2301 movs r3, #1 - 8003628: e2f3 b.n 8003c12 + 8002c7a: 2301 movs r3, #1 + 8002c7c: e2f3 b.n 8003266 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 800362a: 687b ldr r3, [r7, #4] - 800362c: 681b ldr r3, [r3, #0] - 800362e: 2201 movs r2, #1 - 8003630: 4013 ands r3, r2 - 8003632: d100 bne.n 8003636 - 8003634: e07c b.n 8003730 + 8002c7e: 687b ldr r3, [r7, #4] + 8002c80: 681b ldr r3, [r3, #0] + 8002c82: 2201 movs r2, #1 + 8002c84: 4013 ands r3, r2 + 8002c86: d100 bne.n 8002c8a + 8002c88: e07c b.n 8002d84 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8003636: 4bc3 ldr r3, [pc, #780] @ (8003944 ) - 8003638: 689b ldr r3, [r3, #8] - 800363a: 2238 movs r2, #56 @ 0x38 - 800363c: 4013 ands r3, r2 - 800363e: 61bb str r3, [r7, #24] + 8002c8a: 4bc3 ldr r3, [pc, #780] @ (8002f98 ) + 8002c8c: 689b ldr r3, [r3, #8] + 8002c8e: 2238 movs r2, #56 @ 0x38 + 8002c90: 4013 ands r3, r2 + 8002c92: 61bb str r3, [r7, #24] temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); - 8003640: 4bc0 ldr r3, [pc, #768] @ (8003944 ) - 8003642: 68db ldr r3, [r3, #12] - 8003644: 2203 movs r2, #3 - 8003646: 4013 ands r3, r2 - 8003648: 617b str r3, [r7, #20] + 8002c94: 4bc0 ldr r3, [pc, #768] @ (8002f98 ) + 8002c96: 68db ldr r3, [r3, #12] + 8002c98: 2203 movs r2, #3 + 8002c9a: 4013 ands r3, r2 + 8002c9c: 617b str r3, [r7, #20] /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if (((temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (temp_pllckcfg == RCC_PLLSOURCE_HSE)) - 800364a: 69bb ldr r3, [r7, #24] - 800364c: 2b10 cmp r3, #16 - 800364e: d102 bne.n 8003656 - 8003650: 697b ldr r3, [r7, #20] - 8003652: 2b03 cmp r3, #3 - 8003654: d002 beq.n 800365c + 8002c9e: 69bb ldr r3, [r7, #24] + 8002ca0: 2b10 cmp r3, #16 + 8002ca2: d102 bne.n 8002caa + 8002ca4: 697b ldr r3, [r7, #20] + 8002ca6: 2b03 cmp r3, #3 + 8002ca8: d002 beq.n 8002cb0 || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSE)) - 8003656: 69bb ldr r3, [r7, #24] - 8003658: 2b08 cmp r3, #8 - 800365a: d10b bne.n 8003674 + 8002caa: 69bb ldr r3, [r7, #24] + 8002cac: 2b08 cmp r3, #8 + 8002cae: d10b bne.n 8002cc8 { if ((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800365c: 4bb9 ldr r3, [pc, #740] @ (8003944 ) - 800365e: 681a ldr r2, [r3, #0] - 8003660: 2380 movs r3, #128 @ 0x80 - 8003662: 029b lsls r3, r3, #10 - 8003664: 4013 ands r3, r2 - 8003666: d062 beq.n 800372e - 8003668: 687b ldr r3, [r7, #4] - 800366a: 685b ldr r3, [r3, #4] - 800366c: 2b00 cmp r3, #0 - 800366e: d15e bne.n 800372e + 8002cb0: 4bb9 ldr r3, [pc, #740] @ (8002f98 ) + 8002cb2: 681a ldr r2, [r3, #0] + 8002cb4: 2380 movs r3, #128 @ 0x80 + 8002cb6: 029b lsls r3, r3, #10 + 8002cb8: 4013 ands r3, r2 + 8002cba: d062 beq.n 8002d82 + 8002cbc: 687b ldr r3, [r7, #4] + 8002cbe: 685b ldr r3, [r3, #4] + 8002cc0: 2b00 cmp r3, #0 + 8002cc2: d15e bne.n 8002d82 { return HAL_ERROR; - 8003670: 2301 movs r3, #1 - 8003672: e2ce b.n 8003c12 + 8002cc4: 2301 movs r3, #1 + 8002cc6: e2ce b.n 8003266 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8003674: 687b ldr r3, [r7, #4] - 8003676: 685a ldr r2, [r3, #4] - 8003678: 2380 movs r3, #128 @ 0x80 - 800367a: 025b lsls r3, r3, #9 - 800367c: 429a cmp r2, r3 - 800367e: d107 bne.n 8003690 - 8003680: 4bb0 ldr r3, [pc, #704] @ (8003944 ) - 8003682: 681a ldr r2, [r3, #0] - 8003684: 4baf ldr r3, [pc, #700] @ (8003944 ) - 8003686: 2180 movs r1, #128 @ 0x80 - 8003688: 0249 lsls r1, r1, #9 - 800368a: 430a orrs r2, r1 - 800368c: 601a str r2, [r3, #0] - 800368e: e020 b.n 80036d2 - 8003690: 687b ldr r3, [r7, #4] - 8003692: 685a ldr r2, [r3, #4] - 8003694: 23a0 movs r3, #160 @ 0xa0 - 8003696: 02db lsls r3, r3, #11 - 8003698: 429a cmp r2, r3 - 800369a: d10e bne.n 80036ba - 800369c: 4ba9 ldr r3, [pc, #676] @ (8003944 ) - 800369e: 681a ldr r2, [r3, #0] - 80036a0: 4ba8 ldr r3, [pc, #672] @ (8003944 ) - 80036a2: 2180 movs r1, #128 @ 0x80 - 80036a4: 02c9 lsls r1, r1, #11 - 80036a6: 430a orrs r2, r1 - 80036a8: 601a str r2, [r3, #0] - 80036aa: 4ba6 ldr r3, [pc, #664] @ (8003944 ) - 80036ac: 681a ldr r2, [r3, #0] - 80036ae: 4ba5 ldr r3, [pc, #660] @ (8003944 ) - 80036b0: 2180 movs r1, #128 @ 0x80 - 80036b2: 0249 lsls r1, r1, #9 - 80036b4: 430a orrs r2, r1 - 80036b6: 601a str r2, [r3, #0] - 80036b8: e00b b.n 80036d2 - 80036ba: 4ba2 ldr r3, [pc, #648] @ (8003944 ) - 80036bc: 681a ldr r2, [r3, #0] - 80036be: 4ba1 ldr r3, [pc, #644] @ (8003944 ) - 80036c0: 49a1 ldr r1, [pc, #644] @ (8003948 ) - 80036c2: 400a ands r2, r1 - 80036c4: 601a str r2, [r3, #0] - 80036c6: 4b9f ldr r3, [pc, #636] @ (8003944 ) - 80036c8: 681a ldr r2, [r3, #0] - 80036ca: 4b9e ldr r3, [pc, #632] @ (8003944 ) - 80036cc: 499f ldr r1, [pc, #636] @ (800394c ) - 80036ce: 400a ands r2, r1 - 80036d0: 601a str r2, [r3, #0] + 8002cc8: 687b ldr r3, [r7, #4] + 8002cca: 685a ldr r2, [r3, #4] + 8002ccc: 2380 movs r3, #128 @ 0x80 + 8002cce: 025b lsls r3, r3, #9 + 8002cd0: 429a cmp r2, r3 + 8002cd2: d107 bne.n 8002ce4 + 8002cd4: 4bb0 ldr r3, [pc, #704] @ (8002f98 ) + 8002cd6: 681a ldr r2, [r3, #0] + 8002cd8: 4baf ldr r3, [pc, #700] @ (8002f98 ) + 8002cda: 2180 movs r1, #128 @ 0x80 + 8002cdc: 0249 lsls r1, r1, #9 + 8002cde: 430a orrs r2, r1 + 8002ce0: 601a str r2, [r3, #0] + 8002ce2: e020 b.n 8002d26 + 8002ce4: 687b ldr r3, [r7, #4] + 8002ce6: 685a ldr r2, [r3, #4] + 8002ce8: 23a0 movs r3, #160 @ 0xa0 + 8002cea: 02db lsls r3, r3, #11 + 8002cec: 429a cmp r2, r3 + 8002cee: d10e bne.n 8002d0e + 8002cf0: 4ba9 ldr r3, [pc, #676] @ (8002f98 ) + 8002cf2: 681a ldr r2, [r3, #0] + 8002cf4: 4ba8 ldr r3, [pc, #672] @ (8002f98 ) + 8002cf6: 2180 movs r1, #128 @ 0x80 + 8002cf8: 02c9 lsls r1, r1, #11 + 8002cfa: 430a orrs r2, r1 + 8002cfc: 601a str r2, [r3, #0] + 8002cfe: 4ba6 ldr r3, [pc, #664] @ (8002f98 ) + 8002d00: 681a ldr r2, [r3, #0] + 8002d02: 4ba5 ldr r3, [pc, #660] @ (8002f98 ) + 8002d04: 2180 movs r1, #128 @ 0x80 + 8002d06: 0249 lsls r1, r1, #9 + 8002d08: 430a orrs r2, r1 + 8002d0a: 601a str r2, [r3, #0] + 8002d0c: e00b b.n 8002d26 + 8002d0e: 4ba2 ldr r3, [pc, #648] @ (8002f98 ) + 8002d10: 681a ldr r2, [r3, #0] + 8002d12: 4ba1 ldr r3, [pc, #644] @ (8002f98 ) + 8002d14: 49a1 ldr r1, [pc, #644] @ (8002f9c ) + 8002d16: 400a ands r2, r1 + 8002d18: 601a str r2, [r3, #0] + 8002d1a: 4b9f ldr r3, [pc, #636] @ (8002f98 ) + 8002d1c: 681a ldr r2, [r3, #0] + 8002d1e: 4b9e ldr r3, [pc, #632] @ (8002f98 ) + 8002d20: 499f ldr r1, [pc, #636] @ (8002fa0 ) + 8002d22: 400a ands r2, r1 + 8002d24: 601a str r2, [r3, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 80036d2: 687b ldr r3, [r7, #4] - 80036d4: 685b ldr r3, [r3, #4] - 80036d6: 2b00 cmp r3, #0 - 80036d8: d014 beq.n 8003704 + 8002d26: 687b ldr r3, [r7, #4] + 8002d28: 685b ldr r3, [r3, #4] + 8002d2a: 2b00 cmp r3, #0 + 8002d2c: d014 beq.n 8002d58 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80036da: f7fd ff27 bl 800152c - 80036de: 0003 movs r3, r0 - 80036e0: 613b str r3, [r7, #16] + 8002d2e: f7fe fc9d bl 800166c + 8002d32: 0003 movs r3, r0 + 8002d34: 613b str r3, [r7, #16] /* Wait till HSE is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 80036e2: e008 b.n 80036f6 + 8002d36: e008 b.n 8002d4a { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 80036e4: f7fd ff22 bl 800152c - 80036e8: 0002 movs r2, r0 - 80036ea: 693b ldr r3, [r7, #16] - 80036ec: 1ad3 subs r3, r2, r3 - 80036ee: 2b64 cmp r3, #100 @ 0x64 - 80036f0: d901 bls.n 80036f6 + 8002d38: f7fe fc98 bl 800166c + 8002d3c: 0002 movs r2, r0 + 8002d3e: 693b ldr r3, [r7, #16] + 8002d40: 1ad3 subs r3, r2, r3 + 8002d42: 2b64 cmp r3, #100 @ 0x64 + 8002d44: d901 bls.n 8002d4a { return HAL_TIMEOUT; - 80036f2: 2303 movs r3, #3 - 80036f4: e28d b.n 8003c12 + 8002d46: 2303 movs r3, #3 + 8002d48: e28d b.n 8003266 while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 80036f6: 4b93 ldr r3, [pc, #588] @ (8003944 ) - 80036f8: 681a ldr r2, [r3, #0] - 80036fa: 2380 movs r3, #128 @ 0x80 - 80036fc: 029b lsls r3, r3, #10 - 80036fe: 4013 ands r3, r2 - 8003700: d0f0 beq.n 80036e4 - 8003702: e015 b.n 8003730 + 8002d4a: 4b93 ldr r3, [pc, #588] @ (8002f98 ) + 8002d4c: 681a ldr r2, [r3, #0] + 8002d4e: 2380 movs r3, #128 @ 0x80 + 8002d50: 029b lsls r3, r3, #10 + 8002d52: 4013 ands r3, r2 + 8002d54: d0f0 beq.n 8002d38 + 8002d56: e015 b.n 8002d84 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003704: f7fd ff12 bl 800152c - 8003708: 0003 movs r3, r0 - 800370a: 613b str r3, [r7, #16] + 8002d58: f7fe fc88 bl 800166c + 8002d5c: 0003 movs r3, r0 + 8002d5e: 613b str r3, [r7, #16] /* Wait till HSE is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) - 800370c: e008 b.n 8003720 + 8002d60: e008 b.n 8002d74 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 800370e: f7fd ff0d bl 800152c - 8003712: 0002 movs r2, r0 - 8003714: 693b ldr r3, [r7, #16] - 8003716: 1ad3 subs r3, r2, r3 - 8003718: 2b64 cmp r3, #100 @ 0x64 - 800371a: d901 bls.n 8003720 + 8002d62: f7fe fc83 bl 800166c + 8002d66: 0002 movs r2, r0 + 8002d68: 693b ldr r3, [r7, #16] + 8002d6a: 1ad3 subs r3, r2, r3 + 8002d6c: 2b64 cmp r3, #100 @ 0x64 + 8002d6e: d901 bls.n 8002d74 { return HAL_TIMEOUT; - 800371c: 2303 movs r3, #3 - 800371e: e278 b.n 8003c12 + 8002d70: 2303 movs r3, #3 + 8002d72: e278 b.n 8003266 while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) - 8003720: 4b88 ldr r3, [pc, #544] @ (8003944 ) - 8003722: 681a ldr r2, [r3, #0] - 8003724: 2380 movs r3, #128 @ 0x80 - 8003726: 029b lsls r3, r3, #10 - 8003728: 4013 ands r3, r2 - 800372a: d1f0 bne.n 800370e - 800372c: e000 b.n 8003730 + 8002d74: 4b88 ldr r3, [pc, #544] @ (8002f98 ) + 8002d76: 681a ldr r2, [r3, #0] + 8002d78: 2380 movs r3, #128 @ 0x80 + 8002d7a: 029b lsls r3, r3, #10 + 8002d7c: 4013 ands r3, r2 + 8002d7e: d1f0 bne.n 8002d62 + 8002d80: e000 b.n 8002d84 if ((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800372e: 46c0 nop @ (mov r8, r8) + 8002d82: 46c0 nop @ (mov r8, r8) } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8003730: 687b ldr r3, [r7, #4] - 8003732: 681b ldr r3, [r3, #0] - 8003734: 2202 movs r2, #2 - 8003736: 4013 ands r3, r2 - 8003738: d100 bne.n 800373c - 800373a: e099 b.n 8003870 + 8002d84: 687b ldr r3, [r7, #4] + 8002d86: 681b ldr r3, [r3, #0] + 8002d88: 2202 movs r2, #2 + 8002d8a: 4013 ands r3, r2 + 8002d8c: d100 bne.n 8002d90 + 8002d8e: e099 b.n 8002ec4 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_HSI_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); assert_param(IS_RCC_HSIDIV(RCC_OscInitStruct->HSIDiv)); /* Check if HSI16 is used as system clock or as PLL source when PLL is selected as system clock */ temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 800373c: 4b81 ldr r3, [pc, #516] @ (8003944 ) - 800373e: 689b ldr r3, [r3, #8] - 8003740: 2238 movs r2, #56 @ 0x38 - 8003742: 4013 ands r3, r2 - 8003744: 61bb str r3, [r7, #24] + 8002d90: 4b81 ldr r3, [pc, #516] @ (8002f98 ) + 8002d92: 689b ldr r3, [r3, #8] + 8002d94: 2238 movs r2, #56 @ 0x38 + 8002d96: 4013 ands r3, r2 + 8002d98: 61bb str r3, [r7, #24] temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); - 8003746: 4b7f ldr r3, [pc, #508] @ (8003944 ) - 8003748: 68db ldr r3, [r3, #12] - 800374a: 2203 movs r2, #3 - 800374c: 4013 ands r3, r2 - 800374e: 617b str r3, [r7, #20] + 8002d9a: 4b7f ldr r3, [pc, #508] @ (8002f98 ) + 8002d9c: 68db ldr r3, [r3, #12] + 8002d9e: 2203 movs r2, #3 + 8002da0: 4013 ands r3, r2 + 8002da2: 617b str r3, [r7, #20] if (((temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (temp_pllckcfg == RCC_PLLSOURCE_HSI)) - 8003750: 69bb ldr r3, [r7, #24] - 8003752: 2b10 cmp r3, #16 - 8003754: d102 bne.n 800375c - 8003756: 697b ldr r3, [r7, #20] - 8003758: 2b02 cmp r3, #2 - 800375a: d002 beq.n 8003762 + 8002da4: 69bb ldr r3, [r7, #24] + 8002da6: 2b10 cmp r3, #16 + 8002da8: d102 bne.n 8002db0 + 8002daa: 697b ldr r3, [r7, #20] + 8002dac: 2b02 cmp r3, #2 + 8002dae: d002 beq.n 8002db6 || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSI)) - 800375c: 69bb ldr r3, [r7, #24] - 800375e: 2b00 cmp r3, #0 - 8003760: d135 bne.n 80037ce + 8002db0: 69bb ldr r3, [r7, #24] + 8002db2: 2b00 cmp r3, #0 + 8002db4: d135 bne.n 8002e22 { /* When HSI is used as system clock or as PLL input clock it can not be disabled */ if ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 8003762: 4b78 ldr r3, [pc, #480] @ (8003944 ) - 8003764: 681a ldr r2, [r3, #0] - 8003766: 2380 movs r3, #128 @ 0x80 - 8003768: 00db lsls r3, r3, #3 - 800376a: 4013 ands r3, r2 - 800376c: d005 beq.n 800377a - 800376e: 687b ldr r3, [r7, #4] - 8003770: 68db ldr r3, [r3, #12] - 8003772: 2b00 cmp r3, #0 - 8003774: d101 bne.n 800377a + 8002db6: 4b78 ldr r3, [pc, #480] @ (8002f98 ) + 8002db8: 681a ldr r2, [r3, #0] + 8002dba: 2380 movs r3, #128 @ 0x80 + 8002dbc: 00db lsls r3, r3, #3 + 8002dbe: 4013 ands r3, r2 + 8002dc0: d005 beq.n 8002dce + 8002dc2: 687b ldr r3, [r7, #4] + 8002dc4: 68db ldr r3, [r3, #12] + 8002dc6: 2b00 cmp r3, #0 + 8002dc8: d101 bne.n 8002dce { return HAL_ERROR; - 8003776: 2301 movs r3, #1 - 8003778: e24b b.n 8003c12 + 8002dca: 2301 movs r3, #1 + 8002dcc: e24b b.n 8003266 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800377a: 4b72 ldr r3, [pc, #456] @ (8003944 ) - 800377c: 685b ldr r3, [r3, #4] - 800377e: 4a74 ldr r2, [pc, #464] @ (8003950 ) - 8003780: 4013 ands r3, r2 - 8003782: 0019 movs r1, r3 - 8003784: 687b ldr r3, [r7, #4] - 8003786: 695b ldr r3, [r3, #20] - 8003788: 021a lsls r2, r3, #8 - 800378a: 4b6e ldr r3, [pc, #440] @ (8003944 ) - 800378c: 430a orrs r2, r1 - 800378e: 605a str r2, [r3, #4] + 8002dce: 4b72 ldr r3, [pc, #456] @ (8002f98 ) + 8002dd0: 685b ldr r3, [r3, #4] + 8002dd2: 4a74 ldr r2, [pc, #464] @ (8002fa4 ) + 8002dd4: 4013 ands r3, r2 + 8002dd6: 0019 movs r1, r3 + 8002dd8: 687b ldr r3, [r7, #4] + 8002dda: 695b ldr r3, [r3, #20] + 8002ddc: 021a lsls r2, r3, #8 + 8002dde: 4b6e ldr r3, [pc, #440] @ (8002f98 ) + 8002de0: 430a orrs r2, r1 + 8002de2: 605a str r2, [r3, #4] if (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSI) - 8003790: 69bb ldr r3, [r7, #24] - 8003792: 2b00 cmp r3, #0 - 8003794: d112 bne.n 80037bc + 8002de4: 69bb ldr r3, [r7, #24] + 8002de6: 2b00 cmp r3, #0 + 8002de8: d112 bne.n 8002e10 { /* Adjust the HSI16 division factor */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 8003796: 4b6b ldr r3, [pc, #428] @ (8003944 ) - 8003798: 681b ldr r3, [r3, #0] - 800379a: 4a6e ldr r2, [pc, #440] @ (8003954 ) - 800379c: 4013 ands r3, r2 - 800379e: 0019 movs r1, r3 - 80037a0: 687b ldr r3, [r7, #4] - 80037a2: 691a ldr r2, [r3, #16] - 80037a4: 4b67 ldr r3, [pc, #412] @ (8003944 ) - 80037a6: 430a orrs r2, r1 - 80037a8: 601a str r2, [r3, #0] + 8002dea: 4b6b ldr r3, [pc, #428] @ (8002f98 ) + 8002dec: 681b ldr r3, [r3, #0] + 8002dee: 4a6e ldr r2, [pc, #440] @ (8002fa8 ) + 8002df0: 4013 ands r3, r2 + 8002df2: 0019 movs r1, r3 + 8002df4: 687b ldr r3, [r7, #4] + 8002df6: 691a ldr r2, [r3, #16] + 8002df8: 4b67 ldr r3, [pc, #412] @ (8002f98 ) + 8002dfa: 430a orrs r2, r1 + 8002dfc: 601a str r2, [r3, #0] /* Update the SystemCoreClock global variable with HSISYS value */ SystemCoreClock = (HSI_VALUE / (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos))); - 80037aa: 4b66 ldr r3, [pc, #408] @ (8003944 ) - 80037ac: 681b ldr r3, [r3, #0] - 80037ae: 0adb lsrs r3, r3, #11 - 80037b0: 2207 movs r2, #7 - 80037b2: 4013 ands r3, r2 - 80037b4: 4a68 ldr r2, [pc, #416] @ (8003958 ) - 80037b6: 40da lsrs r2, r3 - 80037b8: 4b68 ldr r3, [pc, #416] @ (800395c ) - 80037ba: 601a str r2, [r3, #0] + 8002dfe: 4b66 ldr r3, [pc, #408] @ (8002f98 ) + 8002e00: 681b ldr r3, [r3, #0] + 8002e02: 0adb lsrs r3, r3, #11 + 8002e04: 2207 movs r2, #7 + 8002e06: 4013 ands r3, r2 + 8002e08: 4a68 ldr r2, [pc, #416] @ (8002fac ) + 8002e0a: 40da lsrs r2, r3 + 8002e0c: 4b68 ldr r3, [pc, #416] @ (8002fb0 ) + 8002e0e: 601a str r2, [r3, #0] } /* Adapt Systick interrupt period */ if (HAL_InitTick(uwTickPrio) != HAL_OK) - 80037bc: 4b68 ldr r3, [pc, #416] @ (8003960 ) - 80037be: 681b ldr r3, [r3, #0] - 80037c0: 0018 movs r0, r3 - 80037c2: f7fd fe57 bl 8001474 - 80037c6: 1e03 subs r3, r0, #0 - 80037c8: d051 beq.n 800386e + 8002e10: 4b68 ldr r3, [pc, #416] @ (8002fb4 ) + 8002e12: 681b ldr r3, [r3, #0] + 8002e14: 0018 movs r0, r3 + 8002e16: f7fe fbcd bl 80015b4 + 8002e1a: 1e03 subs r3, r0, #0 + 8002e1c: d051 beq.n 8002ec2 { return HAL_ERROR; - 80037ca: 2301 movs r3, #1 - 80037cc: e221 b.n 8003c12 + 8002e1e: 2301 movs r3, #1 + 8002e20: e221 b.n 8003266 } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 80037ce: 687b ldr r3, [r7, #4] - 80037d0: 68db ldr r3, [r3, #12] - 80037d2: 2b00 cmp r3, #0 - 80037d4: d030 beq.n 8003838 + 8002e22: 687b ldr r3, [r7, #4] + 8002e24: 68db ldr r3, [r3, #12] + 8002e26: 2b00 cmp r3, #0 + 8002e28: d030 beq.n 8002e8c { /* Configure the HSI16 division factor */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 80037d6: 4b5b ldr r3, [pc, #364] @ (8003944 ) - 80037d8: 681b ldr r3, [r3, #0] - 80037da: 4a5e ldr r2, [pc, #376] @ (8003954 ) - 80037dc: 4013 ands r3, r2 - 80037de: 0019 movs r1, r3 - 80037e0: 687b ldr r3, [r7, #4] - 80037e2: 691a ldr r2, [r3, #16] - 80037e4: 4b57 ldr r3, [pc, #348] @ (8003944 ) - 80037e6: 430a orrs r2, r1 - 80037e8: 601a str r2, [r3, #0] + 8002e2a: 4b5b ldr r3, [pc, #364] @ (8002f98 ) + 8002e2c: 681b ldr r3, [r3, #0] + 8002e2e: 4a5e ldr r2, [pc, #376] @ (8002fa8 ) + 8002e30: 4013 ands r3, r2 + 8002e32: 0019 movs r1, r3 + 8002e34: 687b ldr r3, [r7, #4] + 8002e36: 691a ldr r2, [r3, #16] + 8002e38: 4b57 ldr r3, [pc, #348] @ (8002f98 ) + 8002e3a: 430a orrs r2, r1 + 8002e3c: 601a str r2, [r3, #0] /* Enable the Internal High Speed oscillator (HSI16). */ __HAL_RCC_HSI_ENABLE(); - 80037ea: 4b56 ldr r3, [pc, #344] @ (8003944 ) - 80037ec: 681a ldr r2, [r3, #0] - 80037ee: 4b55 ldr r3, [pc, #340] @ (8003944 ) - 80037f0: 2180 movs r1, #128 @ 0x80 - 80037f2: 0049 lsls r1, r1, #1 - 80037f4: 430a orrs r2, r1 - 80037f6: 601a str r2, [r3, #0] + 8002e3e: 4b56 ldr r3, [pc, #344] @ (8002f98 ) + 8002e40: 681a ldr r2, [r3, #0] + 8002e42: 4b55 ldr r3, [pc, #340] @ (8002f98 ) + 8002e44: 2180 movs r1, #128 @ 0x80 + 8002e46: 0049 lsls r1, r1, #1 + 8002e48: 430a orrs r2, r1 + 8002e4a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80037f8: f7fd fe98 bl 800152c - 80037fc: 0003 movs r3, r0 - 80037fe: 613b str r3, [r7, #16] + 8002e4c: f7fe fc0e bl 800166c + 8002e50: 0003 movs r3, r0 + 8002e52: 613b str r3, [r7, #16] /* Wait till HSI is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8003800: e008 b.n 8003814 + 8002e54: e008 b.n 8002e68 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8003802: f7fd fe93 bl 800152c - 8003806: 0002 movs r2, r0 - 8003808: 693b ldr r3, [r7, #16] - 800380a: 1ad3 subs r3, r2, r3 - 800380c: 2b02 cmp r3, #2 - 800380e: d901 bls.n 8003814 + 8002e56: f7fe fc09 bl 800166c + 8002e5a: 0002 movs r2, r0 + 8002e5c: 693b ldr r3, [r7, #16] + 8002e5e: 1ad3 subs r3, r2, r3 + 8002e60: 2b02 cmp r3, #2 + 8002e62: d901 bls.n 8002e68 { return HAL_TIMEOUT; - 8003810: 2303 movs r3, #3 - 8003812: e1fe b.n 8003c12 + 8002e64: 2303 movs r3, #3 + 8002e66: e1fe b.n 8003266 while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8003814: 4b4b ldr r3, [pc, #300] @ (8003944 ) - 8003816: 681a ldr r2, [r3, #0] - 8003818: 2380 movs r3, #128 @ 0x80 - 800381a: 00db lsls r3, r3, #3 - 800381c: 4013 ands r3, r2 - 800381e: d0f0 beq.n 8003802 + 8002e68: 4b4b ldr r3, [pc, #300] @ (8002f98 ) + 8002e6a: 681a ldr r2, [r3, #0] + 8002e6c: 2380 movs r3, #128 @ 0x80 + 8002e6e: 00db lsls r3, r3, #3 + 8002e70: 4013 ands r3, r2 + 8002e72: d0f0 beq.n 8002e56 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8003820: 4b48 ldr r3, [pc, #288] @ (8003944 ) - 8003822: 685b ldr r3, [r3, #4] - 8003824: 4a4a ldr r2, [pc, #296] @ (8003950 ) - 8003826: 4013 ands r3, r2 - 8003828: 0019 movs r1, r3 - 800382a: 687b ldr r3, [r7, #4] - 800382c: 695b ldr r3, [r3, #20] - 800382e: 021a lsls r2, r3, #8 - 8003830: 4b44 ldr r3, [pc, #272] @ (8003944 ) - 8003832: 430a orrs r2, r1 - 8003834: 605a str r2, [r3, #4] - 8003836: e01b b.n 8003870 + 8002e74: 4b48 ldr r3, [pc, #288] @ (8002f98 ) + 8002e76: 685b ldr r3, [r3, #4] + 8002e78: 4a4a ldr r2, [pc, #296] @ (8002fa4 ) + 8002e7a: 4013 ands r3, r2 + 8002e7c: 0019 movs r1, r3 + 8002e7e: 687b ldr r3, [r7, #4] + 8002e80: 695b ldr r3, [r3, #20] + 8002e82: 021a lsls r2, r3, #8 + 8002e84: 4b44 ldr r3, [pc, #272] @ (8002f98 ) + 8002e86: 430a orrs r2, r1 + 8002e88: 605a str r2, [r3, #4] + 8002e8a: e01b b.n 8002ec4 } else { /* Disable the Internal High Speed oscillator (HSI16). */ __HAL_RCC_HSI_DISABLE(); - 8003838: 4b42 ldr r3, [pc, #264] @ (8003944 ) - 800383a: 681a ldr r2, [r3, #0] - 800383c: 4b41 ldr r3, [pc, #260] @ (8003944 ) - 800383e: 4949 ldr r1, [pc, #292] @ (8003964 ) - 8003840: 400a ands r2, r1 - 8003842: 601a str r2, [r3, #0] + 8002e8c: 4b42 ldr r3, [pc, #264] @ (8002f98 ) + 8002e8e: 681a ldr r2, [r3, #0] + 8002e90: 4b41 ldr r3, [pc, #260] @ (8002f98 ) + 8002e92: 4949 ldr r1, [pc, #292] @ (8002fb8 ) + 8002e94: 400a ands r2, r1 + 8002e96: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003844: f7fd fe72 bl 800152c - 8003848: 0003 movs r3, r0 - 800384a: 613b str r3, [r7, #16] + 8002e98: f7fe fbe8 bl 800166c + 8002e9c: 0003 movs r3, r0 + 8002e9e: 613b str r3, [r7, #16] /* Wait till HSI is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) - 800384c: e008 b.n 8003860 + 8002ea0: e008 b.n 8002eb4 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 800384e: f7fd fe6d bl 800152c - 8003852: 0002 movs r2, r0 - 8003854: 693b ldr r3, [r7, #16] - 8003856: 1ad3 subs r3, r2, r3 - 8003858: 2b02 cmp r3, #2 - 800385a: d901 bls.n 8003860 + 8002ea2: f7fe fbe3 bl 800166c + 8002ea6: 0002 movs r2, r0 + 8002ea8: 693b ldr r3, [r7, #16] + 8002eaa: 1ad3 subs r3, r2, r3 + 8002eac: 2b02 cmp r3, #2 + 8002eae: d901 bls.n 8002eb4 { return HAL_TIMEOUT; - 800385c: 2303 movs r3, #3 - 800385e: e1d8 b.n 8003c12 + 8002eb0: 2303 movs r3, #3 + 8002eb2: e1d8 b.n 8003266 while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) - 8003860: 4b38 ldr r3, [pc, #224] @ (8003944 ) - 8003862: 681a ldr r2, [r3, #0] - 8003864: 2380 movs r3, #128 @ 0x80 - 8003866: 00db lsls r3, r3, #3 - 8003868: 4013 ands r3, r2 - 800386a: d1f0 bne.n 800384e - 800386c: e000 b.n 8003870 + 8002eb4: 4b38 ldr r3, [pc, #224] @ (8002f98 ) + 8002eb6: 681a ldr r2, [r3, #0] + 8002eb8: 2380 movs r3, #128 @ 0x80 + 8002eba: 00db lsls r3, r3, #3 + 8002ebc: 4013 ands r3, r2 + 8002ebe: d1f0 bne.n 8002ea2 + 8002ec0: e000 b.n 8002ec4 if ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 800386e: 46c0 nop @ (mov r8, r8) + 8002ec2: 46c0 nop @ (mov r8, r8) } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8003870: 687b ldr r3, [r7, #4] - 8003872: 681b ldr r3, [r3, #0] - 8003874: 2208 movs r2, #8 - 8003876: 4013 ands r3, r2 - 8003878: d047 beq.n 800390a + 8002ec4: 687b ldr r3, [r7, #4] + 8002ec6: 681b ldr r3, [r3, #0] + 8002ec8: 2208 movs r2, #8 + 8002eca: 4013 ands r3, r2 + 8002ecc: d047 beq.n 8002f5e { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check if LSI is used as system clock */ if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSI) - 800387a: 4b32 ldr r3, [pc, #200] @ (8003944 ) - 800387c: 689b ldr r3, [r3, #8] - 800387e: 2238 movs r2, #56 @ 0x38 - 8003880: 4013 ands r3, r2 - 8003882: 2b18 cmp r3, #24 - 8003884: d10a bne.n 800389c + 8002ece: 4b32 ldr r3, [pc, #200] @ (8002f98 ) + 8002ed0: 689b ldr r3, [r3, #8] + 8002ed2: 2238 movs r2, #56 @ 0x38 + 8002ed4: 4013 ands r3, r2 + 8002ed6: 2b18 cmp r3, #24 + 8002ed8: d10a bne.n 8002ef0 { /* When LSI is used as system clock it will not be disabled */ if ((((RCC->CSR) & RCC_CSR_LSIRDY) != 0U) && (RCC_OscInitStruct->LSIState == RCC_LSI_OFF)) - 8003886: 4b2f ldr r3, [pc, #188] @ (8003944 ) - 8003888: 6e1b ldr r3, [r3, #96] @ 0x60 - 800388a: 2202 movs r2, #2 - 800388c: 4013 ands r3, r2 - 800388e: d03c beq.n 800390a - 8003890: 687b ldr r3, [r7, #4] - 8003892: 699b ldr r3, [r3, #24] - 8003894: 2b00 cmp r3, #0 - 8003896: d138 bne.n 800390a + 8002eda: 4b2f ldr r3, [pc, #188] @ (8002f98 ) + 8002edc: 6e1b ldr r3, [r3, #96] @ 0x60 + 8002ede: 2202 movs r2, #2 + 8002ee0: 4013 ands r3, r2 + 8002ee2: d03c beq.n 8002f5e + 8002ee4: 687b ldr r3, [r7, #4] + 8002ee6: 699b ldr r3, [r3, #24] + 8002ee8: 2b00 cmp r3, #0 + 8002eea: d138 bne.n 8002f5e { return HAL_ERROR; - 8003898: 2301 movs r3, #1 - 800389a: e1ba b.n 8003c12 + 8002eec: 2301 movs r3, #1 + 8002eee: e1ba b.n 8003266 } } else { /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 800389c: 687b ldr r3, [r7, #4] - 800389e: 699b ldr r3, [r3, #24] - 80038a0: 2b00 cmp r3, #0 - 80038a2: d019 beq.n 80038d8 + 8002ef0: 687b ldr r3, [r7, #4] + 8002ef2: 699b ldr r3, [r3, #24] + 8002ef4: 2b00 cmp r3, #0 + 8002ef6: d019 beq.n 8002f2c { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80038a4: 4b27 ldr r3, [pc, #156] @ (8003944 ) - 80038a6: 6e1a ldr r2, [r3, #96] @ 0x60 - 80038a8: 4b26 ldr r3, [pc, #152] @ (8003944 ) - 80038aa: 2101 movs r1, #1 - 80038ac: 430a orrs r2, r1 - 80038ae: 661a str r2, [r3, #96] @ 0x60 + 8002ef8: 4b27 ldr r3, [pc, #156] @ (8002f98 ) + 8002efa: 6e1a ldr r2, [r3, #96] @ 0x60 + 8002efc: 4b26 ldr r3, [pc, #152] @ (8002f98 ) + 8002efe: 2101 movs r1, #1 + 8002f00: 430a orrs r2, r1 + 8002f02: 661a str r2, [r3, #96] @ 0x60 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80038b0: f7fd fe3c bl 800152c - 80038b4: 0003 movs r3, r0 - 80038b6: 613b str r3, [r7, #16] + 8002f04: f7fe fbb2 bl 800166c + 8002f08: 0003 movs r3, r0 + 8002f0a: 613b str r3, [r7, #16] /* Wait till LSI is ready */ while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) - 80038b8: e008 b.n 80038cc + 8002f0c: e008 b.n 8002f20 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 80038ba: f7fd fe37 bl 800152c - 80038be: 0002 movs r2, r0 - 80038c0: 693b ldr r3, [r7, #16] - 80038c2: 1ad3 subs r3, r2, r3 - 80038c4: 2b02 cmp r3, #2 - 80038c6: d901 bls.n 80038cc + 8002f0e: f7fe fbad bl 800166c + 8002f12: 0002 movs r2, r0 + 8002f14: 693b ldr r3, [r7, #16] + 8002f16: 1ad3 subs r3, r2, r3 + 8002f18: 2b02 cmp r3, #2 + 8002f1a: d901 bls.n 8002f20 { return HAL_TIMEOUT; - 80038c8: 2303 movs r3, #3 - 80038ca: e1a2 b.n 8003c12 + 8002f1c: 2303 movs r3, #3 + 8002f1e: e1a2 b.n 8003266 while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) - 80038cc: 4b1d ldr r3, [pc, #116] @ (8003944 ) - 80038ce: 6e1b ldr r3, [r3, #96] @ 0x60 - 80038d0: 2202 movs r2, #2 - 80038d2: 4013 ands r3, r2 - 80038d4: d0f1 beq.n 80038ba - 80038d6: e018 b.n 800390a + 8002f20: 4b1d ldr r3, [pc, #116] @ (8002f98 ) + 8002f22: 6e1b ldr r3, [r3, #96] @ 0x60 + 8002f24: 2202 movs r2, #2 + 8002f26: 4013 ands r3, r2 + 8002f28: d0f1 beq.n 8002f0e + 8002f2a: e018 b.n 8002f5e } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 80038d8: 4b1a ldr r3, [pc, #104] @ (8003944 ) - 80038da: 6e1a ldr r2, [r3, #96] @ 0x60 - 80038dc: 4b19 ldr r3, [pc, #100] @ (8003944 ) - 80038de: 2101 movs r1, #1 - 80038e0: 438a bics r2, r1 - 80038e2: 661a str r2, [r3, #96] @ 0x60 + 8002f2c: 4b1a ldr r3, [pc, #104] @ (8002f98 ) + 8002f2e: 6e1a ldr r2, [r3, #96] @ 0x60 + 8002f30: 4b19 ldr r3, [pc, #100] @ (8002f98 ) + 8002f32: 2101 movs r1, #1 + 8002f34: 438a bics r2, r1 + 8002f36: 661a str r2, [r3, #96] @ 0x60 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80038e4: f7fd fe22 bl 800152c - 80038e8: 0003 movs r3, r0 - 80038ea: 613b str r3, [r7, #16] + 8002f38: f7fe fb98 bl 800166c + 8002f3c: 0003 movs r3, r0 + 8002f3e: 613b str r3, [r7, #16] /* Wait till LSI is disabled */ while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U) - 80038ec: e008 b.n 8003900 + 8002f40: e008 b.n 8002f54 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 80038ee: f7fd fe1d bl 800152c - 80038f2: 0002 movs r2, r0 - 80038f4: 693b ldr r3, [r7, #16] - 80038f6: 1ad3 subs r3, r2, r3 - 80038f8: 2b02 cmp r3, #2 - 80038fa: d901 bls.n 8003900 + 8002f42: f7fe fb93 bl 800166c + 8002f46: 0002 movs r2, r0 + 8002f48: 693b ldr r3, [r7, #16] + 8002f4a: 1ad3 subs r3, r2, r3 + 8002f4c: 2b02 cmp r3, #2 + 8002f4e: d901 bls.n 8002f54 { return HAL_TIMEOUT; - 80038fc: 2303 movs r3, #3 - 80038fe: e188 b.n 8003c12 + 8002f50: 2303 movs r3, #3 + 8002f52: e188 b.n 8003266 while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U) - 8003900: 4b10 ldr r3, [pc, #64] @ (8003944 ) - 8003902: 6e1b ldr r3, [r3, #96] @ 0x60 - 8003904: 2202 movs r2, #2 - 8003906: 4013 ands r3, r2 - 8003908: d1f1 bne.n 80038ee + 8002f54: 4b10 ldr r3, [pc, #64] @ (8002f98 ) + 8002f56: 6e1b ldr r3, [r3, #96] @ 0x60 + 8002f58: 2202 movs r2, #2 + 8002f5a: 4013 ands r3, r2 + 8002f5c: d1f1 bne.n 8002f42 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 800390a: 687b ldr r3, [r7, #4] - 800390c: 681b ldr r3, [r3, #0] - 800390e: 2204 movs r2, #4 - 8003910: 4013 ands r3, r2 - 8003912: d100 bne.n 8003916 - 8003914: e0c6 b.n 8003aa4 + 8002f5e: 687b ldr r3, [r7, #4] + 8002f60: 681b ldr r3, [r3, #0] + 8002f62: 2204 movs r2, #4 + 8002f64: 4013 ands r3, r2 + 8002f66: d100 bne.n 8002f6a + 8002f68: e0c6 b.n 80030f8 { FlagStatus pwrclkchanged = RESET; - 8003916: 231f movs r3, #31 - 8003918: 18fb adds r3, r7, r3 - 800391a: 2200 movs r2, #0 - 800391c: 701a strb r2, [r3, #0] + 8002f6a: 231f movs r3, #31 + 8002f6c: 18fb adds r3, r7, r3 + 8002f6e: 2200 movs r2, #0 + 8002f70: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* When the LSE is used as system clock, it is not allowed disable it */ if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSE) - 800391e: 4b09 ldr r3, [pc, #36] @ (8003944 ) - 8003920: 689b ldr r3, [r3, #8] - 8003922: 2238 movs r2, #56 @ 0x38 - 8003924: 4013 ands r3, r2 - 8003926: 2b20 cmp r3, #32 - 8003928: d11e bne.n 8003968 + 8002f72: 4b09 ldr r3, [pc, #36] @ (8002f98 ) + 8002f74: 689b ldr r3, [r3, #8] + 8002f76: 2238 movs r2, #56 @ 0x38 + 8002f78: 4013 ands r3, r2 + 8002f7a: 2b20 cmp r3, #32 + 8002f7c: d11e bne.n 8002fbc { if ((((RCC->BDCR) & RCC_BDCR_LSERDY) != 0U) && (RCC_OscInitStruct->LSEState == RCC_LSE_OFF)) - 800392a: 4b06 ldr r3, [pc, #24] @ (8003944 ) - 800392c: 6ddb ldr r3, [r3, #92] @ 0x5c - 800392e: 2202 movs r2, #2 - 8003930: 4013 ands r3, r2 - 8003932: d100 bne.n 8003936 - 8003934: e0b6 b.n 8003aa4 - 8003936: 687b ldr r3, [r7, #4] - 8003938: 689b ldr r3, [r3, #8] - 800393a: 2b00 cmp r3, #0 - 800393c: d000 beq.n 8003940 - 800393e: e0b1 b.n 8003aa4 + 8002f7e: 4b06 ldr r3, [pc, #24] @ (8002f98 ) + 8002f80: 6ddb ldr r3, [r3, #92] @ 0x5c + 8002f82: 2202 movs r2, #2 + 8002f84: 4013 ands r3, r2 + 8002f86: d100 bne.n 8002f8a + 8002f88: e0b6 b.n 80030f8 + 8002f8a: 687b ldr r3, [r7, #4] + 8002f8c: 689b ldr r3, [r3, #8] + 8002f8e: 2b00 cmp r3, #0 + 8002f90: d000 beq.n 8002f94 + 8002f92: e0b1 b.n 80030f8 { return HAL_ERROR; - 8003940: 2301 movs r3, #1 - 8003942: e166 b.n 8003c12 - 8003944: 40021000 .word 0x40021000 - 8003948: fffeffff .word 0xfffeffff - 800394c: fffbffff .word 0xfffbffff - 8003950: ffff80ff .word 0xffff80ff - 8003954: ffffc7ff .word 0xffffc7ff - 8003958: 00f42400 .word 0x00f42400 - 800395c: 20000000 .word 0x20000000 - 8003960: 20000004 .word 0x20000004 - 8003964: fffffeff .word 0xfffffeff + 8002f94: 2301 movs r3, #1 + 8002f96: e166 b.n 8003266 + 8002f98: 40021000 .word 0x40021000 + 8002f9c: fffeffff .word 0xfffeffff + 8002fa0: fffbffff .word 0xfffbffff + 8002fa4: ffff80ff .word 0xffff80ff + 8002fa8: ffffc7ff .word 0xffffc7ff + 8002fac: 00f42400 .word 0x00f42400 + 8002fb0: 20000000 .word 0x20000000 + 8002fb4: 20000004 .word 0x20000004 + 8002fb8: fffffeff .word 0xfffffeff } else { /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED() != 0U) - 8003968: 4bac ldr r3, [pc, #688] @ (8003c1c ) - 800396a: 6bda ldr r2, [r3, #60] @ 0x3c - 800396c: 2380 movs r3, #128 @ 0x80 - 800396e: 055b lsls r3, r3, #21 - 8003970: 4013 ands r3, r2 - 8003972: d101 bne.n 8003978 - 8003974: 2301 movs r3, #1 - 8003976: e000 b.n 800397a - 8003978: 2300 movs r3, #0 - 800397a: 2b00 cmp r3, #0 - 800397c: d011 beq.n 80039a2 + 8002fbc: 4bac ldr r3, [pc, #688] @ (8003270 ) + 8002fbe: 6bda ldr r2, [r3, #60] @ 0x3c + 8002fc0: 2380 movs r3, #128 @ 0x80 + 8002fc2: 055b lsls r3, r3, #21 + 8002fc4: 4013 ands r3, r2 + 8002fc6: d101 bne.n 8002fcc + 8002fc8: 2301 movs r3, #1 + 8002fca: e000 b.n 8002fce + 8002fcc: 2300 movs r3, #0 + 8002fce: 2b00 cmp r3, #0 + 8002fd0: d011 beq.n 8002ff6 { __HAL_RCC_PWR_CLK_ENABLE(); - 800397e: 4ba7 ldr r3, [pc, #668] @ (8003c1c ) - 8003980: 6bda ldr r2, [r3, #60] @ 0x3c - 8003982: 4ba6 ldr r3, [pc, #664] @ (8003c1c ) - 8003984: 2180 movs r1, #128 @ 0x80 - 8003986: 0549 lsls r1, r1, #21 - 8003988: 430a orrs r2, r1 - 800398a: 63da str r2, [r3, #60] @ 0x3c - 800398c: 4ba3 ldr r3, [pc, #652] @ (8003c1c ) - 800398e: 6bda ldr r2, [r3, #60] @ 0x3c - 8003990: 2380 movs r3, #128 @ 0x80 - 8003992: 055b lsls r3, r3, #21 - 8003994: 4013 ands r3, r2 - 8003996: 60fb str r3, [r7, #12] - 8003998: 68fb ldr r3, [r7, #12] + 8002fd2: 4ba7 ldr r3, [pc, #668] @ (8003270 ) + 8002fd4: 6bda ldr r2, [r3, #60] @ 0x3c + 8002fd6: 4ba6 ldr r3, [pc, #664] @ (8003270 ) + 8002fd8: 2180 movs r1, #128 @ 0x80 + 8002fda: 0549 lsls r1, r1, #21 + 8002fdc: 430a orrs r2, r1 + 8002fde: 63da str r2, [r3, #60] @ 0x3c + 8002fe0: 4ba3 ldr r3, [pc, #652] @ (8003270 ) + 8002fe2: 6bda ldr r2, [r3, #60] @ 0x3c + 8002fe4: 2380 movs r3, #128 @ 0x80 + 8002fe6: 055b lsls r3, r3, #21 + 8002fe8: 4013 ands r3, r2 + 8002fea: 60fb str r3, [r7, #12] + 8002fec: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; - 800399a: 231f movs r3, #31 - 800399c: 18fb adds r3, r7, r3 - 800399e: 2201 movs r2, #1 - 80039a0: 701a strb r2, [r3, #0] + 8002fee: 231f movs r3, #31 + 8002ff0: 18fb adds r3, r7, r3 + 8002ff2: 2201 movs r2, #1 + 8002ff4: 701a strb r2, [r3, #0] } if (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 80039a2: 4b9f ldr r3, [pc, #636] @ (8003c20 ) - 80039a4: 681a ldr r2, [r3, #0] - 80039a6: 2380 movs r3, #128 @ 0x80 - 80039a8: 005b lsls r3, r3, #1 - 80039aa: 4013 ands r3, r2 - 80039ac: d11a bne.n 80039e4 + 8002ff6: 4b9f ldr r3, [pc, #636] @ (8003274 ) + 8002ff8: 681a ldr r2, [r3, #0] + 8002ffa: 2380 movs r3, #128 @ 0x80 + 8002ffc: 005b lsls r3, r3, #1 + 8002ffe: 4013 ands r3, r2 + 8003000: d11a bne.n 8003038 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); - 80039ae: 4b9c ldr r3, [pc, #624] @ (8003c20 ) - 80039b0: 681a ldr r2, [r3, #0] - 80039b2: 4b9b ldr r3, [pc, #620] @ (8003c20 ) - 80039b4: 2180 movs r1, #128 @ 0x80 - 80039b6: 0049 lsls r1, r1, #1 - 80039b8: 430a orrs r2, r1 - 80039ba: 601a str r2, [r3, #0] + 8003002: 4b9c ldr r3, [pc, #624] @ (8003274 ) + 8003004: 681a ldr r2, [r3, #0] + 8003006: 4b9b ldr r3, [pc, #620] @ (8003274 ) + 8003008: 2180 movs r1, #128 @ 0x80 + 800300a: 0049 lsls r1, r1, #1 + 800300c: 430a orrs r2, r1 + 800300e: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80039bc: f7fd fdb6 bl 800152c - 80039c0: 0003 movs r3, r0 - 80039c2: 613b str r3, [r7, #16] + 8003010: f7fe fb2c bl 800166c + 8003014: 0003 movs r3, r0 + 8003016: 613b str r3, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 80039c4: e008 b.n 80039d8 + 8003018: e008 b.n 800302c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80039c6: f7fd fdb1 bl 800152c - 80039ca: 0002 movs r2, r0 - 80039cc: 693b ldr r3, [r7, #16] - 80039ce: 1ad3 subs r3, r2, r3 - 80039d0: 2b02 cmp r3, #2 - 80039d2: d901 bls.n 80039d8 + 800301a: f7fe fb27 bl 800166c + 800301e: 0002 movs r2, r0 + 8003020: 693b ldr r3, [r7, #16] + 8003022: 1ad3 subs r3, r2, r3 + 8003024: 2b02 cmp r3, #2 + 8003026: d901 bls.n 800302c { return HAL_TIMEOUT; - 80039d4: 2303 movs r3, #3 - 80039d6: e11c b.n 8003c12 + 8003028: 2303 movs r3, #3 + 800302a: e11c b.n 8003266 while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 80039d8: 4b91 ldr r3, [pc, #580] @ (8003c20 ) - 80039da: 681a ldr r2, [r3, #0] - 80039dc: 2380 movs r3, #128 @ 0x80 - 80039de: 005b lsls r3, r3, #1 - 80039e0: 4013 ands r3, r2 - 80039e2: d0f0 beq.n 80039c6 + 800302c: 4b91 ldr r3, [pc, #580] @ (8003274 ) + 800302e: 681a ldr r2, [r3, #0] + 8003030: 2380 movs r3, #128 @ 0x80 + 8003032: 005b lsls r3, r3, #1 + 8003034: 4013 ands r3, r2 + 8003036: d0f0 beq.n 800301a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80039e4: 687b ldr r3, [r7, #4] - 80039e6: 689b ldr r3, [r3, #8] - 80039e8: 2b01 cmp r3, #1 - 80039ea: d106 bne.n 80039fa - 80039ec: 4b8b ldr r3, [pc, #556] @ (8003c1c ) - 80039ee: 6dda ldr r2, [r3, #92] @ 0x5c - 80039f0: 4b8a ldr r3, [pc, #552] @ (8003c1c ) - 80039f2: 2101 movs r1, #1 - 80039f4: 430a orrs r2, r1 - 80039f6: 65da str r2, [r3, #92] @ 0x5c - 80039f8: e01c b.n 8003a34 - 80039fa: 687b ldr r3, [r7, #4] - 80039fc: 689b ldr r3, [r3, #8] - 80039fe: 2b05 cmp r3, #5 - 8003a00: d10c bne.n 8003a1c - 8003a02: 4b86 ldr r3, [pc, #536] @ (8003c1c ) - 8003a04: 6dda ldr r2, [r3, #92] @ 0x5c - 8003a06: 4b85 ldr r3, [pc, #532] @ (8003c1c ) - 8003a08: 2104 movs r1, #4 - 8003a0a: 430a orrs r2, r1 - 8003a0c: 65da str r2, [r3, #92] @ 0x5c - 8003a0e: 4b83 ldr r3, [pc, #524] @ (8003c1c ) - 8003a10: 6dda ldr r2, [r3, #92] @ 0x5c - 8003a12: 4b82 ldr r3, [pc, #520] @ (8003c1c ) - 8003a14: 2101 movs r1, #1 - 8003a16: 430a orrs r2, r1 - 8003a18: 65da str r2, [r3, #92] @ 0x5c - 8003a1a: e00b b.n 8003a34 - 8003a1c: 4b7f ldr r3, [pc, #508] @ (8003c1c ) - 8003a1e: 6dda ldr r2, [r3, #92] @ 0x5c - 8003a20: 4b7e ldr r3, [pc, #504] @ (8003c1c ) - 8003a22: 2101 movs r1, #1 - 8003a24: 438a bics r2, r1 - 8003a26: 65da str r2, [r3, #92] @ 0x5c - 8003a28: 4b7c ldr r3, [pc, #496] @ (8003c1c ) - 8003a2a: 6dda ldr r2, [r3, #92] @ 0x5c - 8003a2c: 4b7b ldr r3, [pc, #492] @ (8003c1c ) - 8003a2e: 2104 movs r1, #4 - 8003a30: 438a bics r2, r1 - 8003a32: 65da str r2, [r3, #92] @ 0x5c + 8003038: 687b ldr r3, [r7, #4] + 800303a: 689b ldr r3, [r3, #8] + 800303c: 2b01 cmp r3, #1 + 800303e: d106 bne.n 800304e + 8003040: 4b8b ldr r3, [pc, #556] @ (8003270 ) + 8003042: 6dda ldr r2, [r3, #92] @ 0x5c + 8003044: 4b8a ldr r3, [pc, #552] @ (8003270 ) + 8003046: 2101 movs r1, #1 + 8003048: 430a orrs r2, r1 + 800304a: 65da str r2, [r3, #92] @ 0x5c + 800304c: e01c b.n 8003088 + 800304e: 687b ldr r3, [r7, #4] + 8003050: 689b ldr r3, [r3, #8] + 8003052: 2b05 cmp r3, #5 + 8003054: d10c bne.n 8003070 + 8003056: 4b86 ldr r3, [pc, #536] @ (8003270 ) + 8003058: 6dda ldr r2, [r3, #92] @ 0x5c + 800305a: 4b85 ldr r3, [pc, #532] @ (8003270 ) + 800305c: 2104 movs r1, #4 + 800305e: 430a orrs r2, r1 + 8003060: 65da str r2, [r3, #92] @ 0x5c + 8003062: 4b83 ldr r3, [pc, #524] @ (8003270 ) + 8003064: 6dda ldr r2, [r3, #92] @ 0x5c + 8003066: 4b82 ldr r3, [pc, #520] @ (8003270 ) + 8003068: 2101 movs r1, #1 + 800306a: 430a orrs r2, r1 + 800306c: 65da str r2, [r3, #92] @ 0x5c + 800306e: e00b b.n 8003088 + 8003070: 4b7f ldr r3, [pc, #508] @ (8003270 ) + 8003072: 6dda ldr r2, [r3, #92] @ 0x5c + 8003074: 4b7e ldr r3, [pc, #504] @ (8003270 ) + 8003076: 2101 movs r1, #1 + 8003078: 438a bics r2, r1 + 800307a: 65da str r2, [r3, #92] @ 0x5c + 800307c: 4b7c ldr r3, [pc, #496] @ (8003270 ) + 800307e: 6dda ldr r2, [r3, #92] @ 0x5c + 8003080: 4b7b ldr r3, [pc, #492] @ (8003270 ) + 8003082: 2104 movs r1, #4 + 8003084: 438a bics r2, r1 + 8003086: 65da str r2, [r3, #92] @ 0x5c /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8003a34: 687b ldr r3, [r7, #4] - 8003a36: 689b ldr r3, [r3, #8] - 8003a38: 2b00 cmp r3, #0 - 8003a3a: d014 beq.n 8003a66 + 8003088: 687b ldr r3, [r7, #4] + 800308a: 689b ldr r3, [r3, #8] + 800308c: 2b00 cmp r3, #0 + 800308e: d014 beq.n 80030ba { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003a3c: f7fd fd76 bl 800152c - 8003a40: 0003 movs r3, r0 - 8003a42: 613b str r3, [r7, #16] + 8003090: f7fe faec bl 800166c + 8003094: 0003 movs r3, r0 + 8003096: 613b str r3, [r7, #16] /* Wait till LSE is ready */ while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8003a44: e009 b.n 8003a5a + 8003098: e009 b.n 80030ae { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8003a46: f7fd fd71 bl 800152c - 8003a4a: 0002 movs r2, r0 - 8003a4c: 693b ldr r3, [r7, #16] - 8003a4e: 1ad3 subs r3, r2, r3 - 8003a50: 4a74 ldr r2, [pc, #464] @ (8003c24 ) - 8003a52: 4293 cmp r3, r2 - 8003a54: d901 bls.n 8003a5a + 800309a: f7fe fae7 bl 800166c + 800309e: 0002 movs r2, r0 + 80030a0: 693b ldr r3, [r7, #16] + 80030a2: 1ad3 subs r3, r2, r3 + 80030a4: 4a74 ldr r2, [pc, #464] @ (8003278 ) + 80030a6: 4293 cmp r3, r2 + 80030a8: d901 bls.n 80030ae { return HAL_TIMEOUT; - 8003a56: 2303 movs r3, #3 - 8003a58: e0db b.n 8003c12 + 80030aa: 2303 movs r3, #3 + 80030ac: e0db b.n 8003266 while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8003a5a: 4b70 ldr r3, [pc, #448] @ (8003c1c ) - 8003a5c: 6ddb ldr r3, [r3, #92] @ 0x5c - 8003a5e: 2202 movs r2, #2 - 8003a60: 4013 ands r3, r2 - 8003a62: d0f0 beq.n 8003a46 - 8003a64: e013 b.n 8003a8e + 80030ae: 4b70 ldr r3, [pc, #448] @ (8003270 ) + 80030b0: 6ddb ldr r3, [r3, #92] @ 0x5c + 80030b2: 2202 movs r2, #2 + 80030b4: 4013 ands r3, r2 + 80030b6: d0f0 beq.n 800309a + 80030b8: e013 b.n 80030e2 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003a66: f7fd fd61 bl 800152c - 8003a6a: 0003 movs r3, r0 - 8003a6c: 613b str r3, [r7, #16] + 80030ba: f7fe fad7 bl 800166c + 80030be: 0003 movs r3, r0 + 80030c0: 613b str r3, [r7, #16] /* Wait till LSE is disabled */ while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) - 8003a6e: e009 b.n 8003a84 + 80030c2: e009 b.n 80030d8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8003a70: f7fd fd5c bl 800152c - 8003a74: 0002 movs r2, r0 - 8003a76: 693b ldr r3, [r7, #16] - 8003a78: 1ad3 subs r3, r2, r3 - 8003a7a: 4a6a ldr r2, [pc, #424] @ (8003c24 ) - 8003a7c: 4293 cmp r3, r2 - 8003a7e: d901 bls.n 8003a84 + 80030c4: f7fe fad2 bl 800166c + 80030c8: 0002 movs r2, r0 + 80030ca: 693b ldr r3, [r7, #16] + 80030cc: 1ad3 subs r3, r2, r3 + 80030ce: 4a6a ldr r2, [pc, #424] @ (8003278 ) + 80030d0: 4293 cmp r3, r2 + 80030d2: d901 bls.n 80030d8 { return HAL_TIMEOUT; - 8003a80: 2303 movs r3, #3 - 8003a82: e0c6 b.n 8003c12 + 80030d4: 2303 movs r3, #3 + 80030d6: e0c6 b.n 8003266 while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) - 8003a84: 4b65 ldr r3, [pc, #404] @ (8003c1c ) - 8003a86: 6ddb ldr r3, [r3, #92] @ 0x5c - 8003a88: 2202 movs r2, #2 - 8003a8a: 4013 ands r3, r2 - 8003a8c: d1f0 bne.n 8003a70 + 80030d8: 4b65 ldr r3, [pc, #404] @ (8003270 ) + 80030da: 6ddb ldr r3, [r3, #92] @ 0x5c + 80030dc: 2202 movs r2, #2 + 80030de: 4013 ands r3, r2 + 80030e0: d1f0 bne.n 80030c4 } } } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) - 8003a8e: 231f movs r3, #31 - 8003a90: 18fb adds r3, r7, r3 - 8003a92: 781b ldrb r3, [r3, #0] - 8003a94: 2b01 cmp r3, #1 - 8003a96: d105 bne.n 8003aa4 + 80030e2: 231f movs r3, #31 + 80030e4: 18fb adds r3, r7, r3 + 80030e6: 781b ldrb r3, [r3, #0] + 80030e8: 2b01 cmp r3, #1 + 80030ea: d105 bne.n 80030f8 { __HAL_RCC_PWR_CLK_DISABLE(); - 8003a98: 4b60 ldr r3, [pc, #384] @ (8003c1c ) - 8003a9a: 6bda ldr r2, [r3, #60] @ 0x3c - 8003a9c: 4b5f ldr r3, [pc, #380] @ (8003c1c ) - 8003a9e: 4962 ldr r1, [pc, #392] @ (8003c28 ) - 8003aa0: 400a ands r2, r1 - 8003aa2: 63da str r2, [r3, #60] @ 0x3c + 80030ec: 4b60 ldr r3, [pc, #384] @ (8003270 ) + 80030ee: 6bda ldr r2, [r3, #60] @ 0x3c + 80030f0: 4b5f ldr r3, [pc, #380] @ (8003270 ) + 80030f2: 4962 ldr r1, [pc, #392] @ (800327c ) + 80030f4: 400a ands r2, r1 + 80030f6: 63da str r2, [r3, #60] @ 0x3c #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if (RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE) - 8003aa4: 687b ldr r3, [r7, #4] - 8003aa6: 69db ldr r3, [r3, #28] - 8003aa8: 2b00 cmp r3, #0 - 8003aaa: d100 bne.n 8003aae - 8003aac: e0b0 b.n 8003c10 + 80030f8: 687b ldr r3, [r7, #4] + 80030fa: 69db ldr r3, [r3, #28] + 80030fc: 2b00 cmp r3, #0 + 80030fe: d100 bne.n 8003102 + 8003100: e0b0 b.n 8003264 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8003aae: 4b5b ldr r3, [pc, #364] @ (8003c1c ) - 8003ab0: 689b ldr r3, [r3, #8] - 8003ab2: 2238 movs r2, #56 @ 0x38 - 8003ab4: 4013 ands r3, r2 - 8003ab6: 2b10 cmp r3, #16 - 8003ab8: d100 bne.n 8003abc - 8003aba: e078 b.n 8003bae + 8003102: 4b5b ldr r3, [pc, #364] @ (8003270 ) + 8003104: 689b ldr r3, [r3, #8] + 8003106: 2238 movs r2, #56 @ 0x38 + 8003108: 4013 ands r3, r2 + 800310a: 2b10 cmp r3, #16 + 800310c: d100 bne.n 8003110 + 800310e: e078 b.n 8003202 { if (RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON) - 8003abc: 687b ldr r3, [r7, #4] - 8003abe: 69db ldr r3, [r3, #28] - 8003ac0: 2b02 cmp r3, #2 - 8003ac2: d153 bne.n 8003b6c + 8003110: 687b ldr r3, [r7, #4] + 8003112: 69db ldr r3, [r3, #28] + 8003114: 2b02 cmp r3, #2 + 8003116: d153 bne.n 80031c0 assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); #endif /* RCC_PLLQ_SUPPORT */ assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8003ac4: 4b55 ldr r3, [pc, #340] @ (8003c1c ) - 8003ac6: 681a ldr r2, [r3, #0] - 8003ac8: 4b54 ldr r3, [pc, #336] @ (8003c1c ) - 8003aca: 4958 ldr r1, [pc, #352] @ (8003c2c ) - 8003acc: 400a ands r2, r1 - 8003ace: 601a str r2, [r3, #0] + 8003118: 4b55 ldr r3, [pc, #340] @ (8003270 ) + 800311a: 681a ldr r2, [r3, #0] + 800311c: 4b54 ldr r3, [pc, #336] @ (8003270 ) + 800311e: 4958 ldr r1, [pc, #352] @ (8003280 ) + 8003120: 400a ands r2, r1 + 8003122: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003ad0: f7fd fd2c bl 800152c - 8003ad4: 0003 movs r3, r0 - 8003ad6: 613b str r3, [r7, #16] + 8003124: f7fe faa2 bl 800166c + 8003128: 0003 movs r3, r0 + 800312a: 613b str r3, [r7, #16] /* Wait till PLL is ready */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8003ad8: e008 b.n 8003aec + 800312c: e008 b.n 8003140 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8003ada: f7fd fd27 bl 800152c - 8003ade: 0002 movs r2, r0 - 8003ae0: 693b ldr r3, [r7, #16] - 8003ae2: 1ad3 subs r3, r2, r3 - 8003ae4: 2b02 cmp r3, #2 - 8003ae6: d901 bls.n 8003aec + 800312e: f7fe fa9d bl 800166c + 8003132: 0002 movs r2, r0 + 8003134: 693b ldr r3, [r7, #16] + 8003136: 1ad3 subs r3, r2, r3 + 8003138: 2b02 cmp r3, #2 + 800313a: d901 bls.n 8003140 { return HAL_TIMEOUT; - 8003ae8: 2303 movs r3, #3 - 8003aea: e092 b.n 8003c12 + 800313c: 2303 movs r3, #3 + 800313e: e092 b.n 8003266 while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8003aec: 4b4b ldr r3, [pc, #300] @ (8003c1c ) - 8003aee: 681a ldr r2, [r3, #0] - 8003af0: 2380 movs r3, #128 @ 0x80 - 8003af2: 049b lsls r3, r3, #18 - 8003af4: 4013 ands r3, r2 - 8003af6: d1f0 bne.n 8003ada + 8003140: 4b4b ldr r3, [pc, #300] @ (8003270 ) + 8003142: 681a ldr r2, [r3, #0] + 8003144: 2380 movs r3, #128 @ 0x80 + 8003146: 049b lsls r3, r3, #18 + 8003148: 4013 ands r3, r2 + 800314a: d1f0 bne.n 800312e RCC_OscInitStruct->PLL.PLLN, RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLQ, RCC_OscInitStruct->PLL.PLLR); #else /* !RCC_PLLQ_SUPPORT */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8003af8: 4b48 ldr r3, [pc, #288] @ (8003c1c ) - 8003afa: 68db ldr r3, [r3, #12] - 8003afc: 4a4c ldr r2, [pc, #304] @ (8003c30 ) - 8003afe: 4013 ands r3, r2 - 8003b00: 0019 movs r1, r3 - 8003b02: 687b ldr r3, [r7, #4] - 8003b04: 6a1a ldr r2, [r3, #32] - 8003b06: 687b ldr r3, [r7, #4] - 8003b08: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003b0a: 431a orrs r2, r3 - 8003b0c: 687b ldr r3, [r7, #4] - 8003b0e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003b10: 021b lsls r3, r3, #8 - 8003b12: 431a orrs r2, r3 - 8003b14: 687b ldr r3, [r7, #4] - 8003b16: 6adb ldr r3, [r3, #44] @ 0x2c - 8003b18: 431a orrs r2, r3 - 8003b1a: 687b ldr r3, [r7, #4] - 8003b1c: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003b1e: 431a orrs r2, r3 - 8003b20: 4b3e ldr r3, [pc, #248] @ (8003c1c ) - 8003b22: 430a orrs r2, r1 - 8003b24: 60da str r2, [r3, #12] + 800314c: 4b48 ldr r3, [pc, #288] @ (8003270 ) + 800314e: 68db ldr r3, [r3, #12] + 8003150: 4a4c ldr r2, [pc, #304] @ (8003284 ) + 8003152: 4013 ands r3, r2 + 8003154: 0019 movs r1, r3 + 8003156: 687b ldr r3, [r7, #4] + 8003158: 6a1a ldr r2, [r3, #32] + 800315a: 687b ldr r3, [r7, #4] + 800315c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800315e: 431a orrs r2, r3 + 8003160: 687b ldr r3, [r7, #4] + 8003162: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003164: 021b lsls r3, r3, #8 + 8003166: 431a orrs r2, r3 + 8003168: 687b ldr r3, [r7, #4] + 800316a: 6adb ldr r3, [r3, #44] @ 0x2c + 800316c: 431a orrs r2, r3 + 800316e: 687b ldr r3, [r7, #4] + 8003170: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003172: 431a orrs r2, r3 + 8003174: 4b3e ldr r3, [pc, #248] @ (8003270 ) + 8003176: 430a orrs r2, r1 + 8003178: 60da str r2, [r3, #12] RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLR); #endif /* RCC_PLLQ_SUPPORT */ /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8003b26: 4b3d ldr r3, [pc, #244] @ (8003c1c ) - 8003b28: 681a ldr r2, [r3, #0] - 8003b2a: 4b3c ldr r3, [pc, #240] @ (8003c1c ) - 8003b2c: 2180 movs r1, #128 @ 0x80 - 8003b2e: 0449 lsls r1, r1, #17 - 8003b30: 430a orrs r2, r1 - 8003b32: 601a str r2, [r3, #0] + 800317a: 4b3d ldr r3, [pc, #244] @ (8003270 ) + 800317c: 681a ldr r2, [r3, #0] + 800317e: 4b3c ldr r3, [pc, #240] @ (8003270 ) + 8003180: 2180 movs r1, #128 @ 0x80 + 8003182: 0449 lsls r1, r1, #17 + 8003184: 430a orrs r2, r1 + 8003186: 601a str r2, [r3, #0] /* Enable PLLR Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLRCLK); - 8003b34: 4b39 ldr r3, [pc, #228] @ (8003c1c ) - 8003b36: 68da ldr r2, [r3, #12] - 8003b38: 4b38 ldr r3, [pc, #224] @ (8003c1c ) - 8003b3a: 2180 movs r1, #128 @ 0x80 - 8003b3c: 0549 lsls r1, r1, #21 - 8003b3e: 430a orrs r2, r1 - 8003b40: 60da str r2, [r3, #12] + 8003188: 4b39 ldr r3, [pc, #228] @ (8003270 ) + 800318a: 68da ldr r2, [r3, #12] + 800318c: 4b38 ldr r3, [pc, #224] @ (8003270 ) + 800318e: 2180 movs r1, #128 @ 0x80 + 8003190: 0549 lsls r1, r1, #21 + 8003192: 430a orrs r2, r1 + 8003194: 60da str r2, [r3, #12] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003b42: f7fd fcf3 bl 800152c - 8003b46: 0003 movs r3, r0 - 8003b48: 613b str r3, [r7, #16] + 8003196: f7fe fa69 bl 800166c + 800319a: 0003 movs r3, r0 + 800319c: 613b str r3, [r7, #16] /* Wait till PLL is ready */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) - 8003b4a: e008 b.n 8003b5e + 800319e: e008 b.n 80031b2 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8003b4c: f7fd fcee bl 800152c - 8003b50: 0002 movs r2, r0 - 8003b52: 693b ldr r3, [r7, #16] - 8003b54: 1ad3 subs r3, r2, r3 - 8003b56: 2b02 cmp r3, #2 - 8003b58: d901 bls.n 8003b5e + 80031a0: f7fe fa64 bl 800166c + 80031a4: 0002 movs r2, r0 + 80031a6: 693b ldr r3, [r7, #16] + 80031a8: 1ad3 subs r3, r2, r3 + 80031aa: 2b02 cmp r3, #2 + 80031ac: d901 bls.n 80031b2 { return HAL_TIMEOUT; - 8003b5a: 2303 movs r3, #3 - 8003b5c: e059 b.n 8003c12 + 80031ae: 2303 movs r3, #3 + 80031b0: e059 b.n 8003266 while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) - 8003b5e: 4b2f ldr r3, [pc, #188] @ (8003c1c ) - 8003b60: 681a ldr r2, [r3, #0] - 8003b62: 2380 movs r3, #128 @ 0x80 - 8003b64: 049b lsls r3, r3, #18 - 8003b66: 4013 ands r3, r2 - 8003b68: d0f0 beq.n 8003b4c - 8003b6a: e051 b.n 8003c10 + 80031b2: 4b2f ldr r3, [pc, #188] @ (8003270 ) + 80031b4: 681a ldr r2, [r3, #0] + 80031b6: 2380 movs r3, #128 @ 0x80 + 80031b8: 049b lsls r3, r3, #18 + 80031ba: 4013 ands r3, r2 + 80031bc: d0f0 beq.n 80031a0 + 80031be: e051 b.n 8003264 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8003b6c: 4b2b ldr r3, [pc, #172] @ (8003c1c ) - 8003b6e: 681a ldr r2, [r3, #0] - 8003b70: 4b2a ldr r3, [pc, #168] @ (8003c1c ) - 8003b72: 492e ldr r1, [pc, #184] @ (8003c2c ) - 8003b74: 400a ands r2, r1 - 8003b76: 601a str r2, [r3, #0] + 80031c0: 4b2b ldr r3, [pc, #172] @ (8003270 ) + 80031c2: 681a ldr r2, [r3, #0] + 80031c4: 4b2a ldr r3, [pc, #168] @ (8003270 ) + 80031c6: 492e ldr r1, [pc, #184] @ (8003280 ) + 80031c8: 400a ands r2, r1 + 80031ca: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003b78: f7fd fcd8 bl 800152c - 8003b7c: 0003 movs r3, r0 - 8003b7e: 613b str r3, [r7, #16] + 80031cc: f7fe fa4e bl 800166c + 80031d0: 0003 movs r3, r0 + 80031d2: 613b str r3, [r7, #16] /* Wait till PLL is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8003b80: e008 b.n 8003b94 + 80031d4: e008 b.n 80031e8 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8003b82: f7fd fcd3 bl 800152c - 8003b86: 0002 movs r2, r0 - 8003b88: 693b ldr r3, [r7, #16] - 8003b8a: 1ad3 subs r3, r2, r3 - 8003b8c: 2b02 cmp r3, #2 - 8003b8e: d901 bls.n 8003b94 + 80031d6: f7fe fa49 bl 800166c + 80031da: 0002 movs r2, r0 + 80031dc: 693b ldr r3, [r7, #16] + 80031de: 1ad3 subs r3, r2, r3 + 80031e0: 2b02 cmp r3, #2 + 80031e2: d901 bls.n 80031e8 { return HAL_TIMEOUT; - 8003b90: 2303 movs r3, #3 - 8003b92: e03e b.n 8003c12 + 80031e4: 2303 movs r3, #3 + 80031e6: e03e b.n 8003266 while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8003b94: 4b21 ldr r3, [pc, #132] @ (8003c1c ) - 8003b96: 681a ldr r2, [r3, #0] - 8003b98: 2380 movs r3, #128 @ 0x80 - 8003b9a: 049b lsls r3, r3, #18 - 8003b9c: 4013 ands r3, r2 - 8003b9e: d1f0 bne.n 8003b82 + 80031e8: 4b21 ldr r3, [pc, #132] @ (8003270 ) + 80031ea: 681a ldr r2, [r3, #0] + 80031ec: 2380 movs r3, #128 @ 0x80 + 80031ee: 049b lsls r3, r3, #18 + 80031f0: 4013 ands r3, r2 + 80031f2: d1f0 bne.n 80031d6 } /* Unselect main PLL clock source and disable main PLL outputs to save power */ #if defined(RCC_PLLQ_SUPPORT) RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLQEN | RCC_PLLCFGR_PLLREN); #else RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLREN); - 8003ba0: 4b1e ldr r3, [pc, #120] @ (8003c1c ) - 8003ba2: 68da ldr r2, [r3, #12] - 8003ba4: 4b1d ldr r3, [pc, #116] @ (8003c1c ) - 8003ba6: 4923 ldr r1, [pc, #140] @ (8003c34 ) - 8003ba8: 400a ands r2, r1 - 8003baa: 60da str r2, [r3, #12] - 8003bac: e030 b.n 8003c10 + 80031f4: 4b1e ldr r3, [pc, #120] @ (8003270 ) + 80031f6: 68da ldr r2, [r3, #12] + 80031f8: 4b1d ldr r3, [pc, #116] @ (8003270 ) + 80031fa: 4923 ldr r1, [pc, #140] @ (8003288 ) + 80031fc: 400a ands r2, r1 + 80031fe: 60da str r2, [r3, #12] + 8003200: e030 b.n 8003264 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8003bae: 687b ldr r3, [r7, #4] - 8003bb0: 69db ldr r3, [r3, #28] - 8003bb2: 2b01 cmp r3, #1 - 8003bb4: d101 bne.n 8003bba + 8003202: 687b ldr r3, [r7, #4] + 8003204: 69db ldr r3, [r3, #28] + 8003206: 2b01 cmp r3, #1 + 8003208: d101 bne.n 800320e { return HAL_ERROR; - 8003bb6: 2301 movs r3, #1 - 8003bb8: e02b b.n 8003c12 + 800320a: 2301 movs r3, #1 + 800320c: e02b b.n 8003266 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ temp_pllckcfg = RCC->PLLCFGR; - 8003bba: 4b18 ldr r3, [pc, #96] @ (8003c1c ) - 8003bbc: 68db ldr r3, [r3, #12] - 8003bbe: 617b str r3, [r7, #20] + 800320e: 4b18 ldr r3, [pc, #96] @ (8003270 ) + 8003210: 68db ldr r3, [r3, #12] + 8003212: 617b str r3, [r7, #20] if ((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8003bc0: 697b ldr r3, [r7, #20] - 8003bc2: 2203 movs r2, #3 - 8003bc4: 401a ands r2, r3 - 8003bc6: 687b ldr r3, [r7, #4] - 8003bc8: 6a1b ldr r3, [r3, #32] - 8003bca: 429a cmp r2, r3 - 8003bcc: d11e bne.n 8003c0c + 8003214: 697b ldr r3, [r7, #20] + 8003216: 2203 movs r2, #3 + 8003218: 401a ands r2, r3 + 800321a: 687b ldr r3, [r7, #4] + 800321c: 6a1b ldr r3, [r3, #32] + 800321e: 429a cmp r2, r3 + 8003220: d11e bne.n 8003260 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) || - 8003bce: 697b ldr r3, [r7, #20] - 8003bd0: 2270 movs r2, #112 @ 0x70 - 8003bd2: 401a ands r2, r3 - 8003bd4: 687b ldr r3, [r7, #4] - 8003bd6: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003222: 697b ldr r3, [r7, #20] + 8003224: 2270 movs r2, #112 @ 0x70 + 8003226: 401a ands r2, r3 + 8003228: 687b ldr r3, [r7, #4] + 800322a: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8003bd8: 429a cmp r2, r3 - 8003bda: d117 bne.n 8003c0c + 800322c: 429a cmp r2, r3 + 800322e: d117 bne.n 8003260 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || - 8003bdc: 697a ldr r2, [r7, #20] - 8003bde: 23fe movs r3, #254 @ 0xfe - 8003be0: 01db lsls r3, r3, #7 - 8003be2: 401a ands r2, r3 - 8003be4: 687b ldr r3, [r7, #4] - 8003be6: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003be8: 021b lsls r3, r3, #8 + 8003230: 697a ldr r2, [r7, #20] + 8003232: 23fe movs r3, #254 @ 0xfe + 8003234: 01db lsls r3, r3, #7 + 8003236: 401a ands r2, r3 + 8003238: 687b ldr r3, [r7, #4] + 800323a: 6a9b ldr r3, [r3, #40] @ 0x28 + 800323c: 021b lsls r3, r3, #8 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) || - 8003bea: 429a cmp r2, r3 - 8003bec: d10e bne.n 8003c0c + 800323e: 429a cmp r2, r3 + 8003240: d10e bne.n 8003260 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) || - 8003bee: 697a ldr r2, [r7, #20] - 8003bf0: 23f8 movs r3, #248 @ 0xf8 - 8003bf2: 039b lsls r3, r3, #14 - 8003bf4: 401a ands r2, r3 - 8003bf6: 687b ldr r3, [r7, #4] - 8003bf8: 6adb ldr r3, [r3, #44] @ 0x2c + 8003242: 697a ldr r2, [r7, #20] + 8003244: 23f8 movs r3, #248 @ 0xf8 + 8003246: 039b lsls r3, r3, #14 + 8003248: 401a ands r2, r3 + 800324a: 687b ldr r3, [r7, #4] + 800324c: 6adb ldr r3, [r3, #44] @ 0x2c (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || - 8003bfa: 429a cmp r2, r3 - 8003bfc: d106 bne.n 8003c0c + 800324e: 429a cmp r2, r3 + 8003250: d106 bne.n 8003260 #if defined (RCC_PLLQ_SUPPORT) (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ) || #endif /* RCC_PLLQ_SUPPORT */ (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLR) != RCC_OscInitStruct->PLL.PLLR)) - 8003bfe: 697b ldr r3, [r7, #20] - 8003c00: 0f5b lsrs r3, r3, #29 - 8003c02: 075a lsls r2, r3, #29 - 8003c04: 687b ldr r3, [r7, #4] - 8003c06: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003252: 697b ldr r3, [r7, #20] + 8003254: 0f5b lsrs r3, r3, #29 + 8003256: 075a lsls r2, r3, #29 + 8003258: 687b ldr r3, [r7, #4] + 800325a: 6b1b ldr r3, [r3, #48] @ 0x30 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) || - 8003c08: 429a cmp r2, r3 - 8003c0a: d001 beq.n 8003c10 + 800325c: 429a cmp r2, r3 + 800325e: d001 beq.n 8003264 { return HAL_ERROR; - 8003c0c: 2301 movs r3, #1 - 8003c0e: e000 b.n 8003c12 + 8003260: 2301 movs r3, #1 + 8003262: e000 b.n 8003266 } } } } return HAL_OK; - 8003c10: 2300 movs r3, #0 + 8003264: 2300 movs r3, #0 } - 8003c12: 0018 movs r0, r3 - 8003c14: 46bd mov sp, r7 - 8003c16: b008 add sp, #32 - 8003c18: bd80 pop {r7, pc} - 8003c1a: 46c0 nop @ (mov r8, r8) - 8003c1c: 40021000 .word 0x40021000 - 8003c20: 40007000 .word 0x40007000 - 8003c24: 00001388 .word 0x00001388 - 8003c28: efffffff .word 0xefffffff - 8003c2c: feffffff .word 0xfeffffff - 8003c30: 1fc1808c .word 0x1fc1808c - 8003c34: effefffc .word 0xeffefffc + 8003266: 0018 movs r0, r3 + 8003268: 46bd mov sp, r7 + 800326a: b008 add sp, #32 + 800326c: bd80 pop {r7, pc} + 800326e: 46c0 nop @ (mov r8, r8) + 8003270: 40021000 .word 0x40021000 + 8003274: 40007000 .word 0x40007000 + 8003278: 00001388 .word 0x00001388 + 800327c: efffffff .word 0xefffffff + 8003280: feffffff .word 0xfeffffff + 8003284: 1fc1808c .word 0x1fc1808c + 8003288: effefffc .word 0xeffefffc -08003c38 : +0800328c : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8003c38: b580 push {r7, lr} - 8003c3a: b084 sub sp, #16 - 8003c3c: af00 add r7, sp, #0 - 8003c3e: 6078 str r0, [r7, #4] - 8003c40: 6039 str r1, [r7, #0] + 800328c: b580 push {r7, lr} + 800328e: b084 sub sp, #16 + 8003290: af00 add r7, sp, #0 + 8003292: 6078 str r0, [r7, #4] + 8003294: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 8003c42: 687b ldr r3, [r7, #4] - 8003c44: 2b00 cmp r3, #0 - 8003c46: d101 bne.n 8003c4c + 8003296: 687b ldr r3, [r7, #4] + 8003298: 2b00 cmp r3, #0 + 800329a: d101 bne.n 80032a0 { return HAL_ERROR; - 8003c48: 2301 movs r3, #1 - 8003c4a: e0e9 b.n 8003e20 + 800329c: 2301 movs r3, #1 + 800329e: e0e9 b.n 8003474 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the FLASH clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8003c4c: 4b76 ldr r3, [pc, #472] @ (8003e28 ) - 8003c4e: 681b ldr r3, [r3, #0] - 8003c50: 2207 movs r2, #7 - 8003c52: 4013 ands r3, r2 - 8003c54: 683a ldr r2, [r7, #0] - 8003c56: 429a cmp r2, r3 - 8003c58: d91e bls.n 8003c98 + 80032a0: 4b76 ldr r3, [pc, #472] @ (800347c ) + 80032a2: 681b ldr r3, [r3, #0] + 80032a4: 2207 movs r2, #7 + 80032a6: 4013 ands r3, r2 + 80032a8: 683a ldr r2, [r7, #0] + 80032aa: 429a cmp r2, r3 + 80032ac: d91e bls.n 80032ec { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8003c5a: 4b73 ldr r3, [pc, #460] @ (8003e28 ) - 8003c5c: 681b ldr r3, [r3, #0] - 8003c5e: 2207 movs r2, #7 - 8003c60: 4393 bics r3, r2 - 8003c62: 0019 movs r1, r3 - 8003c64: 4b70 ldr r3, [pc, #448] @ (8003e28 ) - 8003c66: 683a ldr r2, [r7, #0] - 8003c68: 430a orrs r2, r1 - 8003c6a: 601a str r2, [r3, #0] + 80032ae: 4b73 ldr r3, [pc, #460] @ (800347c ) + 80032b0: 681b ldr r3, [r3, #0] + 80032b2: 2207 movs r2, #7 + 80032b4: 4393 bics r3, r2 + 80032b6: 0019 movs r1, r3 + 80032b8: 4b70 ldr r3, [pc, #448] @ (800347c ) + 80032ba: 683a ldr r2, [r7, #0] + 80032bc: 430a orrs r2, r1 + 80032be: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 8003c6c: f7fd fc5e bl 800152c - 8003c70: 0003 movs r3, r0 - 8003c72: 60fb str r3, [r7, #12] + 80032c0: f7fe f9d4 bl 800166c + 80032c4: 0003 movs r3, r0 + 80032c6: 60fb str r3, [r7, #12] while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8003c74: e009 b.n 8003c8a + 80032c8: e009 b.n 80032de { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8003c76: f7fd fc59 bl 800152c - 8003c7a: 0002 movs r2, r0 - 8003c7c: 68fb ldr r3, [r7, #12] - 8003c7e: 1ad3 subs r3, r2, r3 - 8003c80: 4a6a ldr r2, [pc, #424] @ (8003e2c ) - 8003c82: 4293 cmp r3, r2 - 8003c84: d901 bls.n 8003c8a + 80032ca: f7fe f9cf bl 800166c + 80032ce: 0002 movs r2, r0 + 80032d0: 68fb ldr r3, [r7, #12] + 80032d2: 1ad3 subs r3, r2, r3 + 80032d4: 4a6a ldr r2, [pc, #424] @ (8003480 ) + 80032d6: 4293 cmp r3, r2 + 80032d8: d901 bls.n 80032de { return HAL_TIMEOUT; - 8003c86: 2303 movs r3, #3 - 8003c88: e0ca b.n 8003e20 + 80032da: 2303 movs r3, #3 + 80032dc: e0ca b.n 8003474 while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8003c8a: 4b67 ldr r3, [pc, #412] @ (8003e28 ) - 8003c8c: 681b ldr r3, [r3, #0] - 8003c8e: 2207 movs r2, #7 - 8003c90: 4013 ands r3, r2 - 8003c92: 683a ldr r2, [r7, #0] - 8003c94: 429a cmp r2, r3 - 8003c96: d1ee bne.n 8003c76 + 80032de: 4b67 ldr r3, [pc, #412] @ (800347c ) + 80032e0: 681b ldr r3, [r3, #0] + 80032e2: 2207 movs r2, #7 + 80032e4: 4013 ands r3, r2 + 80032e6: 683a ldr r2, [r7, #0] + 80032e8: 429a cmp r2, r3 + 80032ea: d1ee bne.n 80032ca } } } /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8003c98: 687b ldr r3, [r7, #4] - 8003c9a: 681b ldr r3, [r3, #0] - 8003c9c: 2202 movs r2, #2 - 8003c9e: 4013 ands r3, r2 - 8003ca0: d015 beq.n 8003cce + 80032ec: 687b ldr r3, [r7, #4] + 80032ee: 681b ldr r3, [r3, #0] + 80032f0: 2202 movs r2, #2 + 80032f2: 4013 ands r3, r2 + 80032f4: d015 beq.n 8003322 { /* Set the highest APB divider in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8003ca2: 687b ldr r3, [r7, #4] - 8003ca4: 681b ldr r3, [r3, #0] - 8003ca6: 2204 movs r2, #4 - 8003ca8: 4013 ands r3, r2 - 8003caa: d006 beq.n 8003cba + 80032f6: 687b ldr r3, [r7, #4] + 80032f8: 681b ldr r3, [r3, #0] + 80032fa: 2204 movs r2, #4 + 80032fc: 4013 ands r3, r2 + 80032fe: d006 beq.n 800330e { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); - 8003cac: 4b60 ldr r3, [pc, #384] @ (8003e30 ) - 8003cae: 689a ldr r2, [r3, #8] - 8003cb0: 4b5f ldr r3, [pc, #380] @ (8003e30 ) - 8003cb2: 21e0 movs r1, #224 @ 0xe0 - 8003cb4: 01c9 lsls r1, r1, #7 - 8003cb6: 430a orrs r2, r1 - 8003cb8: 609a str r2, [r3, #8] + 8003300: 4b60 ldr r3, [pc, #384] @ (8003484 ) + 8003302: 689a ldr r2, [r3, #8] + 8003304: 4b5f ldr r3, [pc, #380] @ (8003484 ) + 8003306: 21e0 movs r1, #224 @ 0xe0 + 8003308: 01c9 lsls r1, r1, #7 + 800330a: 430a orrs r2, r1 + 800330c: 609a str r2, [r3, #8] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8003cba: 4b5d ldr r3, [pc, #372] @ (8003e30 ) - 8003cbc: 689b ldr r3, [r3, #8] - 8003cbe: 4a5d ldr r2, [pc, #372] @ (8003e34 ) - 8003cc0: 4013 ands r3, r2 - 8003cc2: 0019 movs r1, r3 - 8003cc4: 687b ldr r3, [r7, #4] - 8003cc6: 689a ldr r2, [r3, #8] - 8003cc8: 4b59 ldr r3, [pc, #356] @ (8003e30 ) - 8003cca: 430a orrs r2, r1 - 8003ccc: 609a str r2, [r3, #8] + 800330e: 4b5d ldr r3, [pc, #372] @ (8003484 ) + 8003310: 689b ldr r3, [r3, #8] + 8003312: 4a5d ldr r2, [pc, #372] @ (8003488 ) + 8003314: 4013 ands r3, r2 + 8003316: 0019 movs r1, r3 + 8003318: 687b ldr r3, [r7, #4] + 800331a: 689a ldr r2, [r3, #8] + 800331c: 4b59 ldr r3, [pc, #356] @ (8003484 ) + 800331e: 430a orrs r2, r1 + 8003320: 609a str r2, [r3, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8003cce: 687b ldr r3, [r7, #4] - 8003cd0: 681b ldr r3, [r3, #0] - 8003cd2: 2201 movs r2, #1 - 8003cd4: 4013 ands r3, r2 - 8003cd6: d057 beq.n 8003d88 + 8003322: 687b ldr r3, [r7, #4] + 8003324: 681b ldr r3, [r3, #0] + 8003326: 2201 movs r2, #1 + 8003328: 4013 ands r3, r2 + 800332a: d057 beq.n 80033dc { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8003cd8: 687b ldr r3, [r7, #4] - 8003cda: 685b ldr r3, [r3, #4] - 8003cdc: 2b01 cmp r3, #1 - 8003cde: d107 bne.n 8003cf0 + 800332c: 687b ldr r3, [r7, #4] + 800332e: 685b ldr r3, [r3, #4] + 8003330: 2b01 cmp r3, #1 + 8003332: d107 bne.n 8003344 { /* Check the HSE ready flag */ if (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 8003ce0: 4b53 ldr r3, [pc, #332] @ (8003e30 ) - 8003ce2: 681a ldr r2, [r3, #0] - 8003ce4: 2380 movs r3, #128 @ 0x80 - 8003ce6: 029b lsls r3, r3, #10 - 8003ce8: 4013 ands r3, r2 - 8003cea: d12b bne.n 8003d44 + 8003334: 4b53 ldr r3, [pc, #332] @ (8003484 ) + 8003336: 681a ldr r2, [r3, #0] + 8003338: 2380 movs r3, #128 @ 0x80 + 800333a: 029b lsls r3, r3, #10 + 800333c: 4013 ands r3, r2 + 800333e: d12b bne.n 8003398 { return HAL_ERROR; - 8003cec: 2301 movs r3, #1 - 8003cee: e097 b.n 8003e20 + 8003340: 2301 movs r3, #1 + 8003342: e097 b.n 8003474 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8003cf0: 687b ldr r3, [r7, #4] - 8003cf2: 685b ldr r3, [r3, #4] - 8003cf4: 2b02 cmp r3, #2 - 8003cf6: d107 bne.n 8003d08 + 8003344: 687b ldr r3, [r7, #4] + 8003346: 685b ldr r3, [r3, #4] + 8003348: 2b02 cmp r3, #2 + 800334a: d107 bne.n 800335c { /* Check the PLL ready flag */ if (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) - 8003cf8: 4b4d ldr r3, [pc, #308] @ (8003e30 ) - 8003cfa: 681a ldr r2, [r3, #0] - 8003cfc: 2380 movs r3, #128 @ 0x80 - 8003cfe: 049b lsls r3, r3, #18 - 8003d00: 4013 ands r3, r2 - 8003d02: d11f bne.n 8003d44 + 800334c: 4b4d ldr r3, [pc, #308] @ (8003484 ) + 800334e: 681a ldr r2, [r3, #0] + 8003350: 2380 movs r3, #128 @ 0x80 + 8003352: 049b lsls r3, r3, #18 + 8003354: 4013 ands r3, r2 + 8003356: d11f bne.n 8003398 { return HAL_ERROR; - 8003d04: 2301 movs r3, #1 - 8003d06: e08b b.n 8003e20 + 8003358: 2301 movs r3, #1 + 800335a: e08b b.n 8003474 } } /* HSI is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 8003d08: 687b ldr r3, [r7, #4] - 8003d0a: 685b ldr r3, [r3, #4] - 8003d0c: 2b00 cmp r3, #0 - 8003d0e: d107 bne.n 8003d20 + 800335c: 687b ldr r3, [r7, #4] + 800335e: 685b ldr r3, [r3, #4] + 8003360: 2b00 cmp r3, #0 + 8003362: d107 bne.n 8003374 { /* Check the HSI ready flag */ if (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8003d10: 4b47 ldr r3, [pc, #284] @ (8003e30 ) - 8003d12: 681a ldr r2, [r3, #0] - 8003d14: 2380 movs r3, #128 @ 0x80 - 8003d16: 00db lsls r3, r3, #3 - 8003d18: 4013 ands r3, r2 - 8003d1a: d113 bne.n 8003d44 + 8003364: 4b47 ldr r3, [pc, #284] @ (8003484 ) + 8003366: 681a ldr r2, [r3, #0] + 8003368: 2380 movs r3, #128 @ 0x80 + 800336a: 00db lsls r3, r3, #3 + 800336c: 4013 ands r3, r2 + 800336e: d113 bne.n 8003398 { return HAL_ERROR; - 8003d1c: 2301 movs r3, #1 - 8003d1e: e07f b.n 8003e20 + 8003370: 2301 movs r3, #1 + 8003372: e07f b.n 8003474 } } /* LSI is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_LSI) - 8003d20: 687b ldr r3, [r7, #4] - 8003d22: 685b ldr r3, [r3, #4] - 8003d24: 2b03 cmp r3, #3 - 8003d26: d106 bne.n 8003d36 + 8003374: 687b ldr r3, [r7, #4] + 8003376: 685b ldr r3, [r3, #4] + 8003378: 2b03 cmp r3, #3 + 800337a: d106 bne.n 800338a { /* Check the LSI ready flag */ if (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) - 8003d28: 4b41 ldr r3, [pc, #260] @ (8003e30 ) - 8003d2a: 6e1b ldr r3, [r3, #96] @ 0x60 - 8003d2c: 2202 movs r2, #2 - 8003d2e: 4013 ands r3, r2 - 8003d30: d108 bne.n 8003d44 + 800337c: 4b41 ldr r3, [pc, #260] @ (8003484 ) + 800337e: 6e1b ldr r3, [r3, #96] @ 0x60 + 8003380: 2202 movs r2, #2 + 8003382: 4013 ands r3, r2 + 8003384: d108 bne.n 8003398 { return HAL_ERROR; - 8003d32: 2301 movs r3, #1 - 8003d34: e074 b.n 8003e20 + 8003386: 2301 movs r3, #1 + 8003388: e074 b.n 8003474 } /* LSE is selected as System Clock Source */ else { /* Check the LSE ready flag */ if (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8003d36: 4b3e ldr r3, [pc, #248] @ (8003e30 ) - 8003d38: 6ddb ldr r3, [r3, #92] @ 0x5c - 8003d3a: 2202 movs r2, #2 - 8003d3c: 4013 ands r3, r2 - 8003d3e: d101 bne.n 8003d44 + 800338a: 4b3e ldr r3, [pc, #248] @ (8003484 ) + 800338c: 6ddb ldr r3, [r3, #92] @ 0x5c + 800338e: 2202 movs r2, #2 + 8003390: 4013 ands r3, r2 + 8003392: d101 bne.n 8003398 { return HAL_ERROR; - 8003d40: 2301 movs r3, #1 - 8003d42: e06d b.n 8003e20 + 8003394: 2301 movs r3, #1 + 8003396: e06d b.n 8003474 } } MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); - 8003d44: 4b3a ldr r3, [pc, #232] @ (8003e30 ) - 8003d46: 689b ldr r3, [r3, #8] - 8003d48: 2207 movs r2, #7 - 8003d4a: 4393 bics r3, r2 - 8003d4c: 0019 movs r1, r3 - 8003d4e: 687b ldr r3, [r7, #4] - 8003d50: 685a ldr r2, [r3, #4] - 8003d52: 4b37 ldr r3, [pc, #220] @ (8003e30 ) - 8003d54: 430a orrs r2, r1 - 8003d56: 609a str r2, [r3, #8] + 8003398: 4b3a ldr r3, [pc, #232] @ (8003484 ) + 800339a: 689b ldr r3, [r3, #8] + 800339c: 2207 movs r2, #7 + 800339e: 4393 bics r3, r2 + 80033a0: 0019 movs r1, r3 + 80033a2: 687b ldr r3, [r7, #4] + 80033a4: 685a ldr r2, [r3, #4] + 80033a6: 4b37 ldr r3, [pc, #220] @ (8003484 ) + 80033a8: 430a orrs r2, r1 + 80033aa: 609a str r2, [r3, #8] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8003d58: f7fd fbe8 bl 800152c - 8003d5c: 0003 movs r3, r0 - 8003d5e: 60fb str r3, [r7, #12] + 80033ac: f7fe f95e bl 800166c + 80033b0: 0003 movs r3, r0 + 80033b2: 60fb str r3, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8003d60: e009 b.n 8003d76 + 80033b4: e009 b.n 80033ca { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8003d62: f7fd fbe3 bl 800152c - 8003d66: 0002 movs r2, r0 - 8003d68: 68fb ldr r3, [r7, #12] - 8003d6a: 1ad3 subs r3, r2, r3 - 8003d6c: 4a2f ldr r2, [pc, #188] @ (8003e2c ) - 8003d6e: 4293 cmp r3, r2 - 8003d70: d901 bls.n 8003d76 + 80033b6: f7fe f959 bl 800166c + 80033ba: 0002 movs r2, r0 + 80033bc: 68fb ldr r3, [r7, #12] + 80033be: 1ad3 subs r3, r2, r3 + 80033c0: 4a2f ldr r2, [pc, #188] @ (8003480 ) + 80033c2: 4293 cmp r3, r2 + 80033c4: d901 bls.n 80033ca { return HAL_TIMEOUT; - 8003d72: 2303 movs r3, #3 - 8003d74: e054 b.n 8003e20 + 80033c6: 2303 movs r3, #3 + 80033c8: e054 b.n 8003474 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8003d76: 4b2e ldr r3, [pc, #184] @ (8003e30 ) - 8003d78: 689b ldr r3, [r3, #8] - 8003d7a: 2238 movs r2, #56 @ 0x38 - 8003d7c: 401a ands r2, r3 - 8003d7e: 687b ldr r3, [r7, #4] - 8003d80: 685b ldr r3, [r3, #4] - 8003d82: 00db lsls r3, r3, #3 - 8003d84: 429a cmp r2, r3 - 8003d86: d1ec bne.n 8003d62 + 80033ca: 4b2e ldr r3, [pc, #184] @ (8003484 ) + 80033cc: 689b ldr r3, [r3, #8] + 80033ce: 2238 movs r2, #56 @ 0x38 + 80033d0: 401a ands r2, r3 + 80033d2: 687b ldr r3, [r7, #4] + 80033d4: 685b ldr r3, [r3, #4] + 80033d6: 00db lsls r3, r3, #3 + 80033d8: 429a cmp r2, r3 + 80033da: d1ec bne.n 80033b6 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 8003d88: 4b27 ldr r3, [pc, #156] @ (8003e28 ) - 8003d8a: 681b ldr r3, [r3, #0] - 8003d8c: 2207 movs r2, #7 - 8003d8e: 4013 ands r3, r2 - 8003d90: 683a ldr r2, [r7, #0] - 8003d92: 429a cmp r2, r3 - 8003d94: d21e bcs.n 8003dd4 + 80033dc: 4b27 ldr r3, [pc, #156] @ (800347c ) + 80033de: 681b ldr r3, [r3, #0] + 80033e0: 2207 movs r2, #7 + 80033e2: 4013 ands r3, r2 + 80033e4: 683a ldr r2, [r7, #0] + 80033e6: 429a cmp r2, r3 + 80033e8: d21e bcs.n 8003428 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8003d96: 4b24 ldr r3, [pc, #144] @ (8003e28 ) - 8003d98: 681b ldr r3, [r3, #0] - 8003d9a: 2207 movs r2, #7 - 8003d9c: 4393 bics r3, r2 - 8003d9e: 0019 movs r1, r3 - 8003da0: 4b21 ldr r3, [pc, #132] @ (8003e28 ) - 8003da2: 683a ldr r2, [r7, #0] - 8003da4: 430a orrs r2, r1 - 8003da6: 601a str r2, [r3, #0] + 80033ea: 4b24 ldr r3, [pc, #144] @ (800347c ) + 80033ec: 681b ldr r3, [r3, #0] + 80033ee: 2207 movs r2, #7 + 80033f0: 4393 bics r3, r2 + 80033f2: 0019 movs r1, r3 + 80033f4: 4b21 ldr r3, [pc, #132] @ (800347c ) + 80033f6: 683a ldr r2, [r7, #0] + 80033f8: 430a orrs r2, r1 + 80033fa: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 8003da8: f7fd fbc0 bl 800152c - 8003dac: 0003 movs r3, r0 - 8003dae: 60fb str r3, [r7, #12] + 80033fc: f7fe f936 bl 800166c + 8003400: 0003 movs r3, r0 + 8003402: 60fb str r3, [r7, #12] while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8003db0: e009 b.n 8003dc6 + 8003404: e009 b.n 800341a { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8003db2: f7fd fbbb bl 800152c - 8003db6: 0002 movs r2, r0 - 8003db8: 68fb ldr r3, [r7, #12] - 8003dba: 1ad3 subs r3, r2, r3 - 8003dbc: 4a1b ldr r2, [pc, #108] @ (8003e2c ) - 8003dbe: 4293 cmp r3, r2 - 8003dc0: d901 bls.n 8003dc6 + 8003406: f7fe f931 bl 800166c + 800340a: 0002 movs r2, r0 + 800340c: 68fb ldr r3, [r7, #12] + 800340e: 1ad3 subs r3, r2, r3 + 8003410: 4a1b ldr r2, [pc, #108] @ (8003480 ) + 8003412: 4293 cmp r3, r2 + 8003414: d901 bls.n 800341a { return HAL_TIMEOUT; - 8003dc2: 2303 movs r3, #3 - 8003dc4: e02c b.n 8003e20 + 8003416: 2303 movs r3, #3 + 8003418: e02c b.n 8003474 while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8003dc6: 4b18 ldr r3, [pc, #96] @ (8003e28 ) - 8003dc8: 681b ldr r3, [r3, #0] - 8003dca: 2207 movs r2, #7 - 8003dcc: 4013 ands r3, r2 - 8003dce: 683a ldr r2, [r7, #0] - 8003dd0: 429a cmp r2, r3 - 8003dd2: d1ee bne.n 8003db2 + 800341a: 4b18 ldr r3, [pc, #96] @ (800347c ) + 800341c: 681b ldr r3, [r3, #0] + 800341e: 2207 movs r2, #7 + 8003420: 4013 ands r3, r2 + 8003422: 683a ldr r2, [r7, #0] + 8003424: 429a cmp r2, r3 + 8003426: d1ee bne.n 8003406 } } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8003dd4: 687b ldr r3, [r7, #4] - 8003dd6: 681b ldr r3, [r3, #0] - 8003dd8: 2204 movs r2, #4 - 8003dda: 4013 ands r3, r2 - 8003ddc: d009 beq.n 8003df2 + 8003428: 687b ldr r3, [r7, #4] + 800342a: 681b ldr r3, [r3, #0] + 800342c: 2204 movs r2, #4 + 800342e: 4013 ands r3, r2 + 8003430: d009 beq.n 8003446 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); - 8003dde: 4b14 ldr r3, [pc, #80] @ (8003e30 ) - 8003de0: 689b ldr r3, [r3, #8] - 8003de2: 4a15 ldr r2, [pc, #84] @ (8003e38 ) - 8003de4: 4013 ands r3, r2 - 8003de6: 0019 movs r1, r3 - 8003de8: 687b ldr r3, [r7, #4] - 8003dea: 68da ldr r2, [r3, #12] - 8003dec: 4b10 ldr r3, [pc, #64] @ (8003e30 ) - 8003dee: 430a orrs r2, r1 - 8003df0: 609a str r2, [r3, #8] + 8003432: 4b14 ldr r3, [pc, #80] @ (8003484 ) + 8003434: 689b ldr r3, [r3, #8] + 8003436: 4a15 ldr r2, [pc, #84] @ (800348c ) + 8003438: 4013 ands r3, r2 + 800343a: 0019 movs r1, r3 + 800343c: 687b ldr r3, [r7, #4] + 800343e: 68da ldr r2, [r3, #12] + 8003440: 4b10 ldr r3, [pc, #64] @ (8003484 ) + 8003442: 430a orrs r2, r1 + 8003444: 609a str r2, [r3, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); - 8003df2: f000 f829 bl 8003e48 - 8003df6: 0001 movs r1, r0 - 8003df8: 4b0d ldr r3, [pc, #52] @ (8003e30 ) - 8003dfa: 689b ldr r3, [r3, #8] - 8003dfc: 0a1b lsrs r3, r3, #8 - 8003dfe: 220f movs r2, #15 - 8003e00: 401a ands r2, r3 - 8003e02: 4b0e ldr r3, [pc, #56] @ (8003e3c ) - 8003e04: 0092 lsls r2, r2, #2 - 8003e06: 58d3 ldr r3, [r2, r3] - 8003e08: 221f movs r2, #31 - 8003e0a: 4013 ands r3, r2 - 8003e0c: 000a movs r2, r1 - 8003e0e: 40da lsrs r2, r3 - 8003e10: 4b0b ldr r3, [pc, #44] @ (8003e40 ) - 8003e12: 601a str r2, [r3, #0] + 8003446: f000 f829 bl 800349c + 800344a: 0001 movs r1, r0 + 800344c: 4b0d ldr r3, [pc, #52] @ (8003484 ) + 800344e: 689b ldr r3, [r3, #8] + 8003450: 0a1b lsrs r3, r3, #8 + 8003452: 220f movs r2, #15 + 8003454: 401a ands r2, r3 + 8003456: 4b0e ldr r3, [pc, #56] @ (8003490 ) + 8003458: 0092 lsls r2, r2, #2 + 800345a: 58d3 ldr r3, [r2, r3] + 800345c: 221f movs r2, #31 + 800345e: 4013 ands r3, r2 + 8003460: 000a movs r2, r1 + 8003462: 40da lsrs r2, r3 + 8003464: 4b0b ldr r3, [pc, #44] @ (8003494 ) + 8003466: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ return HAL_InitTick(uwTickPrio); - 8003e14: 4b0b ldr r3, [pc, #44] @ (8003e44 ) - 8003e16: 681b ldr r3, [r3, #0] - 8003e18: 0018 movs r0, r3 - 8003e1a: f7fd fb2b bl 8001474 - 8003e1e: 0003 movs r3, r0 + 8003468: 4b0b ldr r3, [pc, #44] @ (8003498 ) + 800346a: 681b ldr r3, [r3, #0] + 800346c: 0018 movs r0, r3 + 800346e: f7fe f8a1 bl 80015b4 + 8003472: 0003 movs r3, r0 } - 8003e20: 0018 movs r0, r3 - 8003e22: 46bd mov sp, r7 - 8003e24: b004 add sp, #16 - 8003e26: bd80 pop {r7, pc} - 8003e28: 40022000 .word 0x40022000 - 8003e2c: 00001388 .word 0x00001388 - 8003e30: 40021000 .word 0x40021000 - 8003e34: fffff0ff .word 0xfffff0ff - 8003e38: ffff8fff .word 0xffff8fff - 8003e3c: 08005f20 .word 0x08005f20 - 8003e40: 20000000 .word 0x20000000 - 8003e44: 20000004 .word 0x20000004 + 8003474: 0018 movs r0, r3 + 8003476: 46bd mov sp, r7 + 8003478: b004 add sp, #16 + 800347a: bd80 pop {r7, pc} + 800347c: 40022000 .word 0x40022000 + 8003480: 00001388 .word 0x00001388 + 8003484: 40021000 .word 0x40021000 + 8003488: fffff0ff .word 0xfffff0ff + 800348c: ffff8fff .word 0xffff8fff + 8003490: 08006240 .word 0x08006240 + 8003494: 20000000 .word 0x20000000 + 8003498: 20000004 .word 0x20000004 -08003e48 : +0800349c : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 8003e48: b580 push {r7, lr} - 8003e4a: b086 sub sp, #24 - 8003e4c: af00 add r7, sp, #0 + 800349c: b580 push {r7, lr} + 800349e: b086 sub sp, #24 + 80034a0: af00 add r7, sp, #0 uint32_t pllvco, pllsource, pllr, pllm, hsidiv; uint32_t sysclockfreq; if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 8003e4e: 4b3c ldr r3, [pc, #240] @ (8003f40 ) - 8003e50: 689b ldr r3, [r3, #8] - 8003e52: 2238 movs r2, #56 @ 0x38 - 8003e54: 4013 ands r3, r2 - 8003e56: d10f bne.n 8003e78 + 80034a2: 4b3c ldr r3, [pc, #240] @ (8003594 ) + 80034a4: 689b ldr r3, [r3, #8] + 80034a6: 2238 movs r2, #56 @ 0x38 + 80034a8: 4013 ands r3, r2 + 80034aa: d10f bne.n 80034cc { /* HSISYS can be derived for HSI16 */ hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos)); - 8003e58: 4b39 ldr r3, [pc, #228] @ (8003f40 ) - 8003e5a: 681b ldr r3, [r3, #0] - 8003e5c: 0adb lsrs r3, r3, #11 - 8003e5e: 2207 movs r2, #7 - 8003e60: 4013 ands r3, r2 - 8003e62: 2201 movs r2, #1 - 8003e64: 409a lsls r2, r3 - 8003e66: 0013 movs r3, r2 - 8003e68: 603b str r3, [r7, #0] + 80034ac: 4b39 ldr r3, [pc, #228] @ (8003594 ) + 80034ae: 681b ldr r3, [r3, #0] + 80034b0: 0adb lsrs r3, r3, #11 + 80034b2: 2207 movs r2, #7 + 80034b4: 4013 ands r3, r2 + 80034b6: 2201 movs r2, #1 + 80034b8: 409a lsls r2, r3 + 80034ba: 0013 movs r3, r2 + 80034bc: 603b str r3, [r7, #0] /* HSI used as system clock source */ sysclockfreq = (HSI_VALUE / hsidiv); - 8003e6a: 6839 ldr r1, [r7, #0] - 8003e6c: 4835 ldr r0, [pc, #212] @ (8003f44 ) - 8003e6e: f7fc f951 bl 8000114 <__udivsi3> - 8003e72: 0003 movs r3, r0 - 8003e74: 613b str r3, [r7, #16] - 8003e76: e05d b.n 8003f34 + 80034be: 6839 ldr r1, [r7, #0] + 80034c0: 4835 ldr r0, [pc, #212] @ (8003598 ) + 80034c2: f7fc fe27 bl 8000114 <__udivsi3> + 80034c6: 0003 movs r3, r0 + 80034c8: 613b str r3, [r7, #16] + 80034ca: e05d b.n 8003588 } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8003e78: 4b31 ldr r3, [pc, #196] @ (8003f40 ) - 8003e7a: 689b ldr r3, [r3, #8] - 8003e7c: 2238 movs r2, #56 @ 0x38 - 8003e7e: 4013 ands r3, r2 - 8003e80: 2b08 cmp r3, #8 - 8003e82: d102 bne.n 8003e8a + 80034cc: 4b31 ldr r3, [pc, #196] @ (8003594 ) + 80034ce: 689b ldr r3, [r3, #8] + 80034d0: 2238 movs r2, #56 @ 0x38 + 80034d2: 4013 ands r3, r2 + 80034d4: 2b08 cmp r3, #8 + 80034d6: d102 bne.n 80034de { /* HSE used as system clock source */ sysclockfreq = HSE_VALUE; - 8003e84: 4b30 ldr r3, [pc, #192] @ (8003f48 ) - 8003e86: 613b str r3, [r7, #16] - 8003e88: e054 b.n 8003f34 + 80034d8: 4b30 ldr r3, [pc, #192] @ (800359c ) + 80034da: 613b str r3, [r7, #16] + 80034dc: e054 b.n 8003588 } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8003e8a: 4b2d ldr r3, [pc, #180] @ (8003f40 ) - 8003e8c: 689b ldr r3, [r3, #8] - 8003e8e: 2238 movs r2, #56 @ 0x38 - 8003e90: 4013 ands r3, r2 - 8003e92: 2b10 cmp r3, #16 - 8003e94: d138 bne.n 8003f08 + 80034de: 4b2d ldr r3, [pc, #180] @ (8003594 ) + 80034e0: 689b ldr r3, [r3, #8] + 80034e2: 2238 movs r2, #56 @ 0x38 + 80034e4: 4013 ands r3, r2 + 80034e6: 2b10 cmp r3, #16 + 80034e8: d138 bne.n 800355c /* PLL used as system clock source */ /* PLL_VCO = ((HSE_VALUE or HSI_VALUE)/ PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - 8003e96: 4b2a ldr r3, [pc, #168] @ (8003f40 ) - 8003e98: 68db ldr r3, [r3, #12] - 8003e9a: 2203 movs r2, #3 - 8003e9c: 4013 ands r3, r2 - 8003e9e: 60fb str r3, [r7, #12] + 80034ea: 4b2a ldr r3, [pc, #168] @ (8003594 ) + 80034ec: 68db ldr r3, [r3, #12] + 80034ee: 2203 movs r2, #3 + 80034f0: 4013 ands r3, r2 + 80034f2: 60fb str r3, [r7, #12] pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; - 8003ea0: 4b27 ldr r3, [pc, #156] @ (8003f40 ) - 8003ea2: 68db ldr r3, [r3, #12] - 8003ea4: 091b lsrs r3, r3, #4 - 8003ea6: 2207 movs r2, #7 - 8003ea8: 4013 ands r3, r2 - 8003eaa: 3301 adds r3, #1 - 8003eac: 60bb str r3, [r7, #8] + 80034f4: 4b27 ldr r3, [pc, #156] @ (8003594 ) + 80034f6: 68db ldr r3, [r3, #12] + 80034f8: 091b lsrs r3, r3, #4 + 80034fa: 2207 movs r2, #7 + 80034fc: 4013 ands r3, r2 + 80034fe: 3301 adds r3, #1 + 8003500: 60bb str r3, [r7, #8] switch (pllsource) - 8003eae: 68fb ldr r3, [r7, #12] - 8003eb0: 2b03 cmp r3, #3 - 8003eb2: d10d bne.n 8003ed0 + 8003502: 68fb ldr r3, [r7, #12] + 8003504: 2b03 cmp r3, #3 + 8003506: d10d bne.n 8003524 { case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - 8003eb4: 68b9 ldr r1, [r7, #8] - 8003eb6: 4824 ldr r0, [pc, #144] @ (8003f48 ) - 8003eb8: f7fc f92c bl 8000114 <__udivsi3> - 8003ebc: 0003 movs r3, r0 - 8003ebe: 0019 movs r1, r3 - 8003ec0: 4b1f ldr r3, [pc, #124] @ (8003f40 ) - 8003ec2: 68db ldr r3, [r3, #12] - 8003ec4: 0a1b lsrs r3, r3, #8 - 8003ec6: 227f movs r2, #127 @ 0x7f - 8003ec8: 4013 ands r3, r2 - 8003eca: 434b muls r3, r1 - 8003ecc: 617b str r3, [r7, #20] + 8003508: 68b9 ldr r1, [r7, #8] + 800350a: 4824 ldr r0, [pc, #144] @ (800359c ) + 800350c: f7fc fe02 bl 8000114 <__udivsi3> + 8003510: 0003 movs r3, r0 + 8003512: 0019 movs r1, r3 + 8003514: 4b1f ldr r3, [pc, #124] @ (8003594 ) + 8003516: 68db ldr r3, [r3, #12] + 8003518: 0a1b lsrs r3, r3, #8 + 800351a: 227f movs r2, #127 @ 0x7f + 800351c: 4013 ands r3, r2 + 800351e: 434b muls r3, r1 + 8003520: 617b str r3, [r7, #20] break; - 8003ece: e00d b.n 8003eec + 8003522: e00d b.n 8003540 case RCC_PLLSOURCE_HSI: /* HSI16 used as PLL clock source */ default: /* HSI16 used as PLL clock source */ pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos) ; - 8003ed0: 68b9 ldr r1, [r7, #8] - 8003ed2: 481c ldr r0, [pc, #112] @ (8003f44 ) - 8003ed4: f7fc f91e bl 8000114 <__udivsi3> - 8003ed8: 0003 movs r3, r0 - 8003eda: 0019 movs r1, r3 - 8003edc: 4b18 ldr r3, [pc, #96] @ (8003f40 ) - 8003ede: 68db ldr r3, [r3, #12] - 8003ee0: 0a1b lsrs r3, r3, #8 - 8003ee2: 227f movs r2, #127 @ 0x7f - 8003ee4: 4013 ands r3, r2 - 8003ee6: 434b muls r3, r1 - 8003ee8: 617b str r3, [r7, #20] + 8003524: 68b9 ldr r1, [r7, #8] + 8003526: 481c ldr r0, [pc, #112] @ (8003598 ) + 8003528: f7fc fdf4 bl 8000114 <__udivsi3> + 800352c: 0003 movs r3, r0 + 800352e: 0019 movs r1, r3 + 8003530: 4b18 ldr r3, [pc, #96] @ (8003594 ) + 8003532: 68db ldr r3, [r3, #12] + 8003534: 0a1b lsrs r3, r3, #8 + 8003536: 227f movs r2, #127 @ 0x7f + 8003538: 4013 ands r3, r2 + 800353a: 434b muls r3, r1 + 800353c: 617b str r3, [r7, #20] break; - 8003eea: 46c0 nop @ (mov r8, r8) + 800353e: 46c0 nop @ (mov r8, r8) } pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U); - 8003eec: 4b14 ldr r3, [pc, #80] @ (8003f40 ) - 8003eee: 68db ldr r3, [r3, #12] - 8003ef0: 0f5b lsrs r3, r3, #29 - 8003ef2: 2207 movs r2, #7 - 8003ef4: 4013 ands r3, r2 - 8003ef6: 3301 adds r3, #1 - 8003ef8: 607b str r3, [r7, #4] + 8003540: 4b14 ldr r3, [pc, #80] @ (8003594 ) + 8003542: 68db ldr r3, [r3, #12] + 8003544: 0f5b lsrs r3, r3, #29 + 8003546: 2207 movs r2, #7 + 8003548: 4013 ands r3, r2 + 800354a: 3301 adds r3, #1 + 800354c: 607b str r3, [r7, #4] sysclockfreq = pllvco / pllr; - 8003efa: 6879 ldr r1, [r7, #4] - 8003efc: 6978 ldr r0, [r7, #20] - 8003efe: f7fc f909 bl 8000114 <__udivsi3> - 8003f02: 0003 movs r3, r0 - 8003f04: 613b str r3, [r7, #16] - 8003f06: e015 b.n 8003f34 + 800354e: 6879 ldr r1, [r7, #4] + 8003550: 6978 ldr r0, [r7, #20] + 8003552: f7fc fddf bl 8000114 <__udivsi3> + 8003556: 0003 movs r3, r0 + 8003558: 613b str r3, [r7, #16] + 800355a: e015 b.n 8003588 } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSE) - 8003f08: 4b0d ldr r3, [pc, #52] @ (8003f40 ) - 8003f0a: 689b ldr r3, [r3, #8] - 8003f0c: 2238 movs r2, #56 @ 0x38 - 8003f0e: 4013 ands r3, r2 - 8003f10: 2b20 cmp r3, #32 - 8003f12: d103 bne.n 8003f1c + 800355c: 4b0d ldr r3, [pc, #52] @ (8003594 ) + 800355e: 689b ldr r3, [r3, #8] + 8003560: 2238 movs r2, #56 @ 0x38 + 8003562: 4013 ands r3, r2 + 8003564: 2b20 cmp r3, #32 + 8003566: d103 bne.n 8003570 { /* LSE used as system clock source */ sysclockfreq = LSE_VALUE; - 8003f14: 2380 movs r3, #128 @ 0x80 - 8003f16: 021b lsls r3, r3, #8 - 8003f18: 613b str r3, [r7, #16] - 8003f1a: e00b b.n 8003f34 + 8003568: 2380 movs r3, #128 @ 0x80 + 800356a: 021b lsls r3, r3, #8 + 800356c: 613b str r3, [r7, #16] + 800356e: e00b b.n 8003588 } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSI) - 8003f1c: 4b08 ldr r3, [pc, #32] @ (8003f40 ) - 8003f1e: 689b ldr r3, [r3, #8] - 8003f20: 2238 movs r2, #56 @ 0x38 - 8003f22: 4013 ands r3, r2 - 8003f24: 2b18 cmp r3, #24 - 8003f26: d103 bne.n 8003f30 + 8003570: 4b08 ldr r3, [pc, #32] @ (8003594 ) + 8003572: 689b ldr r3, [r3, #8] + 8003574: 2238 movs r2, #56 @ 0x38 + 8003576: 4013 ands r3, r2 + 8003578: 2b18 cmp r3, #24 + 800357a: d103 bne.n 8003584 { /* LSI used as system clock source */ sysclockfreq = LSI_VALUE; - 8003f28: 23fa movs r3, #250 @ 0xfa - 8003f2a: 01db lsls r3, r3, #7 - 8003f2c: 613b str r3, [r7, #16] - 8003f2e: e001 b.n 8003f34 + 800357c: 23fa movs r3, #250 @ 0xfa + 800357e: 01db lsls r3, r3, #7 + 8003580: 613b str r3, [r7, #16] + 8003582: e001 b.n 8003588 } else { sysclockfreq = 0U; - 8003f30: 2300 movs r3, #0 - 8003f32: 613b str r3, [r7, #16] + 8003584: 2300 movs r3, #0 + 8003586: 613b str r3, [r7, #16] } return sysclockfreq; - 8003f34: 693b ldr r3, [r7, #16] + 8003588: 693b ldr r3, [r7, #16] } - 8003f36: 0018 movs r0, r3 - 8003f38: 46bd mov sp, r7 - 8003f3a: b006 add sp, #24 - 8003f3c: bd80 pop {r7, pc} - 8003f3e: 46c0 nop @ (mov r8, r8) - 8003f40: 40021000 .word 0x40021000 - 8003f44: 00f42400 .word 0x00f42400 - 8003f48: 007a1200 .word 0x007a1200 + 800358a: 0018 movs r0, r3 + 800358c: 46bd mov sp, r7 + 800358e: b006 add sp, #24 + 8003590: bd80 pop {r7, pc} + 8003592: 46c0 nop @ (mov r8, r8) + 8003594: 40021000 .word 0x40021000 + 8003598: 00f42400 .word 0x00f42400 + 800359c: 007a1200 .word 0x007a1200 -08003f4c : +080035a0 : * * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. * @retval HCLK frequency in Hz */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8003f4c: b580 push {r7, lr} - 8003f4e: af00 add r7, sp, #0 + 80035a0: b580 push {r7, lr} + 80035a2: af00 add r7, sp, #0 return SystemCoreClock; - 8003f50: 4b02 ldr r3, [pc, #8] @ (8003f5c ) - 8003f52: 681b ldr r3, [r3, #0] + 80035a4: 4b02 ldr r3, [pc, #8] @ (80035b0 ) + 80035a6: 681b ldr r3, [r3, #0] } - 8003f54: 0018 movs r0, r3 - 8003f56: 46bd mov sp, r7 - 8003f58: bd80 pop {r7, pc} - 8003f5a: 46c0 nop @ (mov r8, r8) - 8003f5c: 20000000 .word 0x20000000 + 80035a8: 0018 movs r0, r3 + 80035aa: 46bd mov sp, r7 + 80035ac: bd80 pop {r7, pc} + 80035ae: 46c0 nop @ (mov r8, r8) + 80035b0: 20000000 .word 0x20000000 -08003f60 : +080035b4 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency in Hz */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8003f60: b5b0 push {r4, r5, r7, lr} - 8003f62: af00 add r7, sp, #0 + 80035b4: b5b0 push {r4, r5, r7, lr} + 80035b6: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return ((uint32_t)(__LL_RCC_CALC_PCLK1_FREQ(HAL_RCC_GetHCLKFreq(), LL_RCC_GetAPB1Prescaler()))); - 8003f64: f7ff fff2 bl 8003f4c - 8003f68: 0004 movs r4, r0 - 8003f6a: f7ff fb49 bl 8003600 - 8003f6e: 0003 movs r3, r0 - 8003f70: 0b1a lsrs r2, r3, #12 - 8003f72: 4b05 ldr r3, [pc, #20] @ (8003f88 ) - 8003f74: 0092 lsls r2, r2, #2 - 8003f76: 58d3 ldr r3, [r2, r3] - 8003f78: 221f movs r2, #31 - 8003f7a: 4013 ands r3, r2 - 8003f7c: 40dc lsrs r4, r3 - 8003f7e: 0023 movs r3, r4 + 80035b8: f7ff fff2 bl 80035a0 + 80035bc: 0004 movs r4, r0 + 80035be: f7ff fb49 bl 8002c54 + 80035c2: 0003 movs r3, r0 + 80035c4: 0b1a lsrs r2, r3, #12 + 80035c6: 4b05 ldr r3, [pc, #20] @ (80035dc ) + 80035c8: 0092 lsls r2, r2, #2 + 80035ca: 58d3 ldr r3, [r2, r3] + 80035cc: 221f movs r2, #31 + 80035ce: 4013 ands r3, r2 + 80035d0: 40dc lsrs r4, r3 + 80035d2: 0023 movs r3, r4 } - 8003f80: 0018 movs r0, r3 - 8003f82: 46bd mov sp, r7 - 8003f84: bdb0 pop {r4, r5, r7, pc} - 8003f86: 46c0 nop @ (mov r8, r8) - 8003f88: 08005f60 .word 0x08005f60 + 80035d4: 0018 movs r0, r3 + 80035d6: 46bd mov sp, r7 + 80035d8: bdb0 pop {r4, r5, r7, pc} + 80035da: 46c0 nop @ (mov r8, r8) + 80035dc: 08006280 .word 0x08006280 -08003f8c : +080035e0 : * the RTC clock source: in this case the access to Backup domain is enabled. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 8003f8c: b580 push {r7, lr} - 8003f8e: b086 sub sp, #24 - 8003f90: af00 add r7, sp, #0 - 8003f92: 6078 str r0, [r7, #4] + 80035e0: b580 push {r7, lr} + 80035e2: b086 sub sp, #24 + 80035e4: af00 add r7, sp, #0 + 80035e6: 6078 str r0, [r7, #4] uint32_t tmpregister; uint32_t tickstart; HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ - 8003f94: 2313 movs r3, #19 - 8003f96: 18fb adds r3, r7, r3 - 8003f98: 2200 movs r2, #0 - 8003f9a: 701a strb r2, [r3, #0] + 80035e8: 2313 movs r3, #19 + 80035ea: 18fb adds r3, r7, r3 + 80035ec: 2200 movs r2, #0 + 80035ee: 701a strb r2, [r3, #0] HAL_StatusTypeDef status = HAL_OK; /* Final status */ - 8003f9c: 2312 movs r3, #18 - 8003f9e: 18fb adds r3, r7, r3 - 8003fa0: 2200 movs r2, #0 - 8003fa2: 701a strb r2, [r3, #0] + 80035f0: 2312 movs r3, #18 + 80035f2: 18fb adds r3, r7, r3 + 80035f4: 2200 movs r2, #0 + 80035f6: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*-------------------------- RTC clock source configuration ----------------------*/ if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 8003fa4: 687b ldr r3, [r7, #4] - 8003fa6: 681a ldr r2, [r3, #0] - 8003fa8: 2380 movs r3, #128 @ 0x80 - 8003faa: 029b lsls r3, r3, #10 - 8003fac: 4013 ands r3, r2 - 8003fae: d100 bne.n 8003fb2 - 8003fb0: e0a3 b.n 80040fa + 80035f8: 687b ldr r3, [r7, #4] + 80035fa: 681a ldr r2, [r3, #0] + 80035fc: 2380 movs r3, #128 @ 0x80 + 80035fe: 029b lsls r3, r3, #10 + 8003600: 4013 ands r3, r2 + 8003602: d100 bne.n 8003606 + 8003604: e0a3 b.n 800374e { FlagStatus pwrclkchanged = RESET; - 8003fb2: 2011 movs r0, #17 - 8003fb4: 183b adds r3, r7, r0 - 8003fb6: 2200 movs r2, #0 - 8003fb8: 701a strb r2, [r3, #0] + 8003606: 2011 movs r0, #17 + 8003608: 183b adds r3, r7, r0 + 800360a: 2200 movs r2, #0 + 800360c: 701a strb r2, [r3, #0] /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8003fba: 4b86 ldr r3, [pc, #536] @ (80041d4 ) - 8003fbc: 6bda ldr r2, [r3, #60] @ 0x3c - 8003fbe: 2380 movs r3, #128 @ 0x80 - 8003fc0: 055b lsls r3, r3, #21 - 8003fc2: 4013 ands r3, r2 - 8003fc4: d110 bne.n 8003fe8 + 800360e: 4b86 ldr r3, [pc, #536] @ (8003828 ) + 8003610: 6bda ldr r2, [r3, #60] @ 0x3c + 8003612: 2380 movs r3, #128 @ 0x80 + 8003614: 055b lsls r3, r3, #21 + 8003616: 4013 ands r3, r2 + 8003618: d110 bne.n 800363c { __HAL_RCC_PWR_CLK_ENABLE(); - 8003fc6: 4b83 ldr r3, [pc, #524] @ (80041d4 ) - 8003fc8: 6bda ldr r2, [r3, #60] @ 0x3c - 8003fca: 4b82 ldr r3, [pc, #520] @ (80041d4 ) - 8003fcc: 2180 movs r1, #128 @ 0x80 - 8003fce: 0549 lsls r1, r1, #21 - 8003fd0: 430a orrs r2, r1 - 8003fd2: 63da str r2, [r3, #60] @ 0x3c - 8003fd4: 4b7f ldr r3, [pc, #508] @ (80041d4 ) - 8003fd6: 6bda ldr r2, [r3, #60] @ 0x3c - 8003fd8: 2380 movs r3, #128 @ 0x80 - 8003fda: 055b lsls r3, r3, #21 - 8003fdc: 4013 ands r3, r2 - 8003fde: 60bb str r3, [r7, #8] - 8003fe0: 68bb ldr r3, [r7, #8] + 800361a: 4b83 ldr r3, [pc, #524] @ (8003828 ) + 800361c: 6bda ldr r2, [r3, #60] @ 0x3c + 800361e: 4b82 ldr r3, [pc, #520] @ (8003828 ) + 8003620: 2180 movs r1, #128 @ 0x80 + 8003622: 0549 lsls r1, r1, #21 + 8003624: 430a orrs r2, r1 + 8003626: 63da str r2, [r3, #60] @ 0x3c + 8003628: 4b7f ldr r3, [pc, #508] @ (8003828 ) + 800362a: 6bda ldr r2, [r3, #60] @ 0x3c + 800362c: 2380 movs r3, #128 @ 0x80 + 800362e: 055b lsls r3, r3, #21 + 8003630: 4013 ands r3, r2 + 8003632: 60bb str r3, [r7, #8] + 8003634: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8003fe2: 183b adds r3, r7, r0 - 8003fe4: 2201 movs r2, #1 - 8003fe6: 701a strb r2, [r3, #0] + 8003636: 183b adds r3, r7, r0 + 8003638: 2201 movs r2, #1 + 800363a: 701a strb r2, [r3, #0] } /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); - 8003fe8: 4b7b ldr r3, [pc, #492] @ (80041d8 ) - 8003fea: 681a ldr r2, [r3, #0] - 8003fec: 4b7a ldr r3, [pc, #488] @ (80041d8 ) - 8003fee: 2180 movs r1, #128 @ 0x80 - 8003ff0: 0049 lsls r1, r1, #1 - 8003ff2: 430a orrs r2, r1 - 8003ff4: 601a str r2, [r3, #0] + 800363c: 4b7b ldr r3, [pc, #492] @ (800382c ) + 800363e: 681a ldr r2, [r3, #0] + 8003640: 4b7a ldr r3, [pc, #488] @ (800382c ) + 8003642: 2180 movs r1, #128 @ 0x80 + 8003644: 0049 lsls r1, r1, #1 + 8003646: 430a orrs r2, r1 + 8003648: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8003ff6: f7fd fa99 bl 800152c - 8003ffa: 0003 movs r3, r0 - 8003ffc: 60fb str r3, [r7, #12] + 800364a: f7fe f80f bl 800166c + 800364e: 0003 movs r3, r0 + 8003650: 60fb str r3, [r7, #12] while ((PWR->CR1 & PWR_CR1_DBP) == 0U) - 8003ffe: e00b b.n 8004018 + 8003652: e00b b.n 800366c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8004000: f7fd fa94 bl 800152c - 8004004: 0002 movs r2, r0 - 8004006: 68fb ldr r3, [r7, #12] - 8004008: 1ad3 subs r3, r2, r3 - 800400a: 2b02 cmp r3, #2 - 800400c: d904 bls.n 8004018 + 8003654: f7fe f80a bl 800166c + 8003658: 0002 movs r2, r0 + 800365a: 68fb ldr r3, [r7, #12] + 800365c: 1ad3 subs r3, r2, r3 + 800365e: 2b02 cmp r3, #2 + 8003660: d904 bls.n 800366c { ret = HAL_TIMEOUT; - 800400e: 2313 movs r3, #19 - 8004010: 18fb adds r3, r7, r3 - 8004012: 2203 movs r2, #3 - 8004014: 701a strb r2, [r3, #0] + 8003662: 2313 movs r3, #19 + 8003664: 18fb adds r3, r7, r3 + 8003666: 2203 movs r2, #3 + 8003668: 701a strb r2, [r3, #0] break; - 8004016: e005 b.n 8004024 + 800366a: e005 b.n 8003678 while ((PWR->CR1 & PWR_CR1_DBP) == 0U) - 8004018: 4b6f ldr r3, [pc, #444] @ (80041d8 ) - 800401a: 681a ldr r2, [r3, #0] - 800401c: 2380 movs r3, #128 @ 0x80 - 800401e: 005b lsls r3, r3, #1 - 8004020: 4013 ands r3, r2 - 8004022: d0ed beq.n 8004000 + 800366c: 4b6f ldr r3, [pc, #444] @ (800382c ) + 800366e: 681a ldr r2, [r3, #0] + 8003670: 2380 movs r3, #128 @ 0x80 + 8003672: 005b lsls r3, r3, #1 + 8003674: 4013 ands r3, r2 + 8003676: d0ed beq.n 8003654 } } if (ret == HAL_OK) - 8004024: 2313 movs r3, #19 - 8004026: 18fb adds r3, r7, r3 - 8004028: 781b ldrb r3, [r3, #0] - 800402a: 2b00 cmp r3, #0 - 800402c: d154 bne.n 80040d8 + 8003678: 2313 movs r3, #19 + 800367a: 18fb adds r3, r7, r3 + 800367c: 781b ldrb r3, [r3, #0] + 800367e: 2b00 cmp r3, #0 + 8003680: d154 bne.n 800372c { /* Reset the Backup domain only if the RTC Clock source selection is modified from default */ tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); - 800402e: 4b69 ldr r3, [pc, #420] @ (80041d4 ) - 8004030: 6dda ldr r2, [r3, #92] @ 0x5c - 8004032: 23c0 movs r3, #192 @ 0xc0 - 8004034: 009b lsls r3, r3, #2 - 8004036: 4013 ands r3, r2 - 8004038: 617b str r3, [r7, #20] + 8003682: 4b69 ldr r3, [pc, #420] @ (8003828 ) + 8003684: 6dda ldr r2, [r3, #92] @ 0x5c + 8003686: 23c0 movs r3, #192 @ 0xc0 + 8003688: 009b lsls r3, r3, #2 + 800368a: 4013 ands r3, r2 + 800368c: 617b str r3, [r7, #20] /* Reset the Backup domain only if the RTC Clock source selection is modified */ if ((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection)) - 800403a: 697b ldr r3, [r7, #20] - 800403c: 2b00 cmp r3, #0 - 800403e: d019 beq.n 8004074 - 8004040: 687b ldr r3, [r7, #4] - 8004042: 699b ldr r3, [r3, #24] - 8004044: 697a ldr r2, [r7, #20] - 8004046: 429a cmp r2, r3 - 8004048: d014 beq.n 8004074 + 800368e: 697b ldr r3, [r7, #20] + 8003690: 2b00 cmp r3, #0 + 8003692: d019 beq.n 80036c8 + 8003694: 687b ldr r3, [r7, #4] + 8003696: 699b ldr r3, [r3, #24] + 8003698: 697a ldr r2, [r7, #20] + 800369a: 429a cmp r2, r3 + 800369c: d014 beq.n 80036c8 { /* Store the content of BDCR register before the reset of Backup Domain */ tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); - 800404a: 4b62 ldr r3, [pc, #392] @ (80041d4 ) - 800404c: 6ddb ldr r3, [r3, #92] @ 0x5c - 800404e: 4a63 ldr r2, [pc, #396] @ (80041dc ) - 8004050: 4013 ands r3, r2 - 8004052: 617b str r3, [r7, #20] + 800369e: 4b62 ldr r3, [pc, #392] @ (8003828 ) + 80036a0: 6ddb ldr r3, [r3, #92] @ 0x5c + 80036a2: 4a63 ldr r2, [pc, #396] @ (8003830 ) + 80036a4: 4013 ands r3, r2 + 80036a6: 617b str r3, [r7, #20] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8004054: 4b5f ldr r3, [pc, #380] @ (80041d4 ) - 8004056: 6dda ldr r2, [r3, #92] @ 0x5c - 8004058: 4b5e ldr r3, [pc, #376] @ (80041d4 ) - 800405a: 2180 movs r1, #128 @ 0x80 - 800405c: 0249 lsls r1, r1, #9 - 800405e: 430a orrs r2, r1 - 8004060: 65da str r2, [r3, #92] @ 0x5c + 80036a8: 4b5f ldr r3, [pc, #380] @ (8003828 ) + 80036aa: 6dda ldr r2, [r3, #92] @ 0x5c + 80036ac: 4b5e ldr r3, [pc, #376] @ (8003828 ) + 80036ae: 2180 movs r1, #128 @ 0x80 + 80036b0: 0249 lsls r1, r1, #9 + 80036b2: 430a orrs r2, r1 + 80036b4: 65da str r2, [r3, #92] @ 0x5c __HAL_RCC_BACKUPRESET_RELEASE(); - 8004062: 4b5c ldr r3, [pc, #368] @ (80041d4 ) - 8004064: 6dda ldr r2, [r3, #92] @ 0x5c - 8004066: 4b5b ldr r3, [pc, #364] @ (80041d4 ) - 8004068: 495d ldr r1, [pc, #372] @ (80041e0 ) - 800406a: 400a ands r2, r1 - 800406c: 65da str r2, [r3, #92] @ 0x5c + 80036b6: 4b5c ldr r3, [pc, #368] @ (8003828 ) + 80036b8: 6dda ldr r2, [r3, #92] @ 0x5c + 80036ba: 4b5b ldr r3, [pc, #364] @ (8003828 ) + 80036bc: 495d ldr r1, [pc, #372] @ (8003834 ) + 80036be: 400a ands r2, r1 + 80036c0: 65da str r2, [r3, #92] @ 0x5c /* Restore the Content of BDCR register */ RCC->BDCR = tmpregister; - 800406e: 4b59 ldr r3, [pc, #356] @ (80041d4 ) - 8004070: 697a ldr r2, [r7, #20] - 8004072: 65da str r2, [r3, #92] @ 0x5c + 80036c2: 4b59 ldr r3, [pc, #356] @ (8003828 ) + 80036c4: 697a ldr r2, [r7, #20] + 80036c6: 65da str r2, [r3, #92] @ 0x5c } /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ if (HAL_IS_BIT_SET(tmpregister, RCC_BDCR_LSEON)) - 8004074: 697b ldr r3, [r7, #20] - 8004076: 2201 movs r2, #1 - 8004078: 4013 ands r3, r2 - 800407a: d016 beq.n 80040aa + 80036c8: 697b ldr r3, [r7, #20] + 80036ca: 2201 movs r2, #1 + 80036cc: 4013 ands r3, r2 + 80036ce: d016 beq.n 80036fe { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 800407c: f7fd fa56 bl 800152c - 8004080: 0003 movs r3, r0 - 8004082: 60fb str r3, [r7, #12] + 80036d0: f7fd ffcc bl 800166c + 80036d4: 0003 movs r3, r0 + 80036d6: 60fb str r3, [r7, #12] /* Wait till LSE is ready */ while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8004084: e00c b.n 80040a0 + 80036d8: e00c b.n 80036f4 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8004086: f7fd fa51 bl 800152c - 800408a: 0002 movs r2, r0 - 800408c: 68fb ldr r3, [r7, #12] - 800408e: 1ad3 subs r3, r2, r3 - 8004090: 4a54 ldr r2, [pc, #336] @ (80041e4 ) - 8004092: 4293 cmp r3, r2 - 8004094: d904 bls.n 80040a0 + 80036da: f7fd ffc7 bl 800166c + 80036de: 0002 movs r2, r0 + 80036e0: 68fb ldr r3, [r7, #12] + 80036e2: 1ad3 subs r3, r2, r3 + 80036e4: 4a54 ldr r2, [pc, #336] @ (8003838 ) + 80036e6: 4293 cmp r3, r2 + 80036e8: d904 bls.n 80036f4 { ret = HAL_TIMEOUT; - 8004096: 2313 movs r3, #19 - 8004098: 18fb adds r3, r7, r3 - 800409a: 2203 movs r2, #3 - 800409c: 701a strb r2, [r3, #0] + 80036ea: 2313 movs r3, #19 + 80036ec: 18fb adds r3, r7, r3 + 80036ee: 2203 movs r2, #3 + 80036f0: 701a strb r2, [r3, #0] break; - 800409e: e004 b.n 80040aa + 80036f2: e004 b.n 80036fe while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 80040a0: 4b4c ldr r3, [pc, #304] @ (80041d4 ) - 80040a2: 6ddb ldr r3, [r3, #92] @ 0x5c - 80040a4: 2202 movs r2, #2 - 80040a6: 4013 ands r3, r2 - 80040a8: d0ed beq.n 8004086 + 80036f4: 4b4c ldr r3, [pc, #304] @ (8003828 ) + 80036f6: 6ddb ldr r3, [r3, #92] @ 0x5c + 80036f8: 2202 movs r2, #2 + 80036fa: 4013 ands r3, r2 + 80036fc: d0ed beq.n 80036da } } } if (ret == HAL_OK) - 80040aa: 2313 movs r3, #19 - 80040ac: 18fb adds r3, r7, r3 - 80040ae: 781b ldrb r3, [r3, #0] - 80040b0: 2b00 cmp r3, #0 - 80040b2: d10a bne.n 80040ca + 80036fe: 2313 movs r3, #19 + 8003700: 18fb adds r3, r7, r3 + 8003702: 781b ldrb r3, [r3, #0] + 8003704: 2b00 cmp r3, #0 + 8003706: d10a bne.n 800371e { /* Apply new RTC clock source selection */ __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 80040b4: 4b47 ldr r3, [pc, #284] @ (80041d4 ) - 80040b6: 6ddb ldr r3, [r3, #92] @ 0x5c - 80040b8: 4a48 ldr r2, [pc, #288] @ (80041dc ) - 80040ba: 4013 ands r3, r2 - 80040bc: 0019 movs r1, r3 - 80040be: 687b ldr r3, [r7, #4] - 80040c0: 699a ldr r2, [r3, #24] - 80040c2: 4b44 ldr r3, [pc, #272] @ (80041d4 ) - 80040c4: 430a orrs r2, r1 - 80040c6: 65da str r2, [r3, #92] @ 0x5c - 80040c8: e00c b.n 80040e4 + 8003708: 4b47 ldr r3, [pc, #284] @ (8003828 ) + 800370a: 6ddb ldr r3, [r3, #92] @ 0x5c + 800370c: 4a48 ldr r2, [pc, #288] @ (8003830 ) + 800370e: 4013 ands r3, r2 + 8003710: 0019 movs r1, r3 + 8003712: 687b ldr r3, [r7, #4] + 8003714: 699a ldr r2, [r3, #24] + 8003716: 4b44 ldr r3, [pc, #272] @ (8003828 ) + 8003718: 430a orrs r2, r1 + 800371a: 65da str r2, [r3, #92] @ 0x5c + 800371c: e00c b.n 8003738 } else { /* set overall return value */ status = ret; - 80040ca: 2312 movs r3, #18 - 80040cc: 18fb adds r3, r7, r3 - 80040ce: 2213 movs r2, #19 - 80040d0: 18ba adds r2, r7, r2 - 80040d2: 7812 ldrb r2, [r2, #0] - 80040d4: 701a strb r2, [r3, #0] - 80040d6: e005 b.n 80040e4 + 800371e: 2312 movs r3, #18 + 8003720: 18fb adds r3, r7, r3 + 8003722: 2213 movs r2, #19 + 8003724: 18ba adds r2, r7, r2 + 8003726: 7812 ldrb r2, [r2, #0] + 8003728: 701a strb r2, [r3, #0] + 800372a: e005 b.n 8003738 } } else { /* set overall return value */ status = ret; - 80040d8: 2312 movs r3, #18 - 80040da: 18fb adds r3, r7, r3 - 80040dc: 2213 movs r2, #19 - 80040de: 18ba adds r2, r7, r2 - 80040e0: 7812 ldrb r2, [r2, #0] - 80040e2: 701a strb r2, [r3, #0] + 800372c: 2312 movs r3, #18 + 800372e: 18fb adds r3, r7, r3 + 8003730: 2213 movs r2, #19 + 8003732: 18ba adds r2, r7, r2 + 8003734: 7812 ldrb r2, [r2, #0] + 8003736: 701a strb r2, [r3, #0] } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) - 80040e4: 2311 movs r3, #17 - 80040e6: 18fb adds r3, r7, r3 - 80040e8: 781b ldrb r3, [r3, #0] - 80040ea: 2b01 cmp r3, #1 - 80040ec: d105 bne.n 80040fa + 8003738: 2311 movs r3, #17 + 800373a: 18fb adds r3, r7, r3 + 800373c: 781b ldrb r3, [r3, #0] + 800373e: 2b01 cmp r3, #1 + 8003740: d105 bne.n 800374e { __HAL_RCC_PWR_CLK_DISABLE(); - 80040ee: 4b39 ldr r3, [pc, #228] @ (80041d4 ) - 80040f0: 6bda ldr r2, [r3, #60] @ 0x3c - 80040f2: 4b38 ldr r3, [pc, #224] @ (80041d4 ) - 80040f4: 493c ldr r1, [pc, #240] @ (80041e8 ) - 80040f6: 400a ands r2, r1 - 80040f8: 63da str r2, [r3, #60] @ 0x3c + 8003742: 4b39 ldr r3, [pc, #228] @ (8003828 ) + 8003744: 6bda ldr r2, [r3, #60] @ 0x3c + 8003746: 4b38 ldr r3, [pc, #224] @ (8003828 ) + 8003748: 493c ldr r1, [pc, #240] @ (800383c ) + 800374a: 400a ands r2, r1 + 800374c: 63da str r2, [r3, #60] @ 0x3c } } /*-------------------------- USART1 clock source configuration -------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - 80040fa: 687b ldr r3, [r7, #4] - 80040fc: 681b ldr r3, [r3, #0] - 80040fe: 2201 movs r2, #1 - 8004100: 4013 ands r3, r2 - 8004102: d009 beq.n 8004118 + 800374e: 687b ldr r3, [r7, #4] + 8003750: 681b ldr r3, [r3, #0] + 8003752: 2201 movs r2, #1 + 8003754: 4013 ands r3, r2 + 8003756: d009 beq.n 800376c { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - 8004104: 4b33 ldr r3, [pc, #204] @ (80041d4 ) - 8004106: 6d5b ldr r3, [r3, #84] @ 0x54 - 8004108: 2203 movs r2, #3 - 800410a: 4393 bics r3, r2 - 800410c: 0019 movs r1, r3 - 800410e: 687b ldr r3, [r7, #4] - 8004110: 685a ldr r2, [r3, #4] - 8004112: 4b30 ldr r3, [pc, #192] @ (80041d4 ) - 8004114: 430a orrs r2, r1 - 8004116: 655a str r2, [r3, #84] @ 0x54 + 8003758: 4b33 ldr r3, [pc, #204] @ (8003828 ) + 800375a: 6d5b ldr r3, [r3, #84] @ 0x54 + 800375c: 2203 movs r2, #3 + 800375e: 4393 bics r3, r2 + 8003760: 0019 movs r1, r3 + 8003762: 687b ldr r3, [r7, #4] + 8003764: 685a ldr r2, [r3, #4] + 8003766: 4b30 ldr r3, [pc, #192] @ (8003828 ) + 8003768: 430a orrs r2, r1 + 800376a: 655a str r2, [r3, #84] @ 0x54 } #if defined(RCC_CCIPR_USART2SEL) /*-------------------------- USART2 clock source configuration -------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - 8004118: 687b ldr r3, [r7, #4] - 800411a: 681b ldr r3, [r3, #0] - 800411c: 2202 movs r2, #2 - 800411e: 4013 ands r3, r2 - 8004120: d009 beq.n 8004136 + 800376c: 687b ldr r3, [r7, #4] + 800376e: 681b ldr r3, [r3, #0] + 8003770: 2202 movs r2, #2 + 8003772: 4013 ands r3, r2 + 8003774: d009 beq.n 800378a { /* Check the parameters */ assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); /* Configure the USART2 clock source */ __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - 8004122: 4b2c ldr r3, [pc, #176] @ (80041d4 ) - 8004124: 6d5b ldr r3, [r3, #84] @ 0x54 - 8004126: 220c movs r2, #12 - 8004128: 4393 bics r3, r2 - 800412a: 0019 movs r1, r3 - 800412c: 687b ldr r3, [r7, #4] - 800412e: 689a ldr r2, [r3, #8] - 8004130: 4b28 ldr r3, [pc, #160] @ (80041d4 ) - 8004132: 430a orrs r2, r1 - 8004134: 655a str r2, [r3, #84] @ 0x54 + 8003776: 4b2c ldr r3, [pc, #176] @ (8003828 ) + 8003778: 6d5b ldr r3, [r3, #84] @ 0x54 + 800377a: 220c movs r2, #12 + 800377c: 4393 bics r3, r2 + 800377e: 0019 movs r1, r3 + 8003780: 687b ldr r3, [r7, #4] + 8003782: 689a ldr r2, [r3, #8] + 8003784: 4b28 ldr r3, [pc, #160] @ (8003828 ) + 8003786: 430a orrs r2, r1 + 8003788: 655a str r2, [r3, #84] @ 0x54 __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); } #endif /* RCC_CCIPR_LPTIM2SEL */ /*-------------------------- I2C1 clock source configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - 8004136: 687b ldr r3, [r7, #4] - 8004138: 681b ldr r3, [r3, #0] - 800413a: 2220 movs r2, #32 - 800413c: 4013 ands r3, r2 - 800413e: d009 beq.n 8004154 + 800378a: 687b ldr r3, [r7, #4] + 800378c: 681b ldr r3, [r3, #0] + 800378e: 2220 movs r2, #32 + 8003790: 4013 ands r3, r2 + 8003792: d009 beq.n 80037a8 { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - 8004140: 4b24 ldr r3, [pc, #144] @ (80041d4 ) - 8004142: 6d5b ldr r3, [r3, #84] @ 0x54 - 8004144: 4a29 ldr r2, [pc, #164] @ (80041ec ) - 8004146: 4013 ands r3, r2 - 8004148: 0019 movs r1, r3 - 800414a: 687b ldr r3, [r7, #4] - 800414c: 68da ldr r2, [r3, #12] - 800414e: 4b21 ldr r3, [pc, #132] @ (80041d4 ) - 8004150: 430a orrs r2, r1 - 8004152: 655a str r2, [r3, #84] @ 0x54 + 8003794: 4b24 ldr r3, [pc, #144] @ (8003828 ) + 8003796: 6d5b ldr r3, [r3, #84] @ 0x54 + 8003798: 4a29 ldr r2, [pc, #164] @ (8003840 ) + 800379a: 4013 ands r3, r2 + 800379c: 0019 movs r1, r3 + 800379e: 687b ldr r3, [r7, #4] + 80037a0: 68da ldr r2, [r3, #12] + 80037a2: 4b21 ldr r3, [pc, #132] @ (8003828 ) + 80037a4: 430a orrs r2, r1 + 80037a6: 655a str r2, [r3, #84] @ 0x54 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLQCLK); } } #endif /* RNG */ /*-------------------------- ADC clock source configuration ----------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8004154: 687b ldr r3, [r7, #4] - 8004156: 681a ldr r2, [r3, #0] - 8004158: 2380 movs r3, #128 @ 0x80 - 800415a: 01db lsls r3, r3, #7 - 800415c: 4013 ands r3, r2 - 800415e: d015 beq.n 800418c + 80037a8: 687b ldr r3, [r7, #4] + 80037aa: 681a ldr r2, [r3, #0] + 80037ac: 2380 movs r3, #128 @ 0x80 + 80037ae: 01db lsls r3, r3, #7 + 80037b0: 4013 ands r3, r2 + 80037b2: d015 beq.n 80037e0 { /* Check the parameters */ assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection)); /* Configure the ADC interface clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8004160: 4b1c ldr r3, [pc, #112] @ (80041d4 ) - 8004162: 6d5b ldr r3, [r3, #84] @ 0x54 - 8004164: 009b lsls r3, r3, #2 - 8004166: 0899 lsrs r1, r3, #2 - 8004168: 687b ldr r3, [r7, #4] - 800416a: 695a ldr r2, [r3, #20] - 800416c: 4b19 ldr r3, [pc, #100] @ (80041d4 ) - 800416e: 430a orrs r2, r1 - 8004170: 655a str r2, [r3, #84] @ 0x54 + 80037b4: 4b1c ldr r3, [pc, #112] @ (8003828 ) + 80037b6: 6d5b ldr r3, [r3, #84] @ 0x54 + 80037b8: 009b lsls r3, r3, #2 + 80037ba: 0899 lsrs r1, r3, #2 + 80037bc: 687b ldr r3, [r7, #4] + 80037be: 695a ldr r2, [r3, #20] + 80037c0: 4b19 ldr r3, [pc, #100] @ (8003828 ) + 80037c2: 430a orrs r2, r1 + 80037c4: 655a str r2, [r3, #84] @ 0x54 if (PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLADC) - 8004172: 687b ldr r3, [r7, #4] - 8004174: 695a ldr r2, [r3, #20] - 8004176: 2380 movs r3, #128 @ 0x80 - 8004178: 05db lsls r3, r3, #23 - 800417a: 429a cmp r2, r3 - 800417c: d106 bne.n 800418c + 80037c6: 687b ldr r3, [r7, #4] + 80037c8: 695a ldr r2, [r3, #20] + 80037ca: 2380 movs r3, #128 @ 0x80 + 80037cc: 05db lsls r3, r3, #23 + 80037ce: 429a cmp r2, r3 + 80037d0: d106 bne.n 80037e0 { /* Enable PLLPCLK output */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLPCLK); - 800417e: 4b15 ldr r3, [pc, #84] @ (80041d4 ) - 8004180: 68da ldr r2, [r3, #12] - 8004182: 4b14 ldr r3, [pc, #80] @ (80041d4 ) - 8004184: 2180 movs r1, #128 @ 0x80 - 8004186: 0249 lsls r1, r1, #9 - 8004188: 430a orrs r2, r1 - 800418a: 60da str r2, [r3, #12] + 80037d2: 4b15 ldr r3, [pc, #84] @ (8003828 ) + 80037d4: 68da ldr r2, [r3, #12] + 80037d6: 4b14 ldr r3, [pc, #80] @ (8003828 ) + 80037d8: 2180 movs r1, #128 @ 0x80 + 80037da: 0249 lsls r1, r1, #9 + 80037dc: 430a orrs r2, r1 + 80037de: 60da str r2, [r3, #12] } } #endif /* RCC_CCIPR_TIM15SEL */ /*-------------------------- I2S1 clock source configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S1) == RCC_PERIPHCLK_I2S1) - 800418c: 687b ldr r3, [r7, #4] - 800418e: 681a ldr r2, [r3, #0] - 8004190: 2380 movs r3, #128 @ 0x80 - 8004192: 011b lsls r3, r3, #4 - 8004194: 4013 ands r3, r2 - 8004196: d016 beq.n 80041c6 + 80037e0: 687b ldr r3, [r7, #4] + 80037e2: 681a ldr r2, [r3, #0] + 80037e4: 2380 movs r3, #128 @ 0x80 + 80037e6: 011b lsls r3, r3, #4 + 80037e8: 4013 ands r3, r2 + 80037ea: d016 beq.n 800381a { /* Check the parameters */ assert_param(IS_RCC_I2S1CLKSOURCE(PeriphClkInit->I2s1ClockSelection)); /* Configure the I2S1 clock source */ __HAL_RCC_I2S1_CONFIG(PeriphClkInit->I2s1ClockSelection); - 8004198: 4b0e ldr r3, [pc, #56] @ (80041d4 ) - 800419a: 6d5b ldr r3, [r3, #84] @ 0x54 - 800419c: 4a14 ldr r2, [pc, #80] @ (80041f0 ) - 800419e: 4013 ands r3, r2 - 80041a0: 0019 movs r1, r3 - 80041a2: 687b ldr r3, [r7, #4] - 80041a4: 691a ldr r2, [r3, #16] - 80041a6: 4b0b ldr r3, [pc, #44] @ (80041d4 ) - 80041a8: 430a orrs r2, r1 - 80041aa: 655a str r2, [r3, #84] @ 0x54 + 80037ec: 4b0e ldr r3, [pc, #56] @ (8003828 ) + 80037ee: 6d5b ldr r3, [r3, #84] @ 0x54 + 80037f0: 4a14 ldr r2, [pc, #80] @ (8003844 ) + 80037f2: 4013 ands r3, r2 + 80037f4: 0019 movs r1, r3 + 80037f6: 687b ldr r3, [r7, #4] + 80037f8: 691a ldr r2, [r3, #16] + 80037fa: 4b0b ldr r3, [pc, #44] @ (8003828 ) + 80037fc: 430a orrs r2, r1 + 80037fe: 655a str r2, [r3, #84] @ 0x54 if (PeriphClkInit->I2s1ClockSelection == RCC_I2S1CLKSOURCE_PLL) - 80041ac: 687b ldr r3, [r7, #4] - 80041ae: 691a ldr r2, [r3, #16] - 80041b0: 2380 movs r3, #128 @ 0x80 - 80041b2: 01db lsls r3, r3, #7 - 80041b4: 429a cmp r2, r3 - 80041b6: d106 bne.n 80041c6 + 8003800: 687b ldr r3, [r7, #4] + 8003802: 691a ldr r2, [r3, #16] + 8003804: 2380 movs r3, #128 @ 0x80 + 8003806: 01db lsls r3, r3, #7 + 8003808: 429a cmp r2, r3 + 800380a: d106 bne.n 800381a { /* Enable PLLPCLK output */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLPCLK); - 80041b8: 4b06 ldr r3, [pc, #24] @ (80041d4 ) - 80041ba: 68da ldr r2, [r3, #12] - 80041bc: 4b05 ldr r3, [pc, #20] @ (80041d4 ) - 80041be: 2180 movs r1, #128 @ 0x80 - 80041c0: 0249 lsls r1, r1, #9 - 80041c2: 430a orrs r2, r1 - 80041c4: 60da str r2, [r3, #12] + 800380c: 4b06 ldr r3, [pc, #24] @ (8003828 ) + 800380e: 68da ldr r2, [r3, #12] + 8003810: 4b05 ldr r3, [pc, #20] @ (8003828 ) + 8003812: 2180 movs r1, #128 @ 0x80 + 8003814: 0249 lsls r1, r1, #9 + 8003816: 430a orrs r2, r1 + 8003818: 60da str r2, [r3, #12] __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLQCLK); } } #endif /* FDCAN1 || FDCAN2 */ return status; - 80041c6: 2312 movs r3, #18 - 80041c8: 18fb adds r3, r7, r3 - 80041ca: 781b ldrb r3, [r3, #0] + 800381a: 2312 movs r3, #18 + 800381c: 18fb adds r3, r7, r3 + 800381e: 781b ldrb r3, [r3, #0] } - 80041cc: 0018 movs r0, r3 - 80041ce: 46bd mov sp, r7 - 80041d0: b006 add sp, #24 - 80041d2: bd80 pop {r7, pc} - 80041d4: 40021000 .word 0x40021000 - 80041d8: 40007000 .word 0x40007000 - 80041dc: fffffcff .word 0xfffffcff - 80041e0: fffeffff .word 0xfffeffff - 80041e4: 00001388 .word 0x00001388 - 80041e8: efffffff .word 0xefffffff - 80041ec: ffffcfff .word 0xffffcfff - 80041f0: ffff3fff .word 0xffff3fff + 8003820: 0018 movs r0, r3 + 8003822: 46bd mov sp, r7 + 8003824: b006 add sp, #24 + 8003826: bd80 pop {r7, pc} + 8003828: 40021000 .word 0x40021000 + 800382c: 40007000 .word 0x40007000 + 8003830: fffffcff .word 0xfffffcff + 8003834: fffeffff .word 0xfffeffff + 8003838: 00001388 .word 0x00001388 + 800383c: efffffff .word 0xefffffff + 8003840: ffffcfff .word 0xffffcfff + 8003844: ffff3fff .word 0xffff3fff -080041f4 : +08003848 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { - 80041f4: b580 push {r7, lr} - 80041f6: b084 sub sp, #16 - 80041f8: af00 add r7, sp, #0 - 80041fa: 6078 str r0, [r7, #4] + 8003848: b580 push {r7, lr} + 800384a: b084 sub sp, #16 + 800384c: af00 add r7, sp, #0 + 800384e: 6078 str r0, [r7, #4] uint32_t frxth; /* Check the SPI handle allocation */ if (hspi == NULL) - 80041fc: 687b ldr r3, [r7, #4] - 80041fe: 2b00 cmp r3, #0 - 8004200: d101 bne.n 8004206 + 8003850: 687b ldr r3, [r7, #4] + 8003852: 2b00 cmp r3, #0 + 8003854: d101 bne.n 800385a { return HAL_ERROR; - 8004202: 2301 movs r3, #1 - 8004204: e0a8 b.n 8004358 + 8003856: 2301 movs r3, #1 + 8003858: e0a8 b.n 80039ac assert_param(IS_SPI_NSS(hspi->Init.NSS)); assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode)); assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) - 8004206: 687b ldr r3, [r7, #4] - 8004208: 6a5b ldr r3, [r3, #36] @ 0x24 - 800420a: 2b00 cmp r3, #0 - 800420c: d109 bne.n 8004222 + 800385a: 687b ldr r3, [r7, #4] + 800385c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800385e: 2b00 cmp r3, #0 + 8003860: d109 bne.n 8003876 { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) - 800420e: 687b ldr r3, [r7, #4] - 8004210: 685a ldr r2, [r3, #4] - 8004212: 2382 movs r3, #130 @ 0x82 - 8004214: 005b lsls r3, r3, #1 - 8004216: 429a cmp r2, r3 - 8004218: d009 beq.n 800422e + 8003862: 687b ldr r3, [r7, #4] + 8003864: 685a ldr r2, [r3, #4] + 8003866: 2382 movs r3, #130 @ 0x82 + 8003868: 005b lsls r3, r3, #1 + 800386a: 429a cmp r2, r3 + 800386c: d009 beq.n 8003882 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 800421a: 687b ldr r3, [r7, #4] - 800421c: 2200 movs r2, #0 - 800421e: 61da str r2, [r3, #28] - 8004220: e005 b.n 800422e + 800386e: 687b ldr r3, [r7, #4] + 8003870: 2200 movs r2, #0 + 8003872: 61da str r2, [r3, #28] + 8003874: e005 b.n 8003882 else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; - 8004222: 687b ldr r3, [r7, #4] - 8004224: 2200 movs r2, #0 - 8004226: 611a str r2, [r3, #16] + 8003876: 687b ldr r3, [r7, #4] + 8003878: 2200 movs r2, #0 + 800387a: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; - 8004228: 687b ldr r3, [r7, #4] - 800422a: 2200 movs r2, #0 - 800422c: 615a str r2, [r3, #20] + 800387c: 687b ldr r3, [r7, #4] + 800387e: 2200 movs r2, #0 + 8003880: 615a str r2, [r3, #20] { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 800422e: 687b ldr r3, [r7, #4] - 8004230: 2200 movs r2, #0 - 8004232: 629a str r2, [r3, #40] @ 0x28 + 8003882: 687b ldr r3, [r7, #4] + 8003884: 2200 movs r2, #0 + 8003886: 629a str r2, [r3, #40] @ 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) - 8004234: 687b ldr r3, [r7, #4] - 8004236: 225d movs r2, #93 @ 0x5d - 8004238: 5c9b ldrb r3, [r3, r2] - 800423a: b2db uxtb r3, r3 - 800423c: 2b00 cmp r3, #0 - 800423e: d107 bne.n 8004250 + 8003888: 687b ldr r3, [r7, #4] + 800388a: 225d movs r2, #93 @ 0x5d + 800388c: 5c9b ldrb r3, [r3, r2] + 800388e: b2db uxtb r3, r3 + 8003890: 2b00 cmp r3, #0 + 8003892: d107 bne.n 80038a4 { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; - 8004240: 687b ldr r3, [r7, #4] - 8004242: 225c movs r2, #92 @ 0x5c - 8004244: 2100 movs r1, #0 - 8004246: 5499 strb r1, [r3, r2] + 8003894: 687b ldr r3, [r7, #4] + 8003896: 225c movs r2, #92 @ 0x5c + 8003898: 2100 movs r1, #0 + 800389a: 5499 strb r1, [r3, r2] /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); - 8004248: 687b ldr r3, [r7, #4] - 800424a: 0018 movs r0, r3 - 800424c: f7fc ff4a bl 80010e4 + 800389c: 687b ldr r3, [r7, #4] + 800389e: 0018 movs r0, r3 + 80038a0: f7fd fcc0 bl 8001224 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; - 8004250: 687b ldr r3, [r7, #4] - 8004252: 225d movs r2, #93 @ 0x5d - 8004254: 2102 movs r1, #2 - 8004256: 5499 strb r1, [r3, r2] + 80038a4: 687b ldr r3, [r7, #4] + 80038a6: 225d movs r2, #93 @ 0x5d + 80038a8: 2102 movs r1, #2 + 80038aa: 5499 strb r1, [r3, r2] /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8004258: 687b ldr r3, [r7, #4] - 800425a: 681b ldr r3, [r3, #0] - 800425c: 681a ldr r2, [r3, #0] - 800425e: 687b ldr r3, [r7, #4] - 8004260: 681b ldr r3, [r3, #0] - 8004262: 2140 movs r1, #64 @ 0x40 - 8004264: 438a bics r2, r1 - 8004266: 601a str r2, [r3, #0] + 80038ac: 687b ldr r3, [r7, #4] + 80038ae: 681b ldr r3, [r3, #0] + 80038b0: 681a ldr r2, [r3, #0] + 80038b2: 687b ldr r3, [r7, #4] + 80038b4: 681b ldr r3, [r3, #0] + 80038b6: 2140 movs r1, #64 @ 0x40 + 80038b8: 438a bics r2, r1 + 80038ba: 601a str r2, [r3, #0] /* Align by default the rs fifo threshold on the data size */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - 8004268: 687b ldr r3, [r7, #4] - 800426a: 68da ldr r2, [r3, #12] - 800426c: 23e0 movs r3, #224 @ 0xe0 - 800426e: 00db lsls r3, r3, #3 - 8004270: 429a cmp r2, r3 - 8004272: d902 bls.n 800427a + 80038bc: 687b ldr r3, [r7, #4] + 80038be: 68da ldr r2, [r3, #12] + 80038c0: 23e0 movs r3, #224 @ 0xe0 + 80038c2: 00db lsls r3, r3, #3 + 80038c4: 429a cmp r2, r3 + 80038c6: d902 bls.n 80038ce { frxth = SPI_RXFIFO_THRESHOLD_HF; - 8004274: 2300 movs r3, #0 - 8004276: 60fb str r3, [r7, #12] - 8004278: e002 b.n 8004280 + 80038c8: 2300 movs r3, #0 + 80038ca: 60fb str r3, [r7, #12] + 80038cc: e002 b.n 80038d4 } else { frxth = SPI_RXFIFO_THRESHOLD_QF; - 800427a: 2380 movs r3, #128 @ 0x80 - 800427c: 015b lsls r3, r3, #5 - 800427e: 60fb str r3, [r7, #12] + 80038ce: 2380 movs r3, #128 @ 0x80 + 80038d0: 015b lsls r3, r3, #5 + 80038d2: 60fb str r3, [r7, #12] } /* CRC calculation is valid only for 16Bit and 8 Bit */ if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT)) - 8004280: 687b ldr r3, [r7, #4] - 8004282: 68da ldr r2, [r3, #12] - 8004284: 23f0 movs r3, #240 @ 0xf0 - 8004286: 011b lsls r3, r3, #4 - 8004288: 429a cmp r2, r3 - 800428a: d008 beq.n 800429e - 800428c: 687b ldr r3, [r7, #4] - 800428e: 68da ldr r2, [r3, #12] - 8004290: 23e0 movs r3, #224 @ 0xe0 - 8004292: 00db lsls r3, r3, #3 - 8004294: 429a cmp r2, r3 - 8004296: d002 beq.n 800429e + 80038d4: 687b ldr r3, [r7, #4] + 80038d6: 68da ldr r2, [r3, #12] + 80038d8: 23f0 movs r3, #240 @ 0xf0 + 80038da: 011b lsls r3, r3, #4 + 80038dc: 429a cmp r2, r3 + 80038de: d008 beq.n 80038f2 + 80038e0: 687b ldr r3, [r7, #4] + 80038e2: 68da ldr r2, [r3, #12] + 80038e4: 23e0 movs r3, #224 @ 0xe0 + 80038e6: 00db lsls r3, r3, #3 + 80038e8: 429a cmp r2, r3 + 80038ea: d002 beq.n 80038f2 { /* CRC must be disabled */ hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 8004298: 687b ldr r3, [r7, #4] - 800429a: 2200 movs r2, #0 - 800429c: 629a str r2, [r3, #40] @ 0x28 + 80038ec: 687b ldr r3, [r7, #4] + 80038ee: 2200 movs r2, #0 + 80038f0: 629a str r2, [r3, #40] @ 0x28 } /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | - 800429e: 687b ldr r3, [r7, #4] - 80042a0: 685a ldr r2, [r3, #4] - 80042a2: 2382 movs r3, #130 @ 0x82 - 80042a4: 005b lsls r3, r3, #1 - 80042a6: 401a ands r2, r3 - 80042a8: 687b ldr r3, [r7, #4] - 80042aa: 6899 ldr r1, [r3, #8] - 80042ac: 2384 movs r3, #132 @ 0x84 - 80042ae: 021b lsls r3, r3, #8 - 80042b0: 400b ands r3, r1 - 80042b2: 431a orrs r2, r3 - 80042b4: 687b ldr r3, [r7, #4] - 80042b6: 691b ldr r3, [r3, #16] - 80042b8: 2102 movs r1, #2 - 80042ba: 400b ands r3, r1 - 80042bc: 431a orrs r2, r3 - 80042be: 687b ldr r3, [r7, #4] - 80042c0: 695b ldr r3, [r3, #20] - 80042c2: 2101 movs r1, #1 - 80042c4: 400b ands r3, r1 - 80042c6: 431a orrs r2, r3 - 80042c8: 687b ldr r3, [r7, #4] - 80042ca: 6999 ldr r1, [r3, #24] - 80042cc: 2380 movs r3, #128 @ 0x80 - 80042ce: 009b lsls r3, r3, #2 - 80042d0: 400b ands r3, r1 - 80042d2: 431a orrs r2, r3 - 80042d4: 687b ldr r3, [r7, #4] - 80042d6: 69db ldr r3, [r3, #28] - 80042d8: 2138 movs r1, #56 @ 0x38 - 80042da: 400b ands r3, r1 - 80042dc: 431a orrs r2, r3 - 80042de: 687b ldr r3, [r7, #4] - 80042e0: 6a1b ldr r3, [r3, #32] - 80042e2: 2180 movs r1, #128 @ 0x80 - 80042e4: 400b ands r3, r1 - 80042e6: 431a orrs r2, r3 - 80042e8: 0011 movs r1, r2 - 80042ea: 687b ldr r3, [r7, #4] - 80042ec: 6a9a ldr r2, [r3, #40] @ 0x28 - 80042ee: 2380 movs r3, #128 @ 0x80 - 80042f0: 019b lsls r3, r3, #6 - 80042f2: 401a ands r2, r3 - 80042f4: 687b ldr r3, [r7, #4] - 80042f6: 681b ldr r3, [r3, #0] - 80042f8: 430a orrs r2, r1 - 80042fa: 601a str r2, [r3, #0] + 80038f2: 687b ldr r3, [r7, #4] + 80038f4: 685a ldr r2, [r3, #4] + 80038f6: 2382 movs r3, #130 @ 0x82 + 80038f8: 005b lsls r3, r3, #1 + 80038fa: 401a ands r2, r3 + 80038fc: 687b ldr r3, [r7, #4] + 80038fe: 6899 ldr r1, [r3, #8] + 8003900: 2384 movs r3, #132 @ 0x84 + 8003902: 021b lsls r3, r3, #8 + 8003904: 400b ands r3, r1 + 8003906: 431a orrs r2, r3 + 8003908: 687b ldr r3, [r7, #4] + 800390a: 691b ldr r3, [r3, #16] + 800390c: 2102 movs r1, #2 + 800390e: 400b ands r3, r1 + 8003910: 431a orrs r2, r3 + 8003912: 687b ldr r3, [r7, #4] + 8003914: 695b ldr r3, [r3, #20] + 8003916: 2101 movs r1, #1 + 8003918: 400b ands r3, r1 + 800391a: 431a orrs r2, r3 + 800391c: 687b ldr r3, [r7, #4] + 800391e: 6999 ldr r1, [r3, #24] + 8003920: 2380 movs r3, #128 @ 0x80 + 8003922: 009b lsls r3, r3, #2 + 8003924: 400b ands r3, r1 + 8003926: 431a orrs r2, r3 + 8003928: 687b ldr r3, [r7, #4] + 800392a: 69db ldr r3, [r3, #28] + 800392c: 2138 movs r1, #56 @ 0x38 + 800392e: 400b ands r3, r1 + 8003930: 431a orrs r2, r3 + 8003932: 687b ldr r3, [r7, #4] + 8003934: 6a1b ldr r3, [r3, #32] + 8003936: 2180 movs r1, #128 @ 0x80 + 8003938: 400b ands r3, r1 + 800393a: 431a orrs r2, r3 + 800393c: 0011 movs r1, r2 + 800393e: 687b ldr r3, [r7, #4] + 8003940: 6a9a ldr r2, [r3, #40] @ 0x28 + 8003942: 2380 movs r3, #128 @ 0x80 + 8003944: 019b lsls r3, r3, #6 + 8003946: 401a ands r2, r3 + 8003948: 687b ldr r3, [r7, #4] + 800394a: 681b ldr r3, [r3, #0] + 800394c: 430a orrs r2, r1 + 800394e: 601a str r2, [r3, #0] } } #endif /* USE_SPI_CRC */ /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | - 80042fc: 687b ldr r3, [r7, #4] - 80042fe: 699b ldr r3, [r3, #24] - 8004300: 0c1b lsrs r3, r3, #16 - 8004302: 2204 movs r2, #4 - 8004304: 401a ands r2, r3 - 8004306: 687b ldr r3, [r7, #4] - 8004308: 6a5b ldr r3, [r3, #36] @ 0x24 - 800430a: 2110 movs r1, #16 - 800430c: 400b ands r3, r1 - 800430e: 431a orrs r2, r3 - 8004310: 687b ldr r3, [r7, #4] - 8004312: 6b5b ldr r3, [r3, #52] @ 0x34 - 8004314: 2108 movs r1, #8 - 8004316: 400b ands r3, r1 - 8004318: 431a orrs r2, r3 - 800431a: 687b ldr r3, [r7, #4] - 800431c: 68d9 ldr r1, [r3, #12] - 800431e: 23f0 movs r3, #240 @ 0xf0 - 8004320: 011b lsls r3, r3, #4 - 8004322: 400b ands r3, r1 - 8004324: 431a orrs r2, r3 - 8004326: 0011 movs r1, r2 - 8004328: 68fa ldr r2, [r7, #12] - 800432a: 2380 movs r3, #128 @ 0x80 - 800432c: 015b lsls r3, r3, #5 - 800432e: 401a ands r2, r3 - 8004330: 687b ldr r3, [r7, #4] - 8004332: 681b ldr r3, [r3, #0] - 8004334: 430a orrs r2, r1 - 8004336: 605a str r2, [r3, #4] + 8003950: 687b ldr r3, [r7, #4] + 8003952: 699b ldr r3, [r3, #24] + 8003954: 0c1b lsrs r3, r3, #16 + 8003956: 2204 movs r2, #4 + 8003958: 401a ands r2, r3 + 800395a: 687b ldr r3, [r7, #4] + 800395c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800395e: 2110 movs r1, #16 + 8003960: 400b ands r3, r1 + 8003962: 431a orrs r2, r3 + 8003964: 687b ldr r3, [r7, #4] + 8003966: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003968: 2108 movs r1, #8 + 800396a: 400b ands r3, r1 + 800396c: 431a orrs r2, r3 + 800396e: 687b ldr r3, [r7, #4] + 8003970: 68d9 ldr r1, [r3, #12] + 8003972: 23f0 movs r3, #240 @ 0xf0 + 8003974: 011b lsls r3, r3, #4 + 8003976: 400b ands r3, r1 + 8003978: 431a orrs r2, r3 + 800397a: 0011 movs r1, r2 + 800397c: 68fa ldr r2, [r7, #12] + 800397e: 2380 movs r3, #128 @ 0x80 + 8003980: 015b lsls r3, r3, #5 + 8003982: 401a ands r2, r3 + 8003984: 687b ldr r3, [r7, #4] + 8003986: 681b ldr r3, [r3, #0] + 8003988: 430a orrs r2, r1 + 800398a: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); - 8004338: 687b ldr r3, [r7, #4] - 800433a: 681b ldr r3, [r3, #0] - 800433c: 69da ldr r2, [r3, #28] - 800433e: 687b ldr r3, [r7, #4] - 8004340: 681b ldr r3, [r3, #0] - 8004342: 4907 ldr r1, [pc, #28] @ (8004360 ) - 8004344: 400a ands r2, r1 - 8004346: 61da str r2, [r3, #28] + 800398c: 687b ldr r3, [r7, #4] + 800398e: 681b ldr r3, [r3, #0] + 8003990: 69da ldr r2, [r3, #28] + 8003992: 687b ldr r3, [r7, #4] + 8003994: 681b ldr r3, [r3, #0] + 8003996: 4907 ldr r1, [pc, #28] @ (80039b4 ) + 8003998: 400a ands r2, r1 + 800399a: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 8004348: 687b ldr r3, [r7, #4] - 800434a: 2200 movs r2, #0 - 800434c: 661a str r2, [r3, #96] @ 0x60 + 800399c: 687b ldr r3, [r7, #4] + 800399e: 2200 movs r2, #0 + 80039a0: 661a str r2, [r3, #96] @ 0x60 hspi->State = HAL_SPI_STATE_READY; - 800434e: 687b ldr r3, [r7, #4] - 8004350: 225d movs r2, #93 @ 0x5d - 8004352: 2101 movs r1, #1 - 8004354: 5499 strb r1, [r3, r2] + 80039a2: 687b ldr r3, [r7, #4] + 80039a4: 225d movs r2, #93 @ 0x5d + 80039a6: 2101 movs r1, #1 + 80039a8: 5499 strb r1, [r3, r2] return HAL_OK; - 8004356: 2300 movs r3, #0 + 80039aa: 2300 movs r3, #0 } - 8004358: 0018 movs r0, r3 - 800435a: 46bd mov sp, r7 - 800435c: b004 add sp, #16 - 800435e: bd80 pop {r7, pc} - 8004360: fffff7ff .word 0xfffff7ff + 80039ac: 0018 movs r0, r3 + 80039ae: 46bd mov sp, r7 + 80039b0: b004 add sp, #16 + 80039b2: bd80 pop {r7, pc} + 80039b4: fffff7ff .word 0xfffff7ff -08004364 : +080039b8 : + * @param Size amount of data to be sent + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + 80039b8: b580 push {r7, lr} + 80039ba: b088 sub sp, #32 + 80039bc: af00 add r7, sp, #0 + 80039be: 60f8 str r0, [r7, #12] + 80039c0: 60b9 str r1, [r7, #8] + 80039c2: 603b str r3, [r7, #0] + 80039c4: 1dbb adds r3, r7, #6 + 80039c6: 801a strh r2, [r3, #0] + uint32_t tickstart; + HAL_StatusTypeDef errorcode = HAL_OK; + 80039c8: 231f movs r3, #31 + 80039ca: 18fb adds r3, r7, r3 + 80039cc: 2200 movs r2, #0 + 80039ce: 701a strb r2, [r3, #0] + + /* Check Direction parameter */ + assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); + + /* Process Locked */ + __HAL_LOCK(hspi); + 80039d0: 68fb ldr r3, [r7, #12] + 80039d2: 225c movs r2, #92 @ 0x5c + 80039d4: 5c9b ldrb r3, [r3, r2] + 80039d6: 2b01 cmp r3, #1 + 80039d8: d101 bne.n 80039de + 80039da: 2302 movs r3, #2 + 80039dc: e147 b.n 8003c6e + 80039de: 68fb ldr r3, [r7, #12] + 80039e0: 225c movs r2, #92 @ 0x5c + 80039e2: 2101 movs r1, #1 + 80039e4: 5499 strb r1, [r3, r2] + + /* Init tickstart for timeout management*/ + tickstart = HAL_GetTick(); + 80039e6: f7fd fe41 bl 800166c + 80039ea: 0003 movs r3, r0 + 80039ec: 61bb str r3, [r7, #24] + initial_TxXferCount = Size; + 80039ee: 2316 movs r3, #22 + 80039f0: 18fb adds r3, r7, r3 + 80039f2: 1dba adds r2, r7, #6 + 80039f4: 8812 ldrh r2, [r2, #0] + 80039f6: 801a strh r2, [r3, #0] + + if (hspi->State != HAL_SPI_STATE_READY) + 80039f8: 68fb ldr r3, [r7, #12] + 80039fa: 225d movs r2, #93 @ 0x5d + 80039fc: 5c9b ldrb r3, [r3, r2] + 80039fe: b2db uxtb r3, r3 + 8003a00: 2b01 cmp r3, #1 + 8003a02: d004 beq.n 8003a0e + { + errorcode = HAL_BUSY; + 8003a04: 231f movs r3, #31 + 8003a06: 18fb adds r3, r7, r3 + 8003a08: 2202 movs r2, #2 + 8003a0a: 701a strb r2, [r3, #0] + goto error; + 8003a0c: e128 b.n 8003c60 + } + + if ((pData == NULL) || (Size == 0U)) + 8003a0e: 68bb ldr r3, [r7, #8] + 8003a10: 2b00 cmp r3, #0 + 8003a12: d003 beq.n 8003a1c + 8003a14: 1dbb adds r3, r7, #6 + 8003a16: 881b ldrh r3, [r3, #0] + 8003a18: 2b00 cmp r3, #0 + 8003a1a: d104 bne.n 8003a26 + { + errorcode = HAL_ERROR; + 8003a1c: 231f movs r3, #31 + 8003a1e: 18fb adds r3, r7, r3 + 8003a20: 2201 movs r2, #1 + 8003a22: 701a strb r2, [r3, #0] + goto error; + 8003a24: e11c b.n 8003c60 + } + + /* Set the transaction information */ + hspi->State = HAL_SPI_STATE_BUSY_TX; + 8003a26: 68fb ldr r3, [r7, #12] + 8003a28: 225d movs r2, #93 @ 0x5d + 8003a2a: 2103 movs r1, #3 + 8003a2c: 5499 strb r1, [r3, r2] + hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 8003a2e: 68fb ldr r3, [r7, #12] + 8003a30: 2200 movs r2, #0 + 8003a32: 661a str r2, [r3, #96] @ 0x60 + hspi->pTxBuffPtr = (uint8_t *)pData; + 8003a34: 68fb ldr r3, [r7, #12] + 8003a36: 68ba ldr r2, [r7, #8] + 8003a38: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferSize = Size; + 8003a3a: 68fb ldr r3, [r7, #12] + 8003a3c: 1dba adds r2, r7, #6 + 8003a3e: 8812 ldrh r2, [r2, #0] + 8003a40: 879a strh r2, [r3, #60] @ 0x3c + hspi->TxXferCount = Size; + 8003a42: 68fb ldr r3, [r7, #12] + 8003a44: 1dba adds r2, r7, #6 + 8003a46: 8812 ldrh r2, [r2, #0] + 8003a48: 87da strh r2, [r3, #62] @ 0x3e + + /*Init field not used in handle to zero */ + hspi->pRxBuffPtr = (uint8_t *)NULL; + 8003a4a: 68fb ldr r3, [r7, #12] + 8003a4c: 2200 movs r2, #0 + 8003a4e: 641a str r2, [r3, #64] @ 0x40 + hspi->RxXferSize = 0U; + 8003a50: 68fb ldr r3, [r7, #12] + 8003a52: 2244 movs r2, #68 @ 0x44 + 8003a54: 2100 movs r1, #0 + 8003a56: 5299 strh r1, [r3, r2] + hspi->RxXferCount = 0U; + 8003a58: 68fb ldr r3, [r7, #12] + 8003a5a: 2246 movs r2, #70 @ 0x46 + 8003a5c: 2100 movs r1, #0 + 8003a5e: 5299 strh r1, [r3, r2] + hspi->TxISR = NULL; + 8003a60: 68fb ldr r3, [r7, #12] + 8003a62: 2200 movs r2, #0 + 8003a64: 651a str r2, [r3, #80] @ 0x50 + hspi->RxISR = NULL; + 8003a66: 68fb ldr r3, [r7, #12] + 8003a68: 2200 movs r2, #0 + 8003a6a: 64da str r2, [r3, #76] @ 0x4c + + /* Configure communication direction : 1Line */ + if (hspi->Init.Direction == SPI_DIRECTION_1LINE) + 8003a6c: 68fb ldr r3, [r7, #12] + 8003a6e: 689a ldr r2, [r3, #8] + 8003a70: 2380 movs r3, #128 @ 0x80 + 8003a72: 021b lsls r3, r3, #8 + 8003a74: 429a cmp r2, r3 + 8003a76: d110 bne.n 8003a9a + { + /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ + __HAL_SPI_DISABLE(hspi); + 8003a78: 68fb ldr r3, [r7, #12] + 8003a7a: 681b ldr r3, [r3, #0] + 8003a7c: 681a ldr r2, [r3, #0] + 8003a7e: 68fb ldr r3, [r7, #12] + 8003a80: 681b ldr r3, [r3, #0] + 8003a82: 2140 movs r1, #64 @ 0x40 + 8003a84: 438a bics r2, r1 + 8003a86: 601a str r2, [r3, #0] + SPI_1LINE_TX(hspi); + 8003a88: 68fb ldr r3, [r7, #12] + 8003a8a: 681b ldr r3, [r3, #0] + 8003a8c: 681a ldr r2, [r3, #0] + 8003a8e: 68fb ldr r3, [r7, #12] + 8003a90: 681b ldr r3, [r3, #0] + 8003a92: 2180 movs r1, #128 @ 0x80 + 8003a94: 01c9 lsls r1, r1, #7 + 8003a96: 430a orrs r2, r1 + 8003a98: 601a str r2, [r3, #0] + SPI_RESET_CRC(hspi); + } +#endif /* USE_SPI_CRC */ + + /* Check if the SPI is already enabled */ + if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) + 8003a9a: 68fb ldr r3, [r7, #12] + 8003a9c: 681b ldr r3, [r3, #0] + 8003a9e: 681b ldr r3, [r3, #0] + 8003aa0: 2240 movs r2, #64 @ 0x40 + 8003aa2: 4013 ands r3, r2 + 8003aa4: 2b40 cmp r3, #64 @ 0x40 + 8003aa6: d007 beq.n 8003ab8 + { + /* Enable SPI peripheral */ + __HAL_SPI_ENABLE(hspi); + 8003aa8: 68fb ldr r3, [r7, #12] + 8003aaa: 681b ldr r3, [r3, #0] + 8003aac: 681a ldr r2, [r3, #0] + 8003aae: 68fb ldr r3, [r7, #12] + 8003ab0: 681b ldr r3, [r3, #0] + 8003ab2: 2140 movs r1, #64 @ 0x40 + 8003ab4: 430a orrs r2, r1 + 8003ab6: 601a str r2, [r3, #0] + } + + /* Transmit data in 16 Bit mode */ + if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 8003ab8: 68fb ldr r3, [r7, #12] + 8003aba: 68da ldr r2, [r3, #12] + 8003abc: 23e0 movs r3, #224 @ 0xe0 + 8003abe: 00db lsls r3, r3, #3 + 8003ac0: 429a cmp r2, r3 + 8003ac2: d952 bls.n 8003b6a + { + if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 8003ac4: 68fb ldr r3, [r7, #12] + 8003ac6: 685b ldr r3, [r3, #4] + 8003ac8: 2b00 cmp r3, #0 + 8003aca: d004 beq.n 8003ad6 + 8003acc: 2316 movs r3, #22 + 8003ace: 18fb adds r3, r7, r3 + 8003ad0: 881b ldrh r3, [r3, #0] + 8003ad2: 2b01 cmp r3, #1 + 8003ad4: d143 bne.n 8003b5e + { + hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 8003ad6: 68fb ldr r3, [r7, #12] + 8003ad8: 6b9b ldr r3, [r3, #56] @ 0x38 + 8003ada: 881a ldrh r2, [r3, #0] + 8003adc: 68fb ldr r3, [r7, #12] + 8003ade: 681b ldr r3, [r3, #0] + 8003ae0: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); + 8003ae2: 68fb ldr r3, [r7, #12] + 8003ae4: 6b9b ldr r3, [r3, #56] @ 0x38 + 8003ae6: 1c9a adds r2, r3, #2 + 8003ae8: 68fb ldr r3, [r7, #12] + 8003aea: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 8003aec: 68fb ldr r3, [r7, #12] + 8003aee: 8fdb ldrh r3, [r3, #62] @ 0x3e + 8003af0: b29b uxth r3, r3 + 8003af2: 3b01 subs r3, #1 + 8003af4: b29a uxth r2, r3 + 8003af6: 68fb ldr r3, [r7, #12] + 8003af8: 87da strh r2, [r3, #62] @ 0x3e + } + /* Transmit data in 16 Bit mode */ + while (hspi->TxXferCount > 0U) + 8003afa: e030 b.n 8003b5e + { + /* Wait until TXE flag is set to send data */ + if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) + 8003afc: 68fb ldr r3, [r7, #12] + 8003afe: 681b ldr r3, [r3, #0] + 8003b00: 689b ldr r3, [r3, #8] + 8003b02: 2202 movs r2, #2 + 8003b04: 4013 ands r3, r2 + 8003b06: 2b02 cmp r3, #2 + 8003b08: d112 bne.n 8003b30 + { + hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 8003b0a: 68fb ldr r3, [r7, #12] + 8003b0c: 6b9b ldr r3, [r3, #56] @ 0x38 + 8003b0e: 881a ldrh r2, [r3, #0] + 8003b10: 68fb ldr r3, [r7, #12] + 8003b12: 681b ldr r3, [r3, #0] + 8003b14: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); + 8003b16: 68fb ldr r3, [r7, #12] + 8003b18: 6b9b ldr r3, [r3, #56] @ 0x38 + 8003b1a: 1c9a adds r2, r3, #2 + 8003b1c: 68fb ldr r3, [r7, #12] + 8003b1e: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 8003b20: 68fb ldr r3, [r7, #12] + 8003b22: 8fdb ldrh r3, [r3, #62] @ 0x3e + 8003b24: b29b uxth r3, r3 + 8003b26: 3b01 subs r3, #1 + 8003b28: b29a uxth r2, r3 + 8003b2a: 68fb ldr r3, [r7, #12] + 8003b2c: 87da strh r2, [r3, #62] @ 0x3e + 8003b2e: e016 b.n 8003b5e + } + else + { + /* Timeout management */ + if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) + 8003b30: f7fd fd9c bl 800166c + 8003b34: 0002 movs r2, r0 + 8003b36: 69bb ldr r3, [r7, #24] + 8003b38: 1ad3 subs r3, r2, r3 + 8003b3a: 683a ldr r2, [r7, #0] + 8003b3c: 429a cmp r2, r3 + 8003b3e: d802 bhi.n 8003b46 + 8003b40: 683b ldr r3, [r7, #0] + 8003b42: 3301 adds r3, #1 + 8003b44: d102 bne.n 8003b4c + 8003b46: 683b ldr r3, [r7, #0] + 8003b48: 2b00 cmp r3, #0 + 8003b4a: d108 bne.n 8003b5e + { + errorcode = HAL_TIMEOUT; + 8003b4c: 231f movs r3, #31 + 8003b4e: 18fb adds r3, r7, r3 + 8003b50: 2203 movs r2, #3 + 8003b52: 701a strb r2, [r3, #0] + hspi->State = HAL_SPI_STATE_READY; + 8003b54: 68fb ldr r3, [r7, #12] + 8003b56: 225d movs r2, #93 @ 0x5d + 8003b58: 2101 movs r1, #1 + 8003b5a: 5499 strb r1, [r3, r2] + goto error; + 8003b5c: e080 b.n 8003c60 + while (hspi->TxXferCount > 0U) + 8003b5e: 68fb ldr r3, [r7, #12] + 8003b60: 8fdb ldrh r3, [r3, #62] @ 0x3e + 8003b62: b29b uxth r3, r3 + 8003b64: 2b00 cmp r3, #0 + 8003b66: d1c9 bne.n 8003afc + 8003b68: e053 b.n 8003c12 + } + } + /* Transmit data in 8 Bit mode */ + else + { + if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 8003b6a: 68fb ldr r3, [r7, #12] + 8003b6c: 685b ldr r3, [r3, #4] + 8003b6e: 2b00 cmp r3, #0 + 8003b70: d004 beq.n 8003b7c + 8003b72: 2316 movs r3, #22 + 8003b74: 18fb adds r3, r7, r3 + 8003b76: 881b ldrh r3, [r3, #0] + 8003b78: 2b01 cmp r3, #1 + 8003b7a: d145 bne.n 8003c08 + { + *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + 8003b7c: 68fb ldr r3, [r7, #12] + 8003b7e: 6b9a ldr r2, [r3, #56] @ 0x38 + 8003b80: 68fb ldr r3, [r7, #12] + 8003b82: 681b ldr r3, [r3, #0] + 8003b84: 330c adds r3, #12 + 8003b86: 7812 ldrb r2, [r2, #0] + 8003b88: 701a strb r2, [r3, #0] + hspi->pTxBuffPtr += sizeof(uint8_t); + 8003b8a: 68fb ldr r3, [r7, #12] + 8003b8c: 6b9b ldr r3, [r3, #56] @ 0x38 + 8003b8e: 1c5a adds r2, r3, #1 + 8003b90: 68fb ldr r3, [r7, #12] + 8003b92: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 8003b94: 68fb ldr r3, [r7, #12] + 8003b96: 8fdb ldrh r3, [r3, #62] @ 0x3e + 8003b98: b29b uxth r3, r3 + 8003b9a: 3b01 subs r3, #1 + 8003b9c: b29a uxth r2, r3 + 8003b9e: 68fb ldr r3, [r7, #12] + 8003ba0: 87da strh r2, [r3, #62] @ 0x3e + } + while (hspi->TxXferCount > 0U) + 8003ba2: e031 b.n 8003c08 + { + /* Wait until TXE flag is set to send data */ + if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) + 8003ba4: 68fb ldr r3, [r7, #12] + 8003ba6: 681b ldr r3, [r3, #0] + 8003ba8: 689b ldr r3, [r3, #8] + 8003baa: 2202 movs r2, #2 + 8003bac: 4013 ands r3, r2 + 8003bae: 2b02 cmp r3, #2 + 8003bb0: d113 bne.n 8003bda + { + *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + 8003bb2: 68fb ldr r3, [r7, #12] + 8003bb4: 6b9a ldr r2, [r3, #56] @ 0x38 + 8003bb6: 68fb ldr r3, [r7, #12] + 8003bb8: 681b ldr r3, [r3, #0] + 8003bba: 330c adds r3, #12 + 8003bbc: 7812 ldrb r2, [r2, #0] + 8003bbe: 701a strb r2, [r3, #0] + hspi->pTxBuffPtr += sizeof(uint8_t); + 8003bc0: 68fb ldr r3, [r7, #12] + 8003bc2: 6b9b ldr r3, [r3, #56] @ 0x38 + 8003bc4: 1c5a adds r2, r3, #1 + 8003bc6: 68fb ldr r3, [r7, #12] + 8003bc8: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 8003bca: 68fb ldr r3, [r7, #12] + 8003bcc: 8fdb ldrh r3, [r3, #62] @ 0x3e + 8003bce: b29b uxth r3, r3 + 8003bd0: 3b01 subs r3, #1 + 8003bd2: b29a uxth r2, r3 + 8003bd4: 68fb ldr r3, [r7, #12] + 8003bd6: 87da strh r2, [r3, #62] @ 0x3e + 8003bd8: e016 b.n 8003c08 + } + else + { + /* Timeout management */ + if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) + 8003bda: f7fd fd47 bl 800166c + 8003bde: 0002 movs r2, r0 + 8003be0: 69bb ldr r3, [r7, #24] + 8003be2: 1ad3 subs r3, r2, r3 + 8003be4: 683a ldr r2, [r7, #0] + 8003be6: 429a cmp r2, r3 + 8003be8: d802 bhi.n 8003bf0 + 8003bea: 683b ldr r3, [r7, #0] + 8003bec: 3301 adds r3, #1 + 8003bee: d102 bne.n 8003bf6 + 8003bf0: 683b ldr r3, [r7, #0] + 8003bf2: 2b00 cmp r3, #0 + 8003bf4: d108 bne.n 8003c08 + { + errorcode = HAL_TIMEOUT; + 8003bf6: 231f movs r3, #31 + 8003bf8: 18fb adds r3, r7, r3 + 8003bfa: 2203 movs r2, #3 + 8003bfc: 701a strb r2, [r3, #0] + hspi->State = HAL_SPI_STATE_READY; + 8003bfe: 68fb ldr r3, [r7, #12] + 8003c00: 225d movs r2, #93 @ 0x5d + 8003c02: 2101 movs r1, #1 + 8003c04: 5499 strb r1, [r3, r2] + goto error; + 8003c06: e02b b.n 8003c60 + while (hspi->TxXferCount > 0U) + 8003c08: 68fb ldr r3, [r7, #12] + 8003c0a: 8fdb ldrh r3, [r3, #62] @ 0x3e + 8003c0c: b29b uxth r3, r3 + 8003c0e: 2b00 cmp r3, #0 + 8003c10: d1c8 bne.n 8003ba4 + SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + } +#endif /* USE_SPI_CRC */ + + /* Check the end of the transaction */ + if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) + 8003c12: 69ba ldr r2, [r7, #24] + 8003c14: 6839 ldr r1, [r7, #0] + 8003c16: 68fb ldr r3, [r7, #12] + 8003c18: 0018 movs r0, r3 + 8003c1a: f000 fcef bl 80045fc + 8003c1e: 1e03 subs r3, r0, #0 + 8003c20: d002 beq.n 8003c28 + { + hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 8003c22: 68fb ldr r3, [r7, #12] + 8003c24: 2220 movs r2, #32 + 8003c26: 661a str r2, [r3, #96] @ 0x60 + } + + /* Clear overrun flag in 2 Lines communication mode because received is not read */ + if (hspi->Init.Direction == SPI_DIRECTION_2LINES) + 8003c28: 68fb ldr r3, [r7, #12] + 8003c2a: 689b ldr r3, [r3, #8] + 8003c2c: 2b00 cmp r3, #0 + 8003c2e: d10a bne.n 8003c46 + { + __HAL_SPI_CLEAR_OVRFLAG(hspi); + 8003c30: 2300 movs r3, #0 + 8003c32: 613b str r3, [r7, #16] + 8003c34: 68fb ldr r3, [r7, #12] + 8003c36: 681b ldr r3, [r3, #0] + 8003c38: 68db ldr r3, [r3, #12] + 8003c3a: 613b str r3, [r7, #16] + 8003c3c: 68fb ldr r3, [r7, #12] + 8003c3e: 681b ldr r3, [r3, #0] + 8003c40: 689b ldr r3, [r3, #8] + 8003c42: 613b str r3, [r7, #16] + 8003c44: 693b ldr r3, [r7, #16] + } + + if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 8003c46: 68fb ldr r3, [r7, #12] + 8003c48: 6e1b ldr r3, [r3, #96] @ 0x60 + 8003c4a: 2b00 cmp r3, #0 + 8003c4c: d004 beq.n 8003c58 + { + errorcode = HAL_ERROR; + 8003c4e: 231f movs r3, #31 + 8003c50: 18fb adds r3, r7, r3 + 8003c52: 2201 movs r2, #1 + 8003c54: 701a strb r2, [r3, #0] + 8003c56: e003 b.n 8003c60 + } + else + { + hspi->State = HAL_SPI_STATE_READY; + 8003c58: 68fb ldr r3, [r7, #12] + 8003c5a: 225d movs r2, #93 @ 0x5d + 8003c5c: 2101 movs r1, #1 + 8003c5e: 5499 strb r1, [r3, r2] + } + +error: + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + 8003c60: 68fb ldr r3, [r7, #12] + 8003c62: 225c movs r2, #92 @ 0x5c + 8003c64: 2100 movs r1, #0 + 8003c66: 5499 strb r1, [r3, r2] + return errorcode; + 8003c68: 231f movs r3, #31 + 8003c6a: 18fb adds r3, r7, r3 + 8003c6c: 781b ldrb r3, [r3, #0] +} + 8003c6e: 0018 movs r0, r3 + 8003c70: 46bd mov sp, r7 + 8003c72: b008 add sp, #32 + 8003c74: bd80 pop {r7, pc} + ... + +08003c78 : + * @param Size amount of data to be received + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + 8003c78: b590 push {r4, r7, lr} + 8003c7a: b089 sub sp, #36 @ 0x24 + 8003c7c: af02 add r7, sp, #8 + 8003c7e: 60f8 str r0, [r7, #12] + 8003c80: 60b9 str r1, [r7, #8] + 8003c82: 603b str r3, [r7, #0] + 8003c84: 1dbb adds r3, r7, #6 + 8003c86: 801a strh r2, [r3, #0] + __IO uint32_t tmpreg = 0U; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; +#endif /* USE_SPI_CRC */ + uint32_t tickstart; + HAL_StatusTypeDef errorcode = HAL_OK; + 8003c88: 2117 movs r1, #23 + 8003c8a: 187b adds r3, r7, r1 + 8003c8c: 2200 movs r2, #0 + 8003c8e: 701a strb r2, [r3, #0] + + if (hspi->State != HAL_SPI_STATE_READY) + 8003c90: 68fb ldr r3, [r7, #12] + 8003c92: 225d movs r2, #93 @ 0x5d + 8003c94: 5c9b ldrb r3, [r3, r2] + 8003c96: b2db uxtb r3, r3 + 8003c98: 2b01 cmp r3, #1 + 8003c9a: d003 beq.n 8003ca4 + { + errorcode = HAL_BUSY; + 8003c9c: 187b adds r3, r7, r1 + 8003c9e: 2202 movs r2, #2 + 8003ca0: 701a strb r2, [r3, #0] + goto error; + 8003ca2: e12b b.n 8003efc + } + + if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) + 8003ca4: 68fb ldr r3, [r7, #12] + 8003ca6: 685a ldr r2, [r3, #4] + 8003ca8: 2382 movs r3, #130 @ 0x82 + 8003caa: 005b lsls r3, r3, #1 + 8003cac: 429a cmp r2, r3 + 8003cae: d113 bne.n 8003cd8 + 8003cb0: 68fb ldr r3, [r7, #12] + 8003cb2: 689b ldr r3, [r3, #8] + 8003cb4: 2b00 cmp r3, #0 + 8003cb6: d10f bne.n 8003cd8 + { + hspi->State = HAL_SPI_STATE_BUSY_RX; + 8003cb8: 68fb ldr r3, [r7, #12] + 8003cba: 225d movs r2, #93 @ 0x5d + 8003cbc: 2104 movs r1, #4 + 8003cbe: 5499 strb r1, [r3, r2] + /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ + return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); + 8003cc0: 1dbb adds r3, r7, #6 + 8003cc2: 881c ldrh r4, [r3, #0] + 8003cc4: 68ba ldr r2, [r7, #8] + 8003cc6: 68b9 ldr r1, [r7, #8] + 8003cc8: 68f8 ldr r0, [r7, #12] + 8003cca: 683b ldr r3, [r7, #0] + 8003ccc: 9300 str r3, [sp, #0] + 8003cce: 0023 movs r3, r4 + 8003cd0: f000 f924 bl 8003f1c + 8003cd4: 0003 movs r3, r0 + 8003cd6: e118 b.n 8003f0a + } + + /* Process Locked */ + __HAL_LOCK(hspi); + 8003cd8: 68fb ldr r3, [r7, #12] + 8003cda: 225c movs r2, #92 @ 0x5c + 8003cdc: 5c9b ldrb r3, [r3, r2] + 8003cde: 2b01 cmp r3, #1 + 8003ce0: d101 bne.n 8003ce6 + 8003ce2: 2302 movs r3, #2 + 8003ce4: e111 b.n 8003f0a + 8003ce6: 68fb ldr r3, [r7, #12] + 8003ce8: 225c movs r2, #92 @ 0x5c + 8003cea: 2101 movs r1, #1 + 8003cec: 5499 strb r1, [r3, r2] + + /* Init tickstart for timeout management*/ + tickstart = HAL_GetTick(); + 8003cee: f7fd fcbd bl 800166c + 8003cf2: 0003 movs r3, r0 + 8003cf4: 613b str r3, [r7, #16] + + if ((pData == NULL) || (Size == 0U)) + 8003cf6: 68bb ldr r3, [r7, #8] + 8003cf8: 2b00 cmp r3, #0 + 8003cfa: d003 beq.n 8003d04 + 8003cfc: 1dbb adds r3, r7, #6 + 8003cfe: 881b ldrh r3, [r3, #0] + 8003d00: 2b00 cmp r3, #0 + 8003d02: d104 bne.n 8003d0e + { + errorcode = HAL_ERROR; + 8003d04: 2317 movs r3, #23 + 8003d06: 18fb adds r3, r7, r3 + 8003d08: 2201 movs r2, #1 + 8003d0a: 701a strb r2, [r3, #0] + goto error; + 8003d0c: e0f6 b.n 8003efc + } + + /* Set the transaction information */ + hspi->State = HAL_SPI_STATE_BUSY_RX; + 8003d0e: 68fb ldr r3, [r7, #12] + 8003d10: 225d movs r2, #93 @ 0x5d + 8003d12: 2104 movs r1, #4 + 8003d14: 5499 strb r1, [r3, r2] + hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 8003d16: 68fb ldr r3, [r7, #12] + 8003d18: 2200 movs r2, #0 + 8003d1a: 661a str r2, [r3, #96] @ 0x60 + hspi->pRxBuffPtr = (uint8_t *)pData; + 8003d1c: 68fb ldr r3, [r7, #12] + 8003d1e: 68ba ldr r2, [r7, #8] + 8003d20: 641a str r2, [r3, #64] @ 0x40 + hspi->RxXferSize = Size; + 8003d22: 68fb ldr r3, [r7, #12] + 8003d24: 1dba adds r2, r7, #6 + 8003d26: 2144 movs r1, #68 @ 0x44 + 8003d28: 8812 ldrh r2, [r2, #0] + 8003d2a: 525a strh r2, [r3, r1] + hspi->RxXferCount = Size; + 8003d2c: 68fb ldr r3, [r7, #12] + 8003d2e: 1dba adds r2, r7, #6 + 8003d30: 2146 movs r1, #70 @ 0x46 + 8003d32: 8812 ldrh r2, [r2, #0] + 8003d34: 525a strh r2, [r3, r1] + + /*Init field not used in handle to zero */ + hspi->pTxBuffPtr = (uint8_t *)NULL; + 8003d36: 68fb ldr r3, [r7, #12] + 8003d38: 2200 movs r2, #0 + 8003d3a: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferSize = 0U; + 8003d3c: 68fb ldr r3, [r7, #12] + 8003d3e: 2200 movs r2, #0 + 8003d40: 879a strh r2, [r3, #60] @ 0x3c + hspi->TxXferCount = 0U; + 8003d42: 68fb ldr r3, [r7, #12] + 8003d44: 2200 movs r2, #0 + 8003d46: 87da strh r2, [r3, #62] @ 0x3e + hspi->RxISR = NULL; + 8003d48: 68fb ldr r3, [r7, #12] + 8003d4a: 2200 movs r2, #0 + 8003d4c: 64da str r2, [r3, #76] @ 0x4c + hspi->TxISR = NULL; + 8003d4e: 68fb ldr r3, [r7, #12] + 8003d50: 2200 movs r2, #0 + 8003d52: 651a str r2, [r3, #80] @ 0x50 + hspi->RxXferCount--; + } +#endif /* USE_SPI_CRC */ + + /* Set the Rx Fifo threshold */ + if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 8003d54: 68fb ldr r3, [r7, #12] + 8003d56: 68da ldr r2, [r3, #12] + 8003d58: 23e0 movs r3, #224 @ 0xe0 + 8003d5a: 00db lsls r3, r3, #3 + 8003d5c: 429a cmp r2, r3 + 8003d5e: d908 bls.n 8003d72 + { + /* Set RX Fifo threshold according the reception data length: 16bit */ + CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); + 8003d60: 68fb ldr r3, [r7, #12] + 8003d62: 681b ldr r3, [r3, #0] + 8003d64: 685a ldr r2, [r3, #4] + 8003d66: 68fb ldr r3, [r7, #12] + 8003d68: 681b ldr r3, [r3, #0] + 8003d6a: 496a ldr r1, [pc, #424] @ (8003f14 ) + 8003d6c: 400a ands r2, r1 + 8003d6e: 605a str r2, [r3, #4] + 8003d70: e008 b.n 8003d84 + } + else + { + /* Set RX Fifo threshold according the reception data length: 8bit */ + SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); + 8003d72: 68fb ldr r3, [r7, #12] + 8003d74: 681b ldr r3, [r3, #0] + 8003d76: 685a ldr r2, [r3, #4] + 8003d78: 68fb ldr r3, [r7, #12] + 8003d7a: 681b ldr r3, [r3, #0] + 8003d7c: 2180 movs r1, #128 @ 0x80 + 8003d7e: 0149 lsls r1, r1, #5 + 8003d80: 430a orrs r2, r1 + 8003d82: 605a str r2, [r3, #4] + } + + /* Configure communication direction: 1Line */ + if (hspi->Init.Direction == SPI_DIRECTION_1LINE) + 8003d84: 68fb ldr r3, [r7, #12] + 8003d86: 689a ldr r2, [r3, #8] + 8003d88: 2380 movs r3, #128 @ 0x80 + 8003d8a: 021b lsls r3, r3, #8 + 8003d8c: 429a cmp r2, r3 + 8003d8e: d10f bne.n 8003db0 + { + /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ + __HAL_SPI_DISABLE(hspi); + 8003d90: 68fb ldr r3, [r7, #12] + 8003d92: 681b ldr r3, [r3, #0] + 8003d94: 681a ldr r2, [r3, #0] + 8003d96: 68fb ldr r3, [r7, #12] + 8003d98: 681b ldr r3, [r3, #0] + 8003d9a: 2140 movs r1, #64 @ 0x40 + 8003d9c: 438a bics r2, r1 + 8003d9e: 601a str r2, [r3, #0] + SPI_1LINE_RX(hspi); + 8003da0: 68fb ldr r3, [r7, #12] + 8003da2: 681b ldr r3, [r3, #0] + 8003da4: 681a ldr r2, [r3, #0] + 8003da6: 68fb ldr r3, [r7, #12] + 8003da8: 681b ldr r3, [r3, #0] + 8003daa: 495b ldr r1, [pc, #364] @ (8003f18 ) + 8003dac: 400a ands r2, r1 + 8003dae: 601a str r2, [r3, #0] + } + + /* Check if the SPI is already enabled */ + if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) + 8003db0: 68fb ldr r3, [r7, #12] + 8003db2: 681b ldr r3, [r3, #0] + 8003db4: 681b ldr r3, [r3, #0] + 8003db6: 2240 movs r2, #64 @ 0x40 + 8003db8: 4013 ands r3, r2 + 8003dba: 2b40 cmp r3, #64 @ 0x40 + 8003dbc: d007 beq.n 8003dce + { + /* Enable SPI peripheral */ + __HAL_SPI_ENABLE(hspi); + 8003dbe: 68fb ldr r3, [r7, #12] + 8003dc0: 681b ldr r3, [r3, #0] + 8003dc2: 681a ldr r2, [r3, #0] + 8003dc4: 68fb ldr r3, [r7, #12] + 8003dc6: 681b ldr r3, [r3, #0] + 8003dc8: 2140 movs r1, #64 @ 0x40 + 8003dca: 430a orrs r2, r1 + 8003dcc: 601a str r2, [r3, #0] + } + + /* Receive data in 8 Bit mode */ + if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT) + 8003dce: 68fb ldr r3, [r7, #12] + 8003dd0: 68da ldr r2, [r3, #12] + 8003dd2: 23e0 movs r3, #224 @ 0xe0 + 8003dd4: 00db lsls r3, r3, #3 + 8003dd6: 429a cmp r2, r3 + 8003dd8: d900 bls.n 8003ddc + 8003dda: e071 b.n 8003ec0 + { + /* Transfer loop */ + while (hspi->RxXferCount > 0U) + 8003ddc: e035 b.n 8003e4a + { + /* Check the RXNE flag */ + if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) + 8003dde: 68fb ldr r3, [r7, #12] + 8003de0: 681b ldr r3, [r3, #0] + 8003de2: 689b ldr r3, [r3, #8] + 8003de4: 2201 movs r2, #1 + 8003de6: 4013 ands r3, r2 + 8003de8: 2b01 cmp r3, #1 + 8003dea: d117 bne.n 8003e1c + { + /* read the received data */ + (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; + 8003dec: 68fb ldr r3, [r7, #12] + 8003dee: 681b ldr r3, [r3, #0] + 8003df0: 330c adds r3, #12 + 8003df2: 001a movs r2, r3 + 8003df4: 68fb ldr r3, [r7, #12] + 8003df6: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003df8: 7812 ldrb r2, [r2, #0] + 8003dfa: b2d2 uxtb r2, r2 + 8003dfc: 701a strb r2, [r3, #0] + hspi->pRxBuffPtr += sizeof(uint8_t); + 8003dfe: 68fb ldr r3, [r7, #12] + 8003e00: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003e02: 1c5a adds r2, r3, #1 + 8003e04: 68fb ldr r3, [r7, #12] + 8003e06: 641a str r2, [r3, #64] @ 0x40 + hspi->RxXferCount--; + 8003e08: 68fb ldr r3, [r7, #12] + 8003e0a: 2246 movs r2, #70 @ 0x46 + 8003e0c: 5a9b ldrh r3, [r3, r2] + 8003e0e: b29b uxth r3, r3 + 8003e10: 3b01 subs r3, #1 + 8003e12: b299 uxth r1, r3 + 8003e14: 68fb ldr r3, [r7, #12] + 8003e16: 2246 movs r2, #70 @ 0x46 + 8003e18: 5299 strh r1, [r3, r2] + 8003e1a: e016 b.n 8003e4a + } + else + { + /* Timeout management */ + if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) + 8003e1c: f7fd fc26 bl 800166c + 8003e20: 0002 movs r2, r0 + 8003e22: 693b ldr r3, [r7, #16] + 8003e24: 1ad3 subs r3, r2, r3 + 8003e26: 683a ldr r2, [r7, #0] + 8003e28: 429a cmp r2, r3 + 8003e2a: d802 bhi.n 8003e32 + 8003e2c: 683b ldr r3, [r7, #0] + 8003e2e: 3301 adds r3, #1 + 8003e30: d102 bne.n 8003e38 + 8003e32: 683b ldr r3, [r7, #0] + 8003e34: 2b00 cmp r3, #0 + 8003e36: d108 bne.n 8003e4a + { + errorcode = HAL_TIMEOUT; + 8003e38: 2317 movs r3, #23 + 8003e3a: 18fb adds r3, r7, r3 + 8003e3c: 2203 movs r2, #3 + 8003e3e: 701a strb r2, [r3, #0] + hspi->State = HAL_SPI_STATE_READY; + 8003e40: 68fb ldr r3, [r7, #12] + 8003e42: 225d movs r2, #93 @ 0x5d + 8003e44: 2101 movs r1, #1 + 8003e46: 5499 strb r1, [r3, r2] + goto error; + 8003e48: e058 b.n 8003efc + while (hspi->RxXferCount > 0U) + 8003e4a: 68fb ldr r3, [r7, #12] + 8003e4c: 2246 movs r2, #70 @ 0x46 + 8003e4e: 5a9b ldrh r3, [r3, r2] + 8003e50: b29b uxth r3, r3 + 8003e52: 2b00 cmp r3, #0 + 8003e54: d1c3 bne.n 8003dde + 8003e56: e039 b.n 8003ecc + { + /* Transfer loop */ + while (hspi->RxXferCount > 0U) + { + /* Check the RXNE flag */ + if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) + 8003e58: 68fb ldr r3, [r7, #12] + 8003e5a: 681b ldr r3, [r3, #0] + 8003e5c: 689b ldr r3, [r3, #8] + 8003e5e: 2201 movs r2, #1 + 8003e60: 4013 ands r3, r2 + 8003e62: 2b01 cmp r3, #1 + 8003e64: d115 bne.n 8003e92 + { + *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; + 8003e66: 68fb ldr r3, [r7, #12] + 8003e68: 681b ldr r3, [r3, #0] + 8003e6a: 68da ldr r2, [r3, #12] + 8003e6c: 68fb ldr r3, [r7, #12] + 8003e6e: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003e70: b292 uxth r2, r2 + 8003e72: 801a strh r2, [r3, #0] + hspi->pRxBuffPtr += sizeof(uint16_t); + 8003e74: 68fb ldr r3, [r7, #12] + 8003e76: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003e78: 1c9a adds r2, r3, #2 + 8003e7a: 68fb ldr r3, [r7, #12] + 8003e7c: 641a str r2, [r3, #64] @ 0x40 + hspi->RxXferCount--; + 8003e7e: 68fb ldr r3, [r7, #12] + 8003e80: 2246 movs r2, #70 @ 0x46 + 8003e82: 5a9b ldrh r3, [r3, r2] + 8003e84: b29b uxth r3, r3 + 8003e86: 3b01 subs r3, #1 + 8003e88: b299 uxth r1, r3 + 8003e8a: 68fb ldr r3, [r7, #12] + 8003e8c: 2246 movs r2, #70 @ 0x46 + 8003e8e: 5299 strh r1, [r3, r2] + 8003e90: e016 b.n 8003ec0 + } + else + { + /* Timeout management */ + if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) + 8003e92: f7fd fbeb bl 800166c + 8003e96: 0002 movs r2, r0 + 8003e98: 693b ldr r3, [r7, #16] + 8003e9a: 1ad3 subs r3, r2, r3 + 8003e9c: 683a ldr r2, [r7, #0] + 8003e9e: 429a cmp r2, r3 + 8003ea0: d802 bhi.n 8003ea8 + 8003ea2: 683b ldr r3, [r7, #0] + 8003ea4: 3301 adds r3, #1 + 8003ea6: d102 bne.n 8003eae + 8003ea8: 683b ldr r3, [r7, #0] + 8003eaa: 2b00 cmp r3, #0 + 8003eac: d108 bne.n 8003ec0 + { + errorcode = HAL_TIMEOUT; + 8003eae: 2317 movs r3, #23 + 8003eb0: 18fb adds r3, r7, r3 + 8003eb2: 2203 movs r2, #3 + 8003eb4: 701a strb r2, [r3, #0] + hspi->State = HAL_SPI_STATE_READY; + 8003eb6: 68fb ldr r3, [r7, #12] + 8003eb8: 225d movs r2, #93 @ 0x5d + 8003eba: 2101 movs r1, #1 + 8003ebc: 5499 strb r1, [r3, r2] + goto error; + 8003ebe: e01d b.n 8003efc + while (hspi->RxXferCount > 0U) + 8003ec0: 68fb ldr r3, [r7, #12] + 8003ec2: 2246 movs r2, #70 @ 0x46 + 8003ec4: 5a9b ldrh r3, [r3, r2] + 8003ec6: b29b uxth r3, r3 + 8003ec8: 2b00 cmp r3, #0 + 8003eca: d1c5 bne.n 8003e58 + } + } +#endif /* USE_SPI_CRC */ + + /* Check the end of the transaction */ + if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) + 8003ecc: 693a ldr r2, [r7, #16] + 8003ece: 6839 ldr r1, [r7, #0] + 8003ed0: 68fb ldr r3, [r7, #12] + 8003ed2: 0018 movs r0, r3 + 8003ed4: f000 fb34 bl 8004540 + 8003ed8: 1e03 subs r3, r0, #0 + 8003eda: d002 beq.n 8003ee2 + { + hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 8003edc: 68fb ldr r3, [r7, #12] + 8003ede: 2220 movs r2, #32 + 8003ee0: 661a str r2, [r3, #96] @ 0x60 + SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); + __HAL_SPI_CLEAR_CRCERRFLAG(hspi); + } +#endif /* USE_SPI_CRC */ + + if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 8003ee2: 68fb ldr r3, [r7, #12] + 8003ee4: 6e1b ldr r3, [r3, #96] @ 0x60 + 8003ee6: 2b00 cmp r3, #0 + 8003ee8: d004 beq.n 8003ef4 + { + errorcode = HAL_ERROR; + 8003eea: 2317 movs r3, #23 + 8003eec: 18fb adds r3, r7, r3 + 8003eee: 2201 movs r2, #1 + 8003ef0: 701a strb r2, [r3, #0] + 8003ef2: e003 b.n 8003efc + } + else + { + hspi->State = HAL_SPI_STATE_READY; + 8003ef4: 68fb ldr r3, [r7, #12] + 8003ef6: 225d movs r2, #93 @ 0x5d + 8003ef8: 2101 movs r1, #1 + 8003efa: 5499 strb r1, [r3, r2] + } + +error : + __HAL_UNLOCK(hspi); + 8003efc: 68fb ldr r3, [r7, #12] + 8003efe: 225c movs r2, #92 @ 0x5c + 8003f00: 2100 movs r1, #0 + 8003f02: 5499 strb r1, [r3, r2] + return errorcode; + 8003f04: 2317 movs r3, #23 + 8003f06: 18fb adds r3, r7, r3 + 8003f08: 781b ldrb r3, [r3, #0] +} + 8003f0a: 0018 movs r0, r3 + 8003f0c: 46bd mov sp, r7 + 8003f0e: b007 add sp, #28 + 8003f10: bd90 pop {r4, r7, pc} + 8003f12: 46c0 nop @ (mov r8, r8) + 8003f14: ffffefff .word 0xffffefff + 8003f18: ffffbfff .word 0xffffbfff + +08003f1c : + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, + uint32_t Timeout) +{ + 8003f1c: b580 push {r7, lr} + 8003f1e: b08a sub sp, #40 @ 0x28 + 8003f20: af00 add r7, sp, #0 + 8003f22: 60f8 str r0, [r7, #12] + 8003f24: 60b9 str r1, [r7, #8] + 8003f26: 607a str r2, [r7, #4] + 8003f28: 001a movs r2, r3 + 8003f2a: 1cbb adds r3, r7, #2 + 8003f2c: 801a strh r2, [r3, #0] + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; +#endif /* USE_SPI_CRC */ + + /* Variable used to alternate Rx and Tx during transfer */ + uint32_t txallowed = 1U; + 8003f2e: 2301 movs r3, #1 + 8003f30: 627b str r3, [r7, #36] @ 0x24 + HAL_StatusTypeDef errorcode = HAL_OK; + 8003f32: 2323 movs r3, #35 @ 0x23 + 8003f34: 18fb adds r3, r7, r3 + 8003f36: 2200 movs r2, #0 + 8003f38: 701a strb r2, [r3, #0] + + /* Check Direction parameter */ + assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); + + /* Process Locked */ + __HAL_LOCK(hspi); + 8003f3a: 68fb ldr r3, [r7, #12] + 8003f3c: 225c movs r2, #92 @ 0x5c + 8003f3e: 5c9b ldrb r3, [r3, r2] + 8003f40: 2b01 cmp r3, #1 + 8003f42: d101 bne.n 8003f48 + 8003f44: 2302 movs r3, #2 + 8003f46: e1c4 b.n 80042d2 + 8003f48: 68fb ldr r3, [r7, #12] + 8003f4a: 225c movs r2, #92 @ 0x5c + 8003f4c: 2101 movs r1, #1 + 8003f4e: 5499 strb r1, [r3, r2] + + /* Init tickstart for timeout management*/ + tickstart = HAL_GetTick(); + 8003f50: f7fd fb8c bl 800166c + 8003f54: 0003 movs r3, r0 + 8003f56: 61fb str r3, [r7, #28] + + /* Init temporary variables */ + tmp_state = hspi->State; + 8003f58: 201b movs r0, #27 + 8003f5a: 183b adds r3, r7, r0 + 8003f5c: 68fa ldr r2, [r7, #12] + 8003f5e: 215d movs r1, #93 @ 0x5d + 8003f60: 5c52 ldrb r2, [r2, r1] + 8003f62: 701a strb r2, [r3, #0] + tmp_mode = hspi->Init.Mode; + 8003f64: 68fb ldr r3, [r7, #12] + 8003f66: 685b ldr r3, [r3, #4] + 8003f68: 617b str r3, [r7, #20] + initial_TxXferCount = Size; + 8003f6a: 2312 movs r3, #18 + 8003f6c: 18fb adds r3, r7, r3 + 8003f6e: 1cba adds r2, r7, #2 + 8003f70: 8812 ldrh r2, [r2, #0] + 8003f72: 801a strh r2, [r3, #0] +#if (USE_SPI_CRC != 0U) + spi_cr1 = READ_REG(hspi->Instance->CR1); + spi_cr2 = READ_REG(hspi->Instance->CR2); +#endif /* USE_SPI_CRC */ + + if (!((tmp_state == HAL_SPI_STATE_READY) || \ + 8003f74: 183b adds r3, r7, r0 + 8003f76: 781b ldrb r3, [r3, #0] + 8003f78: 2b01 cmp r3, #1 + 8003f7a: d011 beq.n 8003fa0 + 8003f7c: 697a ldr r2, [r7, #20] + 8003f7e: 2382 movs r3, #130 @ 0x82 + 8003f80: 005b lsls r3, r3, #1 + 8003f82: 429a cmp r2, r3 + 8003f84: d107 bne.n 8003f96 + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + 8003f86: 68fb ldr r3, [r7, #12] + 8003f88: 689b ldr r3, [r3, #8] + 8003f8a: 2b00 cmp r3, #0 + 8003f8c: d103 bne.n 8003f96 + 8003f8e: 183b adds r3, r7, r0 + 8003f90: 781b ldrb r3, [r3, #0] + 8003f92: 2b04 cmp r3, #4 + 8003f94: d004 beq.n 8003fa0 + { + errorcode = HAL_BUSY; + 8003f96: 2323 movs r3, #35 @ 0x23 + 8003f98: 18fb adds r3, r7, r3 + 8003f9a: 2202 movs r2, #2 + 8003f9c: 701a strb r2, [r3, #0] + goto error; + 8003f9e: e191 b.n 80042c4 + } + + if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) + 8003fa0: 68bb ldr r3, [r7, #8] + 8003fa2: 2b00 cmp r3, #0 + 8003fa4: d006 beq.n 8003fb4 + 8003fa6: 687b ldr r3, [r7, #4] + 8003fa8: 2b00 cmp r3, #0 + 8003faa: d003 beq.n 8003fb4 + 8003fac: 1cbb adds r3, r7, #2 + 8003fae: 881b ldrh r3, [r3, #0] + 8003fb0: 2b00 cmp r3, #0 + 8003fb2: d104 bne.n 8003fbe + { + errorcode = HAL_ERROR; + 8003fb4: 2323 movs r3, #35 @ 0x23 + 8003fb6: 18fb adds r3, r7, r3 + 8003fb8: 2201 movs r2, #1 + 8003fba: 701a strb r2, [r3, #0] + goto error; + 8003fbc: e182 b.n 80042c4 + } + + /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ + if (hspi->State != HAL_SPI_STATE_BUSY_RX) + 8003fbe: 68fb ldr r3, [r7, #12] + 8003fc0: 225d movs r2, #93 @ 0x5d + 8003fc2: 5c9b ldrb r3, [r3, r2] + 8003fc4: b2db uxtb r3, r3 + 8003fc6: 2b04 cmp r3, #4 + 8003fc8: d003 beq.n 8003fd2 + { + hspi->State = HAL_SPI_STATE_BUSY_TX_RX; + 8003fca: 68fb ldr r3, [r7, #12] + 8003fcc: 225d movs r2, #93 @ 0x5d + 8003fce: 2105 movs r1, #5 + 8003fd0: 5499 strb r1, [r3, r2] + } + + /* Set the transaction information */ + hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 8003fd2: 68fb ldr r3, [r7, #12] + 8003fd4: 2200 movs r2, #0 + 8003fd6: 661a str r2, [r3, #96] @ 0x60 + hspi->pRxBuffPtr = (uint8_t *)pRxData; + 8003fd8: 68fb ldr r3, [r7, #12] + 8003fda: 687a ldr r2, [r7, #4] + 8003fdc: 641a str r2, [r3, #64] @ 0x40 + hspi->RxXferCount = Size; + 8003fde: 68fb ldr r3, [r7, #12] + 8003fe0: 1cba adds r2, r7, #2 + 8003fe2: 2146 movs r1, #70 @ 0x46 + 8003fe4: 8812 ldrh r2, [r2, #0] + 8003fe6: 525a strh r2, [r3, r1] + hspi->RxXferSize = Size; + 8003fe8: 68fb ldr r3, [r7, #12] + 8003fea: 1cba adds r2, r7, #2 + 8003fec: 2144 movs r1, #68 @ 0x44 + 8003fee: 8812 ldrh r2, [r2, #0] + 8003ff0: 525a strh r2, [r3, r1] + hspi->pTxBuffPtr = (uint8_t *)pTxData; + 8003ff2: 68fb ldr r3, [r7, #12] + 8003ff4: 68ba ldr r2, [r7, #8] + 8003ff6: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount = Size; + 8003ff8: 68fb ldr r3, [r7, #12] + 8003ffa: 1cba adds r2, r7, #2 + 8003ffc: 8812 ldrh r2, [r2, #0] + 8003ffe: 87da strh r2, [r3, #62] @ 0x3e + hspi->TxXferSize = Size; + 8004000: 68fb ldr r3, [r7, #12] + 8004002: 1cba adds r2, r7, #2 + 8004004: 8812 ldrh r2, [r2, #0] + 8004006: 879a strh r2, [r3, #60] @ 0x3c + + /*Init field not used in handle to zero */ + hspi->RxISR = NULL; + 8004008: 68fb ldr r3, [r7, #12] + 800400a: 2200 movs r2, #0 + 800400c: 64da str r2, [r3, #76] @ 0x4c + hspi->TxISR = NULL; + 800400e: 68fb ldr r3, [r7, #12] + 8004010: 2200 movs r2, #0 + 8004012: 651a str r2, [r3, #80] @ 0x50 + SPI_RESET_CRC(hspi); + } +#endif /* USE_SPI_CRC */ + + /* Set the Rx Fifo threshold */ + if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 8004014: 68fb ldr r3, [r7, #12] + 8004016: 68da ldr r2, [r3, #12] + 8004018: 23e0 movs r3, #224 @ 0xe0 + 800401a: 00db lsls r3, r3, #3 + 800401c: 429a cmp r2, r3 + 800401e: d908 bls.n 8004032 + { + /* Set fiforxthreshold according the reception data length: 16bit */ + CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); + 8004020: 68fb ldr r3, [r7, #12] + 8004022: 681b ldr r3, [r3, #0] + 8004024: 685a ldr r2, [r3, #4] + 8004026: 68fb ldr r3, [r7, #12] + 8004028: 681b ldr r3, [r3, #0] + 800402a: 49ac ldr r1, [pc, #688] @ (80042dc ) + 800402c: 400a ands r2, r1 + 800402e: 605a str r2, [r3, #4] + 8004030: e008 b.n 8004044 + } + else + { + /* Set fiforxthreshold according the reception data length: 8bit */ + SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); + 8004032: 68fb ldr r3, [r7, #12] + 8004034: 681b ldr r3, [r3, #0] + 8004036: 685a ldr r2, [r3, #4] + 8004038: 68fb ldr r3, [r7, #12] + 800403a: 681b ldr r3, [r3, #0] + 800403c: 2180 movs r1, #128 @ 0x80 + 800403e: 0149 lsls r1, r1, #5 + 8004040: 430a orrs r2, r1 + 8004042: 605a str r2, [r3, #4] + } + + /* Check if the SPI is already enabled */ + if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) + 8004044: 68fb ldr r3, [r7, #12] + 8004046: 681b ldr r3, [r3, #0] + 8004048: 681b ldr r3, [r3, #0] + 800404a: 2240 movs r2, #64 @ 0x40 + 800404c: 4013 ands r3, r2 + 800404e: 2b40 cmp r3, #64 @ 0x40 + 8004050: d007 beq.n 8004062 + { + /* Enable SPI peripheral */ + __HAL_SPI_ENABLE(hspi); + 8004052: 68fb ldr r3, [r7, #12] + 8004054: 681b ldr r3, [r3, #0] + 8004056: 681a ldr r2, [r3, #0] + 8004058: 68fb ldr r3, [r7, #12] + 800405a: 681b ldr r3, [r3, #0] + 800405c: 2140 movs r1, #64 @ 0x40 + 800405e: 430a orrs r2, r1 + 8004060: 601a str r2, [r3, #0] + } + + /* Transmit and Receive data in 16 Bit mode */ + if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 8004062: 68fb ldr r3, [r7, #12] + 8004064: 68da ldr r2, [r3, #12] + 8004066: 23e0 movs r3, #224 @ 0xe0 + 8004068: 00db lsls r3, r3, #3 + 800406a: 429a cmp r2, r3 + 800406c: d800 bhi.n 8004070 + 800406e: e083 b.n 8004178 + { + if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 8004070: 68fb ldr r3, [r7, #12] + 8004072: 685b ldr r3, [r3, #4] + 8004074: 2b00 cmp r3, #0 + 8004076: d005 beq.n 8004084 + 8004078: 2312 movs r3, #18 + 800407a: 18fb adds r3, r7, r3 + 800407c: 881b ldrh r3, [r3, #0] + 800407e: 2b01 cmp r3, #1 + 8004080: d000 beq.n 8004084 + 8004082: e06d b.n 8004160 + { + hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 8004084: 68fb ldr r3, [r7, #12] + 8004086: 6b9b ldr r3, [r3, #56] @ 0x38 + 8004088: 881a ldrh r2, [r3, #0] + 800408a: 68fb ldr r3, [r7, #12] + 800408c: 681b ldr r3, [r3, #0] + 800408e: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); + 8004090: 68fb ldr r3, [r7, #12] + 8004092: 6b9b ldr r3, [r3, #56] @ 0x38 + 8004094: 1c9a adds r2, r3, #2 + 8004096: 68fb ldr r3, [r7, #12] + 8004098: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 800409a: 68fb ldr r3, [r7, #12] + 800409c: 8fdb ldrh r3, [r3, #62] @ 0x3e + 800409e: b29b uxth r3, r3 + 80040a0: 3b01 subs r3, #1 + 80040a2: b29a uxth r2, r3 + 80040a4: 68fb ldr r3, [r7, #12] + 80040a6: 87da strh r2, [r3, #62] @ 0x3e + SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + } +#endif /* USE_SPI_CRC */ + + } + while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) + 80040a8: e05a b.n 8004160 + { + /* Check TXE flag */ + if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) + 80040aa: 68fb ldr r3, [r7, #12] + 80040ac: 681b ldr r3, [r3, #0] + 80040ae: 689b ldr r3, [r3, #8] + 80040b0: 2202 movs r2, #2 + 80040b2: 4013 ands r3, r2 + 80040b4: 2b02 cmp r3, #2 + 80040b6: d11b bne.n 80040f0 + 80040b8: 68fb ldr r3, [r7, #12] + 80040ba: 8fdb ldrh r3, [r3, #62] @ 0x3e + 80040bc: b29b uxth r3, r3 + 80040be: 2b00 cmp r3, #0 + 80040c0: d016 beq.n 80040f0 + 80040c2: 6a7b ldr r3, [r7, #36] @ 0x24 + 80040c4: 2b01 cmp r3, #1 + 80040c6: d113 bne.n 80040f0 + { + hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 80040c8: 68fb ldr r3, [r7, #12] + 80040ca: 6b9b ldr r3, [r3, #56] @ 0x38 + 80040cc: 881a ldrh r2, [r3, #0] + 80040ce: 68fb ldr r3, [r7, #12] + 80040d0: 681b ldr r3, [r3, #0] + 80040d2: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); + 80040d4: 68fb ldr r3, [r7, #12] + 80040d6: 6b9b ldr r3, [r3, #56] @ 0x38 + 80040d8: 1c9a adds r2, r3, #2 + 80040da: 68fb ldr r3, [r7, #12] + 80040dc: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 80040de: 68fb ldr r3, [r7, #12] + 80040e0: 8fdb ldrh r3, [r3, #62] @ 0x3e + 80040e2: b29b uxth r3, r3 + 80040e4: 3b01 subs r3, #1 + 80040e6: b29a uxth r2, r3 + 80040e8: 68fb ldr r3, [r7, #12] + 80040ea: 87da strh r2, [r3, #62] @ 0x3e + /* Next Data is a reception (Rx). Tx not allowed */ + txallowed = 0U; + 80040ec: 2300 movs r3, #0 + 80040ee: 627b str r3, [r7, #36] @ 0x24 + } +#endif /* USE_SPI_CRC */ + } + + /* Check RXNE flag */ + if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) + 80040f0: 68fb ldr r3, [r7, #12] + 80040f2: 681b ldr r3, [r3, #0] + 80040f4: 689b ldr r3, [r3, #8] + 80040f6: 2201 movs r2, #1 + 80040f8: 4013 ands r3, r2 + 80040fa: 2b01 cmp r3, #1 + 80040fc: d11c bne.n 8004138 + 80040fe: 68fb ldr r3, [r7, #12] + 8004100: 2246 movs r2, #70 @ 0x46 + 8004102: 5a9b ldrh r3, [r3, r2] + 8004104: b29b uxth r3, r3 + 8004106: 2b00 cmp r3, #0 + 8004108: d016 beq.n 8004138 + { + *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; + 800410a: 68fb ldr r3, [r7, #12] + 800410c: 681b ldr r3, [r3, #0] + 800410e: 68da ldr r2, [r3, #12] + 8004110: 68fb ldr r3, [r7, #12] + 8004112: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004114: b292 uxth r2, r2 + 8004116: 801a strh r2, [r3, #0] + hspi->pRxBuffPtr += sizeof(uint16_t); + 8004118: 68fb ldr r3, [r7, #12] + 800411a: 6c1b ldr r3, [r3, #64] @ 0x40 + 800411c: 1c9a adds r2, r3, #2 + 800411e: 68fb ldr r3, [r7, #12] + 8004120: 641a str r2, [r3, #64] @ 0x40 + hspi->RxXferCount--; + 8004122: 68fb ldr r3, [r7, #12] + 8004124: 2246 movs r2, #70 @ 0x46 + 8004126: 5a9b ldrh r3, [r3, r2] + 8004128: b29b uxth r3, r3 + 800412a: 3b01 subs r3, #1 + 800412c: b299 uxth r1, r3 + 800412e: 68fb ldr r3, [r7, #12] + 8004130: 2246 movs r2, #70 @ 0x46 + 8004132: 5299 strh r1, [r3, r2] + /* Next Data is a Transmission (Tx). Tx is allowed */ + txallowed = 1U; + 8004134: 2301 movs r3, #1 + 8004136: 627b str r3, [r7, #36] @ 0x24 + } + if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) + 8004138: f7fd fa98 bl 800166c + 800413c: 0002 movs r2, r0 + 800413e: 69fb ldr r3, [r7, #28] + 8004140: 1ad3 subs r3, r2, r3 + 8004142: 6b3a ldr r2, [r7, #48] @ 0x30 + 8004144: 429a cmp r2, r3 + 8004146: d80b bhi.n 8004160 + 8004148: 6b3b ldr r3, [r7, #48] @ 0x30 + 800414a: 3301 adds r3, #1 + 800414c: d008 beq.n 8004160 + { + errorcode = HAL_TIMEOUT; + 800414e: 2323 movs r3, #35 @ 0x23 + 8004150: 18fb adds r3, r7, r3 + 8004152: 2203 movs r2, #3 + 8004154: 701a strb r2, [r3, #0] + hspi->State = HAL_SPI_STATE_READY; + 8004156: 68fb ldr r3, [r7, #12] + 8004158: 225d movs r2, #93 @ 0x5d + 800415a: 2101 movs r1, #1 + 800415c: 5499 strb r1, [r3, r2] + goto error; + 800415e: e0b1 b.n 80042c4 + while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) + 8004160: 68fb ldr r3, [r7, #12] + 8004162: 8fdb ldrh r3, [r3, #62] @ 0x3e + 8004164: b29b uxth r3, r3 + 8004166: 2b00 cmp r3, #0 + 8004168: d19f bne.n 80040aa + 800416a: 68fb ldr r3, [r7, #12] + 800416c: 2246 movs r2, #70 @ 0x46 + 800416e: 5a9b ldrh r3, [r3, r2] + 8004170: b29b uxth r3, r3 + 8004172: 2b00 cmp r3, #0 + 8004174: d199 bne.n 80040aa + 8004176: e089 b.n 800428c + } + } + /* Transmit and Receive data in 8 Bit mode */ + else + { + if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 8004178: 68fb ldr r3, [r7, #12] + 800417a: 685b ldr r3, [r3, #4] + 800417c: 2b00 cmp r3, #0 + 800417e: d005 beq.n 800418c + 8004180: 2312 movs r3, #18 + 8004182: 18fb adds r3, r7, r3 + 8004184: 881b ldrh r3, [r3, #0] + 8004186: 2b01 cmp r3, #1 + 8004188: d000 beq.n 800418c + 800418a: e074 b.n 8004276 + { + *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + 800418c: 68fb ldr r3, [r7, #12] + 800418e: 6b9a ldr r2, [r3, #56] @ 0x38 + 8004190: 68fb ldr r3, [r7, #12] + 8004192: 681b ldr r3, [r3, #0] + 8004194: 330c adds r3, #12 + 8004196: 7812 ldrb r2, [r2, #0] + 8004198: 701a strb r2, [r3, #0] + hspi->pTxBuffPtr += sizeof(uint8_t); + 800419a: 68fb ldr r3, [r7, #12] + 800419c: 6b9b ldr r3, [r3, #56] @ 0x38 + 800419e: 1c5a adds r2, r3, #1 + 80041a0: 68fb ldr r3, [r7, #12] + 80041a2: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 80041a4: 68fb ldr r3, [r7, #12] + 80041a6: 8fdb ldrh r3, [r3, #62] @ 0x3e + 80041a8: b29b uxth r3, r3 + 80041aa: 3b01 subs r3, #1 + 80041ac: b29a uxth r2, r3 + 80041ae: 68fb ldr r3, [r7, #12] + 80041b0: 87da strh r2, [r3, #62] @ 0x3e + } + SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + } +#endif /* USE_SPI_CRC */ + } + while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) + 80041b2: e060 b.n 8004276 + { + /* Check TXE flag */ + if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) + 80041b4: 68fb ldr r3, [r7, #12] + 80041b6: 681b ldr r3, [r3, #0] + 80041b8: 689b ldr r3, [r3, #8] + 80041ba: 2202 movs r2, #2 + 80041bc: 4013 ands r3, r2 + 80041be: 2b02 cmp r3, #2 + 80041c0: d11c bne.n 80041fc + 80041c2: 68fb ldr r3, [r7, #12] + 80041c4: 8fdb ldrh r3, [r3, #62] @ 0x3e + 80041c6: b29b uxth r3, r3 + 80041c8: 2b00 cmp r3, #0 + 80041ca: d017 beq.n 80041fc + 80041cc: 6a7b ldr r3, [r7, #36] @ 0x24 + 80041ce: 2b01 cmp r3, #1 + 80041d0: d114 bne.n 80041fc + { + *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + 80041d2: 68fb ldr r3, [r7, #12] + 80041d4: 6b9a ldr r2, [r3, #56] @ 0x38 + 80041d6: 68fb ldr r3, [r7, #12] + 80041d8: 681b ldr r3, [r3, #0] + 80041da: 330c adds r3, #12 + 80041dc: 7812 ldrb r2, [r2, #0] + 80041de: 701a strb r2, [r3, #0] + hspi->pTxBuffPtr++; + 80041e0: 68fb ldr r3, [r7, #12] + 80041e2: 6b9b ldr r3, [r3, #56] @ 0x38 + 80041e4: 1c5a adds r2, r3, #1 + 80041e6: 68fb ldr r3, [r7, #12] + 80041e8: 639a str r2, [r3, #56] @ 0x38 + hspi->TxXferCount--; + 80041ea: 68fb ldr r3, [r7, #12] + 80041ec: 8fdb ldrh r3, [r3, #62] @ 0x3e + 80041ee: b29b uxth r3, r3 + 80041f0: 3b01 subs r3, #1 + 80041f2: b29a uxth r2, r3 + 80041f4: 68fb ldr r3, [r7, #12] + 80041f6: 87da strh r2, [r3, #62] @ 0x3e + /* Next Data is a reception (Rx). Tx not allowed */ + txallowed = 0U; + 80041f8: 2300 movs r3, #0 + 80041fa: 627b str r3, [r7, #36] @ 0x24 + } +#endif /* USE_SPI_CRC */ + } + + /* Wait until RXNE flag is reset */ + if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) + 80041fc: 68fb ldr r3, [r7, #12] + 80041fe: 681b ldr r3, [r3, #0] + 8004200: 689b ldr r3, [r3, #8] + 8004202: 2201 movs r2, #1 + 8004204: 4013 ands r3, r2 + 8004206: 2b01 cmp r3, #1 + 8004208: d11e bne.n 8004248 + 800420a: 68fb ldr r3, [r7, #12] + 800420c: 2246 movs r2, #70 @ 0x46 + 800420e: 5a9b ldrh r3, [r3, r2] + 8004210: b29b uxth r3, r3 + 8004212: 2b00 cmp r3, #0 + 8004214: d018 beq.n 8004248 + { + (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; + 8004216: 68fb ldr r3, [r7, #12] + 8004218: 681b ldr r3, [r3, #0] + 800421a: 330c adds r3, #12 + 800421c: 001a movs r2, r3 + 800421e: 68fb ldr r3, [r7, #12] + 8004220: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004222: 7812 ldrb r2, [r2, #0] + 8004224: b2d2 uxtb r2, r2 + 8004226: 701a strb r2, [r3, #0] + hspi->pRxBuffPtr++; + 8004228: 68fb ldr r3, [r7, #12] + 800422a: 6c1b ldr r3, [r3, #64] @ 0x40 + 800422c: 1c5a adds r2, r3, #1 + 800422e: 68fb ldr r3, [r7, #12] + 8004230: 641a str r2, [r3, #64] @ 0x40 + hspi->RxXferCount--; + 8004232: 68fb ldr r3, [r7, #12] + 8004234: 2246 movs r2, #70 @ 0x46 + 8004236: 5a9b ldrh r3, [r3, r2] + 8004238: b29b uxth r3, r3 + 800423a: 3b01 subs r3, #1 + 800423c: b299 uxth r1, r3 + 800423e: 68fb ldr r3, [r7, #12] + 8004240: 2246 movs r2, #70 @ 0x46 + 8004242: 5299 strh r1, [r3, r2] + /* Next Data is a Transmission (Tx). Tx is allowed */ + txallowed = 1U; + 8004244: 2301 movs r3, #1 + 8004246: 627b str r3, [r7, #36] @ 0x24 + } + if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) + 8004248: f7fd fa10 bl 800166c + 800424c: 0002 movs r2, r0 + 800424e: 69fb ldr r3, [r7, #28] + 8004250: 1ad3 subs r3, r2, r3 + 8004252: 6b3a ldr r2, [r7, #48] @ 0x30 + 8004254: 429a cmp r2, r3 + 8004256: d802 bhi.n 800425e + 8004258: 6b3b ldr r3, [r7, #48] @ 0x30 + 800425a: 3301 adds r3, #1 + 800425c: d102 bne.n 8004264 + 800425e: 6b3b ldr r3, [r7, #48] @ 0x30 + 8004260: 2b00 cmp r3, #0 + 8004262: d108 bne.n 8004276 + { + errorcode = HAL_TIMEOUT; + 8004264: 2323 movs r3, #35 @ 0x23 + 8004266: 18fb adds r3, r7, r3 + 8004268: 2203 movs r2, #3 + 800426a: 701a strb r2, [r3, #0] + hspi->State = HAL_SPI_STATE_READY; + 800426c: 68fb ldr r3, [r7, #12] + 800426e: 225d movs r2, #93 @ 0x5d + 8004270: 2101 movs r1, #1 + 8004272: 5499 strb r1, [r3, r2] + goto error; + 8004274: e026 b.n 80042c4 + while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) + 8004276: 68fb ldr r3, [r7, #12] + 8004278: 8fdb ldrh r3, [r3, #62] @ 0x3e + 800427a: b29b uxth r3, r3 + 800427c: 2b00 cmp r3, #0 + 800427e: d199 bne.n 80041b4 + 8004280: 68fb ldr r3, [r7, #12] + 8004282: 2246 movs r2, #70 @ 0x46 + 8004284: 5a9b ldrh r3, [r3, r2] + 8004286: b29b uxth r3, r3 + 8004288: 2b00 cmp r3, #0 + 800428a: d193 bne.n 80041b4 + errorcode = HAL_ERROR; + } +#endif /* USE_SPI_CRC */ + + /* Check the end of the transaction */ + if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) + 800428c: 69fa ldr r2, [r7, #28] + 800428e: 6b39 ldr r1, [r7, #48] @ 0x30 + 8004290: 68fb ldr r3, [r7, #12] + 8004292: 0018 movs r0, r3 + 8004294: f000 f9b2 bl 80045fc + 8004298: 1e03 subs r3, r0, #0 + 800429a: d006 beq.n 80042aa + { + errorcode = HAL_ERROR; + 800429c: 2323 movs r3, #35 @ 0x23 + 800429e: 18fb adds r3, r7, r3 + 80042a0: 2201 movs r2, #1 + 80042a2: 701a strb r2, [r3, #0] + hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 80042a4: 68fb ldr r3, [r7, #12] + 80042a6: 2220 movs r2, #32 + 80042a8: 661a str r2, [r3, #96] @ 0x60 + } + + if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 80042aa: 68fb ldr r3, [r7, #12] + 80042ac: 6e1b ldr r3, [r3, #96] @ 0x60 + 80042ae: 2b00 cmp r3, #0 + 80042b0: d004 beq.n 80042bc + { + errorcode = HAL_ERROR; + 80042b2: 2323 movs r3, #35 @ 0x23 + 80042b4: 18fb adds r3, r7, r3 + 80042b6: 2201 movs r2, #1 + 80042b8: 701a strb r2, [r3, #0] + 80042ba: e003 b.n 80042c4 + } + else + { + hspi->State = HAL_SPI_STATE_READY; + 80042bc: 68fb ldr r3, [r7, #12] + 80042be: 225d movs r2, #93 @ 0x5d + 80042c0: 2101 movs r1, #1 + 80042c2: 5499 strb r1, [r3, r2] + } + +error : + __HAL_UNLOCK(hspi); + 80042c4: 68fb ldr r3, [r7, #12] + 80042c6: 225c movs r2, #92 @ 0x5c + 80042c8: 2100 movs r1, #0 + 80042ca: 5499 strb r1, [r3, r2] + return errorcode; + 80042cc: 2323 movs r3, #35 @ 0x23 + 80042ce: 18fb adds r3, r7, r3 + 80042d0: 781b ldrb r3, [r3, #0] +} + 80042d2: 0018 movs r0, r3 + 80042d4: 46bd mov sp, r7 + 80042d6: b00a add sp, #40 @ 0x28 + 80042d8: bd80 pop {r7, pc} + 80042da: 46c0 nop @ (mov r8, r8) + 80042dc: ffffefff .word 0xffffefff + +080042e0 : + * @param Tickstart tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, + uint32_t Timeout, uint32_t Tickstart) +{ + 80042e0: b580 push {r7, lr} + 80042e2: b088 sub sp, #32 + 80042e4: af00 add r7, sp, #0 + 80042e6: 60f8 str r0, [r7, #12] + 80042e8: 60b9 str r1, [r7, #8] + 80042ea: 603b str r3, [r7, #0] + 80042ec: 1dfb adds r3, r7, #7 + 80042ee: 701a strb r2, [r3, #0] + __IO uint32_t count; + uint32_t tmp_timeout; + uint32_t tmp_tickstart; + + /* Adjust Timeout value in case of end of transfer */ + tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); + 80042f0: f7fd f9bc bl 800166c + 80042f4: 0002 movs r2, r0 + 80042f6: 6abb ldr r3, [r7, #40] @ 0x28 + 80042f8: 1a9b subs r3, r3, r2 + 80042fa: 683a ldr r2, [r7, #0] + 80042fc: 18d3 adds r3, r2, r3 + 80042fe: 61fb str r3, [r7, #28] + tmp_tickstart = HAL_GetTick(); + 8004300: f7fd f9b4 bl 800166c + 8004304: 0003 movs r3, r0 + 8004306: 61bb str r3, [r7, #24] + + /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ + count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); + 8004308: 4b3a ldr r3, [pc, #232] @ (80043f4 ) + 800430a: 681b ldr r3, [r3, #0] + 800430c: 015b lsls r3, r3, #5 + 800430e: 0d1b lsrs r3, r3, #20 + 8004310: 69fa ldr r2, [r7, #28] + 8004312: 4353 muls r3, r2 + 8004314: 617b str r3, [r7, #20] + + while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) + 8004316: e058 b.n 80043ca + { + if (Timeout != HAL_MAX_DELAY) + 8004318: 683b ldr r3, [r7, #0] + 800431a: 3301 adds r3, #1 + 800431c: d055 beq.n 80043ca + { + if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) + 800431e: f7fd f9a5 bl 800166c + 8004322: 0002 movs r2, r0 + 8004324: 69bb ldr r3, [r7, #24] + 8004326: 1ad3 subs r3, r2, r3 + 8004328: 69fa ldr r2, [r7, #28] + 800432a: 429a cmp r2, r3 + 800432c: d902 bls.n 8004334 + 800432e: 69fb ldr r3, [r7, #28] + 8004330: 2b00 cmp r3, #0 + 8004332: d142 bne.n 80043ba + /* Disable the SPI and reset the CRC: the CRC value should be cleared + on both master and slave sides in order to resynchronize the master + and slave for their respective CRC calculation */ + + /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ + __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); + 8004334: 68fb ldr r3, [r7, #12] + 8004336: 681b ldr r3, [r3, #0] + 8004338: 685a ldr r2, [r3, #4] + 800433a: 68fb ldr r3, [r7, #12] + 800433c: 681b ldr r3, [r3, #0] + 800433e: 21e0 movs r1, #224 @ 0xe0 + 8004340: 438a bics r2, r1 + 8004342: 605a str r2, [r3, #4] + + if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 8004344: 68fb ldr r3, [r7, #12] + 8004346: 685a ldr r2, [r3, #4] + 8004348: 2382 movs r3, #130 @ 0x82 + 800434a: 005b lsls r3, r3, #1 + 800434c: 429a cmp r2, r3 + 800434e: d113 bne.n 8004378 + 8004350: 68fb ldr r3, [r7, #12] + 8004352: 689a ldr r2, [r3, #8] + 8004354: 2380 movs r3, #128 @ 0x80 + 8004356: 021b lsls r3, r3, #8 + 8004358: 429a cmp r2, r3 + 800435a: d005 beq.n 8004368 + || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) + 800435c: 68fb ldr r3, [r7, #12] + 800435e: 689a ldr r2, [r3, #8] + 8004360: 2380 movs r3, #128 @ 0x80 + 8004362: 00db lsls r3, r3, #3 + 8004364: 429a cmp r2, r3 + 8004366: d107 bne.n 8004378 + { + /* Disable SPI peripheral */ + __HAL_SPI_DISABLE(hspi); + 8004368: 68fb ldr r3, [r7, #12] + 800436a: 681b ldr r3, [r3, #0] + 800436c: 681a ldr r2, [r3, #0] + 800436e: 68fb ldr r3, [r7, #12] + 8004370: 681b ldr r3, [r3, #0] + 8004372: 2140 movs r1, #64 @ 0x40 + 8004374: 438a bics r2, r1 + 8004376: 601a str r2, [r3, #0] + } + + /* Reset CRC Calculation */ + if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 8004378: 68fb ldr r3, [r7, #12] + 800437a: 6a9a ldr r2, [r3, #40] @ 0x28 + 800437c: 2380 movs r3, #128 @ 0x80 + 800437e: 019b lsls r3, r3, #6 + 8004380: 429a cmp r2, r3 + 8004382: d110 bne.n 80043a6 + { + SPI_RESET_CRC(hspi); + 8004384: 68fb ldr r3, [r7, #12] + 8004386: 681b ldr r3, [r3, #0] + 8004388: 681a ldr r2, [r3, #0] + 800438a: 68fb ldr r3, [r7, #12] + 800438c: 681b ldr r3, [r3, #0] + 800438e: 491a ldr r1, [pc, #104] @ (80043f8 ) + 8004390: 400a ands r2, r1 + 8004392: 601a str r2, [r3, #0] + 8004394: 68fb ldr r3, [r7, #12] + 8004396: 681b ldr r3, [r3, #0] + 8004398: 681a ldr r2, [r3, #0] + 800439a: 68fb ldr r3, [r7, #12] + 800439c: 681b ldr r3, [r3, #0] + 800439e: 2180 movs r1, #128 @ 0x80 + 80043a0: 0189 lsls r1, r1, #6 + 80043a2: 430a orrs r2, r1 + 80043a4: 601a str r2, [r3, #0] + } + + hspi->State = HAL_SPI_STATE_READY; + 80043a6: 68fb ldr r3, [r7, #12] + 80043a8: 225d movs r2, #93 @ 0x5d + 80043aa: 2101 movs r1, #1 + 80043ac: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + 80043ae: 68fb ldr r3, [r7, #12] + 80043b0: 225c movs r2, #92 @ 0x5c + 80043b2: 2100 movs r1, #0 + 80043b4: 5499 strb r1, [r3, r2] + + return HAL_TIMEOUT; + 80043b6: 2303 movs r3, #3 + 80043b8: e017 b.n 80043ea + } + /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ + if (count == 0U) + 80043ba: 697b ldr r3, [r7, #20] + 80043bc: 2b00 cmp r3, #0 + 80043be: d101 bne.n 80043c4 + { + tmp_timeout = 0U; + 80043c0: 2300 movs r3, #0 + 80043c2: 61fb str r3, [r7, #28] + } + count--; + 80043c4: 697b ldr r3, [r7, #20] + 80043c6: 3b01 subs r3, #1 + 80043c8: 617b str r3, [r7, #20] + while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) + 80043ca: 68fb ldr r3, [r7, #12] + 80043cc: 681b ldr r3, [r3, #0] + 80043ce: 689b ldr r3, [r3, #8] + 80043d0: 68ba ldr r2, [r7, #8] + 80043d2: 4013 ands r3, r2 + 80043d4: 68ba ldr r2, [r7, #8] + 80043d6: 1ad3 subs r3, r2, r3 + 80043d8: 425a negs r2, r3 + 80043da: 4153 adcs r3, r2 + 80043dc: b2db uxtb r3, r3 + 80043de: 001a movs r2, r3 + 80043e0: 1dfb adds r3, r7, #7 + 80043e2: 781b ldrb r3, [r3, #0] + 80043e4: 429a cmp r2, r3 + 80043e6: d197 bne.n 8004318 + } + } + + return HAL_OK; + 80043e8: 2300 movs r3, #0 +} + 80043ea: 0018 movs r0, r3 + 80043ec: 46bd mov sp, r7 + 80043ee: b008 add sp, #32 + 80043f0: bd80 pop {r7, pc} + 80043f2: 46c0 nop @ (mov r8, r8) + 80043f4: 20000000 .word 0x20000000 + 80043f8: ffffdfff .word 0xffffdfff + +080043fc : + * @param Tickstart tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, + uint32_t Timeout, uint32_t Tickstart) +{ + 80043fc: b580 push {r7, lr} + 80043fe: b08a sub sp, #40 @ 0x28 + 8004400: af00 add r7, sp, #0 + 8004402: 60f8 str r0, [r7, #12] + 8004404: 60b9 str r1, [r7, #8] + 8004406: 607a str r2, [r7, #4] + 8004408: 603b str r3, [r7, #0] + __IO uint32_t count; + uint32_t tmp_timeout; + uint32_t tmp_tickstart; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; + 800440a: 2317 movs r3, #23 + 800440c: 18fb adds r3, r7, r3 + 800440e: 2200 movs r2, #0 + 8004410: 701a strb r2, [r3, #0] + + /* Adjust Timeout value in case of end of transfer */ + tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); + 8004412: f7fd f92b bl 800166c + 8004416: 0002 movs r2, r0 + 8004418: 6b3b ldr r3, [r7, #48] @ 0x30 + 800441a: 1a9b subs r3, r3, r2 + 800441c: 683a ldr r2, [r7, #0] + 800441e: 18d3 adds r3, r2, r3 + 8004420: 627b str r3, [r7, #36] @ 0x24 + tmp_tickstart = HAL_GetTick(); + 8004422: f7fd f923 bl 800166c + 8004426: 0003 movs r3, r0 + 8004428: 623b str r3, [r7, #32] + + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; + 800442a: 68fb ldr r3, [r7, #12] + 800442c: 681b ldr r3, [r3, #0] + 800442e: 330c adds r3, #12 + 8004430: 61fb str r3, [r7, #28] + + /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ + count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U); + 8004432: 4b41 ldr r3, [pc, #260] @ (8004538 ) + 8004434: 681a ldr r2, [r3, #0] + 8004436: 0013 movs r3, r2 + 8004438: 009b lsls r3, r3, #2 + 800443a: 189b adds r3, r3, r2 + 800443c: 00da lsls r2, r3, #3 + 800443e: 1ad3 subs r3, r2, r3 + 8004440: 0d1b lsrs r3, r3, #20 + 8004442: 6a7a ldr r2, [r7, #36] @ 0x24 + 8004444: 4353 muls r3, r2 + 8004446: 61bb str r3, [r7, #24] + + while ((hspi->Instance->SR & Fifo) != State) + 8004448: e068 b.n 800451c + { + if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY)) + 800444a: 68ba ldr r2, [r7, #8] + 800444c: 23c0 movs r3, #192 @ 0xc0 + 800444e: 00db lsls r3, r3, #3 + 8004450: 429a cmp r2, r3 + 8004452: d10a bne.n 800446a + 8004454: 687b ldr r3, [r7, #4] + 8004456: 2b00 cmp r3, #0 + 8004458: d107 bne.n 800446a + { + /* Flush Data Register by a blank read */ + tmpreg8 = *ptmpreg8; + 800445a: 69fb ldr r3, [r7, #28] + 800445c: 781b ldrb r3, [r3, #0] + 800445e: b2da uxtb r2, r3 + 8004460: 2117 movs r1, #23 + 8004462: 187b adds r3, r7, r1 + 8004464: 701a strb r2, [r3, #0] + /* To avoid GCC warning */ + UNUSED(tmpreg8); + 8004466: 187b adds r3, r7, r1 + 8004468: 781b ldrb r3, [r3, #0] + } + + if (Timeout != HAL_MAX_DELAY) + 800446a: 683b ldr r3, [r7, #0] + 800446c: 3301 adds r3, #1 + 800446e: d055 beq.n 800451c + { + if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) + 8004470: f7fd f8fc bl 800166c + 8004474: 0002 movs r2, r0 + 8004476: 6a3b ldr r3, [r7, #32] + 8004478: 1ad3 subs r3, r2, r3 + 800447a: 6a7a ldr r2, [r7, #36] @ 0x24 + 800447c: 429a cmp r2, r3 + 800447e: d902 bls.n 8004486 + 8004480: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004482: 2b00 cmp r3, #0 + 8004484: d142 bne.n 800450c + /* Disable the SPI and reset the CRC: the CRC value should be cleared + on both master and slave sides in order to resynchronize the master + and slave for their respective CRC calculation */ + + /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ + __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); + 8004486: 68fb ldr r3, [r7, #12] + 8004488: 681b ldr r3, [r3, #0] + 800448a: 685a ldr r2, [r3, #4] + 800448c: 68fb ldr r3, [r7, #12] + 800448e: 681b ldr r3, [r3, #0] + 8004490: 21e0 movs r1, #224 @ 0xe0 + 8004492: 438a bics r2, r1 + 8004494: 605a str r2, [r3, #4] + + if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 8004496: 68fb ldr r3, [r7, #12] + 8004498: 685a ldr r2, [r3, #4] + 800449a: 2382 movs r3, #130 @ 0x82 + 800449c: 005b lsls r3, r3, #1 + 800449e: 429a cmp r2, r3 + 80044a0: d113 bne.n 80044ca + 80044a2: 68fb ldr r3, [r7, #12] + 80044a4: 689a ldr r2, [r3, #8] + 80044a6: 2380 movs r3, #128 @ 0x80 + 80044a8: 021b lsls r3, r3, #8 + 80044aa: 429a cmp r2, r3 + 80044ac: d005 beq.n 80044ba + || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) + 80044ae: 68fb ldr r3, [r7, #12] + 80044b0: 689a ldr r2, [r3, #8] + 80044b2: 2380 movs r3, #128 @ 0x80 + 80044b4: 00db lsls r3, r3, #3 + 80044b6: 429a cmp r2, r3 + 80044b8: d107 bne.n 80044ca + { + /* Disable SPI peripheral */ + __HAL_SPI_DISABLE(hspi); + 80044ba: 68fb ldr r3, [r7, #12] + 80044bc: 681b ldr r3, [r3, #0] + 80044be: 681a ldr r2, [r3, #0] + 80044c0: 68fb ldr r3, [r7, #12] + 80044c2: 681b ldr r3, [r3, #0] + 80044c4: 2140 movs r1, #64 @ 0x40 + 80044c6: 438a bics r2, r1 + 80044c8: 601a str r2, [r3, #0] + } + + /* Reset CRC Calculation */ + if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 80044ca: 68fb ldr r3, [r7, #12] + 80044cc: 6a9a ldr r2, [r3, #40] @ 0x28 + 80044ce: 2380 movs r3, #128 @ 0x80 + 80044d0: 019b lsls r3, r3, #6 + 80044d2: 429a cmp r2, r3 + 80044d4: d110 bne.n 80044f8 + { + SPI_RESET_CRC(hspi); + 80044d6: 68fb ldr r3, [r7, #12] + 80044d8: 681b ldr r3, [r3, #0] + 80044da: 681a ldr r2, [r3, #0] + 80044dc: 68fb ldr r3, [r7, #12] + 80044de: 681b ldr r3, [r3, #0] + 80044e0: 4916 ldr r1, [pc, #88] @ (800453c ) + 80044e2: 400a ands r2, r1 + 80044e4: 601a str r2, [r3, #0] + 80044e6: 68fb ldr r3, [r7, #12] + 80044e8: 681b ldr r3, [r3, #0] + 80044ea: 681a ldr r2, [r3, #0] + 80044ec: 68fb ldr r3, [r7, #12] + 80044ee: 681b ldr r3, [r3, #0] + 80044f0: 2180 movs r1, #128 @ 0x80 + 80044f2: 0189 lsls r1, r1, #6 + 80044f4: 430a orrs r2, r1 + 80044f6: 601a str r2, [r3, #0] + } + + hspi->State = HAL_SPI_STATE_READY; + 80044f8: 68fb ldr r3, [r7, #12] + 80044fa: 225d movs r2, #93 @ 0x5d + 80044fc: 2101 movs r1, #1 + 80044fe: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + 8004500: 68fb ldr r3, [r7, #12] + 8004502: 225c movs r2, #92 @ 0x5c + 8004504: 2100 movs r1, #0 + 8004506: 5499 strb r1, [r3, r2] + + return HAL_TIMEOUT; + 8004508: 2303 movs r3, #3 + 800450a: e010 b.n 800452e + } + /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ + if (count == 0U) + 800450c: 69bb ldr r3, [r7, #24] + 800450e: 2b00 cmp r3, #0 + 8004510: d101 bne.n 8004516 + { + tmp_timeout = 0U; + 8004512: 2300 movs r3, #0 + 8004514: 627b str r3, [r7, #36] @ 0x24 + } + count--; + 8004516: 69bb ldr r3, [r7, #24] + 8004518: 3b01 subs r3, #1 + 800451a: 61bb str r3, [r7, #24] + while ((hspi->Instance->SR & Fifo) != State) + 800451c: 68fb ldr r3, [r7, #12] + 800451e: 681b ldr r3, [r3, #0] + 8004520: 689b ldr r3, [r3, #8] + 8004522: 68ba ldr r2, [r7, #8] + 8004524: 4013 ands r3, r2 + 8004526: 687a ldr r2, [r7, #4] + 8004528: 429a cmp r2, r3 + 800452a: d18e bne.n 800444a + } + } + + return HAL_OK; + 800452c: 2300 movs r3, #0 +} + 800452e: 0018 movs r0, r3 + 8004530: 46bd mov sp, r7 + 8004532: b00a add sp, #40 @ 0x28 + 8004534: bd80 pop {r7, pc} + 8004536: 46c0 nop @ (mov r8, r8) + 8004538: 20000000 .word 0x20000000 + 800453c: ffffdfff .word 0xffffdfff + +08004540 : + * @param Timeout Timeout duration + * @param Tickstart tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) +{ + 8004540: b580 push {r7, lr} + 8004542: b086 sub sp, #24 + 8004544: af02 add r7, sp, #8 + 8004546: 60f8 str r0, [r7, #12] + 8004548: 60b9 str r1, [r7, #8] + 800454a: 607a str r2, [r7, #4] + if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 800454c: 68fb ldr r3, [r7, #12] + 800454e: 685a ldr r2, [r3, #4] + 8004550: 2382 movs r3, #130 @ 0x82 + 8004552: 005b lsls r3, r3, #1 + 8004554: 429a cmp r2, r3 + 8004556: d113 bne.n 8004580 + 8004558: 68fb ldr r3, [r7, #12] + 800455a: 689a ldr r2, [r3, #8] + 800455c: 2380 movs r3, #128 @ 0x80 + 800455e: 021b lsls r3, r3, #8 + 8004560: 429a cmp r2, r3 + 8004562: d005 beq.n 8004570 + || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) + 8004564: 68fb ldr r3, [r7, #12] + 8004566: 689a ldr r2, [r3, #8] + 8004568: 2380 movs r3, #128 @ 0x80 + 800456a: 00db lsls r3, r3, #3 + 800456c: 429a cmp r2, r3 + 800456e: d107 bne.n 8004580 + { + /* Disable SPI peripheral */ + __HAL_SPI_DISABLE(hspi); + 8004570: 68fb ldr r3, [r7, #12] + 8004572: 681b ldr r3, [r3, #0] + 8004574: 681a ldr r2, [r3, #0] + 8004576: 68fb ldr r3, [r7, #12] + 8004578: 681b ldr r3, [r3, #0] + 800457a: 2140 movs r1, #64 @ 0x40 + 800457c: 438a bics r2, r1 + 800457e: 601a str r2, [r3, #0] + } + + /* Control the BSY flag */ + if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) + 8004580: 68ba ldr r2, [r7, #8] + 8004582: 68f8 ldr r0, [r7, #12] + 8004584: 687b ldr r3, [r7, #4] + 8004586: 9300 str r3, [sp, #0] + 8004588: 0013 movs r3, r2 + 800458a: 2200 movs r2, #0 + 800458c: 2180 movs r1, #128 @ 0x80 + 800458e: f7ff fea7 bl 80042e0 + 8004592: 1e03 subs r3, r0, #0 + 8004594: d007 beq.n 80045a6 + { + SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + 8004596: 68fb ldr r3, [r7, #12] + 8004598: 6e1b ldr r3, [r3, #96] @ 0x60 + 800459a: 2220 movs r2, #32 + 800459c: 431a orrs r2, r3 + 800459e: 68fb ldr r3, [r7, #12] + 80045a0: 661a str r2, [r3, #96] @ 0x60 + return HAL_TIMEOUT; + 80045a2: 2303 movs r3, #3 + 80045a4: e026 b.n 80045f4 + } + + if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 80045a6: 68fb ldr r3, [r7, #12] + 80045a8: 685a ldr r2, [r3, #4] + 80045aa: 2382 movs r3, #130 @ 0x82 + 80045ac: 005b lsls r3, r3, #1 + 80045ae: 429a cmp r2, r3 + 80045b0: d11f bne.n 80045f2 + 80045b2: 68fb ldr r3, [r7, #12] + 80045b4: 689a ldr r2, [r3, #8] + 80045b6: 2380 movs r3, #128 @ 0x80 + 80045b8: 021b lsls r3, r3, #8 + 80045ba: 429a cmp r2, r3 + 80045bc: d005 beq.n 80045ca + || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) + 80045be: 68fb ldr r3, [r7, #12] + 80045c0: 689a ldr r2, [r3, #8] + 80045c2: 2380 movs r3, #128 @ 0x80 + 80045c4: 00db lsls r3, r3, #3 + 80045c6: 429a cmp r2, r3 + 80045c8: d113 bne.n 80045f2 + { + /* Empty the FRLVL fifo */ + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK) + 80045ca: 68ba ldr r2, [r7, #8] + 80045cc: 23c0 movs r3, #192 @ 0xc0 + 80045ce: 00d9 lsls r1, r3, #3 + 80045d0: 68f8 ldr r0, [r7, #12] + 80045d2: 687b ldr r3, [r7, #4] + 80045d4: 9300 str r3, [sp, #0] + 80045d6: 0013 movs r3, r2 + 80045d8: 2200 movs r2, #0 + 80045da: f7ff ff0f bl 80043fc + 80045de: 1e03 subs r3, r0, #0 + 80045e0: d007 beq.n 80045f2 + { + SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + 80045e2: 68fb ldr r3, [r7, #12] + 80045e4: 6e1b ldr r3, [r3, #96] @ 0x60 + 80045e6: 2220 movs r2, #32 + 80045e8: 431a orrs r2, r3 + 80045ea: 68fb ldr r3, [r7, #12] + 80045ec: 661a str r2, [r3, #96] @ 0x60 + return HAL_TIMEOUT; + 80045ee: 2303 movs r3, #3 + 80045f0: e000 b.n 80045f4 + } + } + return HAL_OK; + 80045f2: 2300 movs r3, #0 +} + 80045f4: 0018 movs r0, r3 + 80045f6: 46bd mov sp, r7 + 80045f8: b004 add sp, #16 + 80045fa: bd80 pop {r7, pc} + +080045fc : + * @param Timeout Timeout duration + * @param Tickstart tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) +{ + 80045fc: b580 push {r7, lr} + 80045fe: b086 sub sp, #24 + 8004600: af02 add r7, sp, #8 + 8004602: 60f8 str r0, [r7, #12] + 8004604: 60b9 str r1, [r7, #8] + 8004606: 607a str r2, [r7, #4] + /* Control if the TX fifo is empty */ + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK) + 8004608: 68ba ldr r2, [r7, #8] + 800460a: 23c0 movs r3, #192 @ 0xc0 + 800460c: 0159 lsls r1, r3, #5 + 800460e: 68f8 ldr r0, [r7, #12] + 8004610: 687b ldr r3, [r7, #4] + 8004612: 9300 str r3, [sp, #0] + 8004614: 0013 movs r3, r2 + 8004616: 2200 movs r2, #0 + 8004618: f7ff fef0 bl 80043fc + 800461c: 1e03 subs r3, r0, #0 + 800461e: d007 beq.n 8004630 + { + SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + 8004620: 68fb ldr r3, [r7, #12] + 8004622: 6e1b ldr r3, [r3, #96] @ 0x60 + 8004624: 2220 movs r2, #32 + 8004626: 431a orrs r2, r3 + 8004628: 68fb ldr r3, [r7, #12] + 800462a: 661a str r2, [r3, #96] @ 0x60 + return HAL_TIMEOUT; + 800462c: 2303 movs r3, #3 + 800462e: e027 b.n 8004680 + } + + /* Control the BSY flag */ + if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) + 8004630: 68ba ldr r2, [r7, #8] + 8004632: 68f8 ldr r0, [r7, #12] + 8004634: 687b ldr r3, [r7, #4] + 8004636: 9300 str r3, [sp, #0] + 8004638: 0013 movs r3, r2 + 800463a: 2200 movs r2, #0 + 800463c: 2180 movs r1, #128 @ 0x80 + 800463e: f7ff fe4f bl 80042e0 + 8004642: 1e03 subs r3, r0, #0 + 8004644: d007 beq.n 8004656 + { + SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + 8004646: 68fb ldr r3, [r7, #12] + 8004648: 6e1b ldr r3, [r3, #96] @ 0x60 + 800464a: 2220 movs r2, #32 + 800464c: 431a orrs r2, r3 + 800464e: 68fb ldr r3, [r7, #12] + 8004650: 661a str r2, [r3, #96] @ 0x60 + return HAL_TIMEOUT; + 8004652: 2303 movs r3, #3 + 8004654: e014 b.n 8004680 + } + + /* Control if the RX fifo is empty */ + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK) + 8004656: 68ba ldr r2, [r7, #8] + 8004658: 23c0 movs r3, #192 @ 0xc0 + 800465a: 00d9 lsls r1, r3, #3 + 800465c: 68f8 ldr r0, [r7, #12] + 800465e: 687b ldr r3, [r7, #4] + 8004660: 9300 str r3, [sp, #0] + 8004662: 0013 movs r3, r2 + 8004664: 2200 movs r2, #0 + 8004666: f7ff fec9 bl 80043fc + 800466a: 1e03 subs r3, r0, #0 + 800466c: d007 beq.n 800467e + { + SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + 800466e: 68fb ldr r3, [r7, #12] + 8004670: 6e1b ldr r3, [r3, #96] @ 0x60 + 8004672: 2220 movs r2, #32 + 8004674: 431a orrs r2, r3 + 8004676: 68fb ldr r3, [r7, #12] + 8004678: 661a str r2, [r3, #96] @ 0x60 + return HAL_TIMEOUT; + 800467a: 2303 movs r3, #3 + 800467c: e000 b.n 8004680 + } + + return HAL_OK; + 800467e: 2300 movs r3, #0 +} + 8004680: 0018 movs r0, r3 + 8004682: 46bd mov sp, r7 + 8004684: b004 add sp, #16 + 8004686: bd80 pop {r7, pc} + +08004688 : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8004364: b580 push {r7, lr} - 8004366: b082 sub sp, #8 - 8004368: af00 add r7, sp, #0 - 800436a: 6078 str r0, [r7, #4] + 8004688: b580 push {r7, lr} + 800468a: b082 sub sp, #8 + 800468c: af00 add r7, sp, #0 + 800468e: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 800436c: 687b ldr r3, [r7, #4] - 800436e: 2b00 cmp r3, #0 - 8004370: d101 bne.n 8004376 + 8004690: 687b ldr r3, [r7, #4] + 8004692: 2b00 cmp r3, #0 + 8004694: d101 bne.n 800469a { return HAL_ERROR; - 8004372: 2301 movs r3, #1 - 8004374: e046 b.n 8004404 + 8004696: 2301 movs r3, #1 + 8004698: e046 b.n 8004728 { /* Check the parameters */ assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); } if (huart->gState == HAL_UART_STATE_RESET) - 8004376: 687b ldr r3, [r7, #4] - 8004378: 2288 movs r2, #136 @ 0x88 - 800437a: 589b ldr r3, [r3, r2] - 800437c: 2b00 cmp r3, #0 - 800437e: d107 bne.n 8004390 + 800469a: 687b ldr r3, [r7, #4] + 800469c: 2288 movs r2, #136 @ 0x88 + 800469e: 589b ldr r3, [r3, r2] + 80046a0: 2b00 cmp r3, #0 + 80046a2: d107 bne.n 80046b4 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8004380: 687b ldr r3, [r7, #4] - 8004382: 2284 movs r2, #132 @ 0x84 - 8004384: 2100 movs r1, #0 - 8004386: 5499 strb r1, [r3, r2] + 80046a4: 687b ldr r3, [r7, #4] + 80046a6: 2284 movs r2, #132 @ 0x84 + 80046a8: 2100 movs r1, #0 + 80046aa: 5499 strb r1, [r3, r2] /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8004388: 687b ldr r3, [r7, #4] - 800438a: 0018 movs r0, r3 - 800438c: f7fc fef4 bl 8001178 + 80046ac: 687b ldr r3, [r7, #4] + 80046ae: 0018 movs r0, r3 + 80046b0: f7fc fe02 bl 80012b8 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8004390: 687b ldr r3, [r7, #4] - 8004392: 2288 movs r2, #136 @ 0x88 - 8004394: 2124 movs r1, #36 @ 0x24 - 8004396: 5099 str r1, [r3, r2] + 80046b4: 687b ldr r3, [r7, #4] + 80046b6: 2288 movs r2, #136 @ 0x88 + 80046b8: 2124 movs r1, #36 @ 0x24 + 80046ba: 5099 str r1, [r3, r2] __HAL_UART_DISABLE(huart); - 8004398: 687b ldr r3, [r7, #4] - 800439a: 681b ldr r3, [r3, #0] - 800439c: 681a ldr r2, [r3, #0] - 800439e: 687b ldr r3, [r7, #4] - 80043a0: 681b ldr r3, [r3, #0] - 80043a2: 2101 movs r1, #1 - 80043a4: 438a bics r2, r1 - 80043a6: 601a str r2, [r3, #0] + 80046bc: 687b ldr r3, [r7, #4] + 80046be: 681b ldr r3, [r3, #0] + 80046c0: 681a ldr r2, [r3, #0] + 80046c2: 687b ldr r3, [r7, #4] + 80046c4: 681b ldr r3, [r3, #0] + 80046c6: 2101 movs r1, #1 + 80046c8: 438a bics r2, r1 + 80046ca: 601a str r2, [r3, #0] /* Perform advanced settings configuration */ /* For some items, configuration requires to be done prior TE and RE bits are set */ if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 80043a8: 687b ldr r3, [r7, #4] - 80043aa: 6a9b ldr r3, [r3, #40] @ 0x28 - 80043ac: 2b00 cmp r3, #0 - 80043ae: d003 beq.n 80043b8 + 80046cc: 687b ldr r3, [r7, #4] + 80046ce: 6a9b ldr r3, [r3, #40] @ 0x28 + 80046d0: 2b00 cmp r3, #0 + 80046d2: d003 beq.n 80046dc { UART_AdvFeatureConfig(huart); - 80043b0: 687b ldr r3, [r7, #4] - 80043b2: 0018 movs r0, r3 - 80043b4: f000 fa74 bl 80048a0 + 80046d4: 687b ldr r3, [r7, #4] + 80046d6: 0018 movs r0, r3 + 80046d8: f000 fa74 bl 8004bc4 } /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) - 80043b8: 687b ldr r3, [r7, #4] - 80043ba: 0018 movs r0, r3 - 80043bc: f000 f8cc bl 8004558 - 80043c0: 0003 movs r3, r0 - 80043c2: 2b01 cmp r3, #1 - 80043c4: d101 bne.n 80043ca + 80046dc: 687b ldr r3, [r7, #4] + 80046de: 0018 movs r0, r3 + 80046e0: f000 f8cc bl 800487c + 80046e4: 0003 movs r3, r0 + 80046e6: 2b01 cmp r3, #1 + 80046e8: d101 bne.n 80046ee { return HAL_ERROR; - 80043c6: 2301 movs r3, #1 - 80043c8: e01c b.n 8004404 + 80046ea: 2301 movs r3, #1 + 80046ec: e01c b.n 8004728 } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 80043ca: 687b ldr r3, [r7, #4] - 80043cc: 681b ldr r3, [r3, #0] - 80043ce: 685a ldr r2, [r3, #4] - 80043d0: 687b ldr r3, [r7, #4] - 80043d2: 681b ldr r3, [r3, #0] - 80043d4: 490d ldr r1, [pc, #52] @ (800440c ) - 80043d6: 400a ands r2, r1 - 80043d8: 605a str r2, [r3, #4] + 80046ee: 687b ldr r3, [r7, #4] + 80046f0: 681b ldr r3, [r3, #0] + 80046f2: 685a ldr r2, [r3, #4] + 80046f4: 687b ldr r3, [r7, #4] + 80046f6: 681b ldr r3, [r3, #0] + 80046f8: 490d ldr r1, [pc, #52] @ (8004730 ) + 80046fa: 400a ands r2, r1 + 80046fc: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 80043da: 687b ldr r3, [r7, #4] - 80043dc: 681b ldr r3, [r3, #0] - 80043de: 689a ldr r2, [r3, #8] - 80043e0: 687b ldr r3, [r7, #4] - 80043e2: 681b ldr r3, [r3, #0] - 80043e4: 212a movs r1, #42 @ 0x2a - 80043e6: 438a bics r2, r1 - 80043e8: 609a str r2, [r3, #8] + 80046fe: 687b ldr r3, [r7, #4] + 8004700: 681b ldr r3, [r3, #0] + 8004702: 689a ldr r2, [r3, #8] + 8004704: 687b ldr r3, [r7, #4] + 8004706: 681b ldr r3, [r3, #0] + 8004708: 212a movs r1, #42 @ 0x2a + 800470a: 438a bics r2, r1 + 800470c: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); - 80043ea: 687b ldr r3, [r7, #4] - 80043ec: 681b ldr r3, [r3, #0] - 80043ee: 681a ldr r2, [r3, #0] - 80043f0: 687b ldr r3, [r7, #4] - 80043f2: 681b ldr r3, [r3, #0] - 80043f4: 2101 movs r1, #1 - 80043f6: 430a orrs r2, r1 - 80043f8: 601a str r2, [r3, #0] + 800470e: 687b ldr r3, [r7, #4] + 8004710: 681b ldr r3, [r3, #0] + 8004712: 681a ldr r2, [r3, #0] + 8004714: 687b ldr r3, [r7, #4] + 8004716: 681b ldr r3, [r3, #0] + 8004718: 2101 movs r1, #1 + 800471a: 430a orrs r2, r1 + 800471c: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); - 80043fa: 687b ldr r3, [r7, #4] - 80043fc: 0018 movs r0, r3 - 80043fe: f000 fb03 bl 8004a08 - 8004402: 0003 movs r3, r0 + 800471e: 687b ldr r3, [r7, #4] + 8004720: 0018 movs r0, r3 + 8004722: f000 fb03 bl 8004d2c + 8004726: 0003 movs r3, r0 } - 8004404: 0018 movs r0, r3 - 8004406: 46bd mov sp, r7 - 8004408: b002 add sp, #8 - 800440a: bd80 pop {r7, pc} - 800440c: ffffb7ff .word 0xffffb7ff + 8004728: 0018 movs r0, r3 + 800472a: 46bd mov sp, r7 + 800472c: b002 add sp, #8 + 800472e: bd80 pop {r7, pc} + 8004730: ffffb7ff .word 0xffffb7ff -08004410 : +08004734 : * @param Size Amount of data elements (u8 or u16) to be sent. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8004410: b580 push {r7, lr} - 8004412: b08a sub sp, #40 @ 0x28 - 8004414: af02 add r7, sp, #8 - 8004416: 60f8 str r0, [r7, #12] - 8004418: 60b9 str r1, [r7, #8] - 800441a: 603b str r3, [r7, #0] - 800441c: 1dbb adds r3, r7, #6 - 800441e: 801a strh r2, [r3, #0] + 8004734: b580 push {r7, lr} + 8004736: b08a sub sp, #40 @ 0x28 + 8004738: af02 add r7, sp, #8 + 800473a: 60f8 str r0, [r7, #12] + 800473c: 60b9 str r1, [r7, #8] + 800473e: 603b str r3, [r7, #0] + 8004740: 1dbb adds r3, r7, #6 + 8004742: 801a strh r2, [r3, #0] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8004420: 68fb ldr r3, [r7, #12] - 8004422: 2288 movs r2, #136 @ 0x88 - 8004424: 589b ldr r3, [r3, r2] - 8004426: 2b20 cmp r3, #32 - 8004428: d000 beq.n 800442c - 800442a: e090 b.n 800454e + 8004744: 68fb ldr r3, [r7, #12] + 8004746: 2288 movs r2, #136 @ 0x88 + 8004748: 589b ldr r3, [r3, r2] + 800474a: 2b20 cmp r3, #32 + 800474c: d000 beq.n 8004750 + 800474e: e090 b.n 8004872 { if ((pData == NULL) || (Size == 0U)) - 800442c: 68bb ldr r3, [r7, #8] - 800442e: 2b00 cmp r3, #0 - 8004430: d003 beq.n 800443a - 8004432: 1dbb adds r3, r7, #6 - 8004434: 881b ldrh r3, [r3, #0] - 8004436: 2b00 cmp r3, #0 - 8004438: d101 bne.n 800443e + 8004750: 68bb ldr r3, [r7, #8] + 8004752: 2b00 cmp r3, #0 + 8004754: d003 beq.n 800475e + 8004756: 1dbb adds r3, r7, #6 + 8004758: 881b ldrh r3, [r3, #0] + 800475a: 2b00 cmp r3, #0 + 800475c: d101 bne.n 8004762 { return HAL_ERROR; - 800443a: 2301 movs r3, #1 - 800443c: e088 b.n 8004550 + 800475e: 2301 movs r3, #1 + 8004760: e088 b.n 8004874 } /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter should be aligned on a u16 frontier, as data to be filled into TDR will be handled through a u16 cast. */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 800443e: 68fb ldr r3, [r7, #12] - 8004440: 689a ldr r2, [r3, #8] - 8004442: 2380 movs r3, #128 @ 0x80 - 8004444: 015b lsls r3, r3, #5 - 8004446: 429a cmp r2, r3 - 8004448: d109 bne.n 800445e - 800444a: 68fb ldr r3, [r7, #12] - 800444c: 691b ldr r3, [r3, #16] - 800444e: 2b00 cmp r3, #0 - 8004450: d105 bne.n 800445e + 8004762: 68fb ldr r3, [r7, #12] + 8004764: 689a ldr r2, [r3, #8] + 8004766: 2380 movs r3, #128 @ 0x80 + 8004768: 015b lsls r3, r3, #5 + 800476a: 429a cmp r2, r3 + 800476c: d109 bne.n 8004782 + 800476e: 68fb ldr r3, [r7, #12] + 8004770: 691b ldr r3, [r3, #16] + 8004772: 2b00 cmp r3, #0 + 8004774: d105 bne.n 8004782 { if ((((uint32_t)pData) & 1U) != 0U) - 8004452: 68bb ldr r3, [r7, #8] - 8004454: 2201 movs r2, #1 - 8004456: 4013 ands r3, r2 - 8004458: d001 beq.n 800445e + 8004776: 68bb ldr r3, [r7, #8] + 8004778: 2201 movs r2, #1 + 800477a: 4013 ands r3, r2 + 800477c: d001 beq.n 8004782 { return HAL_ERROR; - 800445a: 2301 movs r3, #1 - 800445c: e078 b.n 8004550 + 800477e: 2301 movs r3, #1 + 8004780: e078 b.n 8004874 } } huart->ErrorCode = HAL_UART_ERROR_NONE; - 800445e: 68fb ldr r3, [r7, #12] - 8004460: 2290 movs r2, #144 @ 0x90 - 8004462: 2100 movs r1, #0 - 8004464: 5099 str r1, [r3, r2] + 8004782: 68fb ldr r3, [r7, #12] + 8004784: 2290 movs r2, #144 @ 0x90 + 8004786: 2100 movs r1, #0 + 8004788: 5099 str r1, [r3, r2] huart->gState = HAL_UART_STATE_BUSY_TX; - 8004466: 68fb ldr r3, [r7, #12] - 8004468: 2288 movs r2, #136 @ 0x88 - 800446a: 2121 movs r1, #33 @ 0x21 - 800446c: 5099 str r1, [r3, r2] + 800478a: 68fb ldr r3, [r7, #12] + 800478c: 2288 movs r2, #136 @ 0x88 + 800478e: 2121 movs r1, #33 @ 0x21 + 8004790: 5099 str r1, [r3, r2] /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 800446e: f7fd f85d bl 800152c - 8004472: 0003 movs r3, r0 - 8004474: 617b str r3, [r7, #20] + 8004792: f7fc ff6b bl 800166c + 8004796: 0003 movs r3, r0 + 8004798: 617b str r3, [r7, #20] huart->TxXferSize = Size; - 8004476: 68fb ldr r3, [r7, #12] - 8004478: 1dba adds r2, r7, #6 - 800447a: 2154 movs r1, #84 @ 0x54 - 800447c: 8812 ldrh r2, [r2, #0] - 800447e: 525a strh r2, [r3, r1] + 800479a: 68fb ldr r3, [r7, #12] + 800479c: 1dba adds r2, r7, #6 + 800479e: 2154 movs r1, #84 @ 0x54 + 80047a0: 8812 ldrh r2, [r2, #0] + 80047a2: 525a strh r2, [r3, r1] huart->TxXferCount = Size; - 8004480: 68fb ldr r3, [r7, #12] - 8004482: 1dba adds r2, r7, #6 - 8004484: 2156 movs r1, #86 @ 0x56 - 8004486: 8812 ldrh r2, [r2, #0] - 8004488: 525a strh r2, [r3, r1] + 80047a4: 68fb ldr r3, [r7, #12] + 80047a6: 1dba adds r2, r7, #6 + 80047a8: 2156 movs r1, #86 @ 0x56 + 80047aa: 8812 ldrh r2, [r2, #0] + 80047ac: 525a strh r2, [r3, r1] /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 800448a: 68fb ldr r3, [r7, #12] - 800448c: 689a ldr r2, [r3, #8] - 800448e: 2380 movs r3, #128 @ 0x80 - 8004490: 015b lsls r3, r3, #5 - 8004492: 429a cmp r2, r3 - 8004494: d108 bne.n 80044a8 - 8004496: 68fb ldr r3, [r7, #12] - 8004498: 691b ldr r3, [r3, #16] - 800449a: 2b00 cmp r3, #0 - 800449c: d104 bne.n 80044a8 + 80047ae: 68fb ldr r3, [r7, #12] + 80047b0: 689a ldr r2, [r3, #8] + 80047b2: 2380 movs r3, #128 @ 0x80 + 80047b4: 015b lsls r3, r3, #5 + 80047b6: 429a cmp r2, r3 + 80047b8: d108 bne.n 80047cc + 80047ba: 68fb ldr r3, [r7, #12] + 80047bc: 691b ldr r3, [r3, #16] + 80047be: 2b00 cmp r3, #0 + 80047c0: d104 bne.n 80047cc { pdata8bits = NULL; - 800449e: 2300 movs r3, #0 - 80044a0: 61fb str r3, [r7, #28] + 80047c2: 2300 movs r3, #0 + 80047c4: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 80044a2: 68bb ldr r3, [r7, #8] - 80044a4: 61bb str r3, [r7, #24] - 80044a6: e003 b.n 80044b0 + 80047c6: 68bb ldr r3, [r7, #8] + 80047c8: 61bb str r3, [r7, #24] + 80047ca: e003 b.n 80047d4 } else { pdata8bits = pData; - 80044a8: 68bb ldr r3, [r7, #8] - 80044aa: 61fb str r3, [r7, #28] + 80047cc: 68bb ldr r3, [r7, #8] + 80047ce: 61fb str r3, [r7, #28] pdata16bits = NULL; - 80044ac: 2300 movs r3, #0 - 80044ae: 61bb str r3, [r7, #24] + 80047d0: 2300 movs r3, #0 + 80047d2: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 80044b0: e030 b.n 8004514 + 80047d4: e030 b.n 8004838 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 80044b2: 697a ldr r2, [r7, #20] - 80044b4: 68f8 ldr r0, [r7, #12] - 80044b6: 683b ldr r3, [r7, #0] - 80044b8: 9300 str r3, [sp, #0] - 80044ba: 0013 movs r3, r2 - 80044bc: 2200 movs r2, #0 - 80044be: 2180 movs r1, #128 @ 0x80 - 80044c0: f000 fb4c bl 8004b5c - 80044c4: 1e03 subs r3, r0, #0 - 80044c6: d005 beq.n 80044d4 + 80047d6: 697a ldr r2, [r7, #20] + 80047d8: 68f8 ldr r0, [r7, #12] + 80047da: 683b ldr r3, [r7, #0] + 80047dc: 9300 str r3, [sp, #0] + 80047de: 0013 movs r3, r2 + 80047e0: 2200 movs r2, #0 + 80047e2: 2180 movs r1, #128 @ 0x80 + 80047e4: f000 fb4c bl 8004e80 + 80047e8: 1e03 subs r3, r0, #0 + 80047ea: d005 beq.n 80047f8 { huart->gState = HAL_UART_STATE_READY; - 80044c8: 68fb ldr r3, [r7, #12] - 80044ca: 2288 movs r2, #136 @ 0x88 - 80044cc: 2120 movs r1, #32 - 80044ce: 5099 str r1, [r3, r2] + 80047ec: 68fb ldr r3, [r7, #12] + 80047ee: 2288 movs r2, #136 @ 0x88 + 80047f0: 2120 movs r1, #32 + 80047f2: 5099 str r1, [r3, r2] return HAL_TIMEOUT; - 80044d0: 2303 movs r3, #3 - 80044d2: e03d b.n 8004550 + 80047f4: 2303 movs r3, #3 + 80047f6: e03d b.n 8004874 } if (pdata8bits == NULL) - 80044d4: 69fb ldr r3, [r7, #28] - 80044d6: 2b00 cmp r3, #0 - 80044d8: d10b bne.n 80044f2 + 80047f8: 69fb ldr r3, [r7, #28] + 80047fa: 2b00 cmp r3, #0 + 80047fc: d10b bne.n 8004816 { huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 80044da: 69bb ldr r3, [r7, #24] - 80044dc: 881b ldrh r3, [r3, #0] - 80044de: 001a movs r2, r3 - 80044e0: 68fb ldr r3, [r7, #12] - 80044e2: 681b ldr r3, [r3, #0] - 80044e4: 05d2 lsls r2, r2, #23 - 80044e6: 0dd2 lsrs r2, r2, #23 - 80044e8: 629a str r2, [r3, #40] @ 0x28 + 80047fe: 69bb ldr r3, [r7, #24] + 8004800: 881b ldrh r3, [r3, #0] + 8004802: 001a movs r2, r3 + 8004804: 68fb ldr r3, [r7, #12] + 8004806: 681b ldr r3, [r3, #0] + 8004808: 05d2 lsls r2, r2, #23 + 800480a: 0dd2 lsrs r2, r2, #23 + 800480c: 629a str r2, [r3, #40] @ 0x28 pdata16bits++; - 80044ea: 69bb ldr r3, [r7, #24] - 80044ec: 3302 adds r3, #2 - 80044ee: 61bb str r3, [r7, #24] - 80044f0: e007 b.n 8004502 + 800480e: 69bb ldr r3, [r7, #24] + 8004810: 3302 adds r3, #2 + 8004812: 61bb str r3, [r7, #24] + 8004814: e007 b.n 8004826 } else { huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 80044f2: 69fb ldr r3, [r7, #28] - 80044f4: 781a ldrb r2, [r3, #0] - 80044f6: 68fb ldr r3, [r7, #12] - 80044f8: 681b ldr r3, [r3, #0] - 80044fa: 629a str r2, [r3, #40] @ 0x28 + 8004816: 69fb ldr r3, [r7, #28] + 8004818: 781a ldrb r2, [r3, #0] + 800481a: 68fb ldr r3, [r7, #12] + 800481c: 681b ldr r3, [r3, #0] + 800481e: 629a str r2, [r3, #40] @ 0x28 pdata8bits++; - 80044fc: 69fb ldr r3, [r7, #28] - 80044fe: 3301 adds r3, #1 - 8004500: 61fb str r3, [r7, #28] + 8004820: 69fb ldr r3, [r7, #28] + 8004822: 3301 adds r3, #1 + 8004824: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 8004502: 68fb ldr r3, [r7, #12] - 8004504: 2256 movs r2, #86 @ 0x56 - 8004506: 5a9b ldrh r3, [r3, r2] - 8004508: b29b uxth r3, r3 - 800450a: 3b01 subs r3, #1 - 800450c: b299 uxth r1, r3 - 800450e: 68fb ldr r3, [r7, #12] - 8004510: 2256 movs r2, #86 @ 0x56 - 8004512: 5299 strh r1, [r3, r2] + 8004826: 68fb ldr r3, [r7, #12] + 8004828: 2256 movs r2, #86 @ 0x56 + 800482a: 5a9b ldrh r3, [r3, r2] + 800482c: b29b uxth r3, r3 + 800482e: 3b01 subs r3, #1 + 8004830: b299 uxth r1, r3 + 8004832: 68fb ldr r3, [r7, #12] + 8004834: 2256 movs r2, #86 @ 0x56 + 8004836: 5299 strh r1, [r3, r2] while (huart->TxXferCount > 0U) - 8004514: 68fb ldr r3, [r7, #12] - 8004516: 2256 movs r2, #86 @ 0x56 - 8004518: 5a9b ldrh r3, [r3, r2] - 800451a: b29b uxth r3, r3 - 800451c: 2b00 cmp r3, #0 - 800451e: d1c8 bne.n 80044b2 + 8004838: 68fb ldr r3, [r7, #12] + 800483a: 2256 movs r2, #86 @ 0x56 + 800483c: 5a9b ldrh r3, [r3, r2] + 800483e: b29b uxth r3, r3 + 8004840: 2b00 cmp r3, #0 + 8004842: d1c8 bne.n 80047d6 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8004520: 697a ldr r2, [r7, #20] - 8004522: 68f8 ldr r0, [r7, #12] - 8004524: 683b ldr r3, [r7, #0] - 8004526: 9300 str r3, [sp, #0] - 8004528: 0013 movs r3, r2 - 800452a: 2200 movs r2, #0 - 800452c: 2140 movs r1, #64 @ 0x40 - 800452e: f000 fb15 bl 8004b5c - 8004532: 1e03 subs r3, r0, #0 - 8004534: d005 beq.n 8004542 + 8004844: 697a ldr r2, [r7, #20] + 8004846: 68f8 ldr r0, [r7, #12] + 8004848: 683b ldr r3, [r7, #0] + 800484a: 9300 str r3, [sp, #0] + 800484c: 0013 movs r3, r2 + 800484e: 2200 movs r2, #0 + 8004850: 2140 movs r1, #64 @ 0x40 + 8004852: f000 fb15 bl 8004e80 + 8004856: 1e03 subs r3, r0, #0 + 8004858: d005 beq.n 8004866 { huart->gState = HAL_UART_STATE_READY; - 8004536: 68fb ldr r3, [r7, #12] - 8004538: 2288 movs r2, #136 @ 0x88 - 800453a: 2120 movs r1, #32 - 800453c: 5099 str r1, [r3, r2] + 800485a: 68fb ldr r3, [r7, #12] + 800485c: 2288 movs r2, #136 @ 0x88 + 800485e: 2120 movs r1, #32 + 8004860: 5099 str r1, [r3, r2] return HAL_TIMEOUT; - 800453e: 2303 movs r3, #3 - 8004540: e006 b.n 8004550 + 8004862: 2303 movs r3, #3 + 8004864: e006 b.n 8004874 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8004542: 68fb ldr r3, [r7, #12] - 8004544: 2288 movs r2, #136 @ 0x88 - 8004546: 2120 movs r1, #32 - 8004548: 5099 str r1, [r3, r2] + 8004866: 68fb ldr r3, [r7, #12] + 8004868: 2288 movs r2, #136 @ 0x88 + 800486a: 2120 movs r1, #32 + 800486c: 5099 str r1, [r3, r2] return HAL_OK; - 800454a: 2300 movs r3, #0 - 800454c: e000 b.n 8004550 + 800486e: 2300 movs r3, #0 + 8004870: e000 b.n 8004874 } else { return HAL_BUSY; - 800454e: 2302 movs r3, #2 + 8004872: 2302 movs r3, #2 } } - 8004550: 0018 movs r0, r3 - 8004552: 46bd mov sp, r7 - 8004554: b008 add sp, #32 - 8004556: bd80 pop {r7, pc} + 8004874: 0018 movs r0, r3 + 8004876: 46bd mov sp, r7 + 8004878: b008 add sp, #32 + 800487a: bd80 pop {r7, pc} -08004558 : +0800487c : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { - 8004558: b580 push {r7, lr} - 800455a: b088 sub sp, #32 - 800455c: af00 add r7, sp, #0 - 800455e: 6078 str r0, [r7, #4] + 800487c: b580 push {r7, lr} + 800487e: b088 sub sp, #32 + 8004880: af00 add r7, sp, #0 + 8004882: 6078 str r0, [r7, #4] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv; HAL_StatusTypeDef ret = HAL_OK; - 8004560: 231a movs r3, #26 - 8004562: 18fb adds r3, r7, r3 - 8004564: 2200 movs r2, #0 - 8004566: 701a strb r2, [r3, #0] + 8004884: 231a movs r3, #26 + 8004886: 18fb adds r3, r7, r3 + 8004888: 2200 movs r2, #0 + 800488a: 701a strb r2, [r3, #0] * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 8004568: 687b ldr r3, [r7, #4] - 800456a: 689a ldr r2, [r3, #8] - 800456c: 687b ldr r3, [r7, #4] - 800456e: 691b ldr r3, [r3, #16] - 8004570: 431a orrs r2, r3 - 8004572: 687b ldr r3, [r7, #4] - 8004574: 695b ldr r3, [r3, #20] - 8004576: 431a orrs r2, r3 - 8004578: 687b ldr r3, [r7, #4] - 800457a: 69db ldr r3, [r3, #28] - 800457c: 4313 orrs r3, r2 - 800457e: 61fb str r3, [r7, #28] + 800488c: 687b ldr r3, [r7, #4] + 800488e: 689a ldr r2, [r3, #8] + 8004890: 687b ldr r3, [r7, #4] + 8004892: 691b ldr r3, [r3, #16] + 8004894: 431a orrs r2, r3 + 8004896: 687b ldr r3, [r7, #4] + 8004898: 695b ldr r3, [r3, #20] + 800489a: 431a orrs r2, r3 + 800489c: 687b ldr r3, [r7, #4] + 800489e: 69db ldr r3, [r3, #28] + 80048a0: 4313 orrs r3, r2 + 80048a2: 61fb str r3, [r7, #28] MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 8004580: 687b ldr r3, [r7, #4] - 8004582: 681b ldr r3, [r3, #0] - 8004584: 681b ldr r3, [r3, #0] - 8004586: 4abc ldr r2, [pc, #752] @ (8004878 ) - 8004588: 4013 ands r3, r2 - 800458a: 0019 movs r1, r3 - 800458c: 687b ldr r3, [r7, #4] - 800458e: 681b ldr r3, [r3, #0] - 8004590: 69fa ldr r2, [r7, #28] - 8004592: 430a orrs r2, r1 - 8004594: 601a str r2, [r3, #0] + 80048a4: 687b ldr r3, [r7, #4] + 80048a6: 681b ldr r3, [r3, #0] + 80048a8: 681b ldr r3, [r3, #0] + 80048aa: 4abc ldr r2, [pc, #752] @ (8004b9c ) + 80048ac: 4013 ands r3, r2 + 80048ae: 0019 movs r1, r3 + 80048b0: 687b ldr r3, [r7, #4] + 80048b2: 681b ldr r3, [r3, #0] + 80048b4: 69fa ldr r2, [r7, #28] + 80048b6: 430a orrs r2, r1 + 80048b8: 601a str r2, [r3, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8004596: 687b ldr r3, [r7, #4] - 8004598: 681b ldr r3, [r3, #0] - 800459a: 685b ldr r3, [r3, #4] - 800459c: 4ab7 ldr r2, [pc, #732] @ (800487c ) - 800459e: 4013 ands r3, r2 - 80045a0: 0019 movs r1, r3 - 80045a2: 687b ldr r3, [r7, #4] - 80045a4: 68da ldr r2, [r3, #12] - 80045a6: 687b ldr r3, [r7, #4] - 80045a8: 681b ldr r3, [r3, #0] - 80045aa: 430a orrs r2, r1 - 80045ac: 605a str r2, [r3, #4] + 80048ba: 687b ldr r3, [r7, #4] + 80048bc: 681b ldr r3, [r3, #0] + 80048be: 685b ldr r3, [r3, #4] + 80048c0: 4ab7 ldr r2, [pc, #732] @ (8004ba0 ) + 80048c2: 4013 ands r3, r2 + 80048c4: 0019 movs r1, r3 + 80048c6: 687b ldr r3, [r7, #4] + 80048c8: 68da ldr r2, [r3, #12] + 80048ca: 687b ldr r3, [r7, #4] + 80048cc: 681b ldr r3, [r3, #0] + 80048ce: 430a orrs r2, r1 + 80048d0: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 80045ae: 687b ldr r3, [r7, #4] - 80045b0: 699b ldr r3, [r3, #24] - 80045b2: 61fb str r3, [r7, #28] + 80048d2: 687b ldr r3, [r7, #4] + 80048d4: 699b ldr r3, [r3, #24] + 80048d6: 61fb str r3, [r7, #28] if (!(UART_INSTANCE_LOWPOWER(huart))) { tmpreg |= huart->Init.OneBitSampling; - 80045b4: 687b ldr r3, [r7, #4] - 80045b6: 6a1b ldr r3, [r3, #32] - 80045b8: 69fa ldr r2, [r7, #28] - 80045ba: 4313 orrs r3, r2 - 80045bc: 61fb str r3, [r7, #28] + 80048d8: 687b ldr r3, [r7, #4] + 80048da: 6a1b ldr r3, [r3, #32] + 80048dc: 69fa ldr r2, [r7, #28] + 80048de: 4313 orrs r3, r2 + 80048e0: 61fb str r3, [r7, #28] } MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 80045be: 687b ldr r3, [r7, #4] - 80045c0: 681b ldr r3, [r3, #0] - 80045c2: 689b ldr r3, [r3, #8] - 80045c4: 4aae ldr r2, [pc, #696] @ (8004880 ) - 80045c6: 4013 ands r3, r2 - 80045c8: 0019 movs r1, r3 - 80045ca: 687b ldr r3, [r7, #4] - 80045cc: 681b ldr r3, [r3, #0] - 80045ce: 69fa ldr r2, [r7, #28] - 80045d0: 430a orrs r2, r1 - 80045d2: 609a str r2, [r3, #8] + 80048e2: 687b ldr r3, [r7, #4] + 80048e4: 681b ldr r3, [r3, #0] + 80048e6: 689b ldr r3, [r3, #8] + 80048e8: 4aae ldr r2, [pc, #696] @ (8004ba4 ) + 80048ea: 4013 ands r3, r2 + 80048ec: 0019 movs r1, r3 + 80048ee: 687b ldr r3, [r7, #4] + 80048f0: 681b ldr r3, [r3, #0] + 80048f2: 69fa ldr r2, [r7, #28] + 80048f4: 430a orrs r2, r1 + 80048f6: 609a str r2, [r3, #8] /*-------------------------- USART PRESC Configuration -----------------------*/ /* Configure * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); - 80045d4: 687b ldr r3, [r7, #4] - 80045d6: 681b ldr r3, [r3, #0] - 80045d8: 6adb ldr r3, [r3, #44] @ 0x2c - 80045da: 220f movs r2, #15 - 80045dc: 4393 bics r3, r2 - 80045de: 0019 movs r1, r3 - 80045e0: 687b ldr r3, [r7, #4] - 80045e2: 6a5a ldr r2, [r3, #36] @ 0x24 - 80045e4: 687b ldr r3, [r7, #4] - 80045e6: 681b ldr r3, [r3, #0] - 80045e8: 430a orrs r2, r1 - 80045ea: 62da str r2, [r3, #44] @ 0x2c + 80048f8: 687b ldr r3, [r7, #4] + 80048fa: 681b ldr r3, [r3, #0] + 80048fc: 6adb ldr r3, [r3, #44] @ 0x2c + 80048fe: 220f movs r2, #15 + 8004900: 4393 bics r3, r2 + 8004902: 0019 movs r1, r3 + 8004904: 687b ldr r3, [r7, #4] + 8004906: 6a5a ldr r2, [r3, #36] @ 0x24 + 8004908: 687b ldr r3, [r7, #4] + 800490a: 681b ldr r3, [r3, #0] + 800490c: 430a orrs r2, r1 + 800490e: 62da str r2, [r3, #44] @ 0x2c /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); - 80045ec: 687b ldr r3, [r7, #4] - 80045ee: 681b ldr r3, [r3, #0] - 80045f0: 4aa4 ldr r2, [pc, #656] @ (8004884 ) - 80045f2: 4293 cmp r3, r2 - 80045f4: d127 bne.n 8004646 - 80045f6: 4ba4 ldr r3, [pc, #656] @ (8004888 ) - 80045f8: 6d5b ldr r3, [r3, #84] @ 0x54 - 80045fa: 2203 movs r2, #3 - 80045fc: 4013 ands r3, r2 - 80045fe: 2b03 cmp r3, #3 - 8004600: d017 beq.n 8004632 - 8004602: d81b bhi.n 800463c - 8004604: 2b02 cmp r3, #2 - 8004606: d00a beq.n 800461e - 8004608: d818 bhi.n 800463c - 800460a: 2b00 cmp r3, #0 - 800460c: d002 beq.n 8004614 - 800460e: 2b01 cmp r3, #1 - 8004610: d00a beq.n 8004628 - 8004612: e013 b.n 800463c - 8004614: 231b movs r3, #27 - 8004616: 18fb adds r3, r7, r3 - 8004618: 2200 movs r2, #0 - 800461a: 701a strb r2, [r3, #0] - 800461c: e058 b.n 80046d0 - 800461e: 231b movs r3, #27 - 8004620: 18fb adds r3, r7, r3 - 8004622: 2202 movs r2, #2 - 8004624: 701a strb r2, [r3, #0] - 8004626: e053 b.n 80046d0 - 8004628: 231b movs r3, #27 - 800462a: 18fb adds r3, r7, r3 - 800462c: 2204 movs r2, #4 - 800462e: 701a strb r2, [r3, #0] - 8004630: e04e b.n 80046d0 - 8004632: 231b movs r3, #27 - 8004634: 18fb adds r3, r7, r3 - 8004636: 2208 movs r2, #8 - 8004638: 701a strb r2, [r3, #0] - 800463a: e049 b.n 80046d0 - 800463c: 231b movs r3, #27 - 800463e: 18fb adds r3, r7, r3 - 8004640: 2210 movs r2, #16 - 8004642: 701a strb r2, [r3, #0] - 8004644: e044 b.n 80046d0 - 8004646: 687b ldr r3, [r7, #4] - 8004648: 681b ldr r3, [r3, #0] - 800464a: 4a90 ldr r2, [pc, #576] @ (800488c ) - 800464c: 4293 cmp r3, r2 - 800464e: d127 bne.n 80046a0 - 8004650: 4b8d ldr r3, [pc, #564] @ (8004888 ) - 8004652: 6d5b ldr r3, [r3, #84] @ 0x54 - 8004654: 220c movs r2, #12 - 8004656: 4013 ands r3, r2 - 8004658: 2b0c cmp r3, #12 - 800465a: d017 beq.n 800468c - 800465c: d81b bhi.n 8004696 - 800465e: 2b08 cmp r3, #8 - 8004660: d00a beq.n 8004678 - 8004662: d818 bhi.n 8004696 - 8004664: 2b00 cmp r3, #0 - 8004666: d002 beq.n 800466e - 8004668: 2b04 cmp r3, #4 - 800466a: d00a beq.n 8004682 - 800466c: e013 b.n 8004696 - 800466e: 231b movs r3, #27 - 8004670: 18fb adds r3, r7, r3 - 8004672: 2200 movs r2, #0 - 8004674: 701a strb r2, [r3, #0] - 8004676: e02b b.n 80046d0 - 8004678: 231b movs r3, #27 - 800467a: 18fb adds r3, r7, r3 - 800467c: 2202 movs r2, #2 - 800467e: 701a strb r2, [r3, #0] - 8004680: e026 b.n 80046d0 - 8004682: 231b movs r3, #27 - 8004684: 18fb adds r3, r7, r3 - 8004686: 2204 movs r2, #4 - 8004688: 701a strb r2, [r3, #0] - 800468a: e021 b.n 80046d0 - 800468c: 231b movs r3, #27 - 800468e: 18fb adds r3, r7, r3 - 8004690: 2208 movs r2, #8 - 8004692: 701a strb r2, [r3, #0] - 8004694: e01c b.n 80046d0 - 8004696: 231b movs r3, #27 - 8004698: 18fb adds r3, r7, r3 - 800469a: 2210 movs r2, #16 - 800469c: 701a strb r2, [r3, #0] - 800469e: e017 b.n 80046d0 - 80046a0: 687b ldr r3, [r7, #4] - 80046a2: 681b ldr r3, [r3, #0] - 80046a4: 4a7a ldr r2, [pc, #488] @ (8004890 ) - 80046a6: 4293 cmp r3, r2 - 80046a8: d104 bne.n 80046b4 - 80046aa: 231b movs r3, #27 - 80046ac: 18fb adds r3, r7, r3 - 80046ae: 2200 movs r2, #0 - 80046b0: 701a strb r2, [r3, #0] - 80046b2: e00d b.n 80046d0 - 80046b4: 687b ldr r3, [r7, #4] - 80046b6: 681b ldr r3, [r3, #0] - 80046b8: 4a76 ldr r2, [pc, #472] @ (8004894 ) - 80046ba: 4293 cmp r3, r2 - 80046bc: d104 bne.n 80046c8 - 80046be: 231b movs r3, #27 - 80046c0: 18fb adds r3, r7, r3 - 80046c2: 2200 movs r2, #0 - 80046c4: 701a strb r2, [r3, #0] - 80046c6: e003 b.n 80046d0 - 80046c8: 231b movs r3, #27 - 80046ca: 18fb adds r3, r7, r3 - 80046cc: 2210 movs r2, #16 - 80046ce: 701a strb r2, [r3, #0] + 8004910: 687b ldr r3, [r7, #4] + 8004912: 681b ldr r3, [r3, #0] + 8004914: 4aa4 ldr r2, [pc, #656] @ (8004ba8 ) + 8004916: 4293 cmp r3, r2 + 8004918: d127 bne.n 800496a + 800491a: 4ba4 ldr r3, [pc, #656] @ (8004bac ) + 800491c: 6d5b ldr r3, [r3, #84] @ 0x54 + 800491e: 2203 movs r2, #3 + 8004920: 4013 ands r3, r2 + 8004922: 2b03 cmp r3, #3 + 8004924: d017 beq.n 8004956 + 8004926: d81b bhi.n 8004960 + 8004928: 2b02 cmp r3, #2 + 800492a: d00a beq.n 8004942 + 800492c: d818 bhi.n 8004960 + 800492e: 2b00 cmp r3, #0 + 8004930: d002 beq.n 8004938 + 8004932: 2b01 cmp r3, #1 + 8004934: d00a beq.n 800494c + 8004936: e013 b.n 8004960 + 8004938: 231b movs r3, #27 + 800493a: 18fb adds r3, r7, r3 + 800493c: 2200 movs r2, #0 + 800493e: 701a strb r2, [r3, #0] + 8004940: e058 b.n 80049f4 + 8004942: 231b movs r3, #27 + 8004944: 18fb adds r3, r7, r3 + 8004946: 2202 movs r2, #2 + 8004948: 701a strb r2, [r3, #0] + 800494a: e053 b.n 80049f4 + 800494c: 231b movs r3, #27 + 800494e: 18fb adds r3, r7, r3 + 8004950: 2204 movs r2, #4 + 8004952: 701a strb r2, [r3, #0] + 8004954: e04e b.n 80049f4 + 8004956: 231b movs r3, #27 + 8004958: 18fb adds r3, r7, r3 + 800495a: 2208 movs r2, #8 + 800495c: 701a strb r2, [r3, #0] + 800495e: e049 b.n 80049f4 + 8004960: 231b movs r3, #27 + 8004962: 18fb adds r3, r7, r3 + 8004964: 2210 movs r2, #16 + 8004966: 701a strb r2, [r3, #0] + 8004968: e044 b.n 80049f4 + 800496a: 687b ldr r3, [r7, #4] + 800496c: 681b ldr r3, [r3, #0] + 800496e: 4a90 ldr r2, [pc, #576] @ (8004bb0 ) + 8004970: 4293 cmp r3, r2 + 8004972: d127 bne.n 80049c4 + 8004974: 4b8d ldr r3, [pc, #564] @ (8004bac ) + 8004976: 6d5b ldr r3, [r3, #84] @ 0x54 + 8004978: 220c movs r2, #12 + 800497a: 4013 ands r3, r2 + 800497c: 2b0c cmp r3, #12 + 800497e: d017 beq.n 80049b0 + 8004980: d81b bhi.n 80049ba + 8004982: 2b08 cmp r3, #8 + 8004984: d00a beq.n 800499c + 8004986: d818 bhi.n 80049ba + 8004988: 2b00 cmp r3, #0 + 800498a: d002 beq.n 8004992 + 800498c: 2b04 cmp r3, #4 + 800498e: d00a beq.n 80049a6 + 8004990: e013 b.n 80049ba + 8004992: 231b movs r3, #27 + 8004994: 18fb adds r3, r7, r3 + 8004996: 2200 movs r2, #0 + 8004998: 701a strb r2, [r3, #0] + 800499a: e02b b.n 80049f4 + 800499c: 231b movs r3, #27 + 800499e: 18fb adds r3, r7, r3 + 80049a0: 2202 movs r2, #2 + 80049a2: 701a strb r2, [r3, #0] + 80049a4: e026 b.n 80049f4 + 80049a6: 231b movs r3, #27 + 80049a8: 18fb adds r3, r7, r3 + 80049aa: 2204 movs r2, #4 + 80049ac: 701a strb r2, [r3, #0] + 80049ae: e021 b.n 80049f4 + 80049b0: 231b movs r3, #27 + 80049b2: 18fb adds r3, r7, r3 + 80049b4: 2208 movs r2, #8 + 80049b6: 701a strb r2, [r3, #0] + 80049b8: e01c b.n 80049f4 + 80049ba: 231b movs r3, #27 + 80049bc: 18fb adds r3, r7, r3 + 80049be: 2210 movs r2, #16 + 80049c0: 701a strb r2, [r3, #0] + 80049c2: e017 b.n 80049f4 + 80049c4: 687b ldr r3, [r7, #4] + 80049c6: 681b ldr r3, [r3, #0] + 80049c8: 4a7a ldr r2, [pc, #488] @ (8004bb4 ) + 80049ca: 4293 cmp r3, r2 + 80049cc: d104 bne.n 80049d8 + 80049ce: 231b movs r3, #27 + 80049d0: 18fb adds r3, r7, r3 + 80049d2: 2200 movs r2, #0 + 80049d4: 701a strb r2, [r3, #0] + 80049d6: e00d b.n 80049f4 + 80049d8: 687b ldr r3, [r7, #4] + 80049da: 681b ldr r3, [r3, #0] + 80049dc: 4a76 ldr r2, [pc, #472] @ (8004bb8 ) + 80049de: 4293 cmp r3, r2 + 80049e0: d104 bne.n 80049ec + 80049e2: 231b movs r3, #27 + 80049e4: 18fb adds r3, r7, r3 + 80049e6: 2200 movs r2, #0 + 80049e8: 701a strb r2, [r3, #0] + 80049ea: e003 b.n 80049f4 + 80049ec: 231b movs r3, #27 + 80049ee: 18fb adds r3, r7, r3 + 80049f0: 2210 movs r2, #16 + 80049f2: 701a strb r2, [r3, #0] } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */ } /* if (pclk != 0) */ } /* Check UART Over Sampling to set Baud Rate Register */ else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 80046d0: 687b ldr r3, [r7, #4] - 80046d2: 69da ldr r2, [r3, #28] - 80046d4: 2380 movs r3, #128 @ 0x80 - 80046d6: 021b lsls r3, r3, #8 - 80046d8: 429a cmp r2, r3 - 80046da: d000 beq.n 80046de - 80046dc: e065 b.n 80047aa + 80049f4: 687b ldr r3, [r7, #4] + 80049f6: 69da ldr r2, [r3, #28] + 80049f8: 2380 movs r3, #128 @ 0x80 + 80049fa: 021b lsls r3, r3, #8 + 80049fc: 429a cmp r2, r3 + 80049fe: d000 beq.n 8004a02 + 8004a00: e065 b.n 8004ace { switch (clocksource) - 80046de: 231b movs r3, #27 - 80046e0: 18fb adds r3, r7, r3 - 80046e2: 781b ldrb r3, [r3, #0] - 80046e4: 2b08 cmp r3, #8 - 80046e6: d015 beq.n 8004714 - 80046e8: dc18 bgt.n 800471c - 80046ea: 2b04 cmp r3, #4 - 80046ec: d00d beq.n 800470a - 80046ee: dc15 bgt.n 800471c - 80046f0: 2b00 cmp r3, #0 - 80046f2: d002 beq.n 80046fa - 80046f4: 2b02 cmp r3, #2 - 80046f6: d005 beq.n 8004704 - 80046f8: e010 b.n 800471c + 8004a02: 231b movs r3, #27 + 8004a04: 18fb adds r3, r7, r3 + 8004a06: 781b ldrb r3, [r3, #0] + 8004a08: 2b08 cmp r3, #8 + 8004a0a: d015 beq.n 8004a38 + 8004a0c: dc18 bgt.n 8004a40 + 8004a0e: 2b04 cmp r3, #4 + 8004a10: d00d beq.n 8004a2e + 8004a12: dc15 bgt.n 8004a40 + 8004a14: 2b00 cmp r3, #0 + 8004a16: d002 beq.n 8004a1e + 8004a18: 2b02 cmp r3, #2 + 8004a1a: d005 beq.n 8004a28 + 8004a1c: e010 b.n 8004a40 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 80046fa: f7ff fc31 bl 8003f60 - 80046fe: 0003 movs r3, r0 - 8004700: 617b str r3, [r7, #20] + 8004a1e: f7fe fdc9 bl 80035b4 + 8004a22: 0003 movs r3, r0 + 8004a24: 617b str r3, [r7, #20] break; - 8004702: e012 b.n 800472a + 8004a26: e012 b.n 8004a4e case UART_CLOCKSOURCE_HSI: pclk = (uint32_t) HSI_VALUE; - 8004704: 4b64 ldr r3, [pc, #400] @ (8004898 ) - 8004706: 617b str r3, [r7, #20] + 8004a28: 4b64 ldr r3, [pc, #400] @ (8004bbc ) + 8004a2a: 617b str r3, [r7, #20] break; - 8004708: e00f b.n 800472a + 8004a2c: e00f b.n 8004a4e case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 800470a: f7ff fb9d bl 8003e48 - 800470e: 0003 movs r3, r0 - 8004710: 617b str r3, [r7, #20] + 8004a2e: f7fe fd35 bl 800349c + 8004a32: 0003 movs r3, r0 + 8004a34: 617b str r3, [r7, #20] break; - 8004712: e00a b.n 800472a + 8004a36: e00a b.n 8004a4e case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8004714: 2380 movs r3, #128 @ 0x80 - 8004716: 021b lsls r3, r3, #8 - 8004718: 617b str r3, [r7, #20] + 8004a38: 2380 movs r3, #128 @ 0x80 + 8004a3a: 021b lsls r3, r3, #8 + 8004a3c: 617b str r3, [r7, #20] break; - 800471a: e006 b.n 800472a + 8004a3e: e006 b.n 8004a4e default: pclk = 0U; - 800471c: 2300 movs r3, #0 - 800471e: 617b str r3, [r7, #20] + 8004a40: 2300 movs r3, #0 + 8004a42: 617b str r3, [r7, #20] ret = HAL_ERROR; - 8004720: 231a movs r3, #26 - 8004722: 18fb adds r3, r7, r3 - 8004724: 2201 movs r2, #1 - 8004726: 701a strb r2, [r3, #0] + 8004a44: 231a movs r3, #26 + 8004a46: 18fb adds r3, r7, r3 + 8004a48: 2201 movs r2, #1 + 8004a4a: 701a strb r2, [r3, #0] break; - 8004728: 46c0 nop @ (mov r8, r8) + 8004a4c: 46c0 nop @ (mov r8, r8) } /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) - 800472a: 697b ldr r3, [r7, #20] - 800472c: 2b00 cmp r3, #0 - 800472e: d100 bne.n 8004732 - 8004730: e08d b.n 800484e + 8004a4e: 697b ldr r3, [r7, #20] + 8004a50: 2b00 cmp r3, #0 + 8004a52: d100 bne.n 8004a56 + 8004a54: e08d b.n 8004b72 { usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8004732: 687b ldr r3, [r7, #4] - 8004734: 6a5a ldr r2, [r3, #36] @ 0x24 - 8004736: 4b59 ldr r3, [pc, #356] @ (800489c ) - 8004738: 0052 lsls r2, r2, #1 - 800473a: 5ad3 ldrh r3, [r2, r3] - 800473c: 0019 movs r1, r3 - 800473e: 6978 ldr r0, [r7, #20] - 8004740: f7fb fce8 bl 8000114 <__udivsi3> - 8004744: 0003 movs r3, r0 - 8004746: 005a lsls r2, r3, #1 - 8004748: 687b ldr r3, [r7, #4] - 800474a: 685b ldr r3, [r3, #4] - 800474c: 085b lsrs r3, r3, #1 - 800474e: 18d2 adds r2, r2, r3 - 8004750: 687b ldr r3, [r7, #4] - 8004752: 685b ldr r3, [r3, #4] - 8004754: 0019 movs r1, r3 - 8004756: 0010 movs r0, r2 - 8004758: f7fb fcdc bl 8000114 <__udivsi3> - 800475c: 0003 movs r3, r0 - 800475e: 613b str r3, [r7, #16] + 8004a56: 687b ldr r3, [r7, #4] + 8004a58: 6a5a ldr r2, [r3, #36] @ 0x24 + 8004a5a: 4b59 ldr r3, [pc, #356] @ (8004bc0 ) + 8004a5c: 0052 lsls r2, r2, #1 + 8004a5e: 5ad3 ldrh r3, [r2, r3] + 8004a60: 0019 movs r1, r3 + 8004a62: 6978 ldr r0, [r7, #20] + 8004a64: f7fb fb56 bl 8000114 <__udivsi3> + 8004a68: 0003 movs r3, r0 + 8004a6a: 005a lsls r2, r3, #1 + 8004a6c: 687b ldr r3, [r7, #4] + 8004a6e: 685b ldr r3, [r3, #4] + 8004a70: 085b lsrs r3, r3, #1 + 8004a72: 18d2 adds r2, r2, r3 + 8004a74: 687b ldr r3, [r7, #4] + 8004a76: 685b ldr r3, [r3, #4] + 8004a78: 0019 movs r1, r3 + 8004a7a: 0010 movs r0, r2 + 8004a7c: f7fb fb4a bl 8000114 <__udivsi3> + 8004a80: 0003 movs r3, r0 + 8004a82: 613b str r3, [r7, #16] if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8004760: 693b ldr r3, [r7, #16] - 8004762: 2b0f cmp r3, #15 - 8004764: d91c bls.n 80047a0 - 8004766: 693a ldr r2, [r7, #16] - 8004768: 2380 movs r3, #128 @ 0x80 - 800476a: 025b lsls r3, r3, #9 - 800476c: 429a cmp r2, r3 - 800476e: d217 bcs.n 80047a0 + 8004a84: 693b ldr r3, [r7, #16] + 8004a86: 2b0f cmp r3, #15 + 8004a88: d91c bls.n 8004ac4 + 8004a8a: 693a ldr r2, [r7, #16] + 8004a8c: 2380 movs r3, #128 @ 0x80 + 8004a8e: 025b lsls r3, r3, #9 + 8004a90: 429a cmp r2, r3 + 8004a92: d217 bcs.n 8004ac4 { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8004770: 693b ldr r3, [r7, #16] - 8004772: b29a uxth r2, r3 - 8004774: 200e movs r0, #14 - 8004776: 183b adds r3, r7, r0 - 8004778: 210f movs r1, #15 - 800477a: 438a bics r2, r1 - 800477c: 801a strh r2, [r3, #0] + 8004a94: 693b ldr r3, [r7, #16] + 8004a96: b29a uxth r2, r3 + 8004a98: 200e movs r0, #14 + 8004a9a: 183b adds r3, r7, r0 + 8004a9c: 210f movs r1, #15 + 8004a9e: 438a bics r2, r1 + 8004aa0: 801a strh r2, [r3, #0] brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 800477e: 693b ldr r3, [r7, #16] - 8004780: 085b lsrs r3, r3, #1 - 8004782: b29b uxth r3, r3 - 8004784: 2207 movs r2, #7 - 8004786: 4013 ands r3, r2 - 8004788: b299 uxth r1, r3 - 800478a: 183b adds r3, r7, r0 - 800478c: 183a adds r2, r7, r0 - 800478e: 8812 ldrh r2, [r2, #0] - 8004790: 430a orrs r2, r1 - 8004792: 801a strh r2, [r3, #0] + 8004aa2: 693b ldr r3, [r7, #16] + 8004aa4: 085b lsrs r3, r3, #1 + 8004aa6: b29b uxth r3, r3 + 8004aa8: 2207 movs r2, #7 + 8004aaa: 4013 ands r3, r2 + 8004aac: b299 uxth r1, r3 + 8004aae: 183b adds r3, r7, r0 + 8004ab0: 183a adds r2, r7, r0 + 8004ab2: 8812 ldrh r2, [r2, #0] + 8004ab4: 430a orrs r2, r1 + 8004ab6: 801a strh r2, [r3, #0] huart->Instance->BRR = brrtemp; - 8004794: 687b ldr r3, [r7, #4] - 8004796: 681b ldr r3, [r3, #0] - 8004798: 183a adds r2, r7, r0 - 800479a: 8812 ldrh r2, [r2, #0] - 800479c: 60da str r2, [r3, #12] - 800479e: e056 b.n 800484e + 8004ab8: 687b ldr r3, [r7, #4] + 8004aba: 681b ldr r3, [r3, #0] + 8004abc: 183a adds r2, r7, r0 + 8004abe: 8812 ldrh r2, [r2, #0] + 8004ac0: 60da str r2, [r3, #12] + 8004ac2: e056 b.n 8004b72 } else { ret = HAL_ERROR; - 80047a0: 231a movs r3, #26 - 80047a2: 18fb adds r3, r7, r3 - 80047a4: 2201 movs r2, #1 - 80047a6: 701a strb r2, [r3, #0] - 80047a8: e051 b.n 800484e + 8004ac4: 231a movs r3, #26 + 8004ac6: 18fb adds r3, r7, r3 + 8004ac8: 2201 movs r2, #1 + 8004aca: 701a strb r2, [r3, #0] + 8004acc: e051 b.n 8004b72 } } } else { switch (clocksource) - 80047aa: 231b movs r3, #27 - 80047ac: 18fb adds r3, r7, r3 - 80047ae: 781b ldrb r3, [r3, #0] - 80047b0: 2b08 cmp r3, #8 - 80047b2: d015 beq.n 80047e0 - 80047b4: dc18 bgt.n 80047e8 - 80047b6: 2b04 cmp r3, #4 - 80047b8: d00d beq.n 80047d6 - 80047ba: dc15 bgt.n 80047e8 - 80047bc: 2b00 cmp r3, #0 - 80047be: d002 beq.n 80047c6 - 80047c0: 2b02 cmp r3, #2 - 80047c2: d005 beq.n 80047d0 - 80047c4: e010 b.n 80047e8 + 8004ace: 231b movs r3, #27 + 8004ad0: 18fb adds r3, r7, r3 + 8004ad2: 781b ldrb r3, [r3, #0] + 8004ad4: 2b08 cmp r3, #8 + 8004ad6: d015 beq.n 8004b04 + 8004ad8: dc18 bgt.n 8004b0c + 8004ada: 2b04 cmp r3, #4 + 8004adc: d00d beq.n 8004afa + 8004ade: dc15 bgt.n 8004b0c + 8004ae0: 2b00 cmp r3, #0 + 8004ae2: d002 beq.n 8004aea + 8004ae4: 2b02 cmp r3, #2 + 8004ae6: d005 beq.n 8004af4 + 8004ae8: e010 b.n 8004b0c { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 80047c6: f7ff fbcb bl 8003f60 - 80047ca: 0003 movs r3, r0 - 80047cc: 617b str r3, [r7, #20] + 8004aea: f7fe fd63 bl 80035b4 + 8004aee: 0003 movs r3, r0 + 8004af0: 617b str r3, [r7, #20] break; - 80047ce: e012 b.n 80047f6 + 8004af2: e012 b.n 8004b1a case UART_CLOCKSOURCE_HSI: pclk = (uint32_t) HSI_VALUE; - 80047d0: 4b31 ldr r3, [pc, #196] @ (8004898 ) - 80047d2: 617b str r3, [r7, #20] + 8004af4: 4b31 ldr r3, [pc, #196] @ (8004bbc ) + 8004af6: 617b str r3, [r7, #20] break; - 80047d4: e00f b.n 80047f6 + 8004af8: e00f b.n 8004b1a case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 80047d6: f7ff fb37 bl 8003e48 - 80047da: 0003 movs r3, r0 - 80047dc: 617b str r3, [r7, #20] + 8004afa: f7fe fccf bl 800349c + 8004afe: 0003 movs r3, r0 + 8004b00: 617b str r3, [r7, #20] break; - 80047de: e00a b.n 80047f6 + 8004b02: e00a b.n 8004b1a case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 80047e0: 2380 movs r3, #128 @ 0x80 - 80047e2: 021b lsls r3, r3, #8 - 80047e4: 617b str r3, [r7, #20] + 8004b04: 2380 movs r3, #128 @ 0x80 + 8004b06: 021b lsls r3, r3, #8 + 8004b08: 617b str r3, [r7, #20] break; - 80047e6: e006 b.n 80047f6 + 8004b0a: e006 b.n 8004b1a default: pclk = 0U; - 80047e8: 2300 movs r3, #0 - 80047ea: 617b str r3, [r7, #20] + 8004b0c: 2300 movs r3, #0 + 8004b0e: 617b str r3, [r7, #20] ret = HAL_ERROR; - 80047ec: 231a movs r3, #26 - 80047ee: 18fb adds r3, r7, r3 - 80047f0: 2201 movs r2, #1 - 80047f2: 701a strb r2, [r3, #0] + 8004b10: 231a movs r3, #26 + 8004b12: 18fb adds r3, r7, r3 + 8004b14: 2201 movs r2, #1 + 8004b16: 701a strb r2, [r3, #0] break; - 80047f4: 46c0 nop @ (mov r8, r8) + 8004b18: 46c0 nop @ (mov r8, r8) } if (pclk != 0U) - 80047f6: 697b ldr r3, [r7, #20] - 80047f8: 2b00 cmp r3, #0 - 80047fa: d028 beq.n 800484e + 8004b1a: 697b ldr r3, [r7, #20] + 8004b1c: 2b00 cmp r3, #0 + 8004b1e: d028 beq.n 8004b72 { /* USARTDIV must be greater than or equal to 0d16 */ usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 80047fc: 687b ldr r3, [r7, #4] - 80047fe: 6a5a ldr r2, [r3, #36] @ 0x24 - 8004800: 4b26 ldr r3, [pc, #152] @ (800489c ) - 8004802: 0052 lsls r2, r2, #1 - 8004804: 5ad3 ldrh r3, [r2, r3] - 8004806: 0019 movs r1, r3 - 8004808: 6978 ldr r0, [r7, #20] - 800480a: f7fb fc83 bl 8000114 <__udivsi3> - 800480e: 0003 movs r3, r0 - 8004810: 001a movs r2, r3 - 8004812: 687b ldr r3, [r7, #4] - 8004814: 685b ldr r3, [r3, #4] - 8004816: 085b lsrs r3, r3, #1 - 8004818: 18d2 adds r2, r2, r3 - 800481a: 687b ldr r3, [r7, #4] - 800481c: 685b ldr r3, [r3, #4] - 800481e: 0019 movs r1, r3 - 8004820: 0010 movs r0, r2 - 8004822: f7fb fc77 bl 8000114 <__udivsi3> - 8004826: 0003 movs r3, r0 - 8004828: 613b str r3, [r7, #16] + 8004b20: 687b ldr r3, [r7, #4] + 8004b22: 6a5a ldr r2, [r3, #36] @ 0x24 + 8004b24: 4b26 ldr r3, [pc, #152] @ (8004bc0 ) + 8004b26: 0052 lsls r2, r2, #1 + 8004b28: 5ad3 ldrh r3, [r2, r3] + 8004b2a: 0019 movs r1, r3 + 8004b2c: 6978 ldr r0, [r7, #20] + 8004b2e: f7fb faf1 bl 8000114 <__udivsi3> + 8004b32: 0003 movs r3, r0 + 8004b34: 001a movs r2, r3 + 8004b36: 687b ldr r3, [r7, #4] + 8004b38: 685b ldr r3, [r3, #4] + 8004b3a: 085b lsrs r3, r3, #1 + 8004b3c: 18d2 adds r2, r2, r3 + 8004b3e: 687b ldr r3, [r7, #4] + 8004b40: 685b ldr r3, [r3, #4] + 8004b42: 0019 movs r1, r3 + 8004b44: 0010 movs r0, r2 + 8004b46: f7fb fae5 bl 8000114 <__udivsi3> + 8004b4a: 0003 movs r3, r0 + 8004b4c: 613b str r3, [r7, #16] if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 800482a: 693b ldr r3, [r7, #16] - 800482c: 2b0f cmp r3, #15 - 800482e: d90a bls.n 8004846 - 8004830: 693a ldr r2, [r7, #16] - 8004832: 2380 movs r3, #128 @ 0x80 - 8004834: 025b lsls r3, r3, #9 - 8004836: 429a cmp r2, r3 - 8004838: d205 bcs.n 8004846 + 8004b4e: 693b ldr r3, [r7, #16] + 8004b50: 2b0f cmp r3, #15 + 8004b52: d90a bls.n 8004b6a + 8004b54: 693a ldr r2, [r7, #16] + 8004b56: 2380 movs r3, #128 @ 0x80 + 8004b58: 025b lsls r3, r3, #9 + 8004b5a: 429a cmp r2, r3 + 8004b5c: d205 bcs.n 8004b6a { huart->Instance->BRR = (uint16_t)usartdiv; - 800483a: 693b ldr r3, [r7, #16] - 800483c: b29a uxth r2, r3 - 800483e: 687b ldr r3, [r7, #4] - 8004840: 681b ldr r3, [r3, #0] - 8004842: 60da str r2, [r3, #12] - 8004844: e003 b.n 800484e + 8004b5e: 693b ldr r3, [r7, #16] + 8004b60: b29a uxth r2, r3 + 8004b62: 687b ldr r3, [r7, #4] + 8004b64: 681b ldr r3, [r3, #0] + 8004b66: 60da str r2, [r3, #12] + 8004b68: e003 b.n 8004b72 } else { ret = HAL_ERROR; - 8004846: 231a movs r3, #26 - 8004848: 18fb adds r3, r7, r3 - 800484a: 2201 movs r2, #1 - 800484c: 701a strb r2, [r3, #0] + 8004b6a: 231a movs r3, #26 + 8004b6c: 18fb adds r3, r7, r3 + 8004b6e: 2201 movs r2, #1 + 8004b70: 701a strb r2, [r3, #0] } } } /* Initialize the number of data to process during RX/TX ISR execution */ huart->NbTxDataToProcess = 1; - 800484e: 687b ldr r3, [r7, #4] - 8004850: 226a movs r2, #106 @ 0x6a - 8004852: 2101 movs r1, #1 - 8004854: 5299 strh r1, [r3, r2] + 8004b72: 687b ldr r3, [r7, #4] + 8004b74: 226a movs r2, #106 @ 0x6a + 8004b76: 2101 movs r1, #1 + 8004b78: 5299 strh r1, [r3, r2] huart->NbRxDataToProcess = 1; - 8004856: 687b ldr r3, [r7, #4] - 8004858: 2268 movs r2, #104 @ 0x68 - 800485a: 2101 movs r1, #1 - 800485c: 5299 strh r1, [r3, r2] + 8004b7a: 687b ldr r3, [r7, #4] + 8004b7c: 2268 movs r2, #104 @ 0x68 + 8004b7e: 2101 movs r1, #1 + 8004b80: 5299 strh r1, [r3, r2] /* Clear ISR function pointers */ huart->RxISR = NULL; - 800485e: 687b ldr r3, [r7, #4] - 8004860: 2200 movs r2, #0 - 8004862: 675a str r2, [r3, #116] @ 0x74 + 8004b82: 687b ldr r3, [r7, #4] + 8004b84: 2200 movs r2, #0 + 8004b86: 675a str r2, [r3, #116] @ 0x74 huart->TxISR = NULL; - 8004864: 687b ldr r3, [r7, #4] - 8004866: 2200 movs r2, #0 - 8004868: 679a str r2, [r3, #120] @ 0x78 + 8004b88: 687b ldr r3, [r7, #4] + 8004b8a: 2200 movs r2, #0 + 8004b8c: 679a str r2, [r3, #120] @ 0x78 return ret; - 800486a: 231a movs r3, #26 - 800486c: 18fb adds r3, r7, r3 - 800486e: 781b ldrb r3, [r3, #0] + 8004b8e: 231a movs r3, #26 + 8004b90: 18fb adds r3, r7, r3 + 8004b92: 781b ldrb r3, [r3, #0] } - 8004870: 0018 movs r0, r3 - 8004872: 46bd mov sp, r7 - 8004874: b008 add sp, #32 - 8004876: bd80 pop {r7, pc} - 8004878: cfff69f3 .word 0xcfff69f3 - 800487c: ffffcfff .word 0xffffcfff - 8004880: 11fff4ff .word 0x11fff4ff - 8004884: 40013800 .word 0x40013800 - 8004888: 40021000 .word 0x40021000 - 800488c: 40004400 .word 0x40004400 - 8004890: 40004800 .word 0x40004800 - 8004894: 40004c00 .word 0x40004c00 - 8004898: 00f42400 .word 0x00f42400 - 800489c: 08005f80 .word 0x08005f80 + 8004b94: 0018 movs r0, r3 + 8004b96: 46bd mov sp, r7 + 8004b98: b008 add sp, #32 + 8004b9a: bd80 pop {r7, pc} + 8004b9c: cfff69f3 .word 0xcfff69f3 + 8004ba0: ffffcfff .word 0xffffcfff + 8004ba4: 11fff4ff .word 0x11fff4ff + 8004ba8: 40013800 .word 0x40013800 + 8004bac: 40021000 .word 0x40021000 + 8004bb0: 40004400 .word 0x40004400 + 8004bb4: 40004800 .word 0x40004800 + 8004bb8: 40004c00 .word 0x40004c00 + 8004bbc: 00f42400 .word 0x00f42400 + 8004bc0: 080062a0 .word 0x080062a0 -080048a0 : +08004bc4 : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { - 80048a0: b580 push {r7, lr} - 80048a2: b082 sub sp, #8 - 80048a4: af00 add r7, sp, #0 - 80048a6: 6078 str r0, [r7, #4] + 8004bc4: b580 push {r7, lr} + 8004bc6: b082 sub sp, #8 + 8004bc8: af00 add r7, sp, #0 + 8004bca: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 80048a8: 687b ldr r3, [r7, #4] - 80048aa: 6a9b ldr r3, [r3, #40] @ 0x28 - 80048ac: 2208 movs r2, #8 - 80048ae: 4013 ands r3, r2 - 80048b0: d00b beq.n 80048ca + 8004bcc: 687b ldr r3, [r7, #4] + 8004bce: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004bd0: 2208 movs r2, #8 + 8004bd2: 4013 ands r3, r2 + 8004bd4: d00b beq.n 8004bee { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 80048b2: 687b ldr r3, [r7, #4] - 80048b4: 681b ldr r3, [r3, #0] - 80048b6: 685b ldr r3, [r3, #4] - 80048b8: 4a4a ldr r2, [pc, #296] @ (80049e4 ) - 80048ba: 4013 ands r3, r2 - 80048bc: 0019 movs r1, r3 - 80048be: 687b ldr r3, [r7, #4] - 80048c0: 6b9a ldr r2, [r3, #56] @ 0x38 - 80048c2: 687b ldr r3, [r7, #4] - 80048c4: 681b ldr r3, [r3, #0] - 80048c6: 430a orrs r2, r1 - 80048c8: 605a str r2, [r3, #4] + 8004bd6: 687b ldr r3, [r7, #4] + 8004bd8: 681b ldr r3, [r3, #0] + 8004bda: 685b ldr r3, [r3, #4] + 8004bdc: 4a4a ldr r2, [pc, #296] @ (8004d08 ) + 8004bde: 4013 ands r3, r2 + 8004be0: 0019 movs r1, r3 + 8004be2: 687b ldr r3, [r7, #4] + 8004be4: 6b9a ldr r2, [r3, #56] @ 0x38 + 8004be6: 687b ldr r3, [r7, #4] + 8004be8: 681b ldr r3, [r3, #0] + 8004bea: 430a orrs r2, r1 + 8004bec: 605a str r2, [r3, #4] } /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 80048ca: 687b ldr r3, [r7, #4] - 80048cc: 6a9b ldr r3, [r3, #40] @ 0x28 - 80048ce: 2201 movs r2, #1 - 80048d0: 4013 ands r3, r2 - 80048d2: d00b beq.n 80048ec + 8004bee: 687b ldr r3, [r7, #4] + 8004bf0: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004bf2: 2201 movs r2, #1 + 8004bf4: 4013 ands r3, r2 + 8004bf6: d00b beq.n 8004c10 { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 80048d4: 687b ldr r3, [r7, #4] - 80048d6: 681b ldr r3, [r3, #0] - 80048d8: 685b ldr r3, [r3, #4] - 80048da: 4a43 ldr r2, [pc, #268] @ (80049e8 ) - 80048dc: 4013 ands r3, r2 - 80048de: 0019 movs r1, r3 - 80048e0: 687b ldr r3, [r7, #4] - 80048e2: 6ada ldr r2, [r3, #44] @ 0x2c - 80048e4: 687b ldr r3, [r7, #4] - 80048e6: 681b ldr r3, [r3, #0] - 80048e8: 430a orrs r2, r1 - 80048ea: 605a str r2, [r3, #4] + 8004bf8: 687b ldr r3, [r7, #4] + 8004bfa: 681b ldr r3, [r3, #0] + 8004bfc: 685b ldr r3, [r3, #4] + 8004bfe: 4a43 ldr r2, [pc, #268] @ (8004d0c ) + 8004c00: 4013 ands r3, r2 + 8004c02: 0019 movs r1, r3 + 8004c04: 687b ldr r3, [r7, #4] + 8004c06: 6ada ldr r2, [r3, #44] @ 0x2c + 8004c08: 687b ldr r3, [r7, #4] + 8004c0a: 681b ldr r3, [r3, #0] + 8004c0c: 430a orrs r2, r1 + 8004c0e: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 80048ec: 687b ldr r3, [r7, #4] - 80048ee: 6a9b ldr r3, [r3, #40] @ 0x28 - 80048f0: 2202 movs r2, #2 - 80048f2: 4013 ands r3, r2 - 80048f4: d00b beq.n 800490e + 8004c10: 687b ldr r3, [r7, #4] + 8004c12: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004c14: 2202 movs r2, #2 + 8004c16: 4013 ands r3, r2 + 8004c18: d00b beq.n 8004c32 { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 80048f6: 687b ldr r3, [r7, #4] - 80048f8: 681b ldr r3, [r3, #0] - 80048fa: 685b ldr r3, [r3, #4] - 80048fc: 4a3b ldr r2, [pc, #236] @ (80049ec ) - 80048fe: 4013 ands r3, r2 - 8004900: 0019 movs r1, r3 - 8004902: 687b ldr r3, [r7, #4] - 8004904: 6b1a ldr r2, [r3, #48] @ 0x30 - 8004906: 687b ldr r3, [r7, #4] - 8004908: 681b ldr r3, [r3, #0] - 800490a: 430a orrs r2, r1 - 800490c: 605a str r2, [r3, #4] + 8004c1a: 687b ldr r3, [r7, #4] + 8004c1c: 681b ldr r3, [r3, #0] + 8004c1e: 685b ldr r3, [r3, #4] + 8004c20: 4a3b ldr r2, [pc, #236] @ (8004d10 ) + 8004c22: 4013 ands r3, r2 + 8004c24: 0019 movs r1, r3 + 8004c26: 687b ldr r3, [r7, #4] + 8004c28: 6b1a ldr r2, [r3, #48] @ 0x30 + 8004c2a: 687b ldr r3, [r7, #4] + 8004c2c: 681b ldr r3, [r3, #0] + 8004c2e: 430a orrs r2, r1 + 8004c30: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 800490e: 687b ldr r3, [r7, #4] - 8004910: 6a9b ldr r3, [r3, #40] @ 0x28 - 8004912: 2204 movs r2, #4 - 8004914: 4013 ands r3, r2 - 8004916: d00b beq.n 8004930 + 8004c32: 687b ldr r3, [r7, #4] + 8004c34: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004c36: 2204 movs r2, #4 + 8004c38: 4013 ands r3, r2 + 8004c3a: d00b beq.n 8004c54 { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 8004918: 687b ldr r3, [r7, #4] - 800491a: 681b ldr r3, [r3, #0] - 800491c: 685b ldr r3, [r3, #4] - 800491e: 4a34 ldr r2, [pc, #208] @ (80049f0 ) - 8004920: 4013 ands r3, r2 - 8004922: 0019 movs r1, r3 - 8004924: 687b ldr r3, [r7, #4] - 8004926: 6b5a ldr r2, [r3, #52] @ 0x34 - 8004928: 687b ldr r3, [r7, #4] - 800492a: 681b ldr r3, [r3, #0] - 800492c: 430a orrs r2, r1 - 800492e: 605a str r2, [r3, #4] + 8004c3c: 687b ldr r3, [r7, #4] + 8004c3e: 681b ldr r3, [r3, #0] + 8004c40: 685b ldr r3, [r3, #4] + 8004c42: 4a34 ldr r2, [pc, #208] @ (8004d14 ) + 8004c44: 4013 ands r3, r2 + 8004c46: 0019 movs r1, r3 + 8004c48: 687b ldr r3, [r7, #4] + 8004c4a: 6b5a ldr r2, [r3, #52] @ 0x34 + 8004c4c: 687b ldr r3, [r7, #4] + 8004c4e: 681b ldr r3, [r3, #0] + 8004c50: 430a orrs r2, r1 + 8004c52: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 8004930: 687b ldr r3, [r7, #4] - 8004932: 6a9b ldr r3, [r3, #40] @ 0x28 - 8004934: 2210 movs r2, #16 - 8004936: 4013 ands r3, r2 - 8004938: d00b beq.n 8004952 + 8004c54: 687b ldr r3, [r7, #4] + 8004c56: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004c58: 2210 movs r2, #16 + 8004c5a: 4013 ands r3, r2 + 8004c5c: d00b beq.n 8004c76 { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 800493a: 687b ldr r3, [r7, #4] - 800493c: 681b ldr r3, [r3, #0] - 800493e: 689b ldr r3, [r3, #8] - 8004940: 4a2c ldr r2, [pc, #176] @ (80049f4 ) - 8004942: 4013 ands r3, r2 - 8004944: 0019 movs r1, r3 - 8004946: 687b ldr r3, [r7, #4] - 8004948: 6bda ldr r2, [r3, #60] @ 0x3c - 800494a: 687b ldr r3, [r7, #4] - 800494c: 681b ldr r3, [r3, #0] - 800494e: 430a orrs r2, r1 - 8004950: 609a str r2, [r3, #8] + 8004c5e: 687b ldr r3, [r7, #4] + 8004c60: 681b ldr r3, [r3, #0] + 8004c62: 689b ldr r3, [r3, #8] + 8004c64: 4a2c ldr r2, [pc, #176] @ (8004d18 ) + 8004c66: 4013 ands r3, r2 + 8004c68: 0019 movs r1, r3 + 8004c6a: 687b ldr r3, [r7, #4] + 8004c6c: 6bda ldr r2, [r3, #60] @ 0x3c + 8004c6e: 687b ldr r3, [r7, #4] + 8004c70: 681b ldr r3, [r3, #0] + 8004c72: 430a orrs r2, r1 + 8004c74: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 8004952: 687b ldr r3, [r7, #4] - 8004954: 6a9b ldr r3, [r3, #40] @ 0x28 - 8004956: 2220 movs r2, #32 - 8004958: 4013 ands r3, r2 - 800495a: d00b beq.n 8004974 + 8004c76: 687b ldr r3, [r7, #4] + 8004c78: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004c7a: 2220 movs r2, #32 + 8004c7c: 4013 ands r3, r2 + 8004c7e: d00b beq.n 8004c98 { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 800495c: 687b ldr r3, [r7, #4] - 800495e: 681b ldr r3, [r3, #0] - 8004960: 689b ldr r3, [r3, #8] - 8004962: 4a25 ldr r2, [pc, #148] @ (80049f8 ) - 8004964: 4013 ands r3, r2 - 8004966: 0019 movs r1, r3 - 8004968: 687b ldr r3, [r7, #4] - 800496a: 6c1a ldr r2, [r3, #64] @ 0x40 - 800496c: 687b ldr r3, [r7, #4] - 800496e: 681b ldr r3, [r3, #0] - 8004970: 430a orrs r2, r1 - 8004972: 609a str r2, [r3, #8] + 8004c80: 687b ldr r3, [r7, #4] + 8004c82: 681b ldr r3, [r3, #0] + 8004c84: 689b ldr r3, [r3, #8] + 8004c86: 4a25 ldr r2, [pc, #148] @ (8004d1c ) + 8004c88: 4013 ands r3, r2 + 8004c8a: 0019 movs r1, r3 + 8004c8c: 687b ldr r3, [r7, #4] + 8004c8e: 6c1a ldr r2, [r3, #64] @ 0x40 + 8004c90: 687b ldr r3, [r7, #4] + 8004c92: 681b ldr r3, [r3, #0] + 8004c94: 430a orrs r2, r1 + 8004c96: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 8004974: 687b ldr r3, [r7, #4] - 8004976: 6a9b ldr r3, [r3, #40] @ 0x28 - 8004978: 2240 movs r2, #64 @ 0x40 - 800497a: 4013 ands r3, r2 - 800497c: d01d beq.n 80049ba + 8004c98: 687b ldr r3, [r7, #4] + 8004c9a: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004c9c: 2240 movs r2, #64 @ 0x40 + 8004c9e: 4013 ands r3, r2 + 8004ca0: d01d beq.n 8004cde { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 800497e: 687b ldr r3, [r7, #4] - 8004980: 681b ldr r3, [r3, #0] - 8004982: 685b ldr r3, [r3, #4] - 8004984: 4a1d ldr r2, [pc, #116] @ (80049fc ) - 8004986: 4013 ands r3, r2 - 8004988: 0019 movs r1, r3 - 800498a: 687b ldr r3, [r7, #4] - 800498c: 6c5a ldr r2, [r3, #68] @ 0x44 - 800498e: 687b ldr r3, [r7, #4] - 8004990: 681b ldr r3, [r3, #0] - 8004992: 430a orrs r2, r1 - 8004994: 605a str r2, [r3, #4] + 8004ca2: 687b ldr r3, [r7, #4] + 8004ca4: 681b ldr r3, [r3, #0] + 8004ca6: 685b ldr r3, [r3, #4] + 8004ca8: 4a1d ldr r2, [pc, #116] @ (8004d20 ) + 8004caa: 4013 ands r3, r2 + 8004cac: 0019 movs r1, r3 + 8004cae: 687b ldr r3, [r7, #4] + 8004cb0: 6c5a ldr r2, [r3, #68] @ 0x44 + 8004cb2: 687b ldr r3, [r7, #4] + 8004cb4: 681b ldr r3, [r3, #0] + 8004cb6: 430a orrs r2, r1 + 8004cb8: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 8004996: 687b ldr r3, [r7, #4] - 8004998: 6c5a ldr r2, [r3, #68] @ 0x44 - 800499a: 2380 movs r3, #128 @ 0x80 - 800499c: 035b lsls r3, r3, #13 - 800499e: 429a cmp r2, r3 - 80049a0: d10b bne.n 80049ba + 8004cba: 687b ldr r3, [r7, #4] + 8004cbc: 6c5a ldr r2, [r3, #68] @ 0x44 + 8004cbe: 2380 movs r3, #128 @ 0x80 + 8004cc0: 035b lsls r3, r3, #13 + 8004cc2: 429a cmp r2, r3 + 8004cc4: d10b bne.n 8004cde { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 80049a2: 687b ldr r3, [r7, #4] - 80049a4: 681b ldr r3, [r3, #0] - 80049a6: 685b ldr r3, [r3, #4] - 80049a8: 4a15 ldr r2, [pc, #84] @ (8004a00 ) - 80049aa: 4013 ands r3, r2 - 80049ac: 0019 movs r1, r3 - 80049ae: 687b ldr r3, [r7, #4] - 80049b0: 6c9a ldr r2, [r3, #72] @ 0x48 - 80049b2: 687b ldr r3, [r7, #4] - 80049b4: 681b ldr r3, [r3, #0] - 80049b6: 430a orrs r2, r1 - 80049b8: 605a str r2, [r3, #4] + 8004cc6: 687b ldr r3, [r7, #4] + 8004cc8: 681b ldr r3, [r3, #0] + 8004cca: 685b ldr r3, [r3, #4] + 8004ccc: 4a15 ldr r2, [pc, #84] @ (8004d24 ) + 8004cce: 4013 ands r3, r2 + 8004cd0: 0019 movs r1, r3 + 8004cd2: 687b ldr r3, [r7, #4] + 8004cd4: 6c9a ldr r2, [r3, #72] @ 0x48 + 8004cd6: 687b ldr r3, [r7, #4] + 8004cd8: 681b ldr r3, [r3, #0] + 8004cda: 430a orrs r2, r1 + 8004cdc: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 80049ba: 687b ldr r3, [r7, #4] - 80049bc: 6a9b ldr r3, [r3, #40] @ 0x28 - 80049be: 2280 movs r2, #128 @ 0x80 - 80049c0: 4013 ands r3, r2 - 80049c2: d00b beq.n 80049dc + 8004cde: 687b ldr r3, [r7, #4] + 8004ce0: 6a9b ldr r3, [r3, #40] @ 0x28 + 8004ce2: 2280 movs r2, #128 @ 0x80 + 8004ce4: 4013 ands r3, r2 + 8004ce6: d00b beq.n 8004d00 { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 80049c4: 687b ldr r3, [r7, #4] - 80049c6: 681b ldr r3, [r3, #0] - 80049c8: 685b ldr r3, [r3, #4] - 80049ca: 4a0e ldr r2, [pc, #56] @ (8004a04 ) - 80049cc: 4013 ands r3, r2 - 80049ce: 0019 movs r1, r3 - 80049d0: 687b ldr r3, [r7, #4] - 80049d2: 6cda ldr r2, [r3, #76] @ 0x4c - 80049d4: 687b ldr r3, [r7, #4] - 80049d6: 681b ldr r3, [r3, #0] - 80049d8: 430a orrs r2, r1 - 80049da: 605a str r2, [r3, #4] + 8004ce8: 687b ldr r3, [r7, #4] + 8004cea: 681b ldr r3, [r3, #0] + 8004cec: 685b ldr r3, [r3, #4] + 8004cee: 4a0e ldr r2, [pc, #56] @ (8004d28 ) + 8004cf0: 4013 ands r3, r2 + 8004cf2: 0019 movs r1, r3 + 8004cf4: 687b ldr r3, [r7, #4] + 8004cf6: 6cda ldr r2, [r3, #76] @ 0x4c + 8004cf8: 687b ldr r3, [r7, #4] + 8004cfa: 681b ldr r3, [r3, #0] + 8004cfc: 430a orrs r2, r1 + 8004cfe: 605a str r2, [r3, #4] } } - 80049dc: 46c0 nop @ (mov r8, r8) - 80049de: 46bd mov sp, r7 - 80049e0: b002 add sp, #8 - 80049e2: bd80 pop {r7, pc} - 80049e4: ffff7fff .word 0xffff7fff - 80049e8: fffdffff .word 0xfffdffff - 80049ec: fffeffff .word 0xfffeffff - 80049f0: fffbffff .word 0xfffbffff - 80049f4: ffffefff .word 0xffffefff - 80049f8: ffffdfff .word 0xffffdfff - 80049fc: ffefffff .word 0xffefffff - 8004a00: ff9fffff .word 0xff9fffff - 8004a04: fff7ffff .word 0xfff7ffff + 8004d00: 46c0 nop @ (mov r8, r8) + 8004d02: 46bd mov sp, r7 + 8004d04: b002 add sp, #8 + 8004d06: bd80 pop {r7, pc} + 8004d08: ffff7fff .word 0xffff7fff + 8004d0c: fffdffff .word 0xfffdffff + 8004d10: fffeffff .word 0xfffeffff + 8004d14: fffbffff .word 0xfffbffff + 8004d18: ffffefff .word 0xffffefff + 8004d1c: ffffdfff .word 0xffffdfff + 8004d20: ffefffff .word 0xffefffff + 8004d24: ff9fffff .word 0xff9fffff + 8004d28: fff7ffff .word 0xfff7ffff -08004a08 : +08004d2c : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { - 8004a08: b580 push {r7, lr} - 8004a0a: b092 sub sp, #72 @ 0x48 - 8004a0c: af02 add r7, sp, #8 - 8004a0e: 6078 str r0, [r7, #4] + 8004d2c: b580 push {r7, lr} + 8004d2e: b092 sub sp, #72 @ 0x48 + 8004d30: af02 add r7, sp, #8 + 8004d32: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004a10: 687b ldr r3, [r7, #4] - 8004a12: 2290 movs r2, #144 @ 0x90 - 8004a14: 2100 movs r1, #0 - 8004a16: 5099 str r1, [r3, r2] + 8004d34: 687b ldr r3, [r7, #4] + 8004d36: 2290 movs r2, #144 @ 0x90 + 8004d38: 2100 movs r1, #0 + 8004d3a: 5099 str r1, [r3, r2] /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8004a18: f7fc fd88 bl 800152c - 8004a1c: 0003 movs r3, r0 - 8004a1e: 63fb str r3, [r7, #60] @ 0x3c + 8004d3c: f7fc fc96 bl 800166c + 8004d40: 0003 movs r3, r0 + 8004d42: 63fb str r3, [r7, #60] @ 0x3c /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 8004a20: 687b ldr r3, [r7, #4] - 8004a22: 681b ldr r3, [r3, #0] - 8004a24: 681b ldr r3, [r3, #0] - 8004a26: 2208 movs r2, #8 - 8004a28: 4013 ands r3, r2 - 8004a2a: 2b08 cmp r3, #8 - 8004a2c: d12d bne.n 8004a8a + 8004d44: 687b ldr r3, [r7, #4] + 8004d46: 681b ldr r3, [r3, #0] + 8004d48: 681b ldr r3, [r3, #0] + 8004d4a: 2208 movs r2, #8 + 8004d4c: 4013 ands r3, r2 + 8004d4e: 2b08 cmp r3, #8 + 8004d50: d12d bne.n 8004dae { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8004a2e: 6bfb ldr r3, [r7, #60] @ 0x3c - 8004a30: 2280 movs r2, #128 @ 0x80 - 8004a32: 0391 lsls r1, r2, #14 - 8004a34: 6878 ldr r0, [r7, #4] - 8004a36: 4a47 ldr r2, [pc, #284] @ (8004b54 ) - 8004a38: 9200 str r2, [sp, #0] - 8004a3a: 2200 movs r2, #0 - 8004a3c: f000 f88e bl 8004b5c - 8004a40: 1e03 subs r3, r0, #0 - 8004a42: d022 beq.n 8004a8a + 8004d52: 6bfb ldr r3, [r7, #60] @ 0x3c + 8004d54: 2280 movs r2, #128 @ 0x80 + 8004d56: 0391 lsls r1, r2, #14 + 8004d58: 6878 ldr r0, [r7, #4] + 8004d5a: 4a47 ldr r2, [pc, #284] @ (8004e78 ) + 8004d5c: 9200 str r2, [sp, #0] + 8004d5e: 2200 movs r2, #0 + 8004d60: f000 f88e bl 8004e80 + 8004d64: 1e03 subs r3, r0, #0 + 8004d66: d022 beq.n 8004dae */ __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) { uint32_t result; __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004a44: f3ef 8310 mrs r3, PRIMASK - 8004a48: 627b str r3, [r7, #36] @ 0x24 + 8004d68: f3ef 8310 mrs r3, PRIMASK + 8004d6c: 627b str r3, [r7, #36] @ 0x24 return(result); - 8004a4a: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004d6e: 6a7b ldr r3, [r7, #36] @ 0x24 { /* Disable TXE interrupt for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE)); - 8004a4c: 63bb str r3, [r7, #56] @ 0x38 - 8004a4e: 2301 movs r3, #1 - 8004a50: 62bb str r3, [r7, #40] @ 0x28 + 8004d70: 63bb str r3, [r7, #56] @ 0x38 + 8004d72: 2301 movs r3, #1 + 8004d74: 62bb str r3, [r7, #40] @ 0x28 \details Assigns the given value to the Priority Mask Register. \param [in] priMask Priority Mask */ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) { __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004a52: 6abb ldr r3, [r7, #40] @ 0x28 - 8004a54: f383 8810 msr PRIMASK, r3 + 8004d76: 6abb ldr r3, [r7, #40] @ 0x28 + 8004d78: f383 8810 msr PRIMASK, r3 } - 8004a58: 46c0 nop @ (mov r8, r8) - 8004a5a: 687b ldr r3, [r7, #4] - 8004a5c: 681b ldr r3, [r3, #0] - 8004a5e: 681a ldr r2, [r3, #0] - 8004a60: 687b ldr r3, [r7, #4] - 8004a62: 681b ldr r3, [r3, #0] - 8004a64: 2180 movs r1, #128 @ 0x80 - 8004a66: 438a bics r2, r1 - 8004a68: 601a str r2, [r3, #0] - 8004a6a: 6bbb ldr r3, [r7, #56] @ 0x38 - 8004a6c: 62fb str r3, [r7, #44] @ 0x2c + 8004d7c: 46c0 nop @ (mov r8, r8) + 8004d7e: 687b ldr r3, [r7, #4] + 8004d80: 681b ldr r3, [r3, #0] + 8004d82: 681a ldr r2, [r3, #0] + 8004d84: 687b ldr r3, [r7, #4] + 8004d86: 681b ldr r3, [r3, #0] + 8004d88: 2180 movs r1, #128 @ 0x80 + 8004d8a: 438a bics r2, r1 + 8004d8c: 601a str r2, [r3, #0] + 8004d8e: 6bbb ldr r3, [r7, #56] @ 0x38 + 8004d90: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004a6e: 6afb ldr r3, [r7, #44] @ 0x2c - 8004a70: f383 8810 msr PRIMASK, r3 + 8004d92: 6afb ldr r3, [r7, #44] @ 0x2c + 8004d94: f383 8810 msr PRIMASK, r3 } - 8004a74: 46c0 nop @ (mov r8, r8) + 8004d98: 46c0 nop @ (mov r8, r8) huart->gState = HAL_UART_STATE_READY; - 8004a76: 687b ldr r3, [r7, #4] - 8004a78: 2288 movs r2, #136 @ 0x88 - 8004a7a: 2120 movs r1, #32 - 8004a7c: 5099 str r1, [r3, r2] + 8004d9a: 687b ldr r3, [r7, #4] + 8004d9c: 2288 movs r2, #136 @ 0x88 + 8004d9e: 2120 movs r1, #32 + 8004da0: 5099 str r1, [r3, r2] __HAL_UNLOCK(huart); - 8004a7e: 687b ldr r3, [r7, #4] - 8004a80: 2284 movs r2, #132 @ 0x84 - 8004a82: 2100 movs r1, #0 - 8004a84: 5499 strb r1, [r3, r2] + 8004da2: 687b ldr r3, [r7, #4] + 8004da4: 2284 movs r2, #132 @ 0x84 + 8004da6: 2100 movs r1, #0 + 8004da8: 5499 strb r1, [r3, r2] /* Timeout occurred */ return HAL_TIMEOUT; - 8004a86: 2303 movs r3, #3 - 8004a88: e060 b.n 8004b4c + 8004daa: 2303 movs r3, #3 + 8004dac: e060 b.n 8004e70 } } /* Check if the Receiver is enabled */ if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - 8004a8a: 687b ldr r3, [r7, #4] - 8004a8c: 681b ldr r3, [r3, #0] - 8004a8e: 681b ldr r3, [r3, #0] - 8004a90: 2204 movs r2, #4 - 8004a92: 4013 ands r3, r2 - 8004a94: 2b04 cmp r3, #4 - 8004a96: d146 bne.n 8004b26 + 8004dae: 687b ldr r3, [r7, #4] + 8004db0: 681b ldr r3, [r3, #0] + 8004db2: 681b ldr r3, [r3, #0] + 8004db4: 2204 movs r2, #4 + 8004db6: 4013 ands r3, r2 + 8004db8: 2b04 cmp r3, #4 + 8004dba: d146 bne.n 8004e4a { /* Wait until REACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8004a98: 6bfb ldr r3, [r7, #60] @ 0x3c - 8004a9a: 2280 movs r2, #128 @ 0x80 - 8004a9c: 03d1 lsls r1, r2, #15 - 8004a9e: 6878 ldr r0, [r7, #4] - 8004aa0: 4a2c ldr r2, [pc, #176] @ (8004b54 ) - 8004aa2: 9200 str r2, [sp, #0] - 8004aa4: 2200 movs r2, #0 - 8004aa6: f000 f859 bl 8004b5c - 8004aaa: 1e03 subs r3, r0, #0 - 8004aac: d03b beq.n 8004b26 + 8004dbc: 6bfb ldr r3, [r7, #60] @ 0x3c + 8004dbe: 2280 movs r2, #128 @ 0x80 + 8004dc0: 03d1 lsls r1, r2, #15 + 8004dc2: 6878 ldr r0, [r7, #4] + 8004dc4: 4a2c ldr r2, [pc, #176] @ (8004e78 ) + 8004dc6: 9200 str r2, [sp, #0] + 8004dc8: 2200 movs r2, #0 + 8004dca: f000 f859 bl 8004e80 + 8004dce: 1e03 subs r3, r0, #0 + 8004dd0: d03b beq.n 8004e4a __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004aae: f3ef 8310 mrs r3, PRIMASK - 8004ab2: 60fb str r3, [r7, #12] + 8004dd2: f3ef 8310 mrs r3, PRIMASK + 8004dd6: 60fb str r3, [r7, #12] return(result); - 8004ab4: 68fb ldr r3, [r7, #12] + 8004dd8: 68fb ldr r3, [r7, #12] { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 8004ab6: 637b str r3, [r7, #52] @ 0x34 - 8004ab8: 2301 movs r3, #1 - 8004aba: 613b str r3, [r7, #16] + 8004dda: 637b str r3, [r7, #52] @ 0x34 + 8004ddc: 2301 movs r3, #1 + 8004dde: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004abc: 693b ldr r3, [r7, #16] - 8004abe: f383 8810 msr PRIMASK, r3 + 8004de0: 693b ldr r3, [r7, #16] + 8004de2: f383 8810 msr PRIMASK, r3 } - 8004ac2: 46c0 nop @ (mov r8, r8) - 8004ac4: 687b ldr r3, [r7, #4] - 8004ac6: 681b ldr r3, [r3, #0] - 8004ac8: 681a ldr r2, [r3, #0] - 8004aca: 687b ldr r3, [r7, #4] - 8004acc: 681b ldr r3, [r3, #0] - 8004ace: 4922 ldr r1, [pc, #136] @ (8004b58 ) - 8004ad0: 400a ands r2, r1 - 8004ad2: 601a str r2, [r3, #0] - 8004ad4: 6b7b ldr r3, [r7, #52] @ 0x34 - 8004ad6: 617b str r3, [r7, #20] + 8004de6: 46c0 nop @ (mov r8, r8) + 8004de8: 687b ldr r3, [r7, #4] + 8004dea: 681b ldr r3, [r3, #0] + 8004dec: 681a ldr r2, [r3, #0] + 8004dee: 687b ldr r3, [r7, #4] + 8004df0: 681b ldr r3, [r3, #0] + 8004df2: 4922 ldr r1, [pc, #136] @ (8004e7c ) + 8004df4: 400a ands r2, r1 + 8004df6: 601a str r2, [r3, #0] + 8004df8: 6b7b ldr r3, [r7, #52] @ 0x34 + 8004dfa: 617b str r3, [r7, #20] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004ad8: 697b ldr r3, [r7, #20] - 8004ada: f383 8810 msr PRIMASK, r3 + 8004dfc: 697b ldr r3, [r7, #20] + 8004dfe: f383 8810 msr PRIMASK, r3 } - 8004ade: 46c0 nop @ (mov r8, r8) + 8004e02: 46c0 nop @ (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004ae0: f3ef 8310 mrs r3, PRIMASK - 8004ae4: 61bb str r3, [r7, #24] + 8004e04: f3ef 8310 mrs r3, PRIMASK + 8004e08: 61bb str r3, [r7, #24] return(result); - 8004ae6: 69bb ldr r3, [r7, #24] + 8004e0a: 69bb ldr r3, [r7, #24] ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8004ae8: 633b str r3, [r7, #48] @ 0x30 - 8004aea: 2301 movs r3, #1 - 8004aec: 61fb str r3, [r7, #28] + 8004e0c: 633b str r3, [r7, #48] @ 0x30 + 8004e0e: 2301 movs r3, #1 + 8004e10: 61fb str r3, [r7, #28] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004aee: 69fb ldr r3, [r7, #28] - 8004af0: f383 8810 msr PRIMASK, r3 + 8004e12: 69fb ldr r3, [r7, #28] + 8004e14: f383 8810 msr PRIMASK, r3 } - 8004af4: 46c0 nop @ (mov r8, r8) - 8004af6: 687b ldr r3, [r7, #4] - 8004af8: 681b ldr r3, [r3, #0] - 8004afa: 689a ldr r2, [r3, #8] - 8004afc: 687b ldr r3, [r7, #4] - 8004afe: 681b ldr r3, [r3, #0] - 8004b00: 2101 movs r1, #1 - 8004b02: 438a bics r2, r1 - 8004b04: 609a str r2, [r3, #8] - 8004b06: 6b3b ldr r3, [r7, #48] @ 0x30 - 8004b08: 623b str r3, [r7, #32] + 8004e18: 46c0 nop @ (mov r8, r8) + 8004e1a: 687b ldr r3, [r7, #4] + 8004e1c: 681b ldr r3, [r3, #0] + 8004e1e: 689a ldr r2, [r3, #8] + 8004e20: 687b ldr r3, [r7, #4] + 8004e22: 681b ldr r3, [r3, #0] + 8004e24: 2101 movs r1, #1 + 8004e26: 438a bics r2, r1 + 8004e28: 609a str r2, [r3, #8] + 8004e2a: 6b3b ldr r3, [r7, #48] @ 0x30 + 8004e2c: 623b str r3, [r7, #32] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004b0a: 6a3b ldr r3, [r7, #32] - 8004b0c: f383 8810 msr PRIMASK, r3 + 8004e2e: 6a3b ldr r3, [r7, #32] + 8004e30: f383 8810 msr PRIMASK, r3 } - 8004b10: 46c0 nop @ (mov r8, r8) + 8004e34: 46c0 nop @ (mov r8, r8) huart->RxState = HAL_UART_STATE_READY; - 8004b12: 687b ldr r3, [r7, #4] - 8004b14: 228c movs r2, #140 @ 0x8c - 8004b16: 2120 movs r1, #32 - 8004b18: 5099 str r1, [r3, r2] + 8004e36: 687b ldr r3, [r7, #4] + 8004e38: 228c movs r2, #140 @ 0x8c + 8004e3a: 2120 movs r1, #32 + 8004e3c: 5099 str r1, [r3, r2] __HAL_UNLOCK(huart); - 8004b1a: 687b ldr r3, [r7, #4] - 8004b1c: 2284 movs r2, #132 @ 0x84 - 8004b1e: 2100 movs r1, #0 - 8004b20: 5499 strb r1, [r3, r2] + 8004e3e: 687b ldr r3, [r7, #4] + 8004e40: 2284 movs r2, #132 @ 0x84 + 8004e42: 2100 movs r1, #0 + 8004e44: 5499 strb r1, [r3, r2] /* Timeout occurred */ return HAL_TIMEOUT; - 8004b22: 2303 movs r3, #3 - 8004b24: e012 b.n 8004b4c + 8004e46: 2303 movs r3, #3 + 8004e48: e012 b.n 8004e70 } } /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; - 8004b26: 687b ldr r3, [r7, #4] - 8004b28: 2288 movs r2, #136 @ 0x88 - 8004b2a: 2120 movs r1, #32 - 8004b2c: 5099 str r1, [r3, r2] + 8004e4a: 687b ldr r3, [r7, #4] + 8004e4c: 2288 movs r2, #136 @ 0x88 + 8004e4e: 2120 movs r1, #32 + 8004e50: 5099 str r1, [r3, r2] huart->RxState = HAL_UART_STATE_READY; - 8004b2e: 687b ldr r3, [r7, #4] - 8004b30: 228c movs r2, #140 @ 0x8c - 8004b32: 2120 movs r1, #32 - 8004b34: 5099 str r1, [r3, r2] + 8004e52: 687b ldr r3, [r7, #4] + 8004e54: 228c movs r2, #140 @ 0x8c + 8004e56: 2120 movs r1, #32 + 8004e58: 5099 str r1, [r3, r2] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8004b36: 687b ldr r3, [r7, #4] - 8004b38: 2200 movs r2, #0 - 8004b3a: 66da str r2, [r3, #108] @ 0x6c + 8004e5a: 687b ldr r3, [r7, #4] + 8004e5c: 2200 movs r2, #0 + 8004e5e: 66da str r2, [r3, #108] @ 0x6c huart->RxEventType = HAL_UART_RXEVENT_TC; - 8004b3c: 687b ldr r3, [r7, #4] - 8004b3e: 2200 movs r2, #0 - 8004b40: 671a str r2, [r3, #112] @ 0x70 + 8004e60: 687b ldr r3, [r7, #4] + 8004e62: 2200 movs r2, #0 + 8004e64: 671a str r2, [r3, #112] @ 0x70 __HAL_UNLOCK(huart); - 8004b42: 687b ldr r3, [r7, #4] - 8004b44: 2284 movs r2, #132 @ 0x84 - 8004b46: 2100 movs r1, #0 - 8004b48: 5499 strb r1, [r3, r2] + 8004e66: 687b ldr r3, [r7, #4] + 8004e68: 2284 movs r2, #132 @ 0x84 + 8004e6a: 2100 movs r1, #0 + 8004e6c: 5499 strb r1, [r3, r2] return HAL_OK; - 8004b4a: 2300 movs r3, #0 + 8004e6e: 2300 movs r3, #0 } - 8004b4c: 0018 movs r0, r3 - 8004b4e: 46bd mov sp, r7 - 8004b50: b010 add sp, #64 @ 0x40 - 8004b52: bd80 pop {r7, pc} - 8004b54: 01ffffff .word 0x01ffffff - 8004b58: fffffedf .word 0xfffffedf + 8004e70: 0018 movs r0, r3 + 8004e72: 46bd mov sp, r7 + 8004e74: b010 add sp, #64 @ 0x40 + 8004e76: bd80 pop {r7, pc} + 8004e78: 01ffffff .word 0x01ffffff + 8004e7c: fffffedf .word 0xfffffedf -08004b5c : +08004e80 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8004b5c: b580 push {r7, lr} - 8004b5e: b084 sub sp, #16 - 8004b60: af00 add r7, sp, #0 - 8004b62: 60f8 str r0, [r7, #12] - 8004b64: 60b9 str r1, [r7, #8] - 8004b66: 603b str r3, [r7, #0] - 8004b68: 1dfb adds r3, r7, #7 - 8004b6a: 701a strb r2, [r3, #0] + 8004e80: b580 push {r7, lr} + 8004e82: b084 sub sp, #16 + 8004e84: af00 add r7, sp, #0 + 8004e86: 60f8 str r0, [r7, #12] + 8004e88: 60b9 str r1, [r7, #8] + 8004e8a: 603b str r3, [r7, #0] + 8004e8c: 1dfb adds r3, r7, #7 + 8004e8e: 701a strb r2, [r3, #0] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8004b6c: e051 b.n 8004c12 + 8004e90: e051 b.n 8004f36 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004b6e: 69bb ldr r3, [r7, #24] - 8004b70: 3301 adds r3, #1 - 8004b72: d04e beq.n 8004c12 + 8004e92: 69bb ldr r3, [r7, #24] + 8004e94: 3301 adds r3, #1 + 8004e96: d04e beq.n 8004f36 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004b74: f7fc fcda bl 800152c - 8004b78: 0002 movs r2, r0 - 8004b7a: 683b ldr r3, [r7, #0] - 8004b7c: 1ad3 subs r3, r2, r3 - 8004b7e: 69ba ldr r2, [r7, #24] - 8004b80: 429a cmp r2, r3 - 8004b82: d302 bcc.n 8004b8a - 8004b84: 69bb ldr r3, [r7, #24] - 8004b86: 2b00 cmp r3, #0 - 8004b88: d101 bne.n 8004b8e + 8004e98: f7fc fbe8 bl 800166c + 8004e9c: 0002 movs r2, r0 + 8004e9e: 683b ldr r3, [r7, #0] + 8004ea0: 1ad3 subs r3, r2, r3 + 8004ea2: 69ba ldr r2, [r7, #24] + 8004ea4: 429a cmp r2, r3 + 8004ea6: d302 bcc.n 8004eae + 8004ea8: 69bb ldr r3, [r7, #24] + 8004eaa: 2b00 cmp r3, #0 + 8004eac: d101 bne.n 8004eb2 { return HAL_TIMEOUT; - 8004b8a: 2303 movs r3, #3 - 8004b8c: e051 b.n 8004c32 + 8004eae: 2303 movs r3, #3 + 8004eb0: e051 b.n 8004f56 } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 8004b8e: 68fb ldr r3, [r7, #12] - 8004b90: 681b ldr r3, [r3, #0] - 8004b92: 681b ldr r3, [r3, #0] - 8004b94: 2204 movs r2, #4 - 8004b96: 4013 ands r3, r2 - 8004b98: d03b beq.n 8004c12 - 8004b9a: 68bb ldr r3, [r7, #8] - 8004b9c: 2b80 cmp r3, #128 @ 0x80 - 8004b9e: d038 beq.n 8004c12 - 8004ba0: 68bb ldr r3, [r7, #8] - 8004ba2: 2b40 cmp r3, #64 @ 0x40 - 8004ba4: d035 beq.n 8004c12 + 8004eb2: 68fb ldr r3, [r7, #12] + 8004eb4: 681b ldr r3, [r3, #0] + 8004eb6: 681b ldr r3, [r3, #0] + 8004eb8: 2204 movs r2, #4 + 8004eba: 4013 ands r3, r2 + 8004ebc: d03b beq.n 8004f36 + 8004ebe: 68bb ldr r3, [r7, #8] + 8004ec0: 2b80 cmp r3, #128 @ 0x80 + 8004ec2: d038 beq.n 8004f36 + 8004ec4: 68bb ldr r3, [r7, #8] + 8004ec6: 2b40 cmp r3, #64 @ 0x40 + 8004ec8: d035 beq.n 8004f36 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 8004ba6: 68fb ldr r3, [r7, #12] - 8004ba8: 681b ldr r3, [r3, #0] - 8004baa: 69db ldr r3, [r3, #28] - 8004bac: 2208 movs r2, #8 - 8004bae: 4013 ands r3, r2 - 8004bb0: 2b08 cmp r3, #8 - 8004bb2: d111 bne.n 8004bd8 + 8004eca: 68fb ldr r3, [r7, #12] + 8004ecc: 681b ldr r3, [r3, #0] + 8004ece: 69db ldr r3, [r3, #28] + 8004ed0: 2208 movs r2, #8 + 8004ed2: 4013 ands r3, r2 + 8004ed4: 2b08 cmp r3, #8 + 8004ed6: d111 bne.n 8004efc { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8004bb4: 68fb ldr r3, [r7, #12] - 8004bb6: 681b ldr r3, [r3, #0] - 8004bb8: 2208 movs r2, #8 - 8004bba: 621a str r2, [r3, #32] + 8004ed8: 68fb ldr r3, [r7, #12] + 8004eda: 681b ldr r3, [r3, #0] + 8004edc: 2208 movs r2, #8 + 8004ede: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 8004bbc: 68fb ldr r3, [r7, #12] - 8004bbe: 0018 movs r0, r3 - 8004bc0: f000 f83c bl 8004c3c + 8004ee0: 68fb ldr r3, [r7, #12] + 8004ee2: 0018 movs r0, r3 + 8004ee4: f000 f83c bl 8004f60 huart->ErrorCode = HAL_UART_ERROR_ORE; - 8004bc4: 68fb ldr r3, [r7, #12] - 8004bc6: 2290 movs r2, #144 @ 0x90 - 8004bc8: 2108 movs r1, #8 - 8004bca: 5099 str r1, [r3, r2] + 8004ee8: 68fb ldr r3, [r7, #12] + 8004eea: 2290 movs r2, #144 @ 0x90 + 8004eec: 2108 movs r1, #8 + 8004eee: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 8004bcc: 68fb ldr r3, [r7, #12] - 8004bce: 2284 movs r2, #132 @ 0x84 - 8004bd0: 2100 movs r1, #0 - 8004bd2: 5499 strb r1, [r3, r2] + 8004ef0: 68fb ldr r3, [r7, #12] + 8004ef2: 2284 movs r2, #132 @ 0x84 + 8004ef4: 2100 movs r1, #0 + 8004ef6: 5499 strb r1, [r3, r2] return HAL_ERROR; - 8004bd4: 2301 movs r3, #1 - 8004bd6: e02c b.n 8004c32 + 8004ef8: 2301 movs r3, #1 + 8004efa: e02c b.n 8004f56 } if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - 8004bd8: 68fb ldr r3, [r7, #12] - 8004bda: 681b ldr r3, [r3, #0] - 8004bdc: 69da ldr r2, [r3, #28] - 8004bde: 2380 movs r3, #128 @ 0x80 - 8004be0: 011b lsls r3, r3, #4 - 8004be2: 401a ands r2, r3 - 8004be4: 2380 movs r3, #128 @ 0x80 - 8004be6: 011b lsls r3, r3, #4 - 8004be8: 429a cmp r2, r3 - 8004bea: d112 bne.n 8004c12 + 8004efc: 68fb ldr r3, [r7, #12] + 8004efe: 681b ldr r3, [r3, #0] + 8004f00: 69da ldr r2, [r3, #28] + 8004f02: 2380 movs r3, #128 @ 0x80 + 8004f04: 011b lsls r3, r3, #4 + 8004f06: 401a ands r2, r3 + 8004f08: 2380 movs r3, #128 @ 0x80 + 8004f0a: 011b lsls r3, r3, #4 + 8004f0c: 429a cmp r2, r3 + 8004f0e: d112 bne.n 8004f36 { /* Clear Receiver Timeout flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8004bec: 68fb ldr r3, [r7, #12] - 8004bee: 681b ldr r3, [r3, #0] - 8004bf0: 2280 movs r2, #128 @ 0x80 - 8004bf2: 0112 lsls r2, r2, #4 - 8004bf4: 621a str r2, [r3, #32] + 8004f10: 68fb ldr r3, [r7, #12] + 8004f12: 681b ldr r3, [r3, #0] + 8004f14: 2280 movs r2, #128 @ 0x80 + 8004f16: 0112 lsls r2, r2, #4 + 8004f18: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 8004bf6: 68fb ldr r3, [r7, #12] - 8004bf8: 0018 movs r0, r3 - 8004bfa: f000 f81f bl 8004c3c + 8004f1a: 68fb ldr r3, [r7, #12] + 8004f1c: 0018 movs r0, r3 + 8004f1e: f000 f81f bl 8004f60 huart->ErrorCode = HAL_UART_ERROR_RTO; - 8004bfe: 68fb ldr r3, [r7, #12] - 8004c00: 2290 movs r2, #144 @ 0x90 - 8004c02: 2120 movs r1, #32 - 8004c04: 5099 str r1, [r3, r2] + 8004f22: 68fb ldr r3, [r7, #12] + 8004f24: 2290 movs r2, #144 @ 0x90 + 8004f26: 2120 movs r1, #32 + 8004f28: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 8004c06: 68fb ldr r3, [r7, #12] - 8004c08: 2284 movs r2, #132 @ 0x84 - 8004c0a: 2100 movs r1, #0 - 8004c0c: 5499 strb r1, [r3, r2] + 8004f2a: 68fb ldr r3, [r7, #12] + 8004f2c: 2284 movs r2, #132 @ 0x84 + 8004f2e: 2100 movs r1, #0 + 8004f30: 5499 strb r1, [r3, r2] return HAL_TIMEOUT; - 8004c0e: 2303 movs r3, #3 - 8004c10: e00f b.n 8004c32 + 8004f32: 2303 movs r3, #3 + 8004f34: e00f b.n 8004f56 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8004c12: 68fb ldr r3, [r7, #12] - 8004c14: 681b ldr r3, [r3, #0] - 8004c16: 69db ldr r3, [r3, #28] - 8004c18: 68ba ldr r2, [r7, #8] - 8004c1a: 4013 ands r3, r2 - 8004c1c: 68ba ldr r2, [r7, #8] - 8004c1e: 1ad3 subs r3, r2, r3 - 8004c20: 425a negs r2, r3 - 8004c22: 4153 adcs r3, r2 - 8004c24: b2db uxtb r3, r3 - 8004c26: 001a movs r2, r3 - 8004c28: 1dfb adds r3, r7, #7 - 8004c2a: 781b ldrb r3, [r3, #0] - 8004c2c: 429a cmp r2, r3 - 8004c2e: d09e beq.n 8004b6e + 8004f36: 68fb ldr r3, [r7, #12] + 8004f38: 681b ldr r3, [r3, #0] + 8004f3a: 69db ldr r3, [r3, #28] + 8004f3c: 68ba ldr r2, [r7, #8] + 8004f3e: 4013 ands r3, r2 + 8004f40: 68ba ldr r2, [r7, #8] + 8004f42: 1ad3 subs r3, r2, r3 + 8004f44: 425a negs r2, r3 + 8004f46: 4153 adcs r3, r2 + 8004f48: b2db uxtb r3, r3 + 8004f4a: 001a movs r2, r3 + 8004f4c: 1dfb adds r3, r7, #7 + 8004f4e: 781b ldrb r3, [r3, #0] + 8004f50: 429a cmp r2, r3 + 8004f52: d09e beq.n 8004e92 } } } } return HAL_OK; - 8004c30: 2300 movs r3, #0 + 8004f54: 2300 movs r3, #0 } - 8004c32: 0018 movs r0, r3 - 8004c34: 46bd mov sp, r7 - 8004c36: b004 add sp, #16 - 8004c38: bd80 pop {r7, pc} + 8004f56: 0018 movs r0, r3 + 8004f58: 46bd mov sp, r7 + 8004f5a: b004 add sp, #16 + 8004f5c: bd80 pop {r7, pc} ... -08004c3c : +08004f60 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8004c3c: b580 push {r7, lr} - 8004c3e: b08e sub sp, #56 @ 0x38 - 8004c40: af00 add r7, sp, #0 - 8004c42: 6078 str r0, [r7, #4] + 8004f60: b580 push {r7, lr} + 8004f62: b08e sub sp, #56 @ 0x38 + 8004f64: af00 add r7, sp, #0 + 8004f66: 6078 str r0, [r7, #4] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004c44: f3ef 8310 mrs r3, PRIMASK - 8004c48: 617b str r3, [r7, #20] + 8004f68: f3ef 8310 mrs r3, PRIMASK + 8004f6c: 617b str r3, [r7, #20] return(result); - 8004c4a: 697b ldr r3, [r7, #20] + 8004f6e: 697b ldr r3, [r7, #20] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 8004c4c: 637b str r3, [r7, #52] @ 0x34 - 8004c4e: 2301 movs r3, #1 - 8004c50: 61bb str r3, [r7, #24] + 8004f70: 637b str r3, [r7, #52] @ 0x34 + 8004f72: 2301 movs r3, #1 + 8004f74: 61bb str r3, [r7, #24] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004c52: 69bb ldr r3, [r7, #24] - 8004c54: f383 8810 msr PRIMASK, r3 + 8004f76: 69bb ldr r3, [r7, #24] + 8004f78: f383 8810 msr PRIMASK, r3 } - 8004c58: 46c0 nop @ (mov r8, r8) - 8004c5a: 687b ldr r3, [r7, #4] - 8004c5c: 681b ldr r3, [r3, #0] - 8004c5e: 681a ldr r2, [r3, #0] - 8004c60: 687b ldr r3, [r7, #4] - 8004c62: 681b ldr r3, [r3, #0] - 8004c64: 4926 ldr r1, [pc, #152] @ (8004d00 ) - 8004c66: 400a ands r2, r1 - 8004c68: 601a str r2, [r3, #0] - 8004c6a: 6b7b ldr r3, [r7, #52] @ 0x34 - 8004c6c: 61fb str r3, [r7, #28] + 8004f7c: 46c0 nop @ (mov r8, r8) + 8004f7e: 687b ldr r3, [r7, #4] + 8004f80: 681b ldr r3, [r3, #0] + 8004f82: 681a ldr r2, [r3, #0] + 8004f84: 687b ldr r3, [r7, #4] + 8004f86: 681b ldr r3, [r3, #0] + 8004f88: 4926 ldr r1, [pc, #152] @ (8005024 ) + 8004f8a: 400a ands r2, r1 + 8004f8c: 601a str r2, [r3, #0] + 8004f8e: 6b7b ldr r3, [r7, #52] @ 0x34 + 8004f90: 61fb str r3, [r7, #28] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004c6e: 69fb ldr r3, [r7, #28] - 8004c70: f383 8810 msr PRIMASK, r3 + 8004f92: 69fb ldr r3, [r7, #28] + 8004f94: f383 8810 msr PRIMASK, r3 } - 8004c74: 46c0 nop @ (mov r8, r8) + 8004f98: 46c0 nop @ (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004c76: f3ef 8310 mrs r3, PRIMASK - 8004c7a: 623b str r3, [r7, #32] + 8004f9a: f3ef 8310 mrs r3, PRIMASK + 8004f9e: 623b str r3, [r7, #32] return(result); - 8004c7c: 6a3b ldr r3, [r7, #32] + 8004fa0: 6a3b ldr r3, [r7, #32] ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 8004c7e: 633b str r3, [r7, #48] @ 0x30 - 8004c80: 2301 movs r3, #1 - 8004c82: 627b str r3, [r7, #36] @ 0x24 + 8004fa2: 633b str r3, [r7, #48] @ 0x30 + 8004fa4: 2301 movs r3, #1 + 8004fa6: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004c84: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004c86: f383 8810 msr PRIMASK, r3 + 8004fa8: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004faa: f383 8810 msr PRIMASK, r3 } - 8004c8a: 46c0 nop @ (mov r8, r8) - 8004c8c: 687b ldr r3, [r7, #4] - 8004c8e: 681b ldr r3, [r3, #0] - 8004c90: 689a ldr r2, [r3, #8] - 8004c92: 687b ldr r3, [r7, #4] - 8004c94: 681b ldr r3, [r3, #0] - 8004c96: 491b ldr r1, [pc, #108] @ (8004d04 ) - 8004c98: 400a ands r2, r1 - 8004c9a: 609a str r2, [r3, #8] - 8004c9c: 6b3b ldr r3, [r7, #48] @ 0x30 - 8004c9e: 62bb str r3, [r7, #40] @ 0x28 + 8004fae: 46c0 nop @ (mov r8, r8) + 8004fb0: 687b ldr r3, [r7, #4] + 8004fb2: 681b ldr r3, [r3, #0] + 8004fb4: 689a ldr r2, [r3, #8] + 8004fb6: 687b ldr r3, [r7, #4] + 8004fb8: 681b ldr r3, [r3, #0] + 8004fba: 491b ldr r1, [pc, #108] @ (8005028 ) + 8004fbc: 400a ands r2, r1 + 8004fbe: 609a str r2, [r3, #8] + 8004fc0: 6b3b ldr r3, [r7, #48] @ 0x30 + 8004fc2: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004ca0: 6abb ldr r3, [r7, #40] @ 0x28 - 8004ca2: f383 8810 msr PRIMASK, r3 + 8004fc4: 6abb ldr r3, [r7, #40] @ 0x28 + 8004fc6: f383 8810 msr PRIMASK, r3 } - 8004ca6: 46c0 nop @ (mov r8, r8) + 8004fca: 46c0 nop @ (mov r8, r8) /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8004ca8: 687b ldr r3, [r7, #4] - 8004caa: 6edb ldr r3, [r3, #108] @ 0x6c - 8004cac: 2b01 cmp r3, #1 - 8004cae: d118 bne.n 8004ce2 + 8004fcc: 687b ldr r3, [r7, #4] + 8004fce: 6edb ldr r3, [r3, #108] @ 0x6c + 8004fd0: 2b01 cmp r3, #1 + 8004fd2: d118 bne.n 8005006 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004cb0: f3ef 8310 mrs r3, PRIMASK - 8004cb4: 60bb str r3, [r7, #8] + 8004fd4: f3ef 8310 mrs r3, PRIMASK + 8004fd8: 60bb str r3, [r7, #8] return(result); - 8004cb6: 68bb ldr r3, [r7, #8] + 8004fda: 68bb ldr r3, [r7, #8] { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8004cb8: 62fb str r3, [r7, #44] @ 0x2c - 8004cba: 2301 movs r3, #1 - 8004cbc: 60fb str r3, [r7, #12] + 8004fdc: 62fb str r3, [r7, #44] @ 0x2c + 8004fde: 2301 movs r3, #1 + 8004fe0: 60fb str r3, [r7, #12] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004cbe: 68fb ldr r3, [r7, #12] - 8004cc0: f383 8810 msr PRIMASK, r3 + 8004fe2: 68fb ldr r3, [r7, #12] + 8004fe4: f383 8810 msr PRIMASK, r3 } - 8004cc4: 46c0 nop @ (mov r8, r8) - 8004cc6: 687b ldr r3, [r7, #4] - 8004cc8: 681b ldr r3, [r3, #0] - 8004cca: 681a ldr r2, [r3, #0] - 8004ccc: 687b ldr r3, [r7, #4] - 8004cce: 681b ldr r3, [r3, #0] - 8004cd0: 2110 movs r1, #16 - 8004cd2: 438a bics r2, r1 - 8004cd4: 601a str r2, [r3, #0] - 8004cd6: 6afb ldr r3, [r7, #44] @ 0x2c - 8004cd8: 613b str r3, [r7, #16] + 8004fe8: 46c0 nop @ (mov r8, r8) + 8004fea: 687b ldr r3, [r7, #4] + 8004fec: 681b ldr r3, [r3, #0] + 8004fee: 681a ldr r2, [r3, #0] + 8004ff0: 687b ldr r3, [r7, #4] + 8004ff2: 681b ldr r3, [r3, #0] + 8004ff4: 2110 movs r1, #16 + 8004ff6: 438a bics r2, r1 + 8004ff8: 601a str r2, [r3, #0] + 8004ffa: 6afb ldr r3, [r7, #44] @ 0x2c + 8004ffc: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004cda: 693b ldr r3, [r7, #16] - 8004cdc: f383 8810 msr PRIMASK, r3 + 8004ffe: 693b ldr r3, [r7, #16] + 8005000: f383 8810 msr PRIMASK, r3 } - 8004ce0: 46c0 nop @ (mov r8, r8) + 8005004: 46c0 nop @ (mov r8, r8) } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8004ce2: 687b ldr r3, [r7, #4] - 8004ce4: 228c movs r2, #140 @ 0x8c - 8004ce6: 2120 movs r1, #32 - 8004ce8: 5099 str r1, [r3, r2] + 8005006: 687b ldr r3, [r7, #4] + 8005008: 228c movs r2, #140 @ 0x8c + 800500a: 2120 movs r1, #32 + 800500c: 5099 str r1, [r3, r2] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8004cea: 687b ldr r3, [r7, #4] - 8004cec: 2200 movs r2, #0 - 8004cee: 66da str r2, [r3, #108] @ 0x6c + 800500e: 687b ldr r3, [r7, #4] + 8005010: 2200 movs r2, #0 + 8005012: 66da str r2, [r3, #108] @ 0x6c /* Reset RxIsr function pointer */ huart->RxISR = NULL; - 8004cf0: 687b ldr r3, [r7, #4] - 8004cf2: 2200 movs r2, #0 - 8004cf4: 675a str r2, [r3, #116] @ 0x74 + 8005014: 687b ldr r3, [r7, #4] + 8005016: 2200 movs r2, #0 + 8005018: 675a str r2, [r3, #116] @ 0x74 } - 8004cf6: 46c0 nop @ (mov r8, r8) - 8004cf8: 46bd mov sp, r7 - 8004cfa: b00e add sp, #56 @ 0x38 - 8004cfc: bd80 pop {r7, pc} - 8004cfe: 46c0 nop @ (mov r8, r8) - 8004d00: fffffedf .word 0xfffffedf - 8004d04: effffffe .word 0xeffffffe + 800501a: 46c0 nop @ (mov r8, r8) + 800501c: 46bd mov sp, r7 + 800501e: b00e add sp, #56 @ 0x38 + 8005020: bd80 pop {r7, pc} + 8005022: 46c0 nop @ (mov r8, r8) + 8005024: fffffedf .word 0xfffffedf + 8005028: effffffe .word 0xeffffffe -08004d08 : +0800502c : * @brief Disable the FIFO mode. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart) { - 8004d08: b580 push {r7, lr} - 8004d0a: b084 sub sp, #16 - 8004d0c: af00 add r7, sp, #0 - 8004d0e: 6078 str r0, [r7, #4] + 800502c: b580 push {r7, lr} + 800502e: b084 sub sp, #16 + 8005030: af00 add r7, sp, #0 + 8005032: 6078 str r0, [r7, #4] /* Check parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); /* Process Locked */ __HAL_LOCK(huart); - 8004d10: 687b ldr r3, [r7, #4] - 8004d12: 2284 movs r2, #132 @ 0x84 - 8004d14: 5c9b ldrb r3, [r3, r2] - 8004d16: 2b01 cmp r3, #1 - 8004d18: d101 bne.n 8004d1e - 8004d1a: 2302 movs r3, #2 - 8004d1c: e027 b.n 8004d6e - 8004d1e: 687b ldr r3, [r7, #4] - 8004d20: 2284 movs r2, #132 @ 0x84 - 8004d22: 2101 movs r1, #1 - 8004d24: 5499 strb r1, [r3, r2] + 8005034: 687b ldr r3, [r7, #4] + 8005036: 2284 movs r2, #132 @ 0x84 + 8005038: 5c9b ldrb r3, [r3, r2] + 800503a: 2b01 cmp r3, #1 + 800503c: d101 bne.n 8005042 + 800503e: 2302 movs r3, #2 + 8005040: e027 b.n 8005092 + 8005042: 687b ldr r3, [r7, #4] + 8005044: 2284 movs r2, #132 @ 0x84 + 8005046: 2101 movs r1, #1 + 8005048: 5499 strb r1, [r3, r2] huart->gState = HAL_UART_STATE_BUSY; - 8004d26: 687b ldr r3, [r7, #4] - 8004d28: 2288 movs r2, #136 @ 0x88 - 8004d2a: 2124 movs r1, #36 @ 0x24 - 8004d2c: 5099 str r1, [r3, r2] + 800504a: 687b ldr r3, [r7, #4] + 800504c: 2288 movs r2, #136 @ 0x88 + 800504e: 2124 movs r1, #36 @ 0x24 + 8005050: 5099 str r1, [r3, r2] /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 8004d2e: 687b ldr r3, [r7, #4] - 8004d30: 681b ldr r3, [r3, #0] - 8004d32: 681b ldr r3, [r3, #0] - 8004d34: 60fb str r3, [r7, #12] + 8005052: 687b ldr r3, [r7, #4] + 8005054: 681b ldr r3, [r3, #0] + 8005056: 681b ldr r3, [r3, #0] + 8005058: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 8004d36: 687b ldr r3, [r7, #4] - 8004d38: 681b ldr r3, [r3, #0] - 8004d3a: 681a ldr r2, [r3, #0] - 8004d3c: 687b ldr r3, [r7, #4] - 8004d3e: 681b ldr r3, [r3, #0] - 8004d40: 2101 movs r1, #1 - 8004d42: 438a bics r2, r1 - 8004d44: 601a str r2, [r3, #0] + 800505a: 687b ldr r3, [r7, #4] + 800505c: 681b ldr r3, [r3, #0] + 800505e: 681a ldr r2, [r3, #0] + 8005060: 687b ldr r3, [r7, #4] + 8005062: 681b ldr r3, [r3, #0] + 8005064: 2101 movs r1, #1 + 8005066: 438a bics r2, r1 + 8005068: 601a str r2, [r3, #0] /* Enable FIFO mode */ CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); - 8004d46: 68fb ldr r3, [r7, #12] - 8004d48: 4a0b ldr r2, [pc, #44] @ (8004d78 ) - 8004d4a: 4013 ands r3, r2 - 8004d4c: 60fb str r3, [r7, #12] + 800506a: 68fb ldr r3, [r7, #12] + 800506c: 4a0b ldr r2, [pc, #44] @ (800509c ) + 800506e: 4013 ands r3, r2 + 8005070: 60fb str r3, [r7, #12] huart->FifoMode = UART_FIFOMODE_DISABLE; - 8004d4e: 687b ldr r3, [r7, #4] - 8004d50: 2200 movs r2, #0 - 8004d52: 665a str r2, [r3, #100] @ 0x64 + 8005072: 687b ldr r3, [r7, #4] + 8005074: 2200 movs r2, #0 + 8005076: 665a str r2, [r3, #100] @ 0x64 /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 8004d54: 687b ldr r3, [r7, #4] - 8004d56: 681b ldr r3, [r3, #0] - 8004d58: 68fa ldr r2, [r7, #12] - 8004d5a: 601a str r2, [r3, #0] + 8005078: 687b ldr r3, [r7, #4] + 800507a: 681b ldr r3, [r3, #0] + 800507c: 68fa ldr r2, [r7, #12] + 800507e: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 8004d5c: 687b ldr r3, [r7, #4] - 8004d5e: 2288 movs r2, #136 @ 0x88 - 8004d60: 2120 movs r1, #32 - 8004d62: 5099 str r1, [r3, r2] + 8005080: 687b ldr r3, [r7, #4] + 8005082: 2288 movs r2, #136 @ 0x88 + 8005084: 2120 movs r1, #32 + 8005086: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 8004d64: 687b ldr r3, [r7, #4] - 8004d66: 2284 movs r2, #132 @ 0x84 - 8004d68: 2100 movs r1, #0 - 8004d6a: 5499 strb r1, [r3, r2] + 8005088: 687b ldr r3, [r7, #4] + 800508a: 2284 movs r2, #132 @ 0x84 + 800508c: 2100 movs r1, #0 + 800508e: 5499 strb r1, [r3, r2] return HAL_OK; - 8004d6c: 2300 movs r3, #0 + 8005090: 2300 movs r3, #0 } - 8004d6e: 0018 movs r0, r3 - 8004d70: 46bd mov sp, r7 - 8004d72: b004 add sp, #16 - 8004d74: bd80 pop {r7, pc} - 8004d76: 46c0 nop @ (mov r8, r8) - 8004d78: dfffffff .word 0xdfffffff + 8005092: 0018 movs r0, r3 + 8005094: 46bd mov sp, r7 + 8005096: b004 add sp, #16 + 8005098: bd80 pop {r7, pc} + 800509a: 46c0 nop @ (mov r8, r8) + 800509c: dfffffff .word 0xdfffffff -08004d7c : +080050a0 : * @arg @ref UART_TXFIFO_THRESHOLD_7_8 * @arg @ref UART_TXFIFO_THRESHOLD_8_8 * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) { - 8004d7c: b580 push {r7, lr} - 8004d7e: b084 sub sp, #16 - 8004d80: af00 add r7, sp, #0 - 8004d82: 6078 str r0, [r7, #4] - 8004d84: 6039 str r1, [r7, #0] + 80050a0: b580 push {r7, lr} + 80050a2: b084 sub sp, #16 + 80050a4: af00 add r7, sp, #0 + 80050a6: 6078 str r0, [r7, #4] + 80050a8: 6039 str r1, [r7, #0] /* Check parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold)); /* Process Locked */ __HAL_LOCK(huart); - 8004d86: 687b ldr r3, [r7, #4] - 8004d88: 2284 movs r2, #132 @ 0x84 - 8004d8a: 5c9b ldrb r3, [r3, r2] - 8004d8c: 2b01 cmp r3, #1 - 8004d8e: d101 bne.n 8004d94 - 8004d90: 2302 movs r3, #2 - 8004d92: e02e b.n 8004df2 - 8004d94: 687b ldr r3, [r7, #4] - 8004d96: 2284 movs r2, #132 @ 0x84 - 8004d98: 2101 movs r1, #1 - 8004d9a: 5499 strb r1, [r3, r2] + 80050aa: 687b ldr r3, [r7, #4] + 80050ac: 2284 movs r2, #132 @ 0x84 + 80050ae: 5c9b ldrb r3, [r3, r2] + 80050b0: 2b01 cmp r3, #1 + 80050b2: d101 bne.n 80050b8 + 80050b4: 2302 movs r3, #2 + 80050b6: e02e b.n 8005116 + 80050b8: 687b ldr r3, [r7, #4] + 80050ba: 2284 movs r2, #132 @ 0x84 + 80050bc: 2101 movs r1, #1 + 80050be: 5499 strb r1, [r3, r2] huart->gState = HAL_UART_STATE_BUSY; - 8004d9c: 687b ldr r3, [r7, #4] - 8004d9e: 2288 movs r2, #136 @ 0x88 - 8004da0: 2124 movs r1, #36 @ 0x24 - 8004da2: 5099 str r1, [r3, r2] + 80050c0: 687b ldr r3, [r7, #4] + 80050c2: 2288 movs r2, #136 @ 0x88 + 80050c4: 2124 movs r1, #36 @ 0x24 + 80050c6: 5099 str r1, [r3, r2] /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 8004da4: 687b ldr r3, [r7, #4] - 8004da6: 681b ldr r3, [r3, #0] - 8004da8: 681b ldr r3, [r3, #0] - 8004daa: 60fb str r3, [r7, #12] + 80050c8: 687b ldr r3, [r7, #4] + 80050ca: 681b ldr r3, [r3, #0] + 80050cc: 681b ldr r3, [r3, #0] + 80050ce: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 8004dac: 687b ldr r3, [r7, #4] - 8004dae: 681b ldr r3, [r3, #0] - 8004db0: 681a ldr r2, [r3, #0] - 8004db2: 687b ldr r3, [r7, #4] - 8004db4: 681b ldr r3, [r3, #0] - 8004db6: 2101 movs r1, #1 - 8004db8: 438a bics r2, r1 - 8004dba: 601a str r2, [r3, #0] + 80050d0: 687b ldr r3, [r7, #4] + 80050d2: 681b ldr r3, [r3, #0] + 80050d4: 681a ldr r2, [r3, #0] + 80050d6: 687b ldr r3, [r7, #4] + 80050d8: 681b ldr r3, [r3, #0] + 80050da: 2101 movs r1, #1 + 80050dc: 438a bics r2, r1 + 80050de: 601a str r2, [r3, #0] /* Update TX threshold configuration */ MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); - 8004dbc: 687b ldr r3, [r7, #4] - 8004dbe: 681b ldr r3, [r3, #0] - 8004dc0: 689b ldr r3, [r3, #8] - 8004dc2: 00db lsls r3, r3, #3 - 8004dc4: 08d9 lsrs r1, r3, #3 - 8004dc6: 687b ldr r3, [r7, #4] - 8004dc8: 681b ldr r3, [r3, #0] - 8004dca: 683a ldr r2, [r7, #0] - 8004dcc: 430a orrs r2, r1 - 8004dce: 609a str r2, [r3, #8] + 80050e0: 687b ldr r3, [r7, #4] + 80050e2: 681b ldr r3, [r3, #0] + 80050e4: 689b ldr r3, [r3, #8] + 80050e6: 00db lsls r3, r3, #3 + 80050e8: 08d9 lsrs r1, r3, #3 + 80050ea: 687b ldr r3, [r7, #4] + 80050ec: 681b ldr r3, [r3, #0] + 80050ee: 683a ldr r2, [r7, #0] + 80050f0: 430a orrs r2, r1 + 80050f2: 609a str r2, [r3, #8] /* Determine the number of data to process during RX/TX ISR execution */ UARTEx_SetNbDataToProcess(huart); - 8004dd0: 687b ldr r3, [r7, #4] - 8004dd2: 0018 movs r0, r3 - 8004dd4: f000 f854 bl 8004e80 + 80050f4: 687b ldr r3, [r7, #4] + 80050f6: 0018 movs r0, r3 + 80050f8: f000 f854 bl 80051a4 /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 8004dd8: 687b ldr r3, [r7, #4] - 8004dda: 681b ldr r3, [r3, #0] - 8004ddc: 68fa ldr r2, [r7, #12] - 8004dde: 601a str r2, [r3, #0] + 80050fc: 687b ldr r3, [r7, #4] + 80050fe: 681b ldr r3, [r3, #0] + 8005100: 68fa ldr r2, [r7, #12] + 8005102: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 8004de0: 687b ldr r3, [r7, #4] - 8004de2: 2288 movs r2, #136 @ 0x88 - 8004de4: 2120 movs r1, #32 - 8004de6: 5099 str r1, [r3, r2] + 8005104: 687b ldr r3, [r7, #4] + 8005106: 2288 movs r2, #136 @ 0x88 + 8005108: 2120 movs r1, #32 + 800510a: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 8004de8: 687b ldr r3, [r7, #4] - 8004dea: 2284 movs r2, #132 @ 0x84 - 8004dec: 2100 movs r1, #0 - 8004dee: 5499 strb r1, [r3, r2] + 800510c: 687b ldr r3, [r7, #4] + 800510e: 2284 movs r2, #132 @ 0x84 + 8005110: 2100 movs r1, #0 + 8005112: 5499 strb r1, [r3, r2] return HAL_OK; - 8004df0: 2300 movs r3, #0 + 8005114: 2300 movs r3, #0 } - 8004df2: 0018 movs r0, r3 - 8004df4: 46bd mov sp, r7 - 8004df6: b004 add sp, #16 - 8004df8: bd80 pop {r7, pc} + 8005116: 0018 movs r0, r3 + 8005118: 46bd mov sp, r7 + 800511a: b004 add sp, #16 + 800511c: bd80 pop {r7, pc} ... -08004dfc : +08005120 : * @arg @ref UART_RXFIFO_THRESHOLD_7_8 * @arg @ref UART_RXFIFO_THRESHOLD_8_8 * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) { - 8004dfc: b580 push {r7, lr} - 8004dfe: b084 sub sp, #16 - 8004e00: af00 add r7, sp, #0 - 8004e02: 6078 str r0, [r7, #4] - 8004e04: 6039 str r1, [r7, #0] + 8005120: b580 push {r7, lr} + 8005122: b084 sub sp, #16 + 8005124: af00 add r7, sp, #0 + 8005126: 6078 str r0, [r7, #4] + 8005128: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold)); /* Process Locked */ __HAL_LOCK(huart); - 8004e06: 687b ldr r3, [r7, #4] - 8004e08: 2284 movs r2, #132 @ 0x84 - 8004e0a: 5c9b ldrb r3, [r3, r2] - 8004e0c: 2b01 cmp r3, #1 - 8004e0e: d101 bne.n 8004e14 - 8004e10: 2302 movs r3, #2 - 8004e12: e02f b.n 8004e74 - 8004e14: 687b ldr r3, [r7, #4] - 8004e16: 2284 movs r2, #132 @ 0x84 - 8004e18: 2101 movs r1, #1 - 8004e1a: 5499 strb r1, [r3, r2] + 800512a: 687b ldr r3, [r7, #4] + 800512c: 2284 movs r2, #132 @ 0x84 + 800512e: 5c9b ldrb r3, [r3, r2] + 8005130: 2b01 cmp r3, #1 + 8005132: d101 bne.n 8005138 + 8005134: 2302 movs r3, #2 + 8005136: e02f b.n 8005198 + 8005138: 687b ldr r3, [r7, #4] + 800513a: 2284 movs r2, #132 @ 0x84 + 800513c: 2101 movs r1, #1 + 800513e: 5499 strb r1, [r3, r2] huart->gState = HAL_UART_STATE_BUSY; - 8004e1c: 687b ldr r3, [r7, #4] - 8004e1e: 2288 movs r2, #136 @ 0x88 - 8004e20: 2124 movs r1, #36 @ 0x24 - 8004e22: 5099 str r1, [r3, r2] + 8005140: 687b ldr r3, [r7, #4] + 8005142: 2288 movs r2, #136 @ 0x88 + 8005144: 2124 movs r1, #36 @ 0x24 + 8005146: 5099 str r1, [r3, r2] /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 8004e24: 687b ldr r3, [r7, #4] - 8004e26: 681b ldr r3, [r3, #0] - 8004e28: 681b ldr r3, [r3, #0] - 8004e2a: 60fb str r3, [r7, #12] + 8005148: 687b ldr r3, [r7, #4] + 800514a: 681b ldr r3, [r3, #0] + 800514c: 681b ldr r3, [r3, #0] + 800514e: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 8004e2c: 687b ldr r3, [r7, #4] - 8004e2e: 681b ldr r3, [r3, #0] - 8004e30: 681a ldr r2, [r3, #0] - 8004e32: 687b ldr r3, [r7, #4] - 8004e34: 681b ldr r3, [r3, #0] - 8004e36: 2101 movs r1, #1 - 8004e38: 438a bics r2, r1 - 8004e3a: 601a str r2, [r3, #0] + 8005150: 687b ldr r3, [r7, #4] + 8005152: 681b ldr r3, [r3, #0] + 8005154: 681a ldr r2, [r3, #0] + 8005156: 687b ldr r3, [r7, #4] + 8005158: 681b ldr r3, [r3, #0] + 800515a: 2101 movs r1, #1 + 800515c: 438a bics r2, r1 + 800515e: 601a str r2, [r3, #0] /* Update RX threshold configuration */ MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); - 8004e3c: 687b ldr r3, [r7, #4] - 8004e3e: 681b ldr r3, [r3, #0] - 8004e40: 689b ldr r3, [r3, #8] - 8004e42: 4a0e ldr r2, [pc, #56] @ (8004e7c ) - 8004e44: 4013 ands r3, r2 - 8004e46: 0019 movs r1, r3 - 8004e48: 687b ldr r3, [r7, #4] - 8004e4a: 681b ldr r3, [r3, #0] - 8004e4c: 683a ldr r2, [r7, #0] - 8004e4e: 430a orrs r2, r1 - 8004e50: 609a str r2, [r3, #8] + 8005160: 687b ldr r3, [r7, #4] + 8005162: 681b ldr r3, [r3, #0] + 8005164: 689b ldr r3, [r3, #8] + 8005166: 4a0e ldr r2, [pc, #56] @ (80051a0 ) + 8005168: 4013 ands r3, r2 + 800516a: 0019 movs r1, r3 + 800516c: 687b ldr r3, [r7, #4] + 800516e: 681b ldr r3, [r3, #0] + 8005170: 683a ldr r2, [r7, #0] + 8005172: 430a orrs r2, r1 + 8005174: 609a str r2, [r3, #8] /* Determine the number of data to process during RX/TX ISR execution */ UARTEx_SetNbDataToProcess(huart); - 8004e52: 687b ldr r3, [r7, #4] - 8004e54: 0018 movs r0, r3 - 8004e56: f000 f813 bl 8004e80 + 8005176: 687b ldr r3, [r7, #4] + 8005178: 0018 movs r0, r3 + 800517a: f000 f813 bl 80051a4 /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 8004e5a: 687b ldr r3, [r7, #4] - 8004e5c: 681b ldr r3, [r3, #0] - 8004e5e: 68fa ldr r2, [r7, #12] - 8004e60: 601a str r2, [r3, #0] + 800517e: 687b ldr r3, [r7, #4] + 8005180: 681b ldr r3, [r3, #0] + 8005182: 68fa ldr r2, [r7, #12] + 8005184: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 8004e62: 687b ldr r3, [r7, #4] - 8004e64: 2288 movs r2, #136 @ 0x88 - 8004e66: 2120 movs r1, #32 - 8004e68: 5099 str r1, [r3, r2] + 8005186: 687b ldr r3, [r7, #4] + 8005188: 2288 movs r2, #136 @ 0x88 + 800518a: 2120 movs r1, #32 + 800518c: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 8004e6a: 687b ldr r3, [r7, #4] - 8004e6c: 2284 movs r2, #132 @ 0x84 - 8004e6e: 2100 movs r1, #0 - 8004e70: 5499 strb r1, [r3, r2] + 800518e: 687b ldr r3, [r7, #4] + 8005190: 2284 movs r2, #132 @ 0x84 + 8005192: 2100 movs r1, #0 + 8005194: 5499 strb r1, [r3, r2] return HAL_OK; - 8004e72: 2300 movs r3, #0 + 8005196: 2300 movs r3, #0 } - 8004e74: 0018 movs r0, r3 - 8004e76: 46bd mov sp, r7 - 8004e78: b004 add sp, #16 - 8004e7a: bd80 pop {r7, pc} - 8004e7c: f1ffffff .word 0xf1ffffff + 8005198: 0018 movs r0, r3 + 800519a: 46bd mov sp, r7 + 800519c: b004 add sp, #16 + 800519e: bd80 pop {r7, pc} + 80051a0: f1ffffff .word 0xf1ffffff -08004e80 : +080051a4 : * the UART configuration registers. * @param huart UART handle. * @retval None */ static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) { - 8004e80: b5f0 push {r4, r5, r6, r7, lr} - 8004e82: b085 sub sp, #20 - 8004e84: af00 add r7, sp, #0 - 8004e86: 6078 str r0, [r7, #4] + 80051a4: b5f0 push {r4, r5, r6, r7, lr} + 80051a6: b085 sub sp, #20 + 80051a8: af00 add r7, sp, #0 + 80051aa: 6078 str r0, [r7, #4] uint8_t rx_fifo_threshold; uint8_t tx_fifo_threshold; static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U}; static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U}; if (huart->FifoMode == UART_FIFOMODE_DISABLE) - 8004e88: 687b ldr r3, [r7, #4] - 8004e8a: 6e5b ldr r3, [r3, #100] @ 0x64 - 8004e8c: 2b00 cmp r3, #0 - 8004e8e: d108 bne.n 8004ea2 + 80051ac: 687b ldr r3, [r7, #4] + 80051ae: 6e5b ldr r3, [r3, #100] @ 0x64 + 80051b0: 2b00 cmp r3, #0 + 80051b2: d108 bne.n 80051c6 { huart->NbTxDataToProcess = 1U; - 8004e90: 687b ldr r3, [r7, #4] - 8004e92: 226a movs r2, #106 @ 0x6a - 8004e94: 2101 movs r1, #1 - 8004e96: 5299 strh r1, [r3, r2] + 80051b4: 687b ldr r3, [r7, #4] + 80051b6: 226a movs r2, #106 @ 0x6a + 80051b8: 2101 movs r1, #1 + 80051ba: 5299 strh r1, [r3, r2] huart->NbRxDataToProcess = 1U; - 8004e98: 687b ldr r3, [r7, #4] - 8004e9a: 2268 movs r2, #104 @ 0x68 - 8004e9c: 2101 movs r1, #1 - 8004e9e: 5299 strh r1, [r3, r2] + 80051bc: 687b ldr r3, [r7, #4] + 80051be: 2268 movs r2, #104 @ 0x68 + 80051c0: 2101 movs r1, #1 + 80051c2: 5299 strh r1, [r3, r2] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / (uint16_t)denominator[tx_fifo_threshold]; huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / (uint16_t)denominator[rx_fifo_threshold]; } } - 8004ea0: e043 b.n 8004f2a + 80051c4: e043 b.n 800524e rx_fifo_depth = RX_FIFO_DEPTH; - 8004ea2: 260f movs r6, #15 - 8004ea4: 19bb adds r3, r7, r6 - 8004ea6: 2208 movs r2, #8 - 8004ea8: 701a strb r2, [r3, #0] + 80051c6: 260f movs r6, #15 + 80051c8: 19bb adds r3, r7, r6 + 80051ca: 2208 movs r2, #8 + 80051cc: 701a strb r2, [r3, #0] tx_fifo_depth = TX_FIFO_DEPTH; - 8004eaa: 200e movs r0, #14 - 8004eac: 183b adds r3, r7, r0 - 8004eae: 2208 movs r2, #8 - 8004eb0: 701a strb r2, [r3, #0] + 80051ce: 200e movs r0, #14 + 80051d0: 183b adds r3, r7, r0 + 80051d2: 2208 movs r2, #8 + 80051d4: 701a strb r2, [r3, #0] rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 8004eb2: 687b ldr r3, [r7, #4] - 8004eb4: 681b ldr r3, [r3, #0] - 8004eb6: 689b ldr r3, [r3, #8] - 8004eb8: 0e5b lsrs r3, r3, #25 - 8004eba: b2da uxtb r2, r3 - 8004ebc: 240d movs r4, #13 - 8004ebe: 193b adds r3, r7, r4 - 8004ec0: 2107 movs r1, #7 - 8004ec2: 400a ands r2, r1 - 8004ec4: 701a strb r2, [r3, #0] + 80051d6: 687b ldr r3, [r7, #4] + 80051d8: 681b ldr r3, [r3, #0] + 80051da: 689b ldr r3, [r3, #8] + 80051dc: 0e5b lsrs r3, r3, #25 + 80051de: b2da uxtb r2, r3 + 80051e0: 240d movs r4, #13 + 80051e2: 193b adds r3, r7, r4 + 80051e4: 2107 movs r1, #7 + 80051e6: 400a ands r2, r1 + 80051e8: 701a strb r2, [r3, #0] tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); - 8004ec6: 687b ldr r3, [r7, #4] - 8004ec8: 681b ldr r3, [r3, #0] - 8004eca: 689b ldr r3, [r3, #8] - 8004ecc: 0f5b lsrs r3, r3, #29 - 8004ece: b2da uxtb r2, r3 - 8004ed0: 250c movs r5, #12 - 8004ed2: 197b adds r3, r7, r5 - 8004ed4: 2107 movs r1, #7 - 8004ed6: 400a ands r2, r1 - 8004ed8: 701a strb r2, [r3, #0] + 80051ea: 687b ldr r3, [r7, #4] + 80051ec: 681b ldr r3, [r3, #0] + 80051ee: 689b ldr r3, [r3, #8] + 80051f0: 0f5b lsrs r3, r3, #29 + 80051f2: b2da uxtb r2, r3 + 80051f4: 250c movs r5, #12 + 80051f6: 197b adds r3, r7, r5 + 80051f8: 2107 movs r1, #7 + 80051fa: 400a ands r2, r1 + 80051fc: 701a strb r2, [r3, #0] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8004eda: 183b adds r3, r7, r0 - 8004edc: 781b ldrb r3, [r3, #0] - 8004ede: 197a adds r2, r7, r5 - 8004ee0: 7812 ldrb r2, [r2, #0] - 8004ee2: 4914 ldr r1, [pc, #80] @ (8004f34 ) - 8004ee4: 5c8a ldrb r2, [r1, r2] - 8004ee6: 435a muls r2, r3 - 8004ee8: 0010 movs r0, r2 + 80051fe: 183b adds r3, r7, r0 + 8005200: 781b ldrb r3, [r3, #0] + 8005202: 197a adds r2, r7, r5 + 8005204: 7812 ldrb r2, [r2, #0] + 8005206: 4914 ldr r1, [pc, #80] @ (8005258 ) + 8005208: 5c8a ldrb r2, [r1, r2] + 800520a: 435a muls r2, r3 + 800520c: 0010 movs r0, r2 (uint16_t)denominator[tx_fifo_threshold]; - 8004eea: 197b adds r3, r7, r5 - 8004eec: 781b ldrb r3, [r3, #0] - 8004eee: 4a12 ldr r2, [pc, #72] @ (8004f38 ) - 8004ef0: 5cd3 ldrb r3, [r2, r3] + 800520e: 197b adds r3, r7, r5 + 8005210: 781b ldrb r3, [r3, #0] + 8005212: 4a12 ldr r2, [pc, #72] @ (800525c ) + 8005214: 5cd3 ldrb r3, [r2, r3] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8004ef2: 0019 movs r1, r3 - 8004ef4: f7fb f998 bl 8000228 <__divsi3> - 8004ef8: 0003 movs r3, r0 - 8004efa: b299 uxth r1, r3 - 8004efc: 687b ldr r3, [r7, #4] - 8004efe: 226a movs r2, #106 @ 0x6a - 8004f00: 5299 strh r1, [r3, r2] + 8005216: 0019 movs r1, r3 + 8005218: f7fb f806 bl 8000228 <__divsi3> + 800521c: 0003 movs r3, r0 + 800521e: b299 uxth r1, r3 + 8005220: 687b ldr r3, [r7, #4] + 8005222: 226a movs r2, #106 @ 0x6a + 8005224: 5299 strh r1, [r3, r2] huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 8004f02: 19bb adds r3, r7, r6 - 8004f04: 781b ldrb r3, [r3, #0] - 8004f06: 193a adds r2, r7, r4 - 8004f08: 7812 ldrb r2, [r2, #0] - 8004f0a: 490a ldr r1, [pc, #40] @ (8004f34 ) - 8004f0c: 5c8a ldrb r2, [r1, r2] - 8004f0e: 435a muls r2, r3 - 8004f10: 0010 movs r0, r2 + 8005226: 19bb adds r3, r7, r6 + 8005228: 781b ldrb r3, [r3, #0] + 800522a: 193a adds r2, r7, r4 + 800522c: 7812 ldrb r2, [r2, #0] + 800522e: 490a ldr r1, [pc, #40] @ (8005258 ) + 8005230: 5c8a ldrb r2, [r1, r2] + 8005232: 435a muls r2, r3 + 8005234: 0010 movs r0, r2 (uint16_t)denominator[rx_fifo_threshold]; - 8004f12: 193b adds r3, r7, r4 - 8004f14: 781b ldrb r3, [r3, #0] - 8004f16: 4a08 ldr r2, [pc, #32] @ (8004f38 ) - 8004f18: 5cd3 ldrb r3, [r2, r3] + 8005236: 193b adds r3, r7, r4 + 8005238: 781b ldrb r3, [r3, #0] + 800523a: 4a08 ldr r2, [pc, #32] @ (800525c ) + 800523c: 5cd3 ldrb r3, [r2, r3] huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 8004f1a: 0019 movs r1, r3 - 8004f1c: f7fb f984 bl 8000228 <__divsi3> - 8004f20: 0003 movs r3, r0 - 8004f22: b299 uxth r1, r3 - 8004f24: 687b ldr r3, [r7, #4] - 8004f26: 2268 movs r2, #104 @ 0x68 - 8004f28: 5299 strh r1, [r3, r2] + 800523e: 0019 movs r1, r3 + 8005240: f7fa fff2 bl 8000228 <__divsi3> + 8005244: 0003 movs r3, r0 + 8005246: b299 uxth r1, r3 + 8005248: 687b ldr r3, [r7, #4] + 800524a: 2268 movs r2, #104 @ 0x68 + 800524c: 5299 strh r1, [r3, r2] } - 8004f2a: 46c0 nop @ (mov r8, r8) - 8004f2c: 46bd mov sp, r7 - 8004f2e: b005 add sp, #20 - 8004f30: bdf0 pop {r4, r5, r6, r7, pc} - 8004f32: 46c0 nop @ (mov r8, r8) - 8004f34: 08005f98 .word 0x08005f98 - 8004f38: 08005fa0 .word 0x08005fa0 + 800524e: 46c0 nop @ (mov r8, r8) + 8005250: 46bd mov sp, r7 + 8005252: b005 add sp, #20 + 8005254: bdf0 pop {r4, r5, r6, r7, pc} + 8005256: 46c0 nop @ (mov r8, r8) + 8005258: 080062b8 .word 0x080062b8 + 800525c: 080062c0 .word 0x080062c0 -08004f3c : - 8004f3c: 2300 movs r3, #0 - 8004f3e: b510 push {r4, lr} - 8004f40: 0004 movs r4, r0 - 8004f42: 6003 str r3, [r0, #0] - 8004f44: 6043 str r3, [r0, #4] - 8004f46: 6083 str r3, [r0, #8] - 8004f48: 8181 strh r1, [r0, #12] - 8004f4a: 6643 str r3, [r0, #100] @ 0x64 - 8004f4c: 81c2 strh r2, [r0, #14] - 8004f4e: 6103 str r3, [r0, #16] - 8004f50: 6143 str r3, [r0, #20] - 8004f52: 6183 str r3, [r0, #24] - 8004f54: 0019 movs r1, r3 - 8004f56: 2208 movs r2, #8 - 8004f58: 305c adds r0, #92 @ 0x5c - 8004f5a: f000 fa0f bl 800537c - 8004f5e: 4b0b ldr r3, [pc, #44] @ (8004f8c ) - 8004f60: 6224 str r4, [r4, #32] - 8004f62: 6263 str r3, [r4, #36] @ 0x24 - 8004f64: 4b0a ldr r3, [pc, #40] @ (8004f90 ) - 8004f66: 62a3 str r3, [r4, #40] @ 0x28 - 8004f68: 4b0a ldr r3, [pc, #40] @ (8004f94 ) - 8004f6a: 62e3 str r3, [r4, #44] @ 0x2c - 8004f6c: 4b0a ldr r3, [pc, #40] @ (8004f98 ) - 8004f6e: 6323 str r3, [r4, #48] @ 0x30 - 8004f70: 4b0a ldr r3, [pc, #40] @ (8004f9c ) - 8004f72: 429c cmp r4, r3 - 8004f74: d005 beq.n 8004f82 - 8004f76: 4b0a ldr r3, [pc, #40] @ (8004fa0 ) - 8004f78: 429c cmp r4, r3 - 8004f7a: d002 beq.n 8004f82 - 8004f7c: 4b09 ldr r3, [pc, #36] @ (8004fa4 ) - 8004f7e: 429c cmp r4, r3 - 8004f80: d103 bne.n 8004f8a - 8004f82: 0020 movs r0, r4 - 8004f84: 3058 adds r0, #88 @ 0x58 - 8004f86: f000 fa79 bl 800547c <__retarget_lock_init_recursive> - 8004f8a: bd10 pop {r4, pc} - 8004f8c: 080051a5 .word 0x080051a5 - 8004f90: 080051cd .word 0x080051cd - 8004f94: 08005205 .word 0x08005205 - 8004f98: 08005231 .word 0x08005231 - 8004f9c: 200001ec .word 0x200001ec - 8004fa0: 20000254 .word 0x20000254 - 8004fa4: 200002bc .word 0x200002bc +08005260 : + 8005260: 2300 movs r3, #0 + 8005262: b510 push {r4, lr} + 8005264: 0004 movs r4, r0 + 8005266: 6003 str r3, [r0, #0] + 8005268: 6043 str r3, [r0, #4] + 800526a: 6083 str r3, [r0, #8] + 800526c: 8181 strh r1, [r0, #12] + 800526e: 6643 str r3, [r0, #100] @ 0x64 + 8005270: 81c2 strh r2, [r0, #14] + 8005272: 6103 str r3, [r0, #16] + 8005274: 6143 str r3, [r0, #20] + 8005276: 6183 str r3, [r0, #24] + 8005278: 0019 movs r1, r3 + 800527a: 2208 movs r2, #8 + 800527c: 305c adds r0, #92 @ 0x5c + 800527e: f000 fa0f bl 80056a0 + 8005282: 4b0b ldr r3, [pc, #44] @ (80052b0 ) + 8005284: 6224 str r4, [r4, #32] + 8005286: 6263 str r3, [r4, #36] @ 0x24 + 8005288: 4b0a ldr r3, [pc, #40] @ (80052b4 ) + 800528a: 62a3 str r3, [r4, #40] @ 0x28 + 800528c: 4b0a ldr r3, [pc, #40] @ (80052b8 ) + 800528e: 62e3 str r3, [r4, #44] @ 0x2c + 8005290: 4b0a ldr r3, [pc, #40] @ (80052bc ) + 8005292: 6323 str r3, [r4, #48] @ 0x30 + 8005294: 4b0a ldr r3, [pc, #40] @ (80052c0 ) + 8005296: 429c cmp r4, r3 + 8005298: d005 beq.n 80052a6 + 800529a: 4b0a ldr r3, [pc, #40] @ (80052c4 ) + 800529c: 429c cmp r4, r3 + 800529e: d002 beq.n 80052a6 + 80052a0: 4b09 ldr r3, [pc, #36] @ (80052c8 ) + 80052a2: 429c cmp r4, r3 + 80052a4: d103 bne.n 80052ae + 80052a6: 0020 movs r0, r4 + 80052a8: 3058 adds r0, #88 @ 0x58 + 80052aa: f000 fa79 bl 80057a0 <__retarget_lock_init_recursive> + 80052ae: bd10 pop {r4, pc} + 80052b0: 080054c9 .word 0x080054c9 + 80052b4: 080054f1 .word 0x080054f1 + 80052b8: 08005529 .word 0x08005529 + 80052bc: 08005555 .word 0x08005555 + 80052c0: 200001dc .word 0x200001dc + 80052c4: 20000244 .word 0x20000244 + 80052c8: 200002ac .word 0x200002ac -08004fa8 : - 8004fa8: b510 push {r4, lr} - 8004faa: 4a03 ldr r2, [pc, #12] @ (8004fb8 ) - 8004fac: 4903 ldr r1, [pc, #12] @ (8004fbc ) - 8004fae: 4804 ldr r0, [pc, #16] @ (8004fc0 ) - 8004fb0: f000 f86c bl 800508c <_fwalk_sglue> - 8004fb4: bd10 pop {r4, pc} - 8004fb6: 46c0 nop @ (mov r8, r8) - 8004fb8: 2000000c .word 0x2000000c - 8004fbc: 08005d0d .word 0x08005d0d - 8004fc0: 2000001c .word 0x2000001c +080052cc : + 80052cc: b510 push {r4, lr} + 80052ce: 4a03 ldr r2, [pc, #12] @ (80052dc ) + 80052d0: 4903 ldr r1, [pc, #12] @ (80052e0 ) + 80052d2: 4804 ldr r0, [pc, #16] @ (80052e4 ) + 80052d4: f000 f86c bl 80053b0 <_fwalk_sglue> + 80052d8: bd10 pop {r4, pc} + 80052da: 46c0 nop @ (mov r8, r8) + 80052dc: 2000000c .word 0x2000000c + 80052e0: 08006031 .word 0x08006031 + 80052e4: 2000001c .word 0x2000001c -08004fc4 : - 8004fc4: 6841 ldr r1, [r0, #4] - 8004fc6: 4b0b ldr r3, [pc, #44] @ (8004ff4 ) - 8004fc8: b510 push {r4, lr} - 8004fca: 0004 movs r4, r0 - 8004fcc: 4299 cmp r1, r3 - 8004fce: d001 beq.n 8004fd4 - 8004fd0: f000 fe9c bl 8005d0c <_fflush_r> - 8004fd4: 68a1 ldr r1, [r4, #8] - 8004fd6: 4b08 ldr r3, [pc, #32] @ (8004ff8 ) - 8004fd8: 4299 cmp r1, r3 - 8004fda: d002 beq.n 8004fe2 - 8004fdc: 0020 movs r0, r4 - 8004fde: f000 fe95 bl 8005d0c <_fflush_r> - 8004fe2: 68e1 ldr r1, [r4, #12] - 8004fe4: 4b05 ldr r3, [pc, #20] @ (8004ffc ) - 8004fe6: 4299 cmp r1, r3 - 8004fe8: d002 beq.n 8004ff0 - 8004fea: 0020 movs r0, r4 - 8004fec: f000 fe8e bl 8005d0c <_fflush_r> - 8004ff0: bd10 pop {r4, pc} - 8004ff2: 46c0 nop @ (mov r8, r8) - 8004ff4: 200001ec .word 0x200001ec - 8004ff8: 20000254 .word 0x20000254 - 8004ffc: 200002bc .word 0x200002bc +080052e8 : + 80052e8: 6841 ldr r1, [r0, #4] + 80052ea: 4b0b ldr r3, [pc, #44] @ (8005318 ) + 80052ec: b510 push {r4, lr} + 80052ee: 0004 movs r4, r0 + 80052f0: 4299 cmp r1, r3 + 80052f2: d001 beq.n 80052f8 + 80052f4: f000 fe9c bl 8006030 <_fflush_r> + 80052f8: 68a1 ldr r1, [r4, #8] + 80052fa: 4b08 ldr r3, [pc, #32] @ (800531c ) + 80052fc: 4299 cmp r1, r3 + 80052fe: d002 beq.n 8005306 + 8005300: 0020 movs r0, r4 + 8005302: f000 fe95 bl 8006030 <_fflush_r> + 8005306: 68e1 ldr r1, [r4, #12] + 8005308: 4b05 ldr r3, [pc, #20] @ (8005320 ) + 800530a: 4299 cmp r1, r3 + 800530c: d002 beq.n 8005314 + 800530e: 0020 movs r0, r4 + 8005310: f000 fe8e bl 8006030 <_fflush_r> + 8005314: bd10 pop {r4, pc} + 8005316: 46c0 nop @ (mov r8, r8) + 8005318: 200001dc .word 0x200001dc + 800531c: 20000244 .word 0x20000244 + 8005320: 200002ac .word 0x200002ac -08005000 : - 8005000: b510 push {r4, lr} - 8005002: 4b09 ldr r3, [pc, #36] @ (8005028 ) - 8005004: 4a09 ldr r2, [pc, #36] @ (800502c ) - 8005006: 2104 movs r1, #4 - 8005008: 601a str r2, [r3, #0] - 800500a: 4809 ldr r0, [pc, #36] @ (8005030 ) - 800500c: 2200 movs r2, #0 - 800500e: f7ff ff95 bl 8004f3c - 8005012: 2201 movs r2, #1 - 8005014: 2109 movs r1, #9 - 8005016: 4807 ldr r0, [pc, #28] @ (8005034 ) - 8005018: f7ff ff90 bl 8004f3c - 800501c: 2202 movs r2, #2 - 800501e: 2112 movs r1, #18 - 8005020: 4805 ldr r0, [pc, #20] @ (8005038 ) - 8005022: f7ff ff8b bl 8004f3c - 8005026: bd10 pop {r4, pc} - 8005028: 20000324 .word 0x20000324 - 800502c: 08004fa9 .word 0x08004fa9 - 8005030: 200001ec .word 0x200001ec - 8005034: 20000254 .word 0x20000254 - 8005038: 200002bc .word 0x200002bc +08005324 : + 8005324: b510 push {r4, lr} + 8005326: 4b09 ldr r3, [pc, #36] @ (800534c ) + 8005328: 4a09 ldr r2, [pc, #36] @ (8005350 ) + 800532a: 2104 movs r1, #4 + 800532c: 601a str r2, [r3, #0] + 800532e: 4809 ldr r0, [pc, #36] @ (8005354 ) + 8005330: 2200 movs r2, #0 + 8005332: f7ff ff95 bl 8005260 + 8005336: 2201 movs r2, #1 + 8005338: 2109 movs r1, #9 + 800533a: 4807 ldr r0, [pc, #28] @ (8005358 ) + 800533c: f7ff ff90 bl 8005260 + 8005340: 2202 movs r2, #2 + 8005342: 2112 movs r1, #18 + 8005344: 4805 ldr r0, [pc, #20] @ (800535c ) + 8005346: f7ff ff8b bl 8005260 + 800534a: bd10 pop {r4, pc} + 800534c: 20000314 .word 0x20000314 + 8005350: 080052cd .word 0x080052cd + 8005354: 200001dc .word 0x200001dc + 8005358: 20000244 .word 0x20000244 + 800535c: 200002ac .word 0x200002ac -0800503c <__sfp_lock_acquire>: - 800503c: b510 push {r4, lr} - 800503e: 4802 ldr r0, [pc, #8] @ (8005048 <__sfp_lock_acquire+0xc>) - 8005040: f000 fa1d bl 800547e <__retarget_lock_acquire_recursive> - 8005044: bd10 pop {r4, pc} - 8005046: 46c0 nop @ (mov r8, r8) - 8005048: 2000032d .word 0x2000032d +08005360 <__sfp_lock_acquire>: + 8005360: b510 push {r4, lr} + 8005362: 4802 ldr r0, [pc, #8] @ (800536c <__sfp_lock_acquire+0xc>) + 8005364: f000 fa1d bl 80057a2 <__retarget_lock_acquire_recursive> + 8005368: bd10 pop {r4, pc} + 800536a: 46c0 nop @ (mov r8, r8) + 800536c: 2000031d .word 0x2000031d -0800504c <__sfp_lock_release>: - 800504c: b510 push {r4, lr} - 800504e: 4802 ldr r0, [pc, #8] @ (8005058 <__sfp_lock_release+0xc>) - 8005050: f000 fa16 bl 8005480 <__retarget_lock_release_recursive> - 8005054: bd10 pop {r4, pc} - 8005056: 46c0 nop @ (mov r8, r8) - 8005058: 2000032d .word 0x2000032d +08005370 <__sfp_lock_release>: + 8005370: b510 push {r4, lr} + 8005372: 4802 ldr r0, [pc, #8] @ (800537c <__sfp_lock_release+0xc>) + 8005374: f000 fa16 bl 80057a4 <__retarget_lock_release_recursive> + 8005378: bd10 pop {r4, pc} + 800537a: 46c0 nop @ (mov r8, r8) + 800537c: 2000031d .word 0x2000031d -0800505c <__sinit>: - 800505c: b510 push {r4, lr} - 800505e: 0004 movs r4, r0 - 8005060: f7ff ffec bl 800503c <__sfp_lock_acquire> - 8005064: 6a23 ldr r3, [r4, #32] - 8005066: 2b00 cmp r3, #0 - 8005068: d002 beq.n 8005070 <__sinit+0x14> - 800506a: f7ff ffef bl 800504c <__sfp_lock_release> - 800506e: bd10 pop {r4, pc} - 8005070: 4b04 ldr r3, [pc, #16] @ (8005084 <__sinit+0x28>) - 8005072: 6223 str r3, [r4, #32] - 8005074: 4b04 ldr r3, [pc, #16] @ (8005088 <__sinit+0x2c>) - 8005076: 681b ldr r3, [r3, #0] - 8005078: 2b00 cmp r3, #0 - 800507a: d1f6 bne.n 800506a <__sinit+0xe> - 800507c: f7ff ffc0 bl 8005000 - 8005080: e7f3 b.n 800506a <__sinit+0xe> - 8005082: 46c0 nop @ (mov r8, r8) - 8005084: 08004fc5 .word 0x08004fc5 - 8005088: 20000324 .word 0x20000324 +08005380 <__sinit>: + 8005380: b510 push {r4, lr} + 8005382: 0004 movs r4, r0 + 8005384: f7ff ffec bl 8005360 <__sfp_lock_acquire> + 8005388: 6a23 ldr r3, [r4, #32] + 800538a: 2b00 cmp r3, #0 + 800538c: d002 beq.n 8005394 <__sinit+0x14> + 800538e: f7ff ffef bl 8005370 <__sfp_lock_release> + 8005392: bd10 pop {r4, pc} + 8005394: 4b04 ldr r3, [pc, #16] @ (80053a8 <__sinit+0x28>) + 8005396: 6223 str r3, [r4, #32] + 8005398: 4b04 ldr r3, [pc, #16] @ (80053ac <__sinit+0x2c>) + 800539a: 681b ldr r3, [r3, #0] + 800539c: 2b00 cmp r3, #0 + 800539e: d1f6 bne.n 800538e <__sinit+0xe> + 80053a0: f7ff ffc0 bl 8005324 + 80053a4: e7f3 b.n 800538e <__sinit+0xe> + 80053a6: 46c0 nop @ (mov r8, r8) + 80053a8: 080052e9 .word 0x080052e9 + 80053ac: 20000314 .word 0x20000314 -0800508c <_fwalk_sglue>: - 800508c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 800508e: 0014 movs r4, r2 - 8005090: 2600 movs r6, #0 - 8005092: 9000 str r0, [sp, #0] - 8005094: 9101 str r1, [sp, #4] - 8005096: 68a5 ldr r5, [r4, #8] - 8005098: 6867 ldr r7, [r4, #4] - 800509a: 3f01 subs r7, #1 - 800509c: d504 bpl.n 80050a8 <_fwalk_sglue+0x1c> - 800509e: 6824 ldr r4, [r4, #0] - 80050a0: 2c00 cmp r4, #0 - 80050a2: d1f8 bne.n 8005096 <_fwalk_sglue+0xa> - 80050a4: 0030 movs r0, r6 - 80050a6: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 80050a8: 89ab ldrh r3, [r5, #12] - 80050aa: 2b01 cmp r3, #1 - 80050ac: d908 bls.n 80050c0 <_fwalk_sglue+0x34> - 80050ae: 220e movs r2, #14 - 80050b0: 5eab ldrsh r3, [r5, r2] - 80050b2: 3301 adds r3, #1 - 80050b4: d004 beq.n 80050c0 <_fwalk_sglue+0x34> - 80050b6: 0029 movs r1, r5 - 80050b8: 9800 ldr r0, [sp, #0] - 80050ba: 9b01 ldr r3, [sp, #4] - 80050bc: 4798 blx r3 - 80050be: 4306 orrs r6, r0 - 80050c0: 3568 adds r5, #104 @ 0x68 - 80050c2: e7ea b.n 800509a <_fwalk_sglue+0xe> +080053b0 <_fwalk_sglue>: + 80053b0: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 80053b2: 0014 movs r4, r2 + 80053b4: 2600 movs r6, #0 + 80053b6: 9000 str r0, [sp, #0] + 80053b8: 9101 str r1, [sp, #4] + 80053ba: 68a5 ldr r5, [r4, #8] + 80053bc: 6867 ldr r7, [r4, #4] + 80053be: 3f01 subs r7, #1 + 80053c0: d504 bpl.n 80053cc <_fwalk_sglue+0x1c> + 80053c2: 6824 ldr r4, [r4, #0] + 80053c4: 2c00 cmp r4, #0 + 80053c6: d1f8 bne.n 80053ba <_fwalk_sglue+0xa> + 80053c8: 0030 movs r0, r6 + 80053ca: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 80053cc: 89ab ldrh r3, [r5, #12] + 80053ce: 2b01 cmp r3, #1 + 80053d0: d908 bls.n 80053e4 <_fwalk_sglue+0x34> + 80053d2: 220e movs r2, #14 + 80053d4: 5eab ldrsh r3, [r5, r2] + 80053d6: 3301 adds r3, #1 + 80053d8: d004 beq.n 80053e4 <_fwalk_sglue+0x34> + 80053da: 0029 movs r1, r5 + 80053dc: 9800 ldr r0, [sp, #0] + 80053de: 9b01 ldr r3, [sp, #4] + 80053e0: 4798 blx r3 + 80053e2: 4306 orrs r6, r0 + 80053e4: 3568 adds r5, #104 @ 0x68 + 80053e6: e7ea b.n 80053be <_fwalk_sglue+0xe> -080050c4 : - 80050c4: b40f push {r0, r1, r2, r3} - 80050c6: b507 push {r0, r1, r2, lr} - 80050c8: 4905 ldr r1, [pc, #20] @ (80050e0 ) - 80050ca: ab04 add r3, sp, #16 - 80050cc: 6808 ldr r0, [r1, #0] - 80050ce: cb04 ldmia r3!, {r2} - 80050d0: 6881 ldr r1, [r0, #8] - 80050d2: 9301 str r3, [sp, #4] - 80050d4: f000 fafa bl 80056cc <_vfiprintf_r> - 80050d8: b003 add sp, #12 - 80050da: bc08 pop {r3} - 80050dc: b004 add sp, #16 - 80050de: 4718 bx r3 - 80050e0: 20000018 .word 0x20000018 +080053e8 : + 80053e8: b40f push {r0, r1, r2, r3} + 80053ea: b507 push {r0, r1, r2, lr} + 80053ec: 4905 ldr r1, [pc, #20] @ (8005404 ) + 80053ee: ab04 add r3, sp, #16 + 80053f0: 6808 ldr r0, [r1, #0] + 80053f2: cb04 ldmia r3!, {r2} + 80053f4: 6881 ldr r1, [r0, #8] + 80053f6: 9301 str r3, [sp, #4] + 80053f8: f000 fafa bl 80059f0 <_vfiprintf_r> + 80053fc: b003 add sp, #12 + 80053fe: bc08 pop {r3} + 8005400: b004 add sp, #16 + 8005402: 4718 bx r3 + 8005404: 20000018 .word 0x20000018 -080050e4 <_puts_r>: - 80050e4: 6a03 ldr r3, [r0, #32] - 80050e6: b570 push {r4, r5, r6, lr} - 80050e8: 0005 movs r5, r0 - 80050ea: 000e movs r6, r1 - 80050ec: 6884 ldr r4, [r0, #8] - 80050ee: 2b00 cmp r3, #0 - 80050f0: d101 bne.n 80050f6 <_puts_r+0x12> - 80050f2: f7ff ffb3 bl 800505c <__sinit> - 80050f6: 6e63 ldr r3, [r4, #100] @ 0x64 - 80050f8: 07db lsls r3, r3, #31 - 80050fa: d405 bmi.n 8005108 <_puts_r+0x24> - 80050fc: 89a3 ldrh r3, [r4, #12] - 80050fe: 059b lsls r3, r3, #22 - 8005100: d402 bmi.n 8005108 <_puts_r+0x24> - 8005102: 6da0 ldr r0, [r4, #88] @ 0x58 - 8005104: f000 f9bb bl 800547e <__retarget_lock_acquire_recursive> - 8005108: 89a3 ldrh r3, [r4, #12] - 800510a: 071b lsls r3, r3, #28 - 800510c: d502 bpl.n 8005114 <_puts_r+0x30> - 800510e: 6923 ldr r3, [r4, #16] - 8005110: 2b00 cmp r3, #0 - 8005112: d11f bne.n 8005154 <_puts_r+0x70> - 8005114: 0021 movs r1, r4 - 8005116: 0028 movs r0, r5 - 8005118: f000 f8d2 bl 80052c0 <__swsetup_r> - 800511c: 2800 cmp r0, #0 - 800511e: d019 beq.n 8005154 <_puts_r+0x70> - 8005120: 2501 movs r5, #1 - 8005122: 426d negs r5, r5 - 8005124: 6e63 ldr r3, [r4, #100] @ 0x64 - 8005126: 07db lsls r3, r3, #31 - 8005128: d405 bmi.n 8005136 <_puts_r+0x52> - 800512a: 89a3 ldrh r3, [r4, #12] - 800512c: 059b lsls r3, r3, #22 - 800512e: d402 bmi.n 8005136 <_puts_r+0x52> - 8005130: 6da0 ldr r0, [r4, #88] @ 0x58 - 8005132: f000 f9a5 bl 8005480 <__retarget_lock_release_recursive> - 8005136: 0028 movs r0, r5 - 8005138: bd70 pop {r4, r5, r6, pc} - 800513a: 3601 adds r6, #1 - 800513c: 60a3 str r3, [r4, #8] - 800513e: 2b00 cmp r3, #0 - 8005140: da04 bge.n 800514c <_puts_r+0x68> - 8005142: 69a2 ldr r2, [r4, #24] - 8005144: 429a cmp r2, r3 - 8005146: dc16 bgt.n 8005176 <_puts_r+0x92> - 8005148: 290a cmp r1, #10 - 800514a: d014 beq.n 8005176 <_puts_r+0x92> - 800514c: 6823 ldr r3, [r4, #0] - 800514e: 1c5a adds r2, r3, #1 - 8005150: 6022 str r2, [r4, #0] - 8005152: 7019 strb r1, [r3, #0] - 8005154: 68a3 ldr r3, [r4, #8] - 8005156: 7831 ldrb r1, [r6, #0] - 8005158: 3b01 subs r3, #1 - 800515a: 2900 cmp r1, #0 - 800515c: d1ed bne.n 800513a <_puts_r+0x56> - 800515e: 60a3 str r3, [r4, #8] - 8005160: 2b00 cmp r3, #0 - 8005162: da0f bge.n 8005184 <_puts_r+0xa0> - 8005164: 0022 movs r2, r4 - 8005166: 0028 movs r0, r5 - 8005168: 310a adds r1, #10 - 800516a: f000 f867 bl 800523c <__swbuf_r> - 800516e: 3001 adds r0, #1 - 8005170: d0d6 beq.n 8005120 <_puts_r+0x3c> - 8005172: 250a movs r5, #10 - 8005174: e7d6 b.n 8005124 <_puts_r+0x40> - 8005176: 0022 movs r2, r4 - 8005178: 0028 movs r0, r5 - 800517a: f000 f85f bl 800523c <__swbuf_r> - 800517e: 3001 adds r0, #1 - 8005180: d1e8 bne.n 8005154 <_puts_r+0x70> - 8005182: e7cd b.n 8005120 <_puts_r+0x3c> - 8005184: 6823 ldr r3, [r4, #0] - 8005186: 1c5a adds r2, r3, #1 - 8005188: 6022 str r2, [r4, #0] - 800518a: 220a movs r2, #10 - 800518c: 701a strb r2, [r3, #0] - 800518e: e7f0 b.n 8005172 <_puts_r+0x8e> - -08005190 : - 8005190: b510 push {r4, lr} - 8005192: 4b03 ldr r3, [pc, #12] @ (80051a0 ) - 8005194: 0001 movs r1, r0 - 8005196: 6818 ldr r0, [r3, #0] - 8005198: f7ff ffa4 bl 80050e4 <_puts_r> - 800519c: bd10 pop {r4, pc} - 800519e: 46c0 nop @ (mov r8, r8) - 80051a0: 20000018 .word 0x20000018 - -080051a4 <__sread>: - 80051a4: b570 push {r4, r5, r6, lr} - 80051a6: 000c movs r4, r1 - 80051a8: 250e movs r5, #14 - 80051aa: 5f49 ldrsh r1, [r1, r5] - 80051ac: f000 f914 bl 80053d8 <_read_r> - 80051b0: 2800 cmp r0, #0 - 80051b2: db03 blt.n 80051bc <__sread+0x18> - 80051b4: 6d63 ldr r3, [r4, #84] @ 0x54 - 80051b6: 181b adds r3, r3, r0 - 80051b8: 6563 str r3, [r4, #84] @ 0x54 - 80051ba: bd70 pop {r4, r5, r6, pc} - 80051bc: 89a3 ldrh r3, [r4, #12] - 80051be: 4a02 ldr r2, [pc, #8] @ (80051c8 <__sread+0x24>) - 80051c0: 4013 ands r3, r2 - 80051c2: 81a3 strh r3, [r4, #12] - 80051c4: e7f9 b.n 80051ba <__sread+0x16> - 80051c6: 46c0 nop @ (mov r8, r8) - 80051c8: ffffefff .word 0xffffefff - -080051cc <__swrite>: - 80051cc: b5f8 push {r3, r4, r5, r6, r7, lr} - 80051ce: 001f movs r7, r3 - 80051d0: 898b ldrh r3, [r1, #12] - 80051d2: 0005 movs r5, r0 - 80051d4: 000c movs r4, r1 - 80051d6: 0016 movs r6, r2 - 80051d8: 05db lsls r3, r3, #23 - 80051da: d505 bpl.n 80051e8 <__swrite+0x1c> - 80051dc: 230e movs r3, #14 - 80051de: 5ec9 ldrsh r1, [r1, r3] - 80051e0: 2200 movs r2, #0 - 80051e2: 2302 movs r3, #2 - 80051e4: f000 f8e4 bl 80053b0 <_lseek_r> - 80051e8: 89a3 ldrh r3, [r4, #12] - 80051ea: 4a05 ldr r2, [pc, #20] @ (8005200 <__swrite+0x34>) - 80051ec: 0028 movs r0, r5 - 80051ee: 4013 ands r3, r2 - 80051f0: 81a3 strh r3, [r4, #12] - 80051f2: 0032 movs r2, r6 - 80051f4: 230e movs r3, #14 - 80051f6: 5ee1 ldrsh r1, [r4, r3] - 80051f8: 003b movs r3, r7 - 80051fa: f000 f901 bl 8005400 <_write_r> - 80051fe: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8005200: ffffefff .word 0xffffefff - -08005204 <__sseek>: - 8005204: b570 push {r4, r5, r6, lr} - 8005206: 000c movs r4, r1 - 8005208: 250e movs r5, #14 - 800520a: 5f49 ldrsh r1, [r1, r5] - 800520c: f000 f8d0 bl 80053b0 <_lseek_r> - 8005210: 89a3 ldrh r3, [r4, #12] - 8005212: 1c42 adds r2, r0, #1 - 8005214: d103 bne.n 800521e <__sseek+0x1a> - 8005216: 4a05 ldr r2, [pc, #20] @ (800522c <__sseek+0x28>) - 8005218: 4013 ands r3, r2 - 800521a: 81a3 strh r3, [r4, #12] - 800521c: bd70 pop {r4, r5, r6, pc} - 800521e: 2280 movs r2, #128 @ 0x80 - 8005220: 0152 lsls r2, r2, #5 - 8005222: 4313 orrs r3, r2 - 8005224: 81a3 strh r3, [r4, #12] - 8005226: 6560 str r0, [r4, #84] @ 0x54 - 8005228: e7f8 b.n 800521c <__sseek+0x18> - 800522a: 46c0 nop @ (mov r8, r8) - 800522c: ffffefff .word 0xffffefff - -08005230 <__sclose>: - 8005230: b510 push {r4, lr} - 8005232: 230e movs r3, #14 - 8005234: 5ec9 ldrsh r1, [r1, r3] - 8005236: f000 f8a9 bl 800538c <_close_r> - 800523a: bd10 pop {r4, pc} - -0800523c <__swbuf_r>: - 800523c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800523e: 0006 movs r6, r0 - 8005240: 000d movs r5, r1 - 8005242: 0014 movs r4, r2 - 8005244: 2800 cmp r0, #0 - 8005246: d004 beq.n 8005252 <__swbuf_r+0x16> - 8005248: 6a03 ldr r3, [r0, #32] - 800524a: 2b00 cmp r3, #0 - 800524c: d101 bne.n 8005252 <__swbuf_r+0x16> - 800524e: f7ff ff05 bl 800505c <__sinit> - 8005252: 69a3 ldr r3, [r4, #24] - 8005254: 60a3 str r3, [r4, #8] - 8005256: 89a3 ldrh r3, [r4, #12] - 8005258: 071b lsls r3, r3, #28 - 800525a: d502 bpl.n 8005262 <__swbuf_r+0x26> - 800525c: 6923 ldr r3, [r4, #16] - 800525e: 2b00 cmp r3, #0 - 8005260: d109 bne.n 8005276 <__swbuf_r+0x3a> - 8005262: 0021 movs r1, r4 - 8005264: 0030 movs r0, r6 - 8005266: f000 f82b bl 80052c0 <__swsetup_r> - 800526a: 2800 cmp r0, #0 - 800526c: d003 beq.n 8005276 <__swbuf_r+0x3a> - 800526e: 2501 movs r5, #1 - 8005270: 426d negs r5, r5 - 8005272: 0028 movs r0, r5 - 8005274: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8005276: 6923 ldr r3, [r4, #16] - 8005278: 6820 ldr r0, [r4, #0] - 800527a: b2ef uxtb r7, r5 - 800527c: 1ac0 subs r0, r0, r3 - 800527e: 6963 ldr r3, [r4, #20] - 8005280: b2ed uxtb r5, r5 - 8005282: 4283 cmp r3, r0 - 8005284: dc05 bgt.n 8005292 <__swbuf_r+0x56> - 8005286: 0021 movs r1, r4 - 8005288: 0030 movs r0, r6 - 800528a: f000 fd3f bl 8005d0c <_fflush_r> - 800528e: 2800 cmp r0, #0 - 8005290: d1ed bne.n 800526e <__swbuf_r+0x32> - 8005292: 68a3 ldr r3, [r4, #8] - 8005294: 3001 adds r0, #1 - 8005296: 3b01 subs r3, #1 - 8005298: 60a3 str r3, [r4, #8] - 800529a: 6823 ldr r3, [r4, #0] - 800529c: 1c5a adds r2, r3, #1 - 800529e: 6022 str r2, [r4, #0] - 80052a0: 701f strb r7, [r3, #0] - 80052a2: 6963 ldr r3, [r4, #20] - 80052a4: 4283 cmp r3, r0 - 80052a6: d004 beq.n 80052b2 <__swbuf_r+0x76> - 80052a8: 89a3 ldrh r3, [r4, #12] - 80052aa: 07db lsls r3, r3, #31 - 80052ac: d5e1 bpl.n 8005272 <__swbuf_r+0x36> - 80052ae: 2d0a cmp r5, #10 - 80052b0: d1df bne.n 8005272 <__swbuf_r+0x36> - 80052b2: 0021 movs r1, r4 - 80052b4: 0030 movs r0, r6 - 80052b6: f000 fd29 bl 8005d0c <_fflush_r> - 80052ba: 2800 cmp r0, #0 - 80052bc: d0d9 beq.n 8005272 <__swbuf_r+0x36> - 80052be: e7d6 b.n 800526e <__swbuf_r+0x32> - -080052c0 <__swsetup_r>: - 80052c0: 4b2d ldr r3, [pc, #180] @ (8005378 <__swsetup_r+0xb8>) - 80052c2: b570 push {r4, r5, r6, lr} - 80052c4: 0005 movs r5, r0 - 80052c6: 6818 ldr r0, [r3, #0] - 80052c8: 000c movs r4, r1 - 80052ca: 2800 cmp r0, #0 - 80052cc: d004 beq.n 80052d8 <__swsetup_r+0x18> - 80052ce: 6a03 ldr r3, [r0, #32] - 80052d0: 2b00 cmp r3, #0 - 80052d2: d101 bne.n 80052d8 <__swsetup_r+0x18> - 80052d4: f7ff fec2 bl 800505c <__sinit> - 80052d8: 230c movs r3, #12 - 80052da: 5ee2 ldrsh r2, [r4, r3] - 80052dc: 0713 lsls r3, r2, #28 - 80052de: d423 bmi.n 8005328 <__swsetup_r+0x68> - 80052e0: 06d3 lsls r3, r2, #27 - 80052e2: d407 bmi.n 80052f4 <__swsetup_r+0x34> - 80052e4: 2309 movs r3, #9 - 80052e6: 602b str r3, [r5, #0] - 80052e8: 2340 movs r3, #64 @ 0x40 - 80052ea: 2001 movs r0, #1 - 80052ec: 4313 orrs r3, r2 - 80052ee: 81a3 strh r3, [r4, #12] - 80052f0: 4240 negs r0, r0 - 80052f2: e03a b.n 800536a <__swsetup_r+0xaa> - 80052f4: 0752 lsls r2, r2, #29 - 80052f6: d513 bpl.n 8005320 <__swsetup_r+0x60> - 80052f8: 6b61 ldr r1, [r4, #52] @ 0x34 - 80052fa: 2900 cmp r1, #0 - 80052fc: d008 beq.n 8005310 <__swsetup_r+0x50> - 80052fe: 0023 movs r3, r4 - 8005300: 3344 adds r3, #68 @ 0x44 - 8005302: 4299 cmp r1, r3 - 8005304: d002 beq.n 800530c <__swsetup_r+0x4c> - 8005306: 0028 movs r0, r5 - 8005308: f000 f8bc bl 8005484 <_free_r> - 800530c: 2300 movs r3, #0 - 800530e: 6363 str r3, [r4, #52] @ 0x34 - 8005310: 2224 movs r2, #36 @ 0x24 - 8005312: 89a3 ldrh r3, [r4, #12] - 8005314: 4393 bics r3, r2 - 8005316: 81a3 strh r3, [r4, #12] - 8005318: 2300 movs r3, #0 - 800531a: 6063 str r3, [r4, #4] - 800531c: 6923 ldr r3, [r4, #16] - 800531e: 6023 str r3, [r4, #0] - 8005320: 2308 movs r3, #8 - 8005322: 89a2 ldrh r2, [r4, #12] - 8005324: 4313 orrs r3, r2 - 8005326: 81a3 strh r3, [r4, #12] - 8005328: 6923 ldr r3, [r4, #16] - 800532a: 2b00 cmp r3, #0 - 800532c: d10b bne.n 8005346 <__swsetup_r+0x86> - 800532e: 21a0 movs r1, #160 @ 0xa0 - 8005330: 2280 movs r2, #128 @ 0x80 - 8005332: 89a3 ldrh r3, [r4, #12] - 8005334: 0089 lsls r1, r1, #2 - 8005336: 0092 lsls r2, r2, #2 - 8005338: 400b ands r3, r1 - 800533a: 4293 cmp r3, r2 - 800533c: d003 beq.n 8005346 <__swsetup_r+0x86> - 800533e: 0021 movs r1, r4 - 8005340: 0028 movs r0, r5 - 8005342: f000 fd39 bl 8005db8 <__smakebuf_r> - 8005346: 230c movs r3, #12 - 8005348: 5ee2 ldrsh r2, [r4, r3] - 800534a: 2101 movs r1, #1 - 800534c: 0013 movs r3, r2 - 800534e: 400b ands r3, r1 - 8005350: 420a tst r2, r1 - 8005352: d00b beq.n 800536c <__swsetup_r+0xac> - 8005354: 2300 movs r3, #0 - 8005356: 60a3 str r3, [r4, #8] - 8005358: 6963 ldr r3, [r4, #20] - 800535a: 425b negs r3, r3 - 800535c: 61a3 str r3, [r4, #24] - 800535e: 2000 movs r0, #0 - 8005360: 6923 ldr r3, [r4, #16] - 8005362: 4283 cmp r3, r0 - 8005364: d101 bne.n 800536a <__swsetup_r+0xaa> - 8005366: 0613 lsls r3, r2, #24 - 8005368: d4be bmi.n 80052e8 <__swsetup_r+0x28> - 800536a: bd70 pop {r4, r5, r6, pc} - 800536c: 0791 lsls r1, r2, #30 - 800536e: d400 bmi.n 8005372 <__swsetup_r+0xb2> - 8005370: 6963 ldr r3, [r4, #20] - 8005372: 60a3 str r3, [r4, #8] - 8005374: e7f3 b.n 800535e <__swsetup_r+0x9e> - 8005376: 46c0 nop @ (mov r8, r8) - 8005378: 20000018 .word 0x20000018 - -0800537c : - 800537c: 0003 movs r3, r0 - 800537e: 1882 adds r2, r0, r2 - 8005380: 4293 cmp r3, r2 - 8005382: d100 bne.n 8005386 - 8005384: 4770 bx lr - 8005386: 7019 strb r1, [r3, #0] - 8005388: 3301 adds r3, #1 - 800538a: e7f9 b.n 8005380 - -0800538c <_close_r>: - 800538c: 2300 movs r3, #0 - 800538e: b570 push {r4, r5, r6, lr} - 8005390: 4d06 ldr r5, [pc, #24] @ (80053ac <_close_r+0x20>) - 8005392: 0004 movs r4, r0 - 8005394: 0008 movs r0, r1 - 8005396: 602b str r3, [r5, #0] - 8005398: f7fb ffb9 bl 800130e <_close> - 800539c: 1c43 adds r3, r0, #1 - 800539e: d103 bne.n 80053a8 <_close_r+0x1c> - 80053a0: 682b ldr r3, [r5, #0] - 80053a2: 2b00 cmp r3, #0 - 80053a4: d000 beq.n 80053a8 <_close_r+0x1c> - 80053a6: 6023 str r3, [r4, #0] - 80053a8: bd70 pop {r4, r5, r6, pc} - 80053aa: 46c0 nop @ (mov r8, r8) - 80053ac: 20000328 .word 0x20000328 - -080053b0 <_lseek_r>: - 80053b0: b570 push {r4, r5, r6, lr} - 80053b2: 0004 movs r4, r0 - 80053b4: 0008 movs r0, r1 - 80053b6: 0011 movs r1, r2 - 80053b8: 001a movs r2, r3 - 80053ba: 2300 movs r3, #0 - 80053bc: 4d05 ldr r5, [pc, #20] @ (80053d4 <_lseek_r+0x24>) - 80053be: 602b str r3, [r5, #0] - 80053c0: f7fb ffc6 bl 8001350 <_lseek> - 80053c4: 1c43 adds r3, r0, #1 - 80053c6: d103 bne.n 80053d0 <_lseek_r+0x20> - 80053c8: 682b ldr r3, [r5, #0] - 80053ca: 2b00 cmp r3, #0 - 80053cc: d000 beq.n 80053d0 <_lseek_r+0x20> - 80053ce: 6023 str r3, [r4, #0] - 80053d0: bd70 pop {r4, r5, r6, pc} - 80053d2: 46c0 nop @ (mov r8, r8) - 80053d4: 20000328 .word 0x20000328 - -080053d8 <_read_r>: - 80053d8: b570 push {r4, r5, r6, lr} - 80053da: 0004 movs r4, r0 - 80053dc: 0008 movs r0, r1 - 80053de: 0011 movs r1, r2 - 80053e0: 001a movs r2, r3 - 80053e2: 2300 movs r3, #0 - 80053e4: 4d05 ldr r5, [pc, #20] @ (80053fc <_read_r+0x24>) - 80053e6: 602b str r3, [r5, #0] - 80053e8: f7fb ff58 bl 800129c <_read> - 80053ec: 1c43 adds r3, r0, #1 - 80053ee: d103 bne.n 80053f8 <_read_r+0x20> - 80053f0: 682b ldr r3, [r5, #0] - 80053f2: 2b00 cmp r3, #0 - 80053f4: d000 beq.n 80053f8 <_read_r+0x20> - 80053f6: 6023 str r3, [r4, #0] - 80053f8: bd70 pop {r4, r5, r6, pc} - 80053fa: 46c0 nop @ (mov r8, r8) - 80053fc: 20000328 .word 0x20000328 - -08005400 <_write_r>: - 8005400: b570 push {r4, r5, r6, lr} - 8005402: 0004 movs r4, r0 - 8005404: 0008 movs r0, r1 - 8005406: 0011 movs r1, r2 - 8005408: 001a movs r2, r3 - 800540a: 2300 movs r3, #0 - 800540c: 4d05 ldr r5, [pc, #20] @ (8005424 <_write_r+0x24>) - 800540e: 602b str r3, [r5, #0] - 8005410: f7fb ff61 bl 80012d6 <_write> - 8005414: 1c43 adds r3, r0, #1 - 8005416: d103 bne.n 8005420 <_write_r+0x20> - 8005418: 682b ldr r3, [r5, #0] - 800541a: 2b00 cmp r3, #0 - 800541c: d000 beq.n 8005420 <_write_r+0x20> - 800541e: 6023 str r3, [r4, #0] - 8005420: bd70 pop {r4, r5, r6, pc} - 8005422: 46c0 nop @ (mov r8, r8) - 8005424: 20000328 .word 0x20000328 - -08005428 <__errno>: - 8005428: 4b01 ldr r3, [pc, #4] @ (8005430 <__errno+0x8>) - 800542a: 6818 ldr r0, [r3, #0] - 800542c: 4770 bx lr - 800542e: 46c0 nop @ (mov r8, r8) - 8005430: 20000018 .word 0x20000018 - -08005434 <__libc_init_array>: - 8005434: b570 push {r4, r5, r6, lr} - 8005436: 2600 movs r6, #0 - 8005438: 4c0c ldr r4, [pc, #48] @ (800546c <__libc_init_array+0x38>) - 800543a: 4d0d ldr r5, [pc, #52] @ (8005470 <__libc_init_array+0x3c>) - 800543c: 1b64 subs r4, r4, r5 - 800543e: 10a4 asrs r4, r4, #2 - 8005440: 42a6 cmp r6, r4 - 8005442: d109 bne.n 8005458 <__libc_init_array+0x24> - 8005444: 2600 movs r6, #0 - 8005446: f000 fd3b bl 8005ec0 <_init> - 800544a: 4c0a ldr r4, [pc, #40] @ (8005474 <__libc_init_array+0x40>) - 800544c: 4d0a ldr r5, [pc, #40] @ (8005478 <__libc_init_array+0x44>) - 800544e: 1b64 subs r4, r4, r5 - 8005450: 10a4 asrs r4, r4, #2 - 8005452: 42a6 cmp r6, r4 - 8005454: d105 bne.n 8005462 <__libc_init_array+0x2e> - 8005456: bd70 pop {r4, r5, r6, pc} - 8005458: 00b3 lsls r3, r6, #2 - 800545a: 58eb ldr r3, [r5, r3] - 800545c: 4798 blx r3 +08005408 <_puts_r>: + 8005408: 6a03 ldr r3, [r0, #32] + 800540a: b570 push {r4, r5, r6, lr} + 800540c: 0005 movs r5, r0 + 800540e: 000e movs r6, r1 + 8005410: 6884 ldr r4, [r0, #8] + 8005412: 2b00 cmp r3, #0 + 8005414: d101 bne.n 800541a <_puts_r+0x12> + 8005416: f7ff ffb3 bl 8005380 <__sinit> + 800541a: 6e63 ldr r3, [r4, #100] @ 0x64 + 800541c: 07db lsls r3, r3, #31 + 800541e: d405 bmi.n 800542c <_puts_r+0x24> + 8005420: 89a3 ldrh r3, [r4, #12] + 8005422: 059b lsls r3, r3, #22 + 8005424: d402 bmi.n 800542c <_puts_r+0x24> + 8005426: 6da0 ldr r0, [r4, #88] @ 0x58 + 8005428: f000 f9bb bl 80057a2 <__retarget_lock_acquire_recursive> + 800542c: 89a3 ldrh r3, [r4, #12] + 800542e: 071b lsls r3, r3, #28 + 8005430: d502 bpl.n 8005438 <_puts_r+0x30> + 8005432: 6923 ldr r3, [r4, #16] + 8005434: 2b00 cmp r3, #0 + 8005436: d11f bne.n 8005478 <_puts_r+0x70> + 8005438: 0021 movs r1, r4 + 800543a: 0028 movs r0, r5 + 800543c: f000 f8d2 bl 80055e4 <__swsetup_r> + 8005440: 2800 cmp r0, #0 + 8005442: d019 beq.n 8005478 <_puts_r+0x70> + 8005444: 2501 movs r5, #1 + 8005446: 426d negs r5, r5 + 8005448: 6e63 ldr r3, [r4, #100] @ 0x64 + 800544a: 07db lsls r3, r3, #31 + 800544c: d405 bmi.n 800545a <_puts_r+0x52> + 800544e: 89a3 ldrh r3, [r4, #12] + 8005450: 059b lsls r3, r3, #22 + 8005452: d402 bmi.n 800545a <_puts_r+0x52> + 8005454: 6da0 ldr r0, [r4, #88] @ 0x58 + 8005456: f000 f9a5 bl 80057a4 <__retarget_lock_release_recursive> + 800545a: 0028 movs r0, r5 + 800545c: bd70 pop {r4, r5, r6, pc} 800545e: 3601 adds r6, #1 - 8005460: e7ee b.n 8005440 <__libc_init_array+0xc> - 8005462: 00b3 lsls r3, r6, #2 - 8005464: 58eb ldr r3, [r5, r3] - 8005466: 4798 blx r3 - 8005468: 3601 adds r6, #1 - 800546a: e7f2 b.n 8005452 <__libc_init_array+0x1e> - 800546c: 08005fdc .word 0x08005fdc - 8005470: 08005fdc .word 0x08005fdc - 8005474: 08005fe0 .word 0x08005fe0 - 8005478: 08005fdc .word 0x08005fdc + 8005460: 60a3 str r3, [r4, #8] + 8005462: 2b00 cmp r3, #0 + 8005464: da04 bge.n 8005470 <_puts_r+0x68> + 8005466: 69a2 ldr r2, [r4, #24] + 8005468: 429a cmp r2, r3 + 800546a: dc16 bgt.n 800549a <_puts_r+0x92> + 800546c: 290a cmp r1, #10 + 800546e: d014 beq.n 800549a <_puts_r+0x92> + 8005470: 6823 ldr r3, [r4, #0] + 8005472: 1c5a adds r2, r3, #1 + 8005474: 6022 str r2, [r4, #0] + 8005476: 7019 strb r1, [r3, #0] + 8005478: 68a3 ldr r3, [r4, #8] + 800547a: 7831 ldrb r1, [r6, #0] + 800547c: 3b01 subs r3, #1 + 800547e: 2900 cmp r1, #0 + 8005480: d1ed bne.n 800545e <_puts_r+0x56> + 8005482: 60a3 str r3, [r4, #8] + 8005484: 2b00 cmp r3, #0 + 8005486: da0f bge.n 80054a8 <_puts_r+0xa0> + 8005488: 0022 movs r2, r4 + 800548a: 0028 movs r0, r5 + 800548c: 310a adds r1, #10 + 800548e: f000 f867 bl 8005560 <__swbuf_r> + 8005492: 3001 adds r0, #1 + 8005494: d0d6 beq.n 8005444 <_puts_r+0x3c> + 8005496: 250a movs r5, #10 + 8005498: e7d6 b.n 8005448 <_puts_r+0x40> + 800549a: 0022 movs r2, r4 + 800549c: 0028 movs r0, r5 + 800549e: f000 f85f bl 8005560 <__swbuf_r> + 80054a2: 3001 adds r0, #1 + 80054a4: d1e8 bne.n 8005478 <_puts_r+0x70> + 80054a6: e7cd b.n 8005444 <_puts_r+0x3c> + 80054a8: 6823 ldr r3, [r4, #0] + 80054aa: 1c5a adds r2, r3, #1 + 80054ac: 6022 str r2, [r4, #0] + 80054ae: 220a movs r2, #10 + 80054b0: 701a strb r2, [r3, #0] + 80054b2: e7f0 b.n 8005496 <_puts_r+0x8e> -0800547c <__retarget_lock_init_recursive>: - 800547c: 4770 bx lr +080054b4 : + 80054b4: b510 push {r4, lr} + 80054b6: 4b03 ldr r3, [pc, #12] @ (80054c4 ) + 80054b8: 0001 movs r1, r0 + 80054ba: 6818 ldr r0, [r3, #0] + 80054bc: f7ff ffa4 bl 8005408 <_puts_r> + 80054c0: bd10 pop {r4, pc} + 80054c2: 46c0 nop @ (mov r8, r8) + 80054c4: 20000018 .word 0x20000018 -0800547e <__retarget_lock_acquire_recursive>: - 800547e: 4770 bx lr +080054c8 <__sread>: + 80054c8: b570 push {r4, r5, r6, lr} + 80054ca: 000c movs r4, r1 + 80054cc: 250e movs r5, #14 + 80054ce: 5f49 ldrsh r1, [r1, r5] + 80054d0: f000 f914 bl 80056fc <_read_r> + 80054d4: 2800 cmp r0, #0 + 80054d6: db03 blt.n 80054e0 <__sread+0x18> + 80054d8: 6d63 ldr r3, [r4, #84] @ 0x54 + 80054da: 181b adds r3, r3, r0 + 80054dc: 6563 str r3, [r4, #84] @ 0x54 + 80054de: bd70 pop {r4, r5, r6, pc} + 80054e0: 89a3 ldrh r3, [r4, #12] + 80054e2: 4a02 ldr r2, [pc, #8] @ (80054ec <__sread+0x24>) + 80054e4: 4013 ands r3, r2 + 80054e6: 81a3 strh r3, [r4, #12] + 80054e8: e7f9 b.n 80054de <__sread+0x16> + 80054ea: 46c0 nop @ (mov r8, r8) + 80054ec: ffffefff .word 0xffffefff -08005480 <__retarget_lock_release_recursive>: - 8005480: 4770 bx lr +080054f0 <__swrite>: + 80054f0: b5f8 push {r3, r4, r5, r6, r7, lr} + 80054f2: 001f movs r7, r3 + 80054f4: 898b ldrh r3, [r1, #12] + 80054f6: 0005 movs r5, r0 + 80054f8: 000c movs r4, r1 + 80054fa: 0016 movs r6, r2 + 80054fc: 05db lsls r3, r3, #23 + 80054fe: d505 bpl.n 800550c <__swrite+0x1c> + 8005500: 230e movs r3, #14 + 8005502: 5ec9 ldrsh r1, [r1, r3] + 8005504: 2200 movs r2, #0 + 8005506: 2302 movs r3, #2 + 8005508: f000 f8e4 bl 80056d4 <_lseek_r> + 800550c: 89a3 ldrh r3, [r4, #12] + 800550e: 4a05 ldr r2, [pc, #20] @ (8005524 <__swrite+0x34>) + 8005510: 0028 movs r0, r5 + 8005512: 4013 ands r3, r2 + 8005514: 81a3 strh r3, [r4, #12] + 8005516: 0032 movs r2, r6 + 8005518: 230e movs r3, #14 + 800551a: 5ee1 ldrsh r1, [r4, r3] + 800551c: 003b movs r3, r7 + 800551e: f000 f901 bl 8005724 <_write_r> + 8005522: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8005524: ffffefff .word 0xffffefff + +08005528 <__sseek>: + 8005528: b570 push {r4, r5, r6, lr} + 800552a: 000c movs r4, r1 + 800552c: 250e movs r5, #14 + 800552e: 5f49 ldrsh r1, [r1, r5] + 8005530: f000 f8d0 bl 80056d4 <_lseek_r> + 8005534: 89a3 ldrh r3, [r4, #12] + 8005536: 1c42 adds r2, r0, #1 + 8005538: d103 bne.n 8005542 <__sseek+0x1a> + 800553a: 4a05 ldr r2, [pc, #20] @ (8005550 <__sseek+0x28>) + 800553c: 4013 ands r3, r2 + 800553e: 81a3 strh r3, [r4, #12] + 8005540: bd70 pop {r4, r5, r6, pc} + 8005542: 2280 movs r2, #128 @ 0x80 + 8005544: 0152 lsls r2, r2, #5 + 8005546: 4313 orrs r3, r2 + 8005548: 81a3 strh r3, [r4, #12] + 800554a: 6560 str r0, [r4, #84] @ 0x54 + 800554c: e7f8 b.n 8005540 <__sseek+0x18> + 800554e: 46c0 nop @ (mov r8, r8) + 8005550: ffffefff .word 0xffffefff + +08005554 <__sclose>: + 8005554: b510 push {r4, lr} + 8005556: 230e movs r3, #14 + 8005558: 5ec9 ldrsh r1, [r1, r3] + 800555a: f000 f8a9 bl 80056b0 <_close_r> + 800555e: bd10 pop {r4, pc} + +08005560 <__swbuf_r>: + 8005560: b5f8 push {r3, r4, r5, r6, r7, lr} + 8005562: 0006 movs r6, r0 + 8005564: 000d movs r5, r1 + 8005566: 0014 movs r4, r2 + 8005568: 2800 cmp r0, #0 + 800556a: d004 beq.n 8005576 <__swbuf_r+0x16> + 800556c: 6a03 ldr r3, [r0, #32] + 800556e: 2b00 cmp r3, #0 + 8005570: d101 bne.n 8005576 <__swbuf_r+0x16> + 8005572: f7ff ff05 bl 8005380 <__sinit> + 8005576: 69a3 ldr r3, [r4, #24] + 8005578: 60a3 str r3, [r4, #8] + 800557a: 89a3 ldrh r3, [r4, #12] + 800557c: 071b lsls r3, r3, #28 + 800557e: d502 bpl.n 8005586 <__swbuf_r+0x26> + 8005580: 6923 ldr r3, [r4, #16] + 8005582: 2b00 cmp r3, #0 + 8005584: d109 bne.n 800559a <__swbuf_r+0x3a> + 8005586: 0021 movs r1, r4 + 8005588: 0030 movs r0, r6 + 800558a: f000 f82b bl 80055e4 <__swsetup_r> + 800558e: 2800 cmp r0, #0 + 8005590: d003 beq.n 800559a <__swbuf_r+0x3a> + 8005592: 2501 movs r5, #1 + 8005594: 426d negs r5, r5 + 8005596: 0028 movs r0, r5 + 8005598: bdf8 pop {r3, r4, r5, r6, r7, pc} + 800559a: 6923 ldr r3, [r4, #16] + 800559c: 6820 ldr r0, [r4, #0] + 800559e: b2ef uxtb r7, r5 + 80055a0: 1ac0 subs r0, r0, r3 + 80055a2: 6963 ldr r3, [r4, #20] + 80055a4: b2ed uxtb r5, r5 + 80055a6: 4283 cmp r3, r0 + 80055a8: dc05 bgt.n 80055b6 <__swbuf_r+0x56> + 80055aa: 0021 movs r1, r4 + 80055ac: 0030 movs r0, r6 + 80055ae: f000 fd3f bl 8006030 <_fflush_r> + 80055b2: 2800 cmp r0, #0 + 80055b4: d1ed bne.n 8005592 <__swbuf_r+0x32> + 80055b6: 68a3 ldr r3, [r4, #8] + 80055b8: 3001 adds r0, #1 + 80055ba: 3b01 subs r3, #1 + 80055bc: 60a3 str r3, [r4, #8] + 80055be: 6823 ldr r3, [r4, #0] + 80055c0: 1c5a adds r2, r3, #1 + 80055c2: 6022 str r2, [r4, #0] + 80055c4: 701f strb r7, [r3, #0] + 80055c6: 6963 ldr r3, [r4, #20] + 80055c8: 4283 cmp r3, r0 + 80055ca: d004 beq.n 80055d6 <__swbuf_r+0x76> + 80055cc: 89a3 ldrh r3, [r4, #12] + 80055ce: 07db lsls r3, r3, #31 + 80055d0: d5e1 bpl.n 8005596 <__swbuf_r+0x36> + 80055d2: 2d0a cmp r5, #10 + 80055d4: d1df bne.n 8005596 <__swbuf_r+0x36> + 80055d6: 0021 movs r1, r4 + 80055d8: 0030 movs r0, r6 + 80055da: f000 fd29 bl 8006030 <_fflush_r> + 80055de: 2800 cmp r0, #0 + 80055e0: d0d9 beq.n 8005596 <__swbuf_r+0x36> + 80055e2: e7d6 b.n 8005592 <__swbuf_r+0x32> + +080055e4 <__swsetup_r>: + 80055e4: 4b2d ldr r3, [pc, #180] @ (800569c <__swsetup_r+0xb8>) + 80055e6: b570 push {r4, r5, r6, lr} + 80055e8: 0005 movs r5, r0 + 80055ea: 6818 ldr r0, [r3, #0] + 80055ec: 000c movs r4, r1 + 80055ee: 2800 cmp r0, #0 + 80055f0: d004 beq.n 80055fc <__swsetup_r+0x18> + 80055f2: 6a03 ldr r3, [r0, #32] + 80055f4: 2b00 cmp r3, #0 + 80055f6: d101 bne.n 80055fc <__swsetup_r+0x18> + 80055f8: f7ff fec2 bl 8005380 <__sinit> + 80055fc: 230c movs r3, #12 + 80055fe: 5ee2 ldrsh r2, [r4, r3] + 8005600: 0713 lsls r3, r2, #28 + 8005602: d423 bmi.n 800564c <__swsetup_r+0x68> + 8005604: 06d3 lsls r3, r2, #27 + 8005606: d407 bmi.n 8005618 <__swsetup_r+0x34> + 8005608: 2309 movs r3, #9 + 800560a: 602b str r3, [r5, #0] + 800560c: 2340 movs r3, #64 @ 0x40 + 800560e: 2001 movs r0, #1 + 8005610: 4313 orrs r3, r2 + 8005612: 81a3 strh r3, [r4, #12] + 8005614: 4240 negs r0, r0 + 8005616: e03a b.n 800568e <__swsetup_r+0xaa> + 8005618: 0752 lsls r2, r2, #29 + 800561a: d513 bpl.n 8005644 <__swsetup_r+0x60> + 800561c: 6b61 ldr r1, [r4, #52] @ 0x34 + 800561e: 2900 cmp r1, #0 + 8005620: d008 beq.n 8005634 <__swsetup_r+0x50> + 8005622: 0023 movs r3, r4 + 8005624: 3344 adds r3, #68 @ 0x44 + 8005626: 4299 cmp r1, r3 + 8005628: d002 beq.n 8005630 <__swsetup_r+0x4c> + 800562a: 0028 movs r0, r5 + 800562c: f000 f8bc bl 80057a8 <_free_r> + 8005630: 2300 movs r3, #0 + 8005632: 6363 str r3, [r4, #52] @ 0x34 + 8005634: 2224 movs r2, #36 @ 0x24 + 8005636: 89a3 ldrh r3, [r4, #12] + 8005638: 4393 bics r3, r2 + 800563a: 81a3 strh r3, [r4, #12] + 800563c: 2300 movs r3, #0 + 800563e: 6063 str r3, [r4, #4] + 8005640: 6923 ldr r3, [r4, #16] + 8005642: 6023 str r3, [r4, #0] + 8005644: 2308 movs r3, #8 + 8005646: 89a2 ldrh r2, [r4, #12] + 8005648: 4313 orrs r3, r2 + 800564a: 81a3 strh r3, [r4, #12] + 800564c: 6923 ldr r3, [r4, #16] + 800564e: 2b00 cmp r3, #0 + 8005650: d10b bne.n 800566a <__swsetup_r+0x86> + 8005652: 21a0 movs r1, #160 @ 0xa0 + 8005654: 2280 movs r2, #128 @ 0x80 + 8005656: 89a3 ldrh r3, [r4, #12] + 8005658: 0089 lsls r1, r1, #2 + 800565a: 0092 lsls r2, r2, #2 + 800565c: 400b ands r3, r1 + 800565e: 4293 cmp r3, r2 + 8005660: d003 beq.n 800566a <__swsetup_r+0x86> + 8005662: 0021 movs r1, r4 + 8005664: 0028 movs r0, r5 + 8005666: f000 fd39 bl 80060dc <__smakebuf_r> + 800566a: 230c movs r3, #12 + 800566c: 5ee2 ldrsh r2, [r4, r3] + 800566e: 2101 movs r1, #1 + 8005670: 0013 movs r3, r2 + 8005672: 400b ands r3, r1 + 8005674: 420a tst r2, r1 + 8005676: d00b beq.n 8005690 <__swsetup_r+0xac> + 8005678: 2300 movs r3, #0 + 800567a: 60a3 str r3, [r4, #8] + 800567c: 6963 ldr r3, [r4, #20] + 800567e: 425b negs r3, r3 + 8005680: 61a3 str r3, [r4, #24] + 8005682: 2000 movs r0, #0 + 8005684: 6923 ldr r3, [r4, #16] + 8005686: 4283 cmp r3, r0 + 8005688: d101 bne.n 800568e <__swsetup_r+0xaa> + 800568a: 0613 lsls r3, r2, #24 + 800568c: d4be bmi.n 800560c <__swsetup_r+0x28> + 800568e: bd70 pop {r4, r5, r6, pc} + 8005690: 0791 lsls r1, r2, #30 + 8005692: d400 bmi.n 8005696 <__swsetup_r+0xb2> + 8005694: 6963 ldr r3, [r4, #20] + 8005696: 60a3 str r3, [r4, #8] + 8005698: e7f3 b.n 8005682 <__swsetup_r+0x9e> + 800569a: 46c0 nop @ (mov r8, r8) + 800569c: 20000018 .word 0x20000018 + +080056a0 : + 80056a0: 0003 movs r3, r0 + 80056a2: 1882 adds r2, r0, r2 + 80056a4: 4293 cmp r3, r2 + 80056a6: d100 bne.n 80056aa + 80056a8: 4770 bx lr + 80056aa: 7019 strb r1, [r3, #0] + 80056ac: 3301 adds r3, #1 + 80056ae: e7f9 b.n 80056a4 + +080056b0 <_close_r>: + 80056b0: 2300 movs r3, #0 + 80056b2: b570 push {r4, r5, r6, lr} + 80056b4: 4d06 ldr r5, [pc, #24] @ (80056d0 <_close_r+0x20>) + 80056b6: 0004 movs r4, r0 + 80056b8: 0008 movs r0, r1 + 80056ba: 602b str r3, [r5, #0] + 80056bc: f7fb fec7 bl 800144e <_close> + 80056c0: 1c43 adds r3, r0, #1 + 80056c2: d103 bne.n 80056cc <_close_r+0x1c> + 80056c4: 682b ldr r3, [r5, #0] + 80056c6: 2b00 cmp r3, #0 + 80056c8: d000 beq.n 80056cc <_close_r+0x1c> + 80056ca: 6023 str r3, [r4, #0] + 80056cc: bd70 pop {r4, r5, r6, pc} + 80056ce: 46c0 nop @ (mov r8, r8) + 80056d0: 20000318 .word 0x20000318 + +080056d4 <_lseek_r>: + 80056d4: b570 push {r4, r5, r6, lr} + 80056d6: 0004 movs r4, r0 + 80056d8: 0008 movs r0, r1 + 80056da: 0011 movs r1, r2 + 80056dc: 001a movs r2, r3 + 80056de: 2300 movs r3, #0 + 80056e0: 4d05 ldr r5, [pc, #20] @ (80056f8 <_lseek_r+0x24>) + 80056e2: 602b str r3, [r5, #0] + 80056e4: f7fb fed4 bl 8001490 <_lseek> + 80056e8: 1c43 adds r3, r0, #1 + 80056ea: d103 bne.n 80056f4 <_lseek_r+0x20> + 80056ec: 682b ldr r3, [r5, #0] + 80056ee: 2b00 cmp r3, #0 + 80056f0: d000 beq.n 80056f4 <_lseek_r+0x20> + 80056f2: 6023 str r3, [r4, #0] + 80056f4: bd70 pop {r4, r5, r6, pc} + 80056f6: 46c0 nop @ (mov r8, r8) + 80056f8: 20000318 .word 0x20000318 + +080056fc <_read_r>: + 80056fc: b570 push {r4, r5, r6, lr} + 80056fe: 0004 movs r4, r0 + 8005700: 0008 movs r0, r1 + 8005702: 0011 movs r1, r2 + 8005704: 001a movs r2, r3 + 8005706: 2300 movs r3, #0 + 8005708: 4d05 ldr r5, [pc, #20] @ (8005720 <_read_r+0x24>) + 800570a: 602b str r3, [r5, #0] + 800570c: f7fb fe66 bl 80013dc <_read> + 8005710: 1c43 adds r3, r0, #1 + 8005712: d103 bne.n 800571c <_read_r+0x20> + 8005714: 682b ldr r3, [r5, #0] + 8005716: 2b00 cmp r3, #0 + 8005718: d000 beq.n 800571c <_read_r+0x20> + 800571a: 6023 str r3, [r4, #0] + 800571c: bd70 pop {r4, r5, r6, pc} + 800571e: 46c0 nop @ (mov r8, r8) + 8005720: 20000318 .word 0x20000318 + +08005724 <_write_r>: + 8005724: b570 push {r4, r5, r6, lr} + 8005726: 0004 movs r4, r0 + 8005728: 0008 movs r0, r1 + 800572a: 0011 movs r1, r2 + 800572c: 001a movs r2, r3 + 800572e: 2300 movs r3, #0 + 8005730: 4d05 ldr r5, [pc, #20] @ (8005748 <_write_r+0x24>) + 8005732: 602b str r3, [r5, #0] + 8005734: f7fb fe6f bl 8001416 <_write> + 8005738: 1c43 adds r3, r0, #1 + 800573a: d103 bne.n 8005744 <_write_r+0x20> + 800573c: 682b ldr r3, [r5, #0] + 800573e: 2b00 cmp r3, #0 + 8005740: d000 beq.n 8005744 <_write_r+0x20> + 8005742: 6023 str r3, [r4, #0] + 8005744: bd70 pop {r4, r5, r6, pc} + 8005746: 46c0 nop @ (mov r8, r8) + 8005748: 20000318 .word 0x20000318 + +0800574c <__errno>: + 800574c: 4b01 ldr r3, [pc, #4] @ (8005754 <__errno+0x8>) + 800574e: 6818 ldr r0, [r3, #0] + 8005750: 4770 bx lr + 8005752: 46c0 nop @ (mov r8, r8) + 8005754: 20000018 .word 0x20000018 + +08005758 <__libc_init_array>: + 8005758: b570 push {r4, r5, r6, lr} + 800575a: 2600 movs r6, #0 + 800575c: 4c0c ldr r4, [pc, #48] @ (8005790 <__libc_init_array+0x38>) + 800575e: 4d0d ldr r5, [pc, #52] @ (8005794 <__libc_init_array+0x3c>) + 8005760: 1b64 subs r4, r4, r5 + 8005762: 10a4 asrs r4, r4, #2 + 8005764: 42a6 cmp r6, r4 + 8005766: d109 bne.n 800577c <__libc_init_array+0x24> + 8005768: 2600 movs r6, #0 + 800576a: f000 fd3b bl 80061e4 <_init> + 800576e: 4c0a ldr r4, [pc, #40] @ (8005798 <__libc_init_array+0x40>) + 8005770: 4d0a ldr r5, [pc, #40] @ (800579c <__libc_init_array+0x44>) + 8005772: 1b64 subs r4, r4, r5 + 8005774: 10a4 asrs r4, r4, #2 + 8005776: 42a6 cmp r6, r4 + 8005778: d105 bne.n 8005786 <__libc_init_array+0x2e> + 800577a: bd70 pop {r4, r5, r6, pc} + 800577c: 00b3 lsls r3, r6, #2 + 800577e: 58eb ldr r3, [r5, r3] + 8005780: 4798 blx r3 + 8005782: 3601 adds r6, #1 + 8005784: e7ee b.n 8005764 <__libc_init_array+0xc> + 8005786: 00b3 lsls r3, r6, #2 + 8005788: 58eb ldr r3, [r5, r3] + 800578a: 4798 blx r3 + 800578c: 3601 adds r6, #1 + 800578e: e7f2 b.n 8005776 <__libc_init_array+0x1e> + 8005790: 080062fc .word 0x080062fc + 8005794: 080062fc .word 0x080062fc + 8005798: 08006300 .word 0x08006300 + 800579c: 080062fc .word 0x080062fc + +080057a0 <__retarget_lock_init_recursive>: + 80057a0: 4770 bx lr + +080057a2 <__retarget_lock_acquire_recursive>: + 80057a2: 4770 bx lr + +080057a4 <__retarget_lock_release_recursive>: + 80057a4: 4770 bx lr ... -08005484 <_free_r>: - 8005484: b570 push {r4, r5, r6, lr} - 8005486: 0005 movs r5, r0 - 8005488: 1e0c subs r4, r1, #0 - 800548a: d010 beq.n 80054ae <_free_r+0x2a> - 800548c: 3c04 subs r4, #4 - 800548e: 6823 ldr r3, [r4, #0] - 8005490: 2b00 cmp r3, #0 - 8005492: da00 bge.n 8005496 <_free_r+0x12> - 8005494: 18e4 adds r4, r4, r3 - 8005496: 0028 movs r0, r5 - 8005498: f000 f8e0 bl 800565c <__malloc_lock> - 800549c: 4a1d ldr r2, [pc, #116] @ (8005514 <_free_r+0x90>) - 800549e: 6813 ldr r3, [r2, #0] - 80054a0: 2b00 cmp r3, #0 - 80054a2: d105 bne.n 80054b0 <_free_r+0x2c> - 80054a4: 6063 str r3, [r4, #4] - 80054a6: 6014 str r4, [r2, #0] - 80054a8: 0028 movs r0, r5 - 80054aa: f000 f8df bl 800566c <__malloc_unlock> - 80054ae: bd70 pop {r4, r5, r6, pc} - 80054b0: 42a3 cmp r3, r4 - 80054b2: d908 bls.n 80054c6 <_free_r+0x42> - 80054b4: 6820 ldr r0, [r4, #0] - 80054b6: 1821 adds r1, r4, r0 - 80054b8: 428b cmp r3, r1 - 80054ba: d1f3 bne.n 80054a4 <_free_r+0x20> - 80054bc: 6819 ldr r1, [r3, #0] - 80054be: 685b ldr r3, [r3, #4] - 80054c0: 1809 adds r1, r1, r0 - 80054c2: 6021 str r1, [r4, #0] - 80054c4: e7ee b.n 80054a4 <_free_r+0x20> - 80054c6: 001a movs r2, r3 - 80054c8: 685b ldr r3, [r3, #4] - 80054ca: 2b00 cmp r3, #0 - 80054cc: d001 beq.n 80054d2 <_free_r+0x4e> - 80054ce: 42a3 cmp r3, r4 - 80054d0: d9f9 bls.n 80054c6 <_free_r+0x42> - 80054d2: 6811 ldr r1, [r2, #0] - 80054d4: 1850 adds r0, r2, r1 - 80054d6: 42a0 cmp r0, r4 - 80054d8: d10b bne.n 80054f2 <_free_r+0x6e> - 80054da: 6820 ldr r0, [r4, #0] - 80054dc: 1809 adds r1, r1, r0 - 80054de: 1850 adds r0, r2, r1 - 80054e0: 6011 str r1, [r2, #0] - 80054e2: 4283 cmp r3, r0 - 80054e4: d1e0 bne.n 80054a8 <_free_r+0x24> - 80054e6: 6818 ldr r0, [r3, #0] - 80054e8: 685b ldr r3, [r3, #4] - 80054ea: 1841 adds r1, r0, r1 - 80054ec: 6011 str r1, [r2, #0] - 80054ee: 6053 str r3, [r2, #4] - 80054f0: e7da b.n 80054a8 <_free_r+0x24> - 80054f2: 42a0 cmp r0, r4 - 80054f4: d902 bls.n 80054fc <_free_r+0x78> - 80054f6: 230c movs r3, #12 - 80054f8: 602b str r3, [r5, #0] - 80054fa: e7d5 b.n 80054a8 <_free_r+0x24> - 80054fc: 6820 ldr r0, [r4, #0] - 80054fe: 1821 adds r1, r4, r0 - 8005500: 428b cmp r3, r1 - 8005502: d103 bne.n 800550c <_free_r+0x88> - 8005504: 6819 ldr r1, [r3, #0] - 8005506: 685b ldr r3, [r3, #4] - 8005508: 1809 adds r1, r1, r0 - 800550a: 6021 str r1, [r4, #0] - 800550c: 6063 str r3, [r4, #4] - 800550e: 6054 str r4, [r2, #4] - 8005510: e7ca b.n 80054a8 <_free_r+0x24> - 8005512: 46c0 nop @ (mov r8, r8) - 8005514: 20000334 .word 0x20000334 +080057a8 <_free_r>: + 80057a8: b570 push {r4, r5, r6, lr} + 80057aa: 0005 movs r5, r0 + 80057ac: 1e0c subs r4, r1, #0 + 80057ae: d010 beq.n 80057d2 <_free_r+0x2a> + 80057b0: 3c04 subs r4, #4 + 80057b2: 6823 ldr r3, [r4, #0] + 80057b4: 2b00 cmp r3, #0 + 80057b6: da00 bge.n 80057ba <_free_r+0x12> + 80057b8: 18e4 adds r4, r4, r3 + 80057ba: 0028 movs r0, r5 + 80057bc: f000 f8e0 bl 8005980 <__malloc_lock> + 80057c0: 4a1d ldr r2, [pc, #116] @ (8005838 <_free_r+0x90>) + 80057c2: 6813 ldr r3, [r2, #0] + 80057c4: 2b00 cmp r3, #0 + 80057c6: d105 bne.n 80057d4 <_free_r+0x2c> + 80057c8: 6063 str r3, [r4, #4] + 80057ca: 6014 str r4, [r2, #0] + 80057cc: 0028 movs r0, r5 + 80057ce: f000 f8df bl 8005990 <__malloc_unlock> + 80057d2: bd70 pop {r4, r5, r6, pc} + 80057d4: 42a3 cmp r3, r4 + 80057d6: d908 bls.n 80057ea <_free_r+0x42> + 80057d8: 6820 ldr r0, [r4, #0] + 80057da: 1821 adds r1, r4, r0 + 80057dc: 428b cmp r3, r1 + 80057de: d1f3 bne.n 80057c8 <_free_r+0x20> + 80057e0: 6819 ldr r1, [r3, #0] + 80057e2: 685b ldr r3, [r3, #4] + 80057e4: 1809 adds r1, r1, r0 + 80057e6: 6021 str r1, [r4, #0] + 80057e8: e7ee b.n 80057c8 <_free_r+0x20> + 80057ea: 001a movs r2, r3 + 80057ec: 685b ldr r3, [r3, #4] + 80057ee: 2b00 cmp r3, #0 + 80057f0: d001 beq.n 80057f6 <_free_r+0x4e> + 80057f2: 42a3 cmp r3, r4 + 80057f4: d9f9 bls.n 80057ea <_free_r+0x42> + 80057f6: 6811 ldr r1, [r2, #0] + 80057f8: 1850 adds r0, r2, r1 + 80057fa: 42a0 cmp r0, r4 + 80057fc: d10b bne.n 8005816 <_free_r+0x6e> + 80057fe: 6820 ldr r0, [r4, #0] + 8005800: 1809 adds r1, r1, r0 + 8005802: 1850 adds r0, r2, r1 + 8005804: 6011 str r1, [r2, #0] + 8005806: 4283 cmp r3, r0 + 8005808: d1e0 bne.n 80057cc <_free_r+0x24> + 800580a: 6818 ldr r0, [r3, #0] + 800580c: 685b ldr r3, [r3, #4] + 800580e: 1841 adds r1, r0, r1 + 8005810: 6011 str r1, [r2, #0] + 8005812: 6053 str r3, [r2, #4] + 8005814: e7da b.n 80057cc <_free_r+0x24> + 8005816: 42a0 cmp r0, r4 + 8005818: d902 bls.n 8005820 <_free_r+0x78> + 800581a: 230c movs r3, #12 + 800581c: 602b str r3, [r5, #0] + 800581e: e7d5 b.n 80057cc <_free_r+0x24> + 8005820: 6820 ldr r0, [r4, #0] + 8005822: 1821 adds r1, r4, r0 + 8005824: 428b cmp r3, r1 + 8005826: d103 bne.n 8005830 <_free_r+0x88> + 8005828: 6819 ldr r1, [r3, #0] + 800582a: 685b ldr r3, [r3, #4] + 800582c: 1809 adds r1, r1, r0 + 800582e: 6021 str r1, [r4, #0] + 8005830: 6063 str r3, [r4, #4] + 8005832: 6054 str r4, [r2, #4] + 8005834: e7ca b.n 80057cc <_free_r+0x24> + 8005836: 46c0 nop @ (mov r8, r8) + 8005838: 20000324 .word 0x20000324 -08005518 : - 8005518: b570 push {r4, r5, r6, lr} - 800551a: 4e0f ldr r6, [pc, #60] @ (8005558 ) - 800551c: 000d movs r5, r1 - 800551e: 6831 ldr r1, [r6, #0] - 8005520: 0004 movs r4, r0 - 8005522: 2900 cmp r1, #0 - 8005524: d102 bne.n 800552c - 8005526: f000 fcad bl 8005e84 <_sbrk_r> - 800552a: 6030 str r0, [r6, #0] - 800552c: 0029 movs r1, r5 - 800552e: 0020 movs r0, r4 - 8005530: f000 fca8 bl 8005e84 <_sbrk_r> - 8005534: 1c43 adds r3, r0, #1 - 8005536: d103 bne.n 8005540 - 8005538: 2501 movs r5, #1 - 800553a: 426d negs r5, r5 - 800553c: 0028 movs r0, r5 - 800553e: bd70 pop {r4, r5, r6, pc} - 8005540: 2303 movs r3, #3 - 8005542: 1cc5 adds r5, r0, #3 - 8005544: 439d bics r5, r3 - 8005546: 42a8 cmp r0, r5 - 8005548: d0f8 beq.n 800553c - 800554a: 1a29 subs r1, r5, r0 - 800554c: 0020 movs r0, r4 - 800554e: f000 fc99 bl 8005e84 <_sbrk_r> - 8005552: 3001 adds r0, #1 - 8005554: d1f2 bne.n 800553c - 8005556: e7ef b.n 8005538 - 8005558: 20000330 .word 0x20000330 +0800583c : + 800583c: b570 push {r4, r5, r6, lr} + 800583e: 4e0f ldr r6, [pc, #60] @ (800587c ) + 8005840: 000d movs r5, r1 + 8005842: 6831 ldr r1, [r6, #0] + 8005844: 0004 movs r4, r0 + 8005846: 2900 cmp r1, #0 + 8005848: d102 bne.n 8005850 + 800584a: f000 fcad bl 80061a8 <_sbrk_r> + 800584e: 6030 str r0, [r6, #0] + 8005850: 0029 movs r1, r5 + 8005852: 0020 movs r0, r4 + 8005854: f000 fca8 bl 80061a8 <_sbrk_r> + 8005858: 1c43 adds r3, r0, #1 + 800585a: d103 bne.n 8005864 + 800585c: 2501 movs r5, #1 + 800585e: 426d negs r5, r5 + 8005860: 0028 movs r0, r5 + 8005862: bd70 pop {r4, r5, r6, pc} + 8005864: 2303 movs r3, #3 + 8005866: 1cc5 adds r5, r0, #3 + 8005868: 439d bics r5, r3 + 800586a: 42a8 cmp r0, r5 + 800586c: d0f8 beq.n 8005860 + 800586e: 1a29 subs r1, r5, r0 + 8005870: 0020 movs r0, r4 + 8005872: f000 fc99 bl 80061a8 <_sbrk_r> + 8005876: 3001 adds r0, #1 + 8005878: d1f2 bne.n 8005860 + 800587a: e7ef b.n 800585c + 800587c: 20000320 .word 0x20000320 -0800555c <_malloc_r>: - 800555c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 800555e: 2203 movs r2, #3 - 8005560: 1ccb adds r3, r1, #3 - 8005562: 4393 bics r3, r2 - 8005564: 3308 adds r3, #8 - 8005566: 0005 movs r5, r0 - 8005568: 001f movs r7, r3 - 800556a: 2b0c cmp r3, #12 - 800556c: d234 bcs.n 80055d8 <_malloc_r+0x7c> - 800556e: 270c movs r7, #12 - 8005570: 42b9 cmp r1, r7 - 8005572: d833 bhi.n 80055dc <_malloc_r+0x80> - 8005574: 0028 movs r0, r5 - 8005576: f000 f871 bl 800565c <__malloc_lock> - 800557a: 4e37 ldr r6, [pc, #220] @ (8005658 <_malloc_r+0xfc>) - 800557c: 6833 ldr r3, [r6, #0] - 800557e: 001c movs r4, r3 - 8005580: 2c00 cmp r4, #0 - 8005582: d12f bne.n 80055e4 <_malloc_r+0x88> - 8005584: 0039 movs r1, r7 - 8005586: 0028 movs r0, r5 - 8005588: f7ff ffc6 bl 8005518 - 800558c: 0004 movs r4, r0 - 800558e: 1c43 adds r3, r0, #1 - 8005590: d15f bne.n 8005652 <_malloc_r+0xf6> - 8005592: 6834 ldr r4, [r6, #0] - 8005594: 9400 str r4, [sp, #0] - 8005596: 9b00 ldr r3, [sp, #0] - 8005598: 2b00 cmp r3, #0 - 800559a: d14a bne.n 8005632 <_malloc_r+0xd6> - 800559c: 2c00 cmp r4, #0 - 800559e: d052 beq.n 8005646 <_malloc_r+0xea> - 80055a0: 6823 ldr r3, [r4, #0] - 80055a2: 0028 movs r0, r5 - 80055a4: 18e3 adds r3, r4, r3 - 80055a6: 9900 ldr r1, [sp, #0] - 80055a8: 9301 str r3, [sp, #4] - 80055aa: f000 fc6b bl 8005e84 <_sbrk_r> - 80055ae: 9b01 ldr r3, [sp, #4] - 80055b0: 4283 cmp r3, r0 - 80055b2: d148 bne.n 8005646 <_malloc_r+0xea> - 80055b4: 6823 ldr r3, [r4, #0] - 80055b6: 0028 movs r0, r5 - 80055b8: 1aff subs r7, r7, r3 - 80055ba: 0039 movs r1, r7 - 80055bc: f7ff ffac bl 8005518 - 80055c0: 3001 adds r0, #1 - 80055c2: d040 beq.n 8005646 <_malloc_r+0xea> - 80055c4: 6823 ldr r3, [r4, #0] - 80055c6: 19db adds r3, r3, r7 - 80055c8: 6023 str r3, [r4, #0] - 80055ca: 6833 ldr r3, [r6, #0] - 80055cc: 685a ldr r2, [r3, #4] - 80055ce: 2a00 cmp r2, #0 - 80055d0: d133 bne.n 800563a <_malloc_r+0xde> - 80055d2: 9b00 ldr r3, [sp, #0] - 80055d4: 6033 str r3, [r6, #0] - 80055d6: e019 b.n 800560c <_malloc_r+0xb0> - 80055d8: 2b00 cmp r3, #0 - 80055da: dac9 bge.n 8005570 <_malloc_r+0x14> - 80055dc: 230c movs r3, #12 - 80055de: 602b str r3, [r5, #0] - 80055e0: 2000 movs r0, #0 - 80055e2: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 80055e4: 6821 ldr r1, [r4, #0] - 80055e6: 1bc9 subs r1, r1, r7 - 80055e8: d420 bmi.n 800562c <_malloc_r+0xd0> - 80055ea: 290b cmp r1, #11 - 80055ec: d90a bls.n 8005604 <_malloc_r+0xa8> - 80055ee: 19e2 adds r2, r4, r7 - 80055f0: 6027 str r7, [r4, #0] - 80055f2: 42a3 cmp r3, r4 - 80055f4: d104 bne.n 8005600 <_malloc_r+0xa4> - 80055f6: 6032 str r2, [r6, #0] - 80055f8: 6863 ldr r3, [r4, #4] - 80055fa: 6011 str r1, [r2, #0] - 80055fc: 6053 str r3, [r2, #4] - 80055fe: e005 b.n 800560c <_malloc_r+0xb0> - 8005600: 605a str r2, [r3, #4] - 8005602: e7f9 b.n 80055f8 <_malloc_r+0x9c> - 8005604: 6862 ldr r2, [r4, #4] - 8005606: 42a3 cmp r3, r4 - 8005608: d10e bne.n 8005628 <_malloc_r+0xcc> - 800560a: 6032 str r2, [r6, #0] - 800560c: 0028 movs r0, r5 - 800560e: f000 f82d bl 800566c <__malloc_unlock> - 8005612: 0020 movs r0, r4 - 8005614: 2207 movs r2, #7 - 8005616: 300b adds r0, #11 - 8005618: 1d23 adds r3, r4, #4 - 800561a: 4390 bics r0, r2 - 800561c: 1ac2 subs r2, r0, r3 - 800561e: 4298 cmp r0, r3 - 8005620: d0df beq.n 80055e2 <_malloc_r+0x86> - 8005622: 1a1b subs r3, r3, r0 - 8005624: 50a3 str r3, [r4, r2] - 8005626: e7dc b.n 80055e2 <_malloc_r+0x86> - 8005628: 605a str r2, [r3, #4] - 800562a: e7ef b.n 800560c <_malloc_r+0xb0> - 800562c: 0023 movs r3, r4 - 800562e: 6864 ldr r4, [r4, #4] - 8005630: e7a6 b.n 8005580 <_malloc_r+0x24> - 8005632: 9c00 ldr r4, [sp, #0] - 8005634: 6863 ldr r3, [r4, #4] - 8005636: 9300 str r3, [sp, #0] - 8005638: e7ad b.n 8005596 <_malloc_r+0x3a> - 800563a: 001a movs r2, r3 - 800563c: 685b ldr r3, [r3, #4] - 800563e: 42a3 cmp r3, r4 - 8005640: d1fb bne.n 800563a <_malloc_r+0xde> - 8005642: 2300 movs r3, #0 - 8005644: e7da b.n 80055fc <_malloc_r+0xa0> - 8005646: 230c movs r3, #12 - 8005648: 0028 movs r0, r5 - 800564a: 602b str r3, [r5, #0] - 800564c: f000 f80e bl 800566c <__malloc_unlock> - 8005650: e7c6 b.n 80055e0 <_malloc_r+0x84> - 8005652: 6007 str r7, [r0, #0] - 8005654: e7da b.n 800560c <_malloc_r+0xb0> - 8005656: 46c0 nop @ (mov r8, r8) - 8005658: 20000334 .word 0x20000334 +08005880 <_malloc_r>: + 8005880: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8005882: 2203 movs r2, #3 + 8005884: 1ccb adds r3, r1, #3 + 8005886: 4393 bics r3, r2 + 8005888: 3308 adds r3, #8 + 800588a: 0005 movs r5, r0 + 800588c: 001f movs r7, r3 + 800588e: 2b0c cmp r3, #12 + 8005890: d234 bcs.n 80058fc <_malloc_r+0x7c> + 8005892: 270c movs r7, #12 + 8005894: 42b9 cmp r1, r7 + 8005896: d833 bhi.n 8005900 <_malloc_r+0x80> + 8005898: 0028 movs r0, r5 + 800589a: f000 f871 bl 8005980 <__malloc_lock> + 800589e: 4e37 ldr r6, [pc, #220] @ (800597c <_malloc_r+0xfc>) + 80058a0: 6833 ldr r3, [r6, #0] + 80058a2: 001c movs r4, r3 + 80058a4: 2c00 cmp r4, #0 + 80058a6: d12f bne.n 8005908 <_malloc_r+0x88> + 80058a8: 0039 movs r1, r7 + 80058aa: 0028 movs r0, r5 + 80058ac: f7ff ffc6 bl 800583c + 80058b0: 0004 movs r4, r0 + 80058b2: 1c43 adds r3, r0, #1 + 80058b4: d15f bne.n 8005976 <_malloc_r+0xf6> + 80058b6: 6834 ldr r4, [r6, #0] + 80058b8: 9400 str r4, [sp, #0] + 80058ba: 9b00 ldr r3, [sp, #0] + 80058bc: 2b00 cmp r3, #0 + 80058be: d14a bne.n 8005956 <_malloc_r+0xd6> + 80058c0: 2c00 cmp r4, #0 + 80058c2: d052 beq.n 800596a <_malloc_r+0xea> + 80058c4: 6823 ldr r3, [r4, #0] + 80058c6: 0028 movs r0, r5 + 80058c8: 18e3 adds r3, r4, r3 + 80058ca: 9900 ldr r1, [sp, #0] + 80058cc: 9301 str r3, [sp, #4] + 80058ce: f000 fc6b bl 80061a8 <_sbrk_r> + 80058d2: 9b01 ldr r3, [sp, #4] + 80058d4: 4283 cmp r3, r0 + 80058d6: d148 bne.n 800596a <_malloc_r+0xea> + 80058d8: 6823 ldr r3, [r4, #0] + 80058da: 0028 movs r0, r5 + 80058dc: 1aff subs r7, r7, r3 + 80058de: 0039 movs r1, r7 + 80058e0: f7ff ffac bl 800583c + 80058e4: 3001 adds r0, #1 + 80058e6: d040 beq.n 800596a <_malloc_r+0xea> + 80058e8: 6823 ldr r3, [r4, #0] + 80058ea: 19db adds r3, r3, r7 + 80058ec: 6023 str r3, [r4, #0] + 80058ee: 6833 ldr r3, [r6, #0] + 80058f0: 685a ldr r2, [r3, #4] + 80058f2: 2a00 cmp r2, #0 + 80058f4: d133 bne.n 800595e <_malloc_r+0xde> + 80058f6: 9b00 ldr r3, [sp, #0] + 80058f8: 6033 str r3, [r6, #0] + 80058fa: e019 b.n 8005930 <_malloc_r+0xb0> + 80058fc: 2b00 cmp r3, #0 + 80058fe: dac9 bge.n 8005894 <_malloc_r+0x14> + 8005900: 230c movs r3, #12 + 8005902: 602b str r3, [r5, #0] + 8005904: 2000 movs r0, #0 + 8005906: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 8005908: 6821 ldr r1, [r4, #0] + 800590a: 1bc9 subs r1, r1, r7 + 800590c: d420 bmi.n 8005950 <_malloc_r+0xd0> + 800590e: 290b cmp r1, #11 + 8005910: d90a bls.n 8005928 <_malloc_r+0xa8> + 8005912: 19e2 adds r2, r4, r7 + 8005914: 6027 str r7, [r4, #0] + 8005916: 42a3 cmp r3, r4 + 8005918: d104 bne.n 8005924 <_malloc_r+0xa4> + 800591a: 6032 str r2, [r6, #0] + 800591c: 6863 ldr r3, [r4, #4] + 800591e: 6011 str r1, [r2, #0] + 8005920: 6053 str r3, [r2, #4] + 8005922: e005 b.n 8005930 <_malloc_r+0xb0> + 8005924: 605a str r2, [r3, #4] + 8005926: e7f9 b.n 800591c <_malloc_r+0x9c> + 8005928: 6862 ldr r2, [r4, #4] + 800592a: 42a3 cmp r3, r4 + 800592c: d10e bne.n 800594c <_malloc_r+0xcc> + 800592e: 6032 str r2, [r6, #0] + 8005930: 0028 movs r0, r5 + 8005932: f000 f82d bl 8005990 <__malloc_unlock> + 8005936: 0020 movs r0, r4 + 8005938: 2207 movs r2, #7 + 800593a: 300b adds r0, #11 + 800593c: 1d23 adds r3, r4, #4 + 800593e: 4390 bics r0, r2 + 8005940: 1ac2 subs r2, r0, r3 + 8005942: 4298 cmp r0, r3 + 8005944: d0df beq.n 8005906 <_malloc_r+0x86> + 8005946: 1a1b subs r3, r3, r0 + 8005948: 50a3 str r3, [r4, r2] + 800594a: e7dc b.n 8005906 <_malloc_r+0x86> + 800594c: 605a str r2, [r3, #4] + 800594e: e7ef b.n 8005930 <_malloc_r+0xb0> + 8005950: 0023 movs r3, r4 + 8005952: 6864 ldr r4, [r4, #4] + 8005954: e7a6 b.n 80058a4 <_malloc_r+0x24> + 8005956: 9c00 ldr r4, [sp, #0] + 8005958: 6863 ldr r3, [r4, #4] + 800595a: 9300 str r3, [sp, #0] + 800595c: e7ad b.n 80058ba <_malloc_r+0x3a> + 800595e: 001a movs r2, r3 + 8005960: 685b ldr r3, [r3, #4] + 8005962: 42a3 cmp r3, r4 + 8005964: d1fb bne.n 800595e <_malloc_r+0xde> + 8005966: 2300 movs r3, #0 + 8005968: e7da b.n 8005920 <_malloc_r+0xa0> + 800596a: 230c movs r3, #12 + 800596c: 0028 movs r0, r5 + 800596e: 602b str r3, [r5, #0] + 8005970: f000 f80e bl 8005990 <__malloc_unlock> + 8005974: e7c6 b.n 8005904 <_malloc_r+0x84> + 8005976: 6007 str r7, [r0, #0] + 8005978: e7da b.n 8005930 <_malloc_r+0xb0> + 800597a: 46c0 nop @ (mov r8, r8) + 800597c: 20000324 .word 0x20000324 -0800565c <__malloc_lock>: - 800565c: b510 push {r4, lr} - 800565e: 4802 ldr r0, [pc, #8] @ (8005668 <__malloc_lock+0xc>) - 8005660: f7ff ff0d bl 800547e <__retarget_lock_acquire_recursive> - 8005664: bd10 pop {r4, pc} - 8005666: 46c0 nop @ (mov r8, r8) - 8005668: 2000032c .word 0x2000032c +08005980 <__malloc_lock>: + 8005980: b510 push {r4, lr} + 8005982: 4802 ldr r0, [pc, #8] @ (800598c <__malloc_lock+0xc>) + 8005984: f7ff ff0d bl 80057a2 <__retarget_lock_acquire_recursive> + 8005988: bd10 pop {r4, pc} + 800598a: 46c0 nop @ (mov r8, r8) + 800598c: 2000031c .word 0x2000031c -0800566c <__malloc_unlock>: - 800566c: b510 push {r4, lr} - 800566e: 4802 ldr r0, [pc, #8] @ (8005678 <__malloc_unlock+0xc>) - 8005670: f7ff ff06 bl 8005480 <__retarget_lock_release_recursive> - 8005674: bd10 pop {r4, pc} - 8005676: 46c0 nop @ (mov r8, r8) - 8005678: 2000032c .word 0x2000032c +08005990 <__malloc_unlock>: + 8005990: b510 push {r4, lr} + 8005992: 4802 ldr r0, [pc, #8] @ (800599c <__malloc_unlock+0xc>) + 8005994: f7ff ff06 bl 80057a4 <__retarget_lock_release_recursive> + 8005998: bd10 pop {r4, pc} + 800599a: 46c0 nop @ (mov r8, r8) + 800599c: 2000031c .word 0x2000031c -0800567c <__sfputc_r>: - 800567c: 6893 ldr r3, [r2, #8] - 800567e: b510 push {r4, lr} - 8005680: 3b01 subs r3, #1 - 8005682: 6093 str r3, [r2, #8] - 8005684: 2b00 cmp r3, #0 - 8005686: da04 bge.n 8005692 <__sfputc_r+0x16> - 8005688: 6994 ldr r4, [r2, #24] - 800568a: 42a3 cmp r3, r4 - 800568c: db07 blt.n 800569e <__sfputc_r+0x22> - 800568e: 290a cmp r1, #10 - 8005690: d005 beq.n 800569e <__sfputc_r+0x22> - 8005692: 6813 ldr r3, [r2, #0] - 8005694: 1c58 adds r0, r3, #1 - 8005696: 6010 str r0, [r2, #0] - 8005698: 7019 strb r1, [r3, #0] - 800569a: 0008 movs r0, r1 - 800569c: bd10 pop {r4, pc} - 800569e: f7ff fdcd bl 800523c <__swbuf_r> - 80056a2: 0001 movs r1, r0 - 80056a4: e7f9 b.n 800569a <__sfputc_r+0x1e> +080059a0 <__sfputc_r>: + 80059a0: 6893 ldr r3, [r2, #8] + 80059a2: b510 push {r4, lr} + 80059a4: 3b01 subs r3, #1 + 80059a6: 6093 str r3, [r2, #8] + 80059a8: 2b00 cmp r3, #0 + 80059aa: da04 bge.n 80059b6 <__sfputc_r+0x16> + 80059ac: 6994 ldr r4, [r2, #24] + 80059ae: 42a3 cmp r3, r4 + 80059b0: db07 blt.n 80059c2 <__sfputc_r+0x22> + 80059b2: 290a cmp r1, #10 + 80059b4: d005 beq.n 80059c2 <__sfputc_r+0x22> + 80059b6: 6813 ldr r3, [r2, #0] + 80059b8: 1c58 adds r0, r3, #1 + 80059ba: 6010 str r0, [r2, #0] + 80059bc: 7019 strb r1, [r3, #0] + 80059be: 0008 movs r0, r1 + 80059c0: bd10 pop {r4, pc} + 80059c2: f7ff fdcd bl 8005560 <__swbuf_r> + 80059c6: 0001 movs r1, r0 + 80059c8: e7f9 b.n 80059be <__sfputc_r+0x1e> -080056a6 <__sfputs_r>: - 80056a6: b5f8 push {r3, r4, r5, r6, r7, lr} - 80056a8: 0006 movs r6, r0 - 80056aa: 000f movs r7, r1 - 80056ac: 0014 movs r4, r2 - 80056ae: 18d5 adds r5, r2, r3 - 80056b0: 42ac cmp r4, r5 - 80056b2: d101 bne.n 80056b8 <__sfputs_r+0x12> - 80056b4: 2000 movs r0, #0 - 80056b6: e007 b.n 80056c8 <__sfputs_r+0x22> - 80056b8: 7821 ldrb r1, [r4, #0] - 80056ba: 003a movs r2, r7 - 80056bc: 0030 movs r0, r6 - 80056be: f7ff ffdd bl 800567c <__sfputc_r> - 80056c2: 3401 adds r4, #1 - 80056c4: 1c43 adds r3, r0, #1 - 80056c6: d1f3 bne.n 80056b0 <__sfputs_r+0xa> - 80056c8: bdf8 pop {r3, r4, r5, r6, r7, pc} +080059ca <__sfputs_r>: + 80059ca: b5f8 push {r3, r4, r5, r6, r7, lr} + 80059cc: 0006 movs r6, r0 + 80059ce: 000f movs r7, r1 + 80059d0: 0014 movs r4, r2 + 80059d2: 18d5 adds r5, r2, r3 + 80059d4: 42ac cmp r4, r5 + 80059d6: d101 bne.n 80059dc <__sfputs_r+0x12> + 80059d8: 2000 movs r0, #0 + 80059da: e007 b.n 80059ec <__sfputs_r+0x22> + 80059dc: 7821 ldrb r1, [r4, #0] + 80059de: 003a movs r2, r7 + 80059e0: 0030 movs r0, r6 + 80059e2: f7ff ffdd bl 80059a0 <__sfputc_r> + 80059e6: 3401 adds r4, #1 + 80059e8: 1c43 adds r3, r0, #1 + 80059ea: d1f3 bne.n 80059d4 <__sfputs_r+0xa> + 80059ec: bdf8 pop {r3, r4, r5, r6, r7, pc} ... -080056cc <_vfiprintf_r>: - 80056cc: b5f0 push {r4, r5, r6, r7, lr} - 80056ce: b0a1 sub sp, #132 @ 0x84 - 80056d0: 000f movs r7, r1 - 80056d2: 0015 movs r5, r2 - 80056d4: 001e movs r6, r3 - 80056d6: 9003 str r0, [sp, #12] - 80056d8: 2800 cmp r0, #0 - 80056da: d004 beq.n 80056e6 <_vfiprintf_r+0x1a> - 80056dc: 6a03 ldr r3, [r0, #32] - 80056de: 2b00 cmp r3, #0 - 80056e0: d101 bne.n 80056e6 <_vfiprintf_r+0x1a> - 80056e2: f7ff fcbb bl 800505c <__sinit> - 80056e6: 6e7b ldr r3, [r7, #100] @ 0x64 - 80056e8: 07db lsls r3, r3, #31 - 80056ea: d405 bmi.n 80056f8 <_vfiprintf_r+0x2c> - 80056ec: 89bb ldrh r3, [r7, #12] - 80056ee: 059b lsls r3, r3, #22 - 80056f0: d402 bmi.n 80056f8 <_vfiprintf_r+0x2c> - 80056f2: 6db8 ldr r0, [r7, #88] @ 0x58 - 80056f4: f7ff fec3 bl 800547e <__retarget_lock_acquire_recursive> - 80056f8: 89bb ldrh r3, [r7, #12] - 80056fa: 071b lsls r3, r3, #28 - 80056fc: d502 bpl.n 8005704 <_vfiprintf_r+0x38> - 80056fe: 693b ldr r3, [r7, #16] - 8005700: 2b00 cmp r3, #0 - 8005702: d113 bne.n 800572c <_vfiprintf_r+0x60> - 8005704: 0039 movs r1, r7 - 8005706: 9803 ldr r0, [sp, #12] - 8005708: f7ff fdda bl 80052c0 <__swsetup_r> - 800570c: 2800 cmp r0, #0 - 800570e: d00d beq.n 800572c <_vfiprintf_r+0x60> - 8005710: 6e7b ldr r3, [r7, #100] @ 0x64 - 8005712: 07db lsls r3, r3, #31 - 8005714: d503 bpl.n 800571e <_vfiprintf_r+0x52> - 8005716: 2001 movs r0, #1 - 8005718: 4240 negs r0, r0 - 800571a: b021 add sp, #132 @ 0x84 - 800571c: bdf0 pop {r4, r5, r6, r7, pc} - 800571e: 89bb ldrh r3, [r7, #12] - 8005720: 059b lsls r3, r3, #22 - 8005722: d4f8 bmi.n 8005716 <_vfiprintf_r+0x4a> - 8005724: 6db8 ldr r0, [r7, #88] @ 0x58 - 8005726: f7ff feab bl 8005480 <__retarget_lock_release_recursive> - 800572a: e7f4 b.n 8005716 <_vfiprintf_r+0x4a> - 800572c: 2300 movs r3, #0 - 800572e: ac08 add r4, sp, #32 - 8005730: 6163 str r3, [r4, #20] - 8005732: 3320 adds r3, #32 - 8005734: 7663 strb r3, [r4, #25] - 8005736: 3310 adds r3, #16 - 8005738: 76a3 strb r3, [r4, #26] - 800573a: 9607 str r6, [sp, #28] - 800573c: 002e movs r6, r5 - 800573e: 7833 ldrb r3, [r6, #0] - 8005740: 2b00 cmp r3, #0 - 8005742: d001 beq.n 8005748 <_vfiprintf_r+0x7c> - 8005744: 2b25 cmp r3, #37 @ 0x25 - 8005746: d148 bne.n 80057da <_vfiprintf_r+0x10e> - 8005748: 1b73 subs r3, r6, r5 - 800574a: 9305 str r3, [sp, #20] - 800574c: 42ae cmp r6, r5 - 800574e: d00b beq.n 8005768 <_vfiprintf_r+0x9c> - 8005750: 002a movs r2, r5 - 8005752: 0039 movs r1, r7 - 8005754: 9803 ldr r0, [sp, #12] - 8005756: f7ff ffa6 bl 80056a6 <__sfputs_r> - 800575a: 3001 adds r0, #1 - 800575c: d100 bne.n 8005760 <_vfiprintf_r+0x94> - 800575e: e0ae b.n 80058be <_vfiprintf_r+0x1f2> - 8005760: 6963 ldr r3, [r4, #20] - 8005762: 9a05 ldr r2, [sp, #20] - 8005764: 189b adds r3, r3, r2 - 8005766: 6163 str r3, [r4, #20] - 8005768: 7833 ldrb r3, [r6, #0] - 800576a: 2b00 cmp r3, #0 - 800576c: d100 bne.n 8005770 <_vfiprintf_r+0xa4> - 800576e: e0a6 b.n 80058be <_vfiprintf_r+0x1f2> - 8005770: 2201 movs r2, #1 - 8005772: 2300 movs r3, #0 - 8005774: 4252 negs r2, r2 - 8005776: 6062 str r2, [r4, #4] - 8005778: a904 add r1, sp, #16 - 800577a: 3254 adds r2, #84 @ 0x54 - 800577c: 1852 adds r2, r2, r1 - 800577e: 1c75 adds r5, r6, #1 - 8005780: 6023 str r3, [r4, #0] - 8005782: 60e3 str r3, [r4, #12] - 8005784: 60a3 str r3, [r4, #8] - 8005786: 7013 strb r3, [r2, #0] - 8005788: 65a3 str r3, [r4, #88] @ 0x58 - 800578a: 4b59 ldr r3, [pc, #356] @ (80058f0 <_vfiprintf_r+0x224>) - 800578c: 2205 movs r2, #5 - 800578e: 0018 movs r0, r3 - 8005790: 7829 ldrb r1, [r5, #0] - 8005792: 9305 str r3, [sp, #20] - 8005794: f000 fb88 bl 8005ea8 - 8005798: 1c6e adds r6, r5, #1 - 800579a: 2800 cmp r0, #0 - 800579c: d11f bne.n 80057de <_vfiprintf_r+0x112> - 800579e: 6822 ldr r2, [r4, #0] - 80057a0: 06d3 lsls r3, r2, #27 - 80057a2: d504 bpl.n 80057ae <_vfiprintf_r+0xe2> - 80057a4: 2353 movs r3, #83 @ 0x53 - 80057a6: a904 add r1, sp, #16 - 80057a8: 185b adds r3, r3, r1 - 80057aa: 2120 movs r1, #32 - 80057ac: 7019 strb r1, [r3, #0] - 80057ae: 0713 lsls r3, r2, #28 - 80057b0: d504 bpl.n 80057bc <_vfiprintf_r+0xf0> - 80057b2: 2353 movs r3, #83 @ 0x53 - 80057b4: a904 add r1, sp, #16 - 80057b6: 185b adds r3, r3, r1 - 80057b8: 212b movs r1, #43 @ 0x2b - 80057ba: 7019 strb r1, [r3, #0] - 80057bc: 782b ldrb r3, [r5, #0] - 80057be: 2b2a cmp r3, #42 @ 0x2a - 80057c0: d016 beq.n 80057f0 <_vfiprintf_r+0x124> - 80057c2: 002e movs r6, r5 - 80057c4: 2100 movs r1, #0 - 80057c6: 200a movs r0, #10 - 80057c8: 68e3 ldr r3, [r4, #12] - 80057ca: 7832 ldrb r2, [r6, #0] - 80057cc: 1c75 adds r5, r6, #1 - 80057ce: 3a30 subs r2, #48 @ 0x30 - 80057d0: 2a09 cmp r2, #9 - 80057d2: d950 bls.n 8005876 <_vfiprintf_r+0x1aa> - 80057d4: 2900 cmp r1, #0 - 80057d6: d111 bne.n 80057fc <_vfiprintf_r+0x130> - 80057d8: e017 b.n 800580a <_vfiprintf_r+0x13e> - 80057da: 3601 adds r6, #1 - 80057dc: e7af b.n 800573e <_vfiprintf_r+0x72> - 80057de: 9b05 ldr r3, [sp, #20] - 80057e0: 6822 ldr r2, [r4, #0] - 80057e2: 1ac0 subs r0, r0, r3 - 80057e4: 2301 movs r3, #1 - 80057e6: 4083 lsls r3, r0 - 80057e8: 4313 orrs r3, r2 - 80057ea: 0035 movs r5, r6 - 80057ec: 6023 str r3, [r4, #0] - 80057ee: e7cc b.n 800578a <_vfiprintf_r+0xbe> - 80057f0: 9b07 ldr r3, [sp, #28] - 80057f2: 1d19 adds r1, r3, #4 - 80057f4: 681b ldr r3, [r3, #0] - 80057f6: 9107 str r1, [sp, #28] - 80057f8: 2b00 cmp r3, #0 - 80057fa: db01 blt.n 8005800 <_vfiprintf_r+0x134> - 80057fc: 930b str r3, [sp, #44] @ 0x2c - 80057fe: e004 b.n 800580a <_vfiprintf_r+0x13e> - 8005800: 425b negs r3, r3 - 8005802: 60e3 str r3, [r4, #12] - 8005804: 2302 movs r3, #2 - 8005806: 4313 orrs r3, r2 - 8005808: 6023 str r3, [r4, #0] - 800580a: 7833 ldrb r3, [r6, #0] - 800580c: 2b2e cmp r3, #46 @ 0x2e - 800580e: d10c bne.n 800582a <_vfiprintf_r+0x15e> - 8005810: 7873 ldrb r3, [r6, #1] - 8005812: 2b2a cmp r3, #42 @ 0x2a - 8005814: d134 bne.n 8005880 <_vfiprintf_r+0x1b4> - 8005816: 9b07 ldr r3, [sp, #28] - 8005818: 3602 adds r6, #2 - 800581a: 1d1a adds r2, r3, #4 - 800581c: 681b ldr r3, [r3, #0] - 800581e: 9207 str r2, [sp, #28] - 8005820: 2b00 cmp r3, #0 - 8005822: da01 bge.n 8005828 <_vfiprintf_r+0x15c> - 8005824: 2301 movs r3, #1 - 8005826: 425b negs r3, r3 - 8005828: 9309 str r3, [sp, #36] @ 0x24 - 800582a: 4d32 ldr r5, [pc, #200] @ (80058f4 <_vfiprintf_r+0x228>) - 800582c: 2203 movs r2, #3 - 800582e: 0028 movs r0, r5 - 8005830: 7831 ldrb r1, [r6, #0] - 8005832: f000 fb39 bl 8005ea8 - 8005836: 2800 cmp r0, #0 - 8005838: d006 beq.n 8005848 <_vfiprintf_r+0x17c> - 800583a: 2340 movs r3, #64 @ 0x40 - 800583c: 1b40 subs r0, r0, r5 - 800583e: 4083 lsls r3, r0 - 8005840: 6822 ldr r2, [r4, #0] - 8005842: 3601 adds r6, #1 - 8005844: 4313 orrs r3, r2 - 8005846: 6023 str r3, [r4, #0] - 8005848: 7831 ldrb r1, [r6, #0] - 800584a: 2206 movs r2, #6 - 800584c: 482a ldr r0, [pc, #168] @ (80058f8 <_vfiprintf_r+0x22c>) - 800584e: 1c75 adds r5, r6, #1 - 8005850: 7621 strb r1, [r4, #24] - 8005852: f000 fb29 bl 8005ea8 - 8005856: 2800 cmp r0, #0 - 8005858: d040 beq.n 80058dc <_vfiprintf_r+0x210> - 800585a: 4b28 ldr r3, [pc, #160] @ (80058fc <_vfiprintf_r+0x230>) - 800585c: 2b00 cmp r3, #0 - 800585e: d122 bne.n 80058a6 <_vfiprintf_r+0x1da> - 8005860: 2207 movs r2, #7 - 8005862: 9b07 ldr r3, [sp, #28] - 8005864: 3307 adds r3, #7 - 8005866: 4393 bics r3, r2 - 8005868: 3308 adds r3, #8 - 800586a: 9307 str r3, [sp, #28] - 800586c: 6963 ldr r3, [r4, #20] - 800586e: 9a04 ldr r2, [sp, #16] - 8005870: 189b adds r3, r3, r2 - 8005872: 6163 str r3, [r4, #20] - 8005874: e762 b.n 800573c <_vfiprintf_r+0x70> - 8005876: 4343 muls r3, r0 - 8005878: 002e movs r6, r5 - 800587a: 2101 movs r1, #1 - 800587c: 189b adds r3, r3, r2 - 800587e: e7a4 b.n 80057ca <_vfiprintf_r+0xfe> - 8005880: 2300 movs r3, #0 - 8005882: 200a movs r0, #10 - 8005884: 0019 movs r1, r3 - 8005886: 3601 adds r6, #1 - 8005888: 6063 str r3, [r4, #4] - 800588a: 7832 ldrb r2, [r6, #0] - 800588c: 1c75 adds r5, r6, #1 - 800588e: 3a30 subs r2, #48 @ 0x30 - 8005890: 2a09 cmp r2, #9 - 8005892: d903 bls.n 800589c <_vfiprintf_r+0x1d0> - 8005894: 2b00 cmp r3, #0 - 8005896: d0c8 beq.n 800582a <_vfiprintf_r+0x15e> - 8005898: 9109 str r1, [sp, #36] @ 0x24 - 800589a: e7c6 b.n 800582a <_vfiprintf_r+0x15e> - 800589c: 4341 muls r1, r0 - 800589e: 002e movs r6, r5 - 80058a0: 2301 movs r3, #1 - 80058a2: 1889 adds r1, r1, r2 - 80058a4: e7f1 b.n 800588a <_vfiprintf_r+0x1be> - 80058a6: aa07 add r2, sp, #28 - 80058a8: 9200 str r2, [sp, #0] - 80058aa: 0021 movs r1, r4 - 80058ac: 003a movs r2, r7 - 80058ae: 4b14 ldr r3, [pc, #80] @ (8005900 <_vfiprintf_r+0x234>) - 80058b0: 9803 ldr r0, [sp, #12] - 80058b2: e000 b.n 80058b6 <_vfiprintf_r+0x1ea> - 80058b4: bf00 nop - 80058b6: 9004 str r0, [sp, #16] - 80058b8: 9b04 ldr r3, [sp, #16] - 80058ba: 3301 adds r3, #1 - 80058bc: d1d6 bne.n 800586c <_vfiprintf_r+0x1a0> - 80058be: 6e7b ldr r3, [r7, #100] @ 0x64 - 80058c0: 07db lsls r3, r3, #31 - 80058c2: d405 bmi.n 80058d0 <_vfiprintf_r+0x204> - 80058c4: 89bb ldrh r3, [r7, #12] - 80058c6: 059b lsls r3, r3, #22 - 80058c8: d402 bmi.n 80058d0 <_vfiprintf_r+0x204> - 80058ca: 6db8 ldr r0, [r7, #88] @ 0x58 - 80058cc: f7ff fdd8 bl 8005480 <__retarget_lock_release_recursive> - 80058d0: 89bb ldrh r3, [r7, #12] - 80058d2: 065b lsls r3, r3, #25 - 80058d4: d500 bpl.n 80058d8 <_vfiprintf_r+0x20c> - 80058d6: e71e b.n 8005716 <_vfiprintf_r+0x4a> - 80058d8: 980d ldr r0, [sp, #52] @ 0x34 - 80058da: e71e b.n 800571a <_vfiprintf_r+0x4e> - 80058dc: aa07 add r2, sp, #28 - 80058de: 9200 str r2, [sp, #0] - 80058e0: 0021 movs r1, r4 - 80058e2: 003a movs r2, r7 - 80058e4: 4b06 ldr r3, [pc, #24] @ (8005900 <_vfiprintf_r+0x234>) - 80058e6: 9803 ldr r0, [sp, #12] - 80058e8: f000 f87c bl 80059e4 <_printf_i> - 80058ec: e7e3 b.n 80058b6 <_vfiprintf_r+0x1ea> - 80058ee: 46c0 nop @ (mov r8, r8) - 80058f0: 08005fa8 .word 0x08005fa8 - 80058f4: 08005fae .word 0x08005fae - 80058f8: 08005fb2 .word 0x08005fb2 - 80058fc: 00000000 .word 0x00000000 - 8005900: 080056a7 .word 0x080056a7 - -08005904 <_printf_common>: - 8005904: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 8005906: 0016 movs r6, r2 - 8005908: 9301 str r3, [sp, #4] - 800590a: 688a ldr r2, [r1, #8] - 800590c: 690b ldr r3, [r1, #16] - 800590e: 000c movs r4, r1 - 8005910: 9000 str r0, [sp, #0] - 8005912: 4293 cmp r3, r2 - 8005914: da00 bge.n 8005918 <_printf_common+0x14> - 8005916: 0013 movs r3, r2 - 8005918: 0022 movs r2, r4 - 800591a: 6033 str r3, [r6, #0] - 800591c: 3243 adds r2, #67 @ 0x43 - 800591e: 7812 ldrb r2, [r2, #0] - 8005920: 2a00 cmp r2, #0 - 8005922: d001 beq.n 8005928 <_printf_common+0x24> - 8005924: 3301 adds r3, #1 - 8005926: 6033 str r3, [r6, #0] - 8005928: 6823 ldr r3, [r4, #0] - 800592a: 069b lsls r3, r3, #26 - 800592c: d502 bpl.n 8005934 <_printf_common+0x30> - 800592e: 6833 ldr r3, [r6, #0] - 8005930: 3302 adds r3, #2 - 8005932: 6033 str r3, [r6, #0] - 8005934: 6822 ldr r2, [r4, #0] - 8005936: 2306 movs r3, #6 - 8005938: 0015 movs r5, r2 - 800593a: 401d ands r5, r3 - 800593c: 421a tst r2, r3 - 800593e: d027 beq.n 8005990 <_printf_common+0x8c> - 8005940: 0023 movs r3, r4 - 8005942: 3343 adds r3, #67 @ 0x43 - 8005944: 781b ldrb r3, [r3, #0] - 8005946: 1e5a subs r2, r3, #1 - 8005948: 4193 sbcs r3, r2 - 800594a: 6822 ldr r2, [r4, #0] - 800594c: 0692 lsls r2, r2, #26 - 800594e: d430 bmi.n 80059b2 <_printf_common+0xae> - 8005950: 0022 movs r2, r4 - 8005952: 9901 ldr r1, [sp, #4] - 8005954: 9800 ldr r0, [sp, #0] - 8005956: 9d08 ldr r5, [sp, #32] - 8005958: 3243 adds r2, #67 @ 0x43 - 800595a: 47a8 blx r5 - 800595c: 3001 adds r0, #1 - 800595e: d025 beq.n 80059ac <_printf_common+0xa8> - 8005960: 2206 movs r2, #6 - 8005962: 6823 ldr r3, [r4, #0] - 8005964: 2500 movs r5, #0 - 8005966: 4013 ands r3, r2 - 8005968: 2b04 cmp r3, #4 - 800596a: d105 bne.n 8005978 <_printf_common+0x74> - 800596c: 6833 ldr r3, [r6, #0] - 800596e: 68e5 ldr r5, [r4, #12] - 8005970: 1aed subs r5, r5, r3 - 8005972: 43eb mvns r3, r5 - 8005974: 17db asrs r3, r3, #31 - 8005976: 401d ands r5, r3 - 8005978: 68a3 ldr r3, [r4, #8] - 800597a: 6922 ldr r2, [r4, #16] - 800597c: 4293 cmp r3, r2 - 800597e: dd01 ble.n 8005984 <_printf_common+0x80> - 8005980: 1a9b subs r3, r3, r2 - 8005982: 18ed adds r5, r5, r3 - 8005984: 2600 movs r6, #0 - 8005986: 42b5 cmp r5, r6 - 8005988: d120 bne.n 80059cc <_printf_common+0xc8> - 800598a: 2000 movs r0, #0 - 800598c: e010 b.n 80059b0 <_printf_common+0xac> - 800598e: 3501 adds r5, #1 - 8005990: 68e3 ldr r3, [r4, #12] - 8005992: 6832 ldr r2, [r6, #0] - 8005994: 1a9b subs r3, r3, r2 - 8005996: 42ab cmp r3, r5 - 8005998: ddd2 ble.n 8005940 <_printf_common+0x3c> - 800599a: 0022 movs r2, r4 - 800599c: 2301 movs r3, #1 - 800599e: 9901 ldr r1, [sp, #4] - 80059a0: 9800 ldr r0, [sp, #0] - 80059a2: 9f08 ldr r7, [sp, #32] - 80059a4: 3219 adds r2, #25 - 80059a6: 47b8 blx r7 - 80059a8: 3001 adds r0, #1 - 80059aa: d1f0 bne.n 800598e <_printf_common+0x8a> - 80059ac: 2001 movs r0, #1 - 80059ae: 4240 negs r0, r0 - 80059b0: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 80059b2: 2030 movs r0, #48 @ 0x30 - 80059b4: 18e1 adds r1, r4, r3 - 80059b6: 3143 adds r1, #67 @ 0x43 - 80059b8: 7008 strb r0, [r1, #0] - 80059ba: 0021 movs r1, r4 - 80059bc: 1c5a adds r2, r3, #1 - 80059be: 3145 adds r1, #69 @ 0x45 - 80059c0: 7809 ldrb r1, [r1, #0] - 80059c2: 18a2 adds r2, r4, r2 - 80059c4: 3243 adds r2, #67 @ 0x43 - 80059c6: 3302 adds r3, #2 - 80059c8: 7011 strb r1, [r2, #0] - 80059ca: e7c1 b.n 8005950 <_printf_common+0x4c> - 80059cc: 0022 movs r2, r4 - 80059ce: 2301 movs r3, #1 - 80059d0: 9901 ldr r1, [sp, #4] - 80059d2: 9800 ldr r0, [sp, #0] - 80059d4: 9f08 ldr r7, [sp, #32] - 80059d6: 321a adds r2, #26 - 80059d8: 47b8 blx r7 - 80059da: 3001 adds r0, #1 - 80059dc: d0e6 beq.n 80059ac <_printf_common+0xa8> - 80059de: 3601 adds r6, #1 - 80059e0: e7d1 b.n 8005986 <_printf_common+0x82> - ... - -080059e4 <_printf_i>: - 80059e4: b5f0 push {r4, r5, r6, r7, lr} - 80059e6: b08b sub sp, #44 @ 0x2c - 80059e8: 9206 str r2, [sp, #24] - 80059ea: 000a movs r2, r1 - 80059ec: 3243 adds r2, #67 @ 0x43 - 80059ee: 9307 str r3, [sp, #28] - 80059f0: 9005 str r0, [sp, #20] - 80059f2: 9203 str r2, [sp, #12] - 80059f4: 7e0a ldrb r2, [r1, #24] - 80059f6: 000c movs r4, r1 - 80059f8: 9b10 ldr r3, [sp, #64] @ 0x40 - 80059fa: 2a78 cmp r2, #120 @ 0x78 - 80059fc: d809 bhi.n 8005a12 <_printf_i+0x2e> - 80059fe: 2a62 cmp r2, #98 @ 0x62 - 8005a00: d80b bhi.n 8005a1a <_printf_i+0x36> - 8005a02: 2a00 cmp r2, #0 - 8005a04: d100 bne.n 8005a08 <_printf_i+0x24> - 8005a06: e0bc b.n 8005b82 <_printf_i+0x19e> - 8005a08: 497b ldr r1, [pc, #492] @ (8005bf8 <_printf_i+0x214>) - 8005a0a: 9104 str r1, [sp, #16] - 8005a0c: 2a58 cmp r2, #88 @ 0x58 - 8005a0e: d100 bne.n 8005a12 <_printf_i+0x2e> - 8005a10: e090 b.n 8005b34 <_printf_i+0x150> - 8005a12: 0025 movs r5, r4 - 8005a14: 3542 adds r5, #66 @ 0x42 - 8005a16: 702a strb r2, [r5, #0] - 8005a18: e022 b.n 8005a60 <_printf_i+0x7c> - 8005a1a: 0010 movs r0, r2 - 8005a1c: 3863 subs r0, #99 @ 0x63 - 8005a1e: 2815 cmp r0, #21 - 8005a20: d8f7 bhi.n 8005a12 <_printf_i+0x2e> - 8005a22: f7fa fb6d bl 8000100 <__gnu_thumb1_case_shi> - 8005a26: 0016 .short 0x0016 - 8005a28: fff6001f .word 0xfff6001f - 8005a2c: fff6fff6 .word 0xfff6fff6 - 8005a30: 001ffff6 .word 0x001ffff6 - 8005a34: fff6fff6 .word 0xfff6fff6 - 8005a38: fff6fff6 .word 0xfff6fff6 - 8005a3c: 003600a1 .word 0x003600a1 - 8005a40: fff60080 .word 0xfff60080 - 8005a44: 00b2fff6 .word 0x00b2fff6 - 8005a48: 0036fff6 .word 0x0036fff6 - 8005a4c: fff6fff6 .word 0xfff6fff6 - 8005a50: 0084 .short 0x0084 - 8005a52: 0025 movs r5, r4 - 8005a54: 681a ldr r2, [r3, #0] - 8005a56: 3542 adds r5, #66 @ 0x42 - 8005a58: 1d11 adds r1, r2, #4 - 8005a5a: 6019 str r1, [r3, #0] - 8005a5c: 6813 ldr r3, [r2, #0] - 8005a5e: 702b strb r3, [r5, #0] - 8005a60: 2301 movs r3, #1 - 8005a62: e0a0 b.n 8005ba6 <_printf_i+0x1c2> - 8005a64: 6818 ldr r0, [r3, #0] - 8005a66: 6809 ldr r1, [r1, #0] - 8005a68: 1d02 adds r2, r0, #4 - 8005a6a: 060d lsls r5, r1, #24 - 8005a6c: d50b bpl.n 8005a86 <_printf_i+0xa2> - 8005a6e: 6806 ldr r6, [r0, #0] - 8005a70: 601a str r2, [r3, #0] - 8005a72: 2e00 cmp r6, #0 - 8005a74: da03 bge.n 8005a7e <_printf_i+0x9a> - 8005a76: 232d movs r3, #45 @ 0x2d - 8005a78: 9a03 ldr r2, [sp, #12] - 8005a7a: 4276 negs r6, r6 - 8005a7c: 7013 strb r3, [r2, #0] - 8005a7e: 4b5e ldr r3, [pc, #376] @ (8005bf8 <_printf_i+0x214>) - 8005a80: 270a movs r7, #10 - 8005a82: 9304 str r3, [sp, #16] - 8005a84: e018 b.n 8005ab8 <_printf_i+0xd4> - 8005a86: 6806 ldr r6, [r0, #0] - 8005a88: 601a str r2, [r3, #0] - 8005a8a: 0649 lsls r1, r1, #25 - 8005a8c: d5f1 bpl.n 8005a72 <_printf_i+0x8e> - 8005a8e: b236 sxth r6, r6 - 8005a90: e7ef b.n 8005a72 <_printf_i+0x8e> - 8005a92: 6808 ldr r0, [r1, #0] - 8005a94: 6819 ldr r1, [r3, #0] - 8005a96: c940 ldmia r1!, {r6} - 8005a98: 0605 lsls r5, r0, #24 - 8005a9a: d402 bmi.n 8005aa2 <_printf_i+0xbe> - 8005a9c: 0640 lsls r0, r0, #25 - 8005a9e: d500 bpl.n 8005aa2 <_printf_i+0xbe> - 8005aa0: b2b6 uxth r6, r6 - 8005aa2: 6019 str r1, [r3, #0] - 8005aa4: 4b54 ldr r3, [pc, #336] @ (8005bf8 <_printf_i+0x214>) - 8005aa6: 270a movs r7, #10 - 8005aa8: 9304 str r3, [sp, #16] - 8005aaa: 2a6f cmp r2, #111 @ 0x6f - 8005aac: d100 bne.n 8005ab0 <_printf_i+0xcc> - 8005aae: 3f02 subs r7, #2 - 8005ab0: 0023 movs r3, r4 - 8005ab2: 2200 movs r2, #0 - 8005ab4: 3343 adds r3, #67 @ 0x43 - 8005ab6: 701a strb r2, [r3, #0] - 8005ab8: 6863 ldr r3, [r4, #4] - 8005aba: 60a3 str r3, [r4, #8] - 8005abc: 2b00 cmp r3, #0 - 8005abe: db03 blt.n 8005ac8 <_printf_i+0xe4> - 8005ac0: 2104 movs r1, #4 +080059f0 <_vfiprintf_r>: + 80059f0: b5f0 push {r4, r5, r6, r7, lr} + 80059f2: b0a1 sub sp, #132 @ 0x84 + 80059f4: 000f movs r7, r1 + 80059f6: 0015 movs r5, r2 + 80059f8: 001e movs r6, r3 + 80059fa: 9003 str r0, [sp, #12] + 80059fc: 2800 cmp r0, #0 + 80059fe: d004 beq.n 8005a0a <_vfiprintf_r+0x1a> + 8005a00: 6a03 ldr r3, [r0, #32] + 8005a02: 2b00 cmp r3, #0 + 8005a04: d101 bne.n 8005a0a <_vfiprintf_r+0x1a> + 8005a06: f7ff fcbb bl 8005380 <__sinit> + 8005a0a: 6e7b ldr r3, [r7, #100] @ 0x64 + 8005a0c: 07db lsls r3, r3, #31 + 8005a0e: d405 bmi.n 8005a1c <_vfiprintf_r+0x2c> + 8005a10: 89bb ldrh r3, [r7, #12] + 8005a12: 059b lsls r3, r3, #22 + 8005a14: d402 bmi.n 8005a1c <_vfiprintf_r+0x2c> + 8005a16: 6db8 ldr r0, [r7, #88] @ 0x58 + 8005a18: f7ff fec3 bl 80057a2 <__retarget_lock_acquire_recursive> + 8005a1c: 89bb ldrh r3, [r7, #12] + 8005a1e: 071b lsls r3, r3, #28 + 8005a20: d502 bpl.n 8005a28 <_vfiprintf_r+0x38> + 8005a22: 693b ldr r3, [r7, #16] + 8005a24: 2b00 cmp r3, #0 + 8005a26: d113 bne.n 8005a50 <_vfiprintf_r+0x60> + 8005a28: 0039 movs r1, r7 + 8005a2a: 9803 ldr r0, [sp, #12] + 8005a2c: f7ff fdda bl 80055e4 <__swsetup_r> + 8005a30: 2800 cmp r0, #0 + 8005a32: d00d beq.n 8005a50 <_vfiprintf_r+0x60> + 8005a34: 6e7b ldr r3, [r7, #100] @ 0x64 + 8005a36: 07db lsls r3, r3, #31 + 8005a38: d503 bpl.n 8005a42 <_vfiprintf_r+0x52> + 8005a3a: 2001 movs r0, #1 + 8005a3c: 4240 negs r0, r0 + 8005a3e: b021 add sp, #132 @ 0x84 + 8005a40: bdf0 pop {r4, r5, r6, r7, pc} + 8005a42: 89bb ldrh r3, [r7, #12] + 8005a44: 059b lsls r3, r3, #22 + 8005a46: d4f8 bmi.n 8005a3a <_vfiprintf_r+0x4a> + 8005a48: 6db8 ldr r0, [r7, #88] @ 0x58 + 8005a4a: f7ff feab bl 80057a4 <__retarget_lock_release_recursive> + 8005a4e: e7f4 b.n 8005a3a <_vfiprintf_r+0x4a> + 8005a50: 2300 movs r3, #0 + 8005a52: ac08 add r4, sp, #32 + 8005a54: 6163 str r3, [r4, #20] + 8005a56: 3320 adds r3, #32 + 8005a58: 7663 strb r3, [r4, #25] + 8005a5a: 3310 adds r3, #16 + 8005a5c: 76a3 strb r3, [r4, #26] + 8005a5e: 9607 str r6, [sp, #28] + 8005a60: 002e movs r6, r5 + 8005a62: 7833 ldrb r3, [r6, #0] + 8005a64: 2b00 cmp r3, #0 + 8005a66: d001 beq.n 8005a6c <_vfiprintf_r+0x7c> + 8005a68: 2b25 cmp r3, #37 @ 0x25 + 8005a6a: d148 bne.n 8005afe <_vfiprintf_r+0x10e> + 8005a6c: 1b73 subs r3, r6, r5 + 8005a6e: 9305 str r3, [sp, #20] + 8005a70: 42ae cmp r6, r5 + 8005a72: d00b beq.n 8005a8c <_vfiprintf_r+0x9c> + 8005a74: 002a movs r2, r5 + 8005a76: 0039 movs r1, r7 + 8005a78: 9803 ldr r0, [sp, #12] + 8005a7a: f7ff ffa6 bl 80059ca <__sfputs_r> + 8005a7e: 3001 adds r0, #1 + 8005a80: d100 bne.n 8005a84 <_vfiprintf_r+0x94> + 8005a82: e0ae b.n 8005be2 <_vfiprintf_r+0x1f2> + 8005a84: 6963 ldr r3, [r4, #20] + 8005a86: 9a05 ldr r2, [sp, #20] + 8005a88: 189b adds r3, r3, r2 + 8005a8a: 6163 str r3, [r4, #20] + 8005a8c: 7833 ldrb r3, [r6, #0] + 8005a8e: 2b00 cmp r3, #0 + 8005a90: d100 bne.n 8005a94 <_vfiprintf_r+0xa4> + 8005a92: e0a6 b.n 8005be2 <_vfiprintf_r+0x1f2> + 8005a94: 2201 movs r2, #1 + 8005a96: 2300 movs r3, #0 + 8005a98: 4252 negs r2, r2 + 8005a9a: 6062 str r2, [r4, #4] + 8005a9c: a904 add r1, sp, #16 + 8005a9e: 3254 adds r2, #84 @ 0x54 + 8005aa0: 1852 adds r2, r2, r1 + 8005aa2: 1c75 adds r5, r6, #1 + 8005aa4: 6023 str r3, [r4, #0] + 8005aa6: 60e3 str r3, [r4, #12] + 8005aa8: 60a3 str r3, [r4, #8] + 8005aaa: 7013 strb r3, [r2, #0] + 8005aac: 65a3 str r3, [r4, #88] @ 0x58 + 8005aae: 4b59 ldr r3, [pc, #356] @ (8005c14 <_vfiprintf_r+0x224>) + 8005ab0: 2205 movs r2, #5 + 8005ab2: 0018 movs r0, r3 + 8005ab4: 7829 ldrb r1, [r5, #0] + 8005ab6: 9305 str r3, [sp, #20] + 8005ab8: f000 fb88 bl 80061cc + 8005abc: 1c6e adds r6, r5, #1 + 8005abe: 2800 cmp r0, #0 + 8005ac0: d11f bne.n 8005b02 <_vfiprintf_r+0x112> 8005ac2: 6822 ldr r2, [r4, #0] - 8005ac4: 438a bics r2, r1 - 8005ac6: 6022 str r2, [r4, #0] - 8005ac8: 2e00 cmp r6, #0 - 8005aca: d102 bne.n 8005ad2 <_printf_i+0xee> - 8005acc: 9d03 ldr r5, [sp, #12] - 8005ace: 2b00 cmp r3, #0 - 8005ad0: d00c beq.n 8005aec <_printf_i+0x108> - 8005ad2: 9d03 ldr r5, [sp, #12] - 8005ad4: 0030 movs r0, r6 - 8005ad6: 0039 movs r1, r7 - 8005ad8: f7fa fba2 bl 8000220 <__aeabi_uidivmod> - 8005adc: 9b04 ldr r3, [sp, #16] - 8005ade: 3d01 subs r5, #1 - 8005ae0: 5c5b ldrb r3, [r3, r1] - 8005ae2: 702b strb r3, [r5, #0] - 8005ae4: 0033 movs r3, r6 - 8005ae6: 0006 movs r6, r0 - 8005ae8: 429f cmp r7, r3 - 8005aea: d9f3 bls.n 8005ad4 <_printf_i+0xf0> - 8005aec: 2f08 cmp r7, #8 - 8005aee: d109 bne.n 8005b04 <_printf_i+0x120> - 8005af0: 6823 ldr r3, [r4, #0] - 8005af2: 07db lsls r3, r3, #31 - 8005af4: d506 bpl.n 8005b04 <_printf_i+0x120> - 8005af6: 6862 ldr r2, [r4, #4] - 8005af8: 6923 ldr r3, [r4, #16] - 8005afa: 429a cmp r2, r3 - 8005afc: dc02 bgt.n 8005b04 <_printf_i+0x120> - 8005afe: 2330 movs r3, #48 @ 0x30 - 8005b00: 3d01 subs r5, #1 - 8005b02: 702b strb r3, [r5, #0] - 8005b04: 9b03 ldr r3, [sp, #12] - 8005b06: 1b5b subs r3, r3, r5 - 8005b08: 6123 str r3, [r4, #16] - 8005b0a: 9b07 ldr r3, [sp, #28] - 8005b0c: 0021 movs r1, r4 - 8005b0e: 9300 str r3, [sp, #0] - 8005b10: 9805 ldr r0, [sp, #20] - 8005b12: 9b06 ldr r3, [sp, #24] - 8005b14: aa09 add r2, sp, #36 @ 0x24 - 8005b16: f7ff fef5 bl 8005904 <_printf_common> - 8005b1a: 3001 adds r0, #1 - 8005b1c: d148 bne.n 8005bb0 <_printf_i+0x1cc> - 8005b1e: 2001 movs r0, #1 - 8005b20: 4240 negs r0, r0 - 8005b22: b00b add sp, #44 @ 0x2c - 8005b24: bdf0 pop {r4, r5, r6, r7, pc} - 8005b26: 2220 movs r2, #32 - 8005b28: 6809 ldr r1, [r1, #0] - 8005b2a: 430a orrs r2, r1 - 8005b2c: 6022 str r2, [r4, #0] - 8005b2e: 2278 movs r2, #120 @ 0x78 - 8005b30: 4932 ldr r1, [pc, #200] @ (8005bfc <_printf_i+0x218>) - 8005b32: 9104 str r1, [sp, #16] - 8005b34: 0021 movs r1, r4 - 8005b36: 3145 adds r1, #69 @ 0x45 - 8005b38: 700a strb r2, [r1, #0] - 8005b3a: 6819 ldr r1, [r3, #0] - 8005b3c: 6822 ldr r2, [r4, #0] - 8005b3e: c940 ldmia r1!, {r6} - 8005b40: 0610 lsls r0, r2, #24 - 8005b42: d402 bmi.n 8005b4a <_printf_i+0x166> - 8005b44: 0650 lsls r0, r2, #25 - 8005b46: d500 bpl.n 8005b4a <_printf_i+0x166> - 8005b48: b2b6 uxth r6, r6 - 8005b4a: 6019 str r1, [r3, #0] - 8005b4c: 07d3 lsls r3, r2, #31 - 8005b4e: d502 bpl.n 8005b56 <_printf_i+0x172> - 8005b50: 2320 movs r3, #32 - 8005b52: 4313 orrs r3, r2 - 8005b54: 6023 str r3, [r4, #0] - 8005b56: 2e00 cmp r6, #0 - 8005b58: d001 beq.n 8005b5e <_printf_i+0x17a> - 8005b5a: 2710 movs r7, #16 - 8005b5c: e7a8 b.n 8005ab0 <_printf_i+0xcc> - 8005b5e: 2220 movs r2, #32 - 8005b60: 6823 ldr r3, [r4, #0] - 8005b62: 4393 bics r3, r2 - 8005b64: 6023 str r3, [r4, #0] - 8005b66: e7f8 b.n 8005b5a <_printf_i+0x176> - 8005b68: 681a ldr r2, [r3, #0] - 8005b6a: 680d ldr r5, [r1, #0] - 8005b6c: 1d10 adds r0, r2, #4 - 8005b6e: 6949 ldr r1, [r1, #20] - 8005b70: 6018 str r0, [r3, #0] - 8005b72: 6813 ldr r3, [r2, #0] - 8005b74: 062e lsls r6, r5, #24 - 8005b76: d501 bpl.n 8005b7c <_printf_i+0x198> - 8005b78: 6019 str r1, [r3, #0] - 8005b7a: e002 b.n 8005b82 <_printf_i+0x19e> - 8005b7c: 066d lsls r5, r5, #25 - 8005b7e: d5fb bpl.n 8005b78 <_printf_i+0x194> - 8005b80: 8019 strh r1, [r3, #0] - 8005b82: 2300 movs r3, #0 - 8005b84: 9d03 ldr r5, [sp, #12] - 8005b86: 6123 str r3, [r4, #16] - 8005b88: e7bf b.n 8005b0a <_printf_i+0x126> - 8005b8a: 681a ldr r2, [r3, #0] - 8005b8c: 1d11 adds r1, r2, #4 - 8005b8e: 6019 str r1, [r3, #0] - 8005b90: 6815 ldr r5, [r2, #0] - 8005b92: 2100 movs r1, #0 - 8005b94: 0028 movs r0, r5 - 8005b96: 6862 ldr r2, [r4, #4] - 8005b98: f000 f986 bl 8005ea8 - 8005b9c: 2800 cmp r0, #0 - 8005b9e: d001 beq.n 8005ba4 <_printf_i+0x1c0> - 8005ba0: 1b40 subs r0, r0, r5 - 8005ba2: 6060 str r0, [r4, #4] - 8005ba4: 6863 ldr r3, [r4, #4] - 8005ba6: 6123 str r3, [r4, #16] - 8005ba8: 2300 movs r3, #0 - 8005baa: 9a03 ldr r2, [sp, #12] - 8005bac: 7013 strb r3, [r2, #0] - 8005bae: e7ac b.n 8005b0a <_printf_i+0x126> - 8005bb0: 002a movs r2, r5 - 8005bb2: 6923 ldr r3, [r4, #16] - 8005bb4: 9906 ldr r1, [sp, #24] - 8005bb6: 9805 ldr r0, [sp, #20] - 8005bb8: 9d07 ldr r5, [sp, #28] - 8005bba: 47a8 blx r5 - 8005bbc: 3001 adds r0, #1 - 8005bbe: d0ae beq.n 8005b1e <_printf_i+0x13a> - 8005bc0: 6823 ldr r3, [r4, #0] - 8005bc2: 079b lsls r3, r3, #30 - 8005bc4: d415 bmi.n 8005bf2 <_printf_i+0x20e> - 8005bc6: 9b09 ldr r3, [sp, #36] @ 0x24 - 8005bc8: 68e0 ldr r0, [r4, #12] - 8005bca: 4298 cmp r0, r3 - 8005bcc: daa9 bge.n 8005b22 <_printf_i+0x13e> - 8005bce: 0018 movs r0, r3 - 8005bd0: e7a7 b.n 8005b22 <_printf_i+0x13e> - 8005bd2: 0022 movs r2, r4 - 8005bd4: 2301 movs r3, #1 - 8005bd6: 9906 ldr r1, [sp, #24] - 8005bd8: 9805 ldr r0, [sp, #20] - 8005bda: 9e07 ldr r6, [sp, #28] - 8005bdc: 3219 adds r2, #25 - 8005bde: 47b0 blx r6 - 8005be0: 3001 adds r0, #1 - 8005be2: d09c beq.n 8005b1e <_printf_i+0x13a> - 8005be4: 3501 adds r5, #1 - 8005be6: 68e3 ldr r3, [r4, #12] - 8005be8: 9a09 ldr r2, [sp, #36] @ 0x24 - 8005bea: 1a9b subs r3, r3, r2 - 8005bec: 42ab cmp r3, r5 - 8005bee: dcf0 bgt.n 8005bd2 <_printf_i+0x1ee> - 8005bf0: e7e9 b.n 8005bc6 <_printf_i+0x1e2> - 8005bf2: 2500 movs r5, #0 - 8005bf4: e7f7 b.n 8005be6 <_printf_i+0x202> - 8005bf6: 46c0 nop @ (mov r8, r8) - 8005bf8: 08005fb9 .word 0x08005fb9 - 8005bfc: 08005fca .word 0x08005fca + 8005ac4: 06d3 lsls r3, r2, #27 + 8005ac6: d504 bpl.n 8005ad2 <_vfiprintf_r+0xe2> + 8005ac8: 2353 movs r3, #83 @ 0x53 + 8005aca: a904 add r1, sp, #16 + 8005acc: 185b adds r3, r3, r1 + 8005ace: 2120 movs r1, #32 + 8005ad0: 7019 strb r1, [r3, #0] + 8005ad2: 0713 lsls r3, r2, #28 + 8005ad4: d504 bpl.n 8005ae0 <_vfiprintf_r+0xf0> + 8005ad6: 2353 movs r3, #83 @ 0x53 + 8005ad8: a904 add r1, sp, #16 + 8005ada: 185b adds r3, r3, r1 + 8005adc: 212b movs r1, #43 @ 0x2b + 8005ade: 7019 strb r1, [r3, #0] + 8005ae0: 782b ldrb r3, [r5, #0] + 8005ae2: 2b2a cmp r3, #42 @ 0x2a + 8005ae4: d016 beq.n 8005b14 <_vfiprintf_r+0x124> + 8005ae6: 002e movs r6, r5 + 8005ae8: 2100 movs r1, #0 + 8005aea: 200a movs r0, #10 + 8005aec: 68e3 ldr r3, [r4, #12] + 8005aee: 7832 ldrb r2, [r6, #0] + 8005af0: 1c75 adds r5, r6, #1 + 8005af2: 3a30 subs r2, #48 @ 0x30 + 8005af4: 2a09 cmp r2, #9 + 8005af6: d950 bls.n 8005b9a <_vfiprintf_r+0x1aa> + 8005af8: 2900 cmp r1, #0 + 8005afa: d111 bne.n 8005b20 <_vfiprintf_r+0x130> + 8005afc: e017 b.n 8005b2e <_vfiprintf_r+0x13e> + 8005afe: 3601 adds r6, #1 + 8005b00: e7af b.n 8005a62 <_vfiprintf_r+0x72> + 8005b02: 9b05 ldr r3, [sp, #20] + 8005b04: 6822 ldr r2, [r4, #0] + 8005b06: 1ac0 subs r0, r0, r3 + 8005b08: 2301 movs r3, #1 + 8005b0a: 4083 lsls r3, r0 + 8005b0c: 4313 orrs r3, r2 + 8005b0e: 0035 movs r5, r6 + 8005b10: 6023 str r3, [r4, #0] + 8005b12: e7cc b.n 8005aae <_vfiprintf_r+0xbe> + 8005b14: 9b07 ldr r3, [sp, #28] + 8005b16: 1d19 adds r1, r3, #4 + 8005b18: 681b ldr r3, [r3, #0] + 8005b1a: 9107 str r1, [sp, #28] + 8005b1c: 2b00 cmp r3, #0 + 8005b1e: db01 blt.n 8005b24 <_vfiprintf_r+0x134> + 8005b20: 930b str r3, [sp, #44] @ 0x2c + 8005b22: e004 b.n 8005b2e <_vfiprintf_r+0x13e> + 8005b24: 425b negs r3, r3 + 8005b26: 60e3 str r3, [r4, #12] + 8005b28: 2302 movs r3, #2 + 8005b2a: 4313 orrs r3, r2 + 8005b2c: 6023 str r3, [r4, #0] + 8005b2e: 7833 ldrb r3, [r6, #0] + 8005b30: 2b2e cmp r3, #46 @ 0x2e + 8005b32: d10c bne.n 8005b4e <_vfiprintf_r+0x15e> + 8005b34: 7873 ldrb r3, [r6, #1] + 8005b36: 2b2a cmp r3, #42 @ 0x2a + 8005b38: d134 bne.n 8005ba4 <_vfiprintf_r+0x1b4> + 8005b3a: 9b07 ldr r3, [sp, #28] + 8005b3c: 3602 adds r6, #2 + 8005b3e: 1d1a adds r2, r3, #4 + 8005b40: 681b ldr r3, [r3, #0] + 8005b42: 9207 str r2, [sp, #28] + 8005b44: 2b00 cmp r3, #0 + 8005b46: da01 bge.n 8005b4c <_vfiprintf_r+0x15c> + 8005b48: 2301 movs r3, #1 + 8005b4a: 425b negs r3, r3 + 8005b4c: 9309 str r3, [sp, #36] @ 0x24 + 8005b4e: 4d32 ldr r5, [pc, #200] @ (8005c18 <_vfiprintf_r+0x228>) + 8005b50: 2203 movs r2, #3 + 8005b52: 0028 movs r0, r5 + 8005b54: 7831 ldrb r1, [r6, #0] + 8005b56: f000 fb39 bl 80061cc + 8005b5a: 2800 cmp r0, #0 + 8005b5c: d006 beq.n 8005b6c <_vfiprintf_r+0x17c> + 8005b5e: 2340 movs r3, #64 @ 0x40 + 8005b60: 1b40 subs r0, r0, r5 + 8005b62: 4083 lsls r3, r0 + 8005b64: 6822 ldr r2, [r4, #0] + 8005b66: 3601 adds r6, #1 + 8005b68: 4313 orrs r3, r2 + 8005b6a: 6023 str r3, [r4, #0] + 8005b6c: 7831 ldrb r1, [r6, #0] + 8005b6e: 2206 movs r2, #6 + 8005b70: 482a ldr r0, [pc, #168] @ (8005c1c <_vfiprintf_r+0x22c>) + 8005b72: 1c75 adds r5, r6, #1 + 8005b74: 7621 strb r1, [r4, #24] + 8005b76: f000 fb29 bl 80061cc + 8005b7a: 2800 cmp r0, #0 + 8005b7c: d040 beq.n 8005c00 <_vfiprintf_r+0x210> + 8005b7e: 4b28 ldr r3, [pc, #160] @ (8005c20 <_vfiprintf_r+0x230>) + 8005b80: 2b00 cmp r3, #0 + 8005b82: d122 bne.n 8005bca <_vfiprintf_r+0x1da> + 8005b84: 2207 movs r2, #7 + 8005b86: 9b07 ldr r3, [sp, #28] + 8005b88: 3307 adds r3, #7 + 8005b8a: 4393 bics r3, r2 + 8005b8c: 3308 adds r3, #8 + 8005b8e: 9307 str r3, [sp, #28] + 8005b90: 6963 ldr r3, [r4, #20] + 8005b92: 9a04 ldr r2, [sp, #16] + 8005b94: 189b adds r3, r3, r2 + 8005b96: 6163 str r3, [r4, #20] + 8005b98: e762 b.n 8005a60 <_vfiprintf_r+0x70> + 8005b9a: 4343 muls r3, r0 + 8005b9c: 002e movs r6, r5 + 8005b9e: 2101 movs r1, #1 + 8005ba0: 189b adds r3, r3, r2 + 8005ba2: e7a4 b.n 8005aee <_vfiprintf_r+0xfe> + 8005ba4: 2300 movs r3, #0 + 8005ba6: 200a movs r0, #10 + 8005ba8: 0019 movs r1, r3 + 8005baa: 3601 adds r6, #1 + 8005bac: 6063 str r3, [r4, #4] + 8005bae: 7832 ldrb r2, [r6, #0] + 8005bb0: 1c75 adds r5, r6, #1 + 8005bb2: 3a30 subs r2, #48 @ 0x30 + 8005bb4: 2a09 cmp r2, #9 + 8005bb6: d903 bls.n 8005bc0 <_vfiprintf_r+0x1d0> + 8005bb8: 2b00 cmp r3, #0 + 8005bba: d0c8 beq.n 8005b4e <_vfiprintf_r+0x15e> + 8005bbc: 9109 str r1, [sp, #36] @ 0x24 + 8005bbe: e7c6 b.n 8005b4e <_vfiprintf_r+0x15e> + 8005bc0: 4341 muls r1, r0 + 8005bc2: 002e movs r6, r5 + 8005bc4: 2301 movs r3, #1 + 8005bc6: 1889 adds r1, r1, r2 + 8005bc8: e7f1 b.n 8005bae <_vfiprintf_r+0x1be> + 8005bca: aa07 add r2, sp, #28 + 8005bcc: 9200 str r2, [sp, #0] + 8005bce: 0021 movs r1, r4 + 8005bd0: 003a movs r2, r7 + 8005bd2: 4b14 ldr r3, [pc, #80] @ (8005c24 <_vfiprintf_r+0x234>) + 8005bd4: 9803 ldr r0, [sp, #12] + 8005bd6: e000 b.n 8005bda <_vfiprintf_r+0x1ea> + 8005bd8: bf00 nop + 8005bda: 9004 str r0, [sp, #16] + 8005bdc: 9b04 ldr r3, [sp, #16] + 8005bde: 3301 adds r3, #1 + 8005be0: d1d6 bne.n 8005b90 <_vfiprintf_r+0x1a0> + 8005be2: 6e7b ldr r3, [r7, #100] @ 0x64 + 8005be4: 07db lsls r3, r3, #31 + 8005be6: d405 bmi.n 8005bf4 <_vfiprintf_r+0x204> + 8005be8: 89bb ldrh r3, [r7, #12] + 8005bea: 059b lsls r3, r3, #22 + 8005bec: d402 bmi.n 8005bf4 <_vfiprintf_r+0x204> + 8005bee: 6db8 ldr r0, [r7, #88] @ 0x58 + 8005bf0: f7ff fdd8 bl 80057a4 <__retarget_lock_release_recursive> + 8005bf4: 89bb ldrh r3, [r7, #12] + 8005bf6: 065b lsls r3, r3, #25 + 8005bf8: d500 bpl.n 8005bfc <_vfiprintf_r+0x20c> + 8005bfa: e71e b.n 8005a3a <_vfiprintf_r+0x4a> + 8005bfc: 980d ldr r0, [sp, #52] @ 0x34 + 8005bfe: e71e b.n 8005a3e <_vfiprintf_r+0x4e> + 8005c00: aa07 add r2, sp, #28 + 8005c02: 9200 str r2, [sp, #0] + 8005c04: 0021 movs r1, r4 + 8005c06: 003a movs r2, r7 + 8005c08: 4b06 ldr r3, [pc, #24] @ (8005c24 <_vfiprintf_r+0x234>) + 8005c0a: 9803 ldr r0, [sp, #12] + 8005c0c: f000 f87c bl 8005d08 <_printf_i> + 8005c10: e7e3 b.n 8005bda <_vfiprintf_r+0x1ea> + 8005c12: 46c0 nop @ (mov r8, r8) + 8005c14: 080062c8 .word 0x080062c8 + 8005c18: 080062ce .word 0x080062ce + 8005c1c: 080062d2 .word 0x080062d2 + 8005c20: 00000000 .word 0x00000000 + 8005c24: 080059cb .word 0x080059cb -08005c00 <__sflush_r>: - 8005c00: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 8005c02: 220c movs r2, #12 - 8005c04: 5e8b ldrsh r3, [r1, r2] - 8005c06: 0005 movs r5, r0 - 8005c08: 000c movs r4, r1 - 8005c0a: 071a lsls r2, r3, #28 - 8005c0c: d456 bmi.n 8005cbc <__sflush_r+0xbc> - 8005c0e: 684a ldr r2, [r1, #4] - 8005c10: 2a00 cmp r2, #0 - 8005c12: dc02 bgt.n 8005c1a <__sflush_r+0x1a> - 8005c14: 6c0a ldr r2, [r1, #64] @ 0x40 - 8005c16: 2a00 cmp r2, #0 - 8005c18: dd4e ble.n 8005cb8 <__sflush_r+0xb8> - 8005c1a: 6ae7 ldr r7, [r4, #44] @ 0x2c - 8005c1c: 2f00 cmp r7, #0 - 8005c1e: d04b beq.n 8005cb8 <__sflush_r+0xb8> - 8005c20: 2200 movs r2, #0 - 8005c22: 2080 movs r0, #128 @ 0x80 - 8005c24: 682e ldr r6, [r5, #0] - 8005c26: 602a str r2, [r5, #0] - 8005c28: 001a movs r2, r3 - 8005c2a: 0140 lsls r0, r0, #5 - 8005c2c: 6a21 ldr r1, [r4, #32] - 8005c2e: 4002 ands r2, r0 - 8005c30: 4203 tst r3, r0 - 8005c32: d033 beq.n 8005c9c <__sflush_r+0x9c> - 8005c34: 6d62 ldr r2, [r4, #84] @ 0x54 - 8005c36: 89a3 ldrh r3, [r4, #12] - 8005c38: 075b lsls r3, r3, #29 - 8005c3a: d506 bpl.n 8005c4a <__sflush_r+0x4a> - 8005c3c: 6863 ldr r3, [r4, #4] - 8005c3e: 1ad2 subs r2, r2, r3 - 8005c40: 6b63 ldr r3, [r4, #52] @ 0x34 - 8005c42: 2b00 cmp r3, #0 - 8005c44: d001 beq.n 8005c4a <__sflush_r+0x4a> - 8005c46: 6c23 ldr r3, [r4, #64] @ 0x40 - 8005c48: 1ad2 subs r2, r2, r3 - 8005c4a: 2300 movs r3, #0 - 8005c4c: 0028 movs r0, r5 - 8005c4e: 6ae7 ldr r7, [r4, #44] @ 0x2c - 8005c50: 6a21 ldr r1, [r4, #32] - 8005c52: 47b8 blx r7 - 8005c54: 89a2 ldrh r2, [r4, #12] - 8005c56: 1c43 adds r3, r0, #1 - 8005c58: d106 bne.n 8005c68 <__sflush_r+0x68> - 8005c5a: 6829 ldr r1, [r5, #0] - 8005c5c: 291d cmp r1, #29 - 8005c5e: d846 bhi.n 8005cee <__sflush_r+0xee> - 8005c60: 4b29 ldr r3, [pc, #164] @ (8005d08 <__sflush_r+0x108>) - 8005c62: 410b asrs r3, r1 - 8005c64: 07db lsls r3, r3, #31 - 8005c66: d442 bmi.n 8005cee <__sflush_r+0xee> - 8005c68: 2300 movs r3, #0 - 8005c6a: 6063 str r3, [r4, #4] - 8005c6c: 6923 ldr r3, [r4, #16] - 8005c6e: 6023 str r3, [r4, #0] - 8005c70: 04d2 lsls r2, r2, #19 - 8005c72: d505 bpl.n 8005c80 <__sflush_r+0x80> - 8005c74: 1c43 adds r3, r0, #1 - 8005c76: d102 bne.n 8005c7e <__sflush_r+0x7e> - 8005c78: 682b ldr r3, [r5, #0] - 8005c7a: 2b00 cmp r3, #0 - 8005c7c: d100 bne.n 8005c80 <__sflush_r+0x80> - 8005c7e: 6560 str r0, [r4, #84] @ 0x54 - 8005c80: 6b61 ldr r1, [r4, #52] @ 0x34 - 8005c82: 602e str r6, [r5, #0] - 8005c84: 2900 cmp r1, #0 - 8005c86: d017 beq.n 8005cb8 <__sflush_r+0xb8> - 8005c88: 0023 movs r3, r4 - 8005c8a: 3344 adds r3, #68 @ 0x44 - 8005c8c: 4299 cmp r1, r3 - 8005c8e: d002 beq.n 8005c96 <__sflush_r+0x96> - 8005c90: 0028 movs r0, r5 - 8005c92: f7ff fbf7 bl 8005484 <_free_r> - 8005c96: 2300 movs r3, #0 - 8005c98: 6363 str r3, [r4, #52] @ 0x34 - 8005c9a: e00d b.n 8005cb8 <__sflush_r+0xb8> - 8005c9c: 2301 movs r3, #1 - 8005c9e: 0028 movs r0, r5 - 8005ca0: 47b8 blx r7 - 8005ca2: 0002 movs r2, r0 - 8005ca4: 1c43 adds r3, r0, #1 - 8005ca6: d1c6 bne.n 8005c36 <__sflush_r+0x36> - 8005ca8: 682b ldr r3, [r5, #0] - 8005caa: 2b00 cmp r3, #0 - 8005cac: d0c3 beq.n 8005c36 <__sflush_r+0x36> - 8005cae: 2b1d cmp r3, #29 - 8005cb0: d001 beq.n 8005cb6 <__sflush_r+0xb6> - 8005cb2: 2b16 cmp r3, #22 - 8005cb4: d11a bne.n 8005cec <__sflush_r+0xec> - 8005cb6: 602e str r6, [r5, #0] - 8005cb8: 2000 movs r0, #0 - 8005cba: e01e b.n 8005cfa <__sflush_r+0xfa> - 8005cbc: 690e ldr r6, [r1, #16] - 8005cbe: 2e00 cmp r6, #0 - 8005cc0: d0fa beq.n 8005cb8 <__sflush_r+0xb8> - 8005cc2: 680f ldr r7, [r1, #0] - 8005cc4: 600e str r6, [r1, #0] - 8005cc6: 1bba subs r2, r7, r6 - 8005cc8: 9201 str r2, [sp, #4] - 8005cca: 2200 movs r2, #0 - 8005ccc: 079b lsls r3, r3, #30 - 8005cce: d100 bne.n 8005cd2 <__sflush_r+0xd2> - 8005cd0: 694a ldr r2, [r1, #20] - 8005cd2: 60a2 str r2, [r4, #8] - 8005cd4: 9b01 ldr r3, [sp, #4] - 8005cd6: 2b00 cmp r3, #0 - 8005cd8: ddee ble.n 8005cb8 <__sflush_r+0xb8> - 8005cda: 6aa3 ldr r3, [r4, #40] @ 0x28 - 8005cdc: 0032 movs r2, r6 - 8005cde: 001f movs r7, r3 - 8005ce0: 0028 movs r0, r5 - 8005ce2: 9b01 ldr r3, [sp, #4] - 8005ce4: 6a21 ldr r1, [r4, #32] - 8005ce6: 47b8 blx r7 - 8005ce8: 2800 cmp r0, #0 - 8005cea: dc07 bgt.n 8005cfc <__sflush_r+0xfc> - 8005cec: 89a2 ldrh r2, [r4, #12] - 8005cee: 2340 movs r3, #64 @ 0x40 - 8005cf0: 2001 movs r0, #1 - 8005cf2: 4313 orrs r3, r2 - 8005cf4: b21b sxth r3, r3 - 8005cf6: 81a3 strh r3, [r4, #12] - 8005cf8: 4240 negs r0, r0 - 8005cfa: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 8005cfc: 9b01 ldr r3, [sp, #4] - 8005cfe: 1836 adds r6, r6, r0 - 8005d00: 1a1b subs r3, r3, r0 - 8005d02: 9301 str r3, [sp, #4] - 8005d04: e7e6 b.n 8005cd4 <__sflush_r+0xd4> - 8005d06: 46c0 nop @ (mov r8, r8) - 8005d08: dfbffffe .word 0xdfbffffe - -08005d0c <_fflush_r>: - 8005d0c: 690b ldr r3, [r1, #16] - 8005d0e: b570 push {r4, r5, r6, lr} - 8005d10: 0005 movs r5, r0 - 8005d12: 000c movs r4, r1 - 8005d14: 2b00 cmp r3, #0 - 8005d16: d102 bne.n 8005d1e <_fflush_r+0x12> - 8005d18: 2500 movs r5, #0 - 8005d1a: 0028 movs r0, r5 - 8005d1c: bd70 pop {r4, r5, r6, pc} - 8005d1e: 2800 cmp r0, #0 - 8005d20: d004 beq.n 8005d2c <_fflush_r+0x20> - 8005d22: 6a03 ldr r3, [r0, #32] - 8005d24: 2b00 cmp r3, #0 - 8005d26: d101 bne.n 8005d2c <_fflush_r+0x20> - 8005d28: f7ff f998 bl 800505c <__sinit> - 8005d2c: 220c movs r2, #12 - 8005d2e: 5ea3 ldrsh r3, [r4, r2] - 8005d30: 2b00 cmp r3, #0 - 8005d32: d0f1 beq.n 8005d18 <_fflush_r+0xc> - 8005d34: 6e62 ldr r2, [r4, #100] @ 0x64 - 8005d36: 07d2 lsls r2, r2, #31 - 8005d38: d404 bmi.n 8005d44 <_fflush_r+0x38> - 8005d3a: 059b lsls r3, r3, #22 - 8005d3c: d402 bmi.n 8005d44 <_fflush_r+0x38> - 8005d3e: 6da0 ldr r0, [r4, #88] @ 0x58 - 8005d40: f7ff fb9d bl 800547e <__retarget_lock_acquire_recursive> - 8005d44: 0028 movs r0, r5 - 8005d46: 0021 movs r1, r4 - 8005d48: f7ff ff5a bl 8005c00 <__sflush_r> - 8005d4c: 6e63 ldr r3, [r4, #100] @ 0x64 - 8005d4e: 0005 movs r5, r0 - 8005d50: 07db lsls r3, r3, #31 - 8005d52: d4e2 bmi.n 8005d1a <_fflush_r+0xe> - 8005d54: 89a3 ldrh r3, [r4, #12] - 8005d56: 059b lsls r3, r3, #22 - 8005d58: d4df bmi.n 8005d1a <_fflush_r+0xe> - 8005d5a: 6da0 ldr r0, [r4, #88] @ 0x58 - 8005d5c: f7ff fb90 bl 8005480 <__retarget_lock_release_recursive> - 8005d60: e7db b.n 8005d1a <_fflush_r+0xe> +08005c28 <_printf_common>: + 8005c28: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8005c2a: 0016 movs r6, r2 + 8005c2c: 9301 str r3, [sp, #4] + 8005c2e: 688a ldr r2, [r1, #8] + 8005c30: 690b ldr r3, [r1, #16] + 8005c32: 000c movs r4, r1 + 8005c34: 9000 str r0, [sp, #0] + 8005c36: 4293 cmp r3, r2 + 8005c38: da00 bge.n 8005c3c <_printf_common+0x14> + 8005c3a: 0013 movs r3, r2 + 8005c3c: 0022 movs r2, r4 + 8005c3e: 6033 str r3, [r6, #0] + 8005c40: 3243 adds r2, #67 @ 0x43 + 8005c42: 7812 ldrb r2, [r2, #0] + 8005c44: 2a00 cmp r2, #0 + 8005c46: d001 beq.n 8005c4c <_printf_common+0x24> + 8005c48: 3301 adds r3, #1 + 8005c4a: 6033 str r3, [r6, #0] + 8005c4c: 6823 ldr r3, [r4, #0] + 8005c4e: 069b lsls r3, r3, #26 + 8005c50: d502 bpl.n 8005c58 <_printf_common+0x30> + 8005c52: 6833 ldr r3, [r6, #0] + 8005c54: 3302 adds r3, #2 + 8005c56: 6033 str r3, [r6, #0] + 8005c58: 6822 ldr r2, [r4, #0] + 8005c5a: 2306 movs r3, #6 + 8005c5c: 0015 movs r5, r2 + 8005c5e: 401d ands r5, r3 + 8005c60: 421a tst r2, r3 + 8005c62: d027 beq.n 8005cb4 <_printf_common+0x8c> + 8005c64: 0023 movs r3, r4 + 8005c66: 3343 adds r3, #67 @ 0x43 + 8005c68: 781b ldrb r3, [r3, #0] + 8005c6a: 1e5a subs r2, r3, #1 + 8005c6c: 4193 sbcs r3, r2 + 8005c6e: 6822 ldr r2, [r4, #0] + 8005c70: 0692 lsls r2, r2, #26 + 8005c72: d430 bmi.n 8005cd6 <_printf_common+0xae> + 8005c74: 0022 movs r2, r4 + 8005c76: 9901 ldr r1, [sp, #4] + 8005c78: 9800 ldr r0, [sp, #0] + 8005c7a: 9d08 ldr r5, [sp, #32] + 8005c7c: 3243 adds r2, #67 @ 0x43 + 8005c7e: 47a8 blx r5 + 8005c80: 3001 adds r0, #1 + 8005c82: d025 beq.n 8005cd0 <_printf_common+0xa8> + 8005c84: 2206 movs r2, #6 + 8005c86: 6823 ldr r3, [r4, #0] + 8005c88: 2500 movs r5, #0 + 8005c8a: 4013 ands r3, r2 + 8005c8c: 2b04 cmp r3, #4 + 8005c8e: d105 bne.n 8005c9c <_printf_common+0x74> + 8005c90: 6833 ldr r3, [r6, #0] + 8005c92: 68e5 ldr r5, [r4, #12] + 8005c94: 1aed subs r5, r5, r3 + 8005c96: 43eb mvns r3, r5 + 8005c98: 17db asrs r3, r3, #31 + 8005c9a: 401d ands r5, r3 + 8005c9c: 68a3 ldr r3, [r4, #8] + 8005c9e: 6922 ldr r2, [r4, #16] + 8005ca0: 4293 cmp r3, r2 + 8005ca2: dd01 ble.n 8005ca8 <_printf_common+0x80> + 8005ca4: 1a9b subs r3, r3, r2 + 8005ca6: 18ed adds r5, r5, r3 + 8005ca8: 2600 movs r6, #0 + 8005caa: 42b5 cmp r5, r6 + 8005cac: d120 bne.n 8005cf0 <_printf_common+0xc8> + 8005cae: 2000 movs r0, #0 + 8005cb0: e010 b.n 8005cd4 <_printf_common+0xac> + 8005cb2: 3501 adds r5, #1 + 8005cb4: 68e3 ldr r3, [r4, #12] + 8005cb6: 6832 ldr r2, [r6, #0] + 8005cb8: 1a9b subs r3, r3, r2 + 8005cba: 42ab cmp r3, r5 + 8005cbc: ddd2 ble.n 8005c64 <_printf_common+0x3c> + 8005cbe: 0022 movs r2, r4 + 8005cc0: 2301 movs r3, #1 + 8005cc2: 9901 ldr r1, [sp, #4] + 8005cc4: 9800 ldr r0, [sp, #0] + 8005cc6: 9f08 ldr r7, [sp, #32] + 8005cc8: 3219 adds r2, #25 + 8005cca: 47b8 blx r7 + 8005ccc: 3001 adds r0, #1 + 8005cce: d1f0 bne.n 8005cb2 <_printf_common+0x8a> + 8005cd0: 2001 movs r0, #1 + 8005cd2: 4240 negs r0, r0 + 8005cd4: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 8005cd6: 2030 movs r0, #48 @ 0x30 + 8005cd8: 18e1 adds r1, r4, r3 + 8005cda: 3143 adds r1, #67 @ 0x43 + 8005cdc: 7008 strb r0, [r1, #0] + 8005cde: 0021 movs r1, r4 + 8005ce0: 1c5a adds r2, r3, #1 + 8005ce2: 3145 adds r1, #69 @ 0x45 + 8005ce4: 7809 ldrb r1, [r1, #0] + 8005ce6: 18a2 adds r2, r4, r2 + 8005ce8: 3243 adds r2, #67 @ 0x43 + 8005cea: 3302 adds r3, #2 + 8005cec: 7011 strb r1, [r2, #0] + 8005cee: e7c1 b.n 8005c74 <_printf_common+0x4c> + 8005cf0: 0022 movs r2, r4 + 8005cf2: 2301 movs r3, #1 + 8005cf4: 9901 ldr r1, [sp, #4] + 8005cf6: 9800 ldr r0, [sp, #0] + 8005cf8: 9f08 ldr r7, [sp, #32] + 8005cfa: 321a adds r2, #26 + 8005cfc: 47b8 blx r7 + 8005cfe: 3001 adds r0, #1 + 8005d00: d0e6 beq.n 8005cd0 <_printf_common+0xa8> + 8005d02: 3601 adds r6, #1 + 8005d04: e7d1 b.n 8005caa <_printf_common+0x82> ... -08005d64 <__swhatbuf_r>: - 8005d64: b570 push {r4, r5, r6, lr} - 8005d66: 000e movs r6, r1 - 8005d68: 001d movs r5, r3 - 8005d6a: 230e movs r3, #14 - 8005d6c: 5ec9 ldrsh r1, [r1, r3] - 8005d6e: 0014 movs r4, r2 - 8005d70: b096 sub sp, #88 @ 0x58 - 8005d72: 2900 cmp r1, #0 - 8005d74: da0c bge.n 8005d90 <__swhatbuf_r+0x2c> - 8005d76: 89b2 ldrh r2, [r6, #12] - 8005d78: 2380 movs r3, #128 @ 0x80 - 8005d7a: 0011 movs r1, r2 - 8005d7c: 4019 ands r1, r3 - 8005d7e: 421a tst r2, r3 - 8005d80: d114 bne.n 8005dac <__swhatbuf_r+0x48> - 8005d82: 2380 movs r3, #128 @ 0x80 - 8005d84: 00db lsls r3, r3, #3 - 8005d86: 2000 movs r0, #0 - 8005d88: 6029 str r1, [r5, #0] - 8005d8a: 6023 str r3, [r4, #0] - 8005d8c: b016 add sp, #88 @ 0x58 - 8005d8e: bd70 pop {r4, r5, r6, pc} - 8005d90: 466a mov r2, sp - 8005d92: f000 f853 bl 8005e3c <_fstat_r> - 8005d96: 2800 cmp r0, #0 - 8005d98: dbed blt.n 8005d76 <__swhatbuf_r+0x12> - 8005d9a: 23f0 movs r3, #240 @ 0xf0 - 8005d9c: 9901 ldr r1, [sp, #4] - 8005d9e: 021b lsls r3, r3, #8 - 8005da0: 4019 ands r1, r3 - 8005da2: 4b04 ldr r3, [pc, #16] @ (8005db4 <__swhatbuf_r+0x50>) - 8005da4: 18c9 adds r1, r1, r3 - 8005da6: 424b negs r3, r1 - 8005da8: 4159 adcs r1, r3 - 8005daa: e7ea b.n 8005d82 <__swhatbuf_r+0x1e> - 8005dac: 2100 movs r1, #0 - 8005dae: 2340 movs r3, #64 @ 0x40 - 8005db0: e7e9 b.n 8005d86 <__swhatbuf_r+0x22> - 8005db2: 46c0 nop @ (mov r8, r8) - 8005db4: ffffe000 .word 0xffffe000 +08005d08 <_printf_i>: + 8005d08: b5f0 push {r4, r5, r6, r7, lr} + 8005d0a: b08b sub sp, #44 @ 0x2c + 8005d0c: 9206 str r2, [sp, #24] + 8005d0e: 000a movs r2, r1 + 8005d10: 3243 adds r2, #67 @ 0x43 + 8005d12: 9307 str r3, [sp, #28] + 8005d14: 9005 str r0, [sp, #20] + 8005d16: 9203 str r2, [sp, #12] + 8005d18: 7e0a ldrb r2, [r1, #24] + 8005d1a: 000c movs r4, r1 + 8005d1c: 9b10 ldr r3, [sp, #64] @ 0x40 + 8005d1e: 2a78 cmp r2, #120 @ 0x78 + 8005d20: d809 bhi.n 8005d36 <_printf_i+0x2e> + 8005d22: 2a62 cmp r2, #98 @ 0x62 + 8005d24: d80b bhi.n 8005d3e <_printf_i+0x36> + 8005d26: 2a00 cmp r2, #0 + 8005d28: d100 bne.n 8005d2c <_printf_i+0x24> + 8005d2a: e0bc b.n 8005ea6 <_printf_i+0x19e> + 8005d2c: 497b ldr r1, [pc, #492] @ (8005f1c <_printf_i+0x214>) + 8005d2e: 9104 str r1, [sp, #16] + 8005d30: 2a58 cmp r2, #88 @ 0x58 + 8005d32: d100 bne.n 8005d36 <_printf_i+0x2e> + 8005d34: e090 b.n 8005e58 <_printf_i+0x150> + 8005d36: 0025 movs r5, r4 + 8005d38: 3542 adds r5, #66 @ 0x42 + 8005d3a: 702a strb r2, [r5, #0] + 8005d3c: e022 b.n 8005d84 <_printf_i+0x7c> + 8005d3e: 0010 movs r0, r2 + 8005d40: 3863 subs r0, #99 @ 0x63 + 8005d42: 2815 cmp r0, #21 + 8005d44: d8f7 bhi.n 8005d36 <_printf_i+0x2e> + 8005d46: f7fa f9db bl 8000100 <__gnu_thumb1_case_shi> + 8005d4a: 0016 .short 0x0016 + 8005d4c: fff6001f .word 0xfff6001f + 8005d50: fff6fff6 .word 0xfff6fff6 + 8005d54: 001ffff6 .word 0x001ffff6 + 8005d58: fff6fff6 .word 0xfff6fff6 + 8005d5c: fff6fff6 .word 0xfff6fff6 + 8005d60: 003600a1 .word 0x003600a1 + 8005d64: fff60080 .word 0xfff60080 + 8005d68: 00b2fff6 .word 0x00b2fff6 + 8005d6c: 0036fff6 .word 0x0036fff6 + 8005d70: fff6fff6 .word 0xfff6fff6 + 8005d74: 0084 .short 0x0084 + 8005d76: 0025 movs r5, r4 + 8005d78: 681a ldr r2, [r3, #0] + 8005d7a: 3542 adds r5, #66 @ 0x42 + 8005d7c: 1d11 adds r1, r2, #4 + 8005d7e: 6019 str r1, [r3, #0] + 8005d80: 6813 ldr r3, [r2, #0] + 8005d82: 702b strb r3, [r5, #0] + 8005d84: 2301 movs r3, #1 + 8005d86: e0a0 b.n 8005eca <_printf_i+0x1c2> + 8005d88: 6818 ldr r0, [r3, #0] + 8005d8a: 6809 ldr r1, [r1, #0] + 8005d8c: 1d02 adds r2, r0, #4 + 8005d8e: 060d lsls r5, r1, #24 + 8005d90: d50b bpl.n 8005daa <_printf_i+0xa2> + 8005d92: 6806 ldr r6, [r0, #0] + 8005d94: 601a str r2, [r3, #0] + 8005d96: 2e00 cmp r6, #0 + 8005d98: da03 bge.n 8005da2 <_printf_i+0x9a> + 8005d9a: 232d movs r3, #45 @ 0x2d + 8005d9c: 9a03 ldr r2, [sp, #12] + 8005d9e: 4276 negs r6, r6 + 8005da0: 7013 strb r3, [r2, #0] + 8005da2: 4b5e ldr r3, [pc, #376] @ (8005f1c <_printf_i+0x214>) + 8005da4: 270a movs r7, #10 + 8005da6: 9304 str r3, [sp, #16] + 8005da8: e018 b.n 8005ddc <_printf_i+0xd4> + 8005daa: 6806 ldr r6, [r0, #0] + 8005dac: 601a str r2, [r3, #0] + 8005dae: 0649 lsls r1, r1, #25 + 8005db0: d5f1 bpl.n 8005d96 <_printf_i+0x8e> + 8005db2: b236 sxth r6, r6 + 8005db4: e7ef b.n 8005d96 <_printf_i+0x8e> + 8005db6: 6808 ldr r0, [r1, #0] + 8005db8: 6819 ldr r1, [r3, #0] + 8005dba: c940 ldmia r1!, {r6} + 8005dbc: 0605 lsls r5, r0, #24 + 8005dbe: d402 bmi.n 8005dc6 <_printf_i+0xbe> + 8005dc0: 0640 lsls r0, r0, #25 + 8005dc2: d500 bpl.n 8005dc6 <_printf_i+0xbe> + 8005dc4: b2b6 uxth r6, r6 + 8005dc6: 6019 str r1, [r3, #0] + 8005dc8: 4b54 ldr r3, [pc, #336] @ (8005f1c <_printf_i+0x214>) + 8005dca: 270a movs r7, #10 + 8005dcc: 9304 str r3, [sp, #16] + 8005dce: 2a6f cmp r2, #111 @ 0x6f + 8005dd0: d100 bne.n 8005dd4 <_printf_i+0xcc> + 8005dd2: 3f02 subs r7, #2 + 8005dd4: 0023 movs r3, r4 + 8005dd6: 2200 movs r2, #0 + 8005dd8: 3343 adds r3, #67 @ 0x43 + 8005dda: 701a strb r2, [r3, #0] + 8005ddc: 6863 ldr r3, [r4, #4] + 8005dde: 60a3 str r3, [r4, #8] + 8005de0: 2b00 cmp r3, #0 + 8005de2: db03 blt.n 8005dec <_printf_i+0xe4> + 8005de4: 2104 movs r1, #4 + 8005de6: 6822 ldr r2, [r4, #0] + 8005de8: 438a bics r2, r1 + 8005dea: 6022 str r2, [r4, #0] + 8005dec: 2e00 cmp r6, #0 + 8005dee: d102 bne.n 8005df6 <_printf_i+0xee> + 8005df0: 9d03 ldr r5, [sp, #12] + 8005df2: 2b00 cmp r3, #0 + 8005df4: d00c beq.n 8005e10 <_printf_i+0x108> + 8005df6: 9d03 ldr r5, [sp, #12] + 8005df8: 0030 movs r0, r6 + 8005dfa: 0039 movs r1, r7 + 8005dfc: f7fa fa10 bl 8000220 <__aeabi_uidivmod> + 8005e00: 9b04 ldr r3, [sp, #16] + 8005e02: 3d01 subs r5, #1 + 8005e04: 5c5b ldrb r3, [r3, r1] + 8005e06: 702b strb r3, [r5, #0] + 8005e08: 0033 movs r3, r6 + 8005e0a: 0006 movs r6, r0 + 8005e0c: 429f cmp r7, r3 + 8005e0e: d9f3 bls.n 8005df8 <_printf_i+0xf0> + 8005e10: 2f08 cmp r7, #8 + 8005e12: d109 bne.n 8005e28 <_printf_i+0x120> + 8005e14: 6823 ldr r3, [r4, #0] + 8005e16: 07db lsls r3, r3, #31 + 8005e18: d506 bpl.n 8005e28 <_printf_i+0x120> + 8005e1a: 6862 ldr r2, [r4, #4] + 8005e1c: 6923 ldr r3, [r4, #16] + 8005e1e: 429a cmp r2, r3 + 8005e20: dc02 bgt.n 8005e28 <_printf_i+0x120> + 8005e22: 2330 movs r3, #48 @ 0x30 + 8005e24: 3d01 subs r5, #1 + 8005e26: 702b strb r3, [r5, #0] + 8005e28: 9b03 ldr r3, [sp, #12] + 8005e2a: 1b5b subs r3, r3, r5 + 8005e2c: 6123 str r3, [r4, #16] + 8005e2e: 9b07 ldr r3, [sp, #28] + 8005e30: 0021 movs r1, r4 + 8005e32: 9300 str r3, [sp, #0] + 8005e34: 9805 ldr r0, [sp, #20] + 8005e36: 9b06 ldr r3, [sp, #24] + 8005e38: aa09 add r2, sp, #36 @ 0x24 + 8005e3a: f7ff fef5 bl 8005c28 <_printf_common> + 8005e3e: 3001 adds r0, #1 + 8005e40: d148 bne.n 8005ed4 <_printf_i+0x1cc> + 8005e42: 2001 movs r0, #1 + 8005e44: 4240 negs r0, r0 + 8005e46: b00b add sp, #44 @ 0x2c + 8005e48: bdf0 pop {r4, r5, r6, r7, pc} + 8005e4a: 2220 movs r2, #32 + 8005e4c: 6809 ldr r1, [r1, #0] + 8005e4e: 430a orrs r2, r1 + 8005e50: 6022 str r2, [r4, #0] + 8005e52: 2278 movs r2, #120 @ 0x78 + 8005e54: 4932 ldr r1, [pc, #200] @ (8005f20 <_printf_i+0x218>) + 8005e56: 9104 str r1, [sp, #16] + 8005e58: 0021 movs r1, r4 + 8005e5a: 3145 adds r1, #69 @ 0x45 + 8005e5c: 700a strb r2, [r1, #0] + 8005e5e: 6819 ldr r1, [r3, #0] + 8005e60: 6822 ldr r2, [r4, #0] + 8005e62: c940 ldmia r1!, {r6} + 8005e64: 0610 lsls r0, r2, #24 + 8005e66: d402 bmi.n 8005e6e <_printf_i+0x166> + 8005e68: 0650 lsls r0, r2, #25 + 8005e6a: d500 bpl.n 8005e6e <_printf_i+0x166> + 8005e6c: b2b6 uxth r6, r6 + 8005e6e: 6019 str r1, [r3, #0] + 8005e70: 07d3 lsls r3, r2, #31 + 8005e72: d502 bpl.n 8005e7a <_printf_i+0x172> + 8005e74: 2320 movs r3, #32 + 8005e76: 4313 orrs r3, r2 + 8005e78: 6023 str r3, [r4, #0] + 8005e7a: 2e00 cmp r6, #0 + 8005e7c: d001 beq.n 8005e82 <_printf_i+0x17a> + 8005e7e: 2710 movs r7, #16 + 8005e80: e7a8 b.n 8005dd4 <_printf_i+0xcc> + 8005e82: 2220 movs r2, #32 + 8005e84: 6823 ldr r3, [r4, #0] + 8005e86: 4393 bics r3, r2 + 8005e88: 6023 str r3, [r4, #0] + 8005e8a: e7f8 b.n 8005e7e <_printf_i+0x176> + 8005e8c: 681a ldr r2, [r3, #0] + 8005e8e: 680d ldr r5, [r1, #0] + 8005e90: 1d10 adds r0, r2, #4 + 8005e92: 6949 ldr r1, [r1, #20] + 8005e94: 6018 str r0, [r3, #0] + 8005e96: 6813 ldr r3, [r2, #0] + 8005e98: 062e lsls r6, r5, #24 + 8005e9a: d501 bpl.n 8005ea0 <_printf_i+0x198> + 8005e9c: 6019 str r1, [r3, #0] + 8005e9e: e002 b.n 8005ea6 <_printf_i+0x19e> + 8005ea0: 066d lsls r5, r5, #25 + 8005ea2: d5fb bpl.n 8005e9c <_printf_i+0x194> + 8005ea4: 8019 strh r1, [r3, #0] + 8005ea6: 2300 movs r3, #0 + 8005ea8: 9d03 ldr r5, [sp, #12] + 8005eaa: 6123 str r3, [r4, #16] + 8005eac: e7bf b.n 8005e2e <_printf_i+0x126> + 8005eae: 681a ldr r2, [r3, #0] + 8005eb0: 1d11 adds r1, r2, #4 + 8005eb2: 6019 str r1, [r3, #0] + 8005eb4: 6815 ldr r5, [r2, #0] + 8005eb6: 2100 movs r1, #0 + 8005eb8: 0028 movs r0, r5 + 8005eba: 6862 ldr r2, [r4, #4] + 8005ebc: f000 f986 bl 80061cc + 8005ec0: 2800 cmp r0, #0 + 8005ec2: d001 beq.n 8005ec8 <_printf_i+0x1c0> + 8005ec4: 1b40 subs r0, r0, r5 + 8005ec6: 6060 str r0, [r4, #4] + 8005ec8: 6863 ldr r3, [r4, #4] + 8005eca: 6123 str r3, [r4, #16] + 8005ecc: 2300 movs r3, #0 + 8005ece: 9a03 ldr r2, [sp, #12] + 8005ed0: 7013 strb r3, [r2, #0] + 8005ed2: e7ac b.n 8005e2e <_printf_i+0x126> + 8005ed4: 002a movs r2, r5 + 8005ed6: 6923 ldr r3, [r4, #16] + 8005ed8: 9906 ldr r1, [sp, #24] + 8005eda: 9805 ldr r0, [sp, #20] + 8005edc: 9d07 ldr r5, [sp, #28] + 8005ede: 47a8 blx r5 + 8005ee0: 3001 adds r0, #1 + 8005ee2: d0ae beq.n 8005e42 <_printf_i+0x13a> + 8005ee4: 6823 ldr r3, [r4, #0] + 8005ee6: 079b lsls r3, r3, #30 + 8005ee8: d415 bmi.n 8005f16 <_printf_i+0x20e> + 8005eea: 9b09 ldr r3, [sp, #36] @ 0x24 + 8005eec: 68e0 ldr r0, [r4, #12] + 8005eee: 4298 cmp r0, r3 + 8005ef0: daa9 bge.n 8005e46 <_printf_i+0x13e> + 8005ef2: 0018 movs r0, r3 + 8005ef4: e7a7 b.n 8005e46 <_printf_i+0x13e> + 8005ef6: 0022 movs r2, r4 + 8005ef8: 2301 movs r3, #1 + 8005efa: 9906 ldr r1, [sp, #24] + 8005efc: 9805 ldr r0, [sp, #20] + 8005efe: 9e07 ldr r6, [sp, #28] + 8005f00: 3219 adds r2, #25 + 8005f02: 47b0 blx r6 + 8005f04: 3001 adds r0, #1 + 8005f06: d09c beq.n 8005e42 <_printf_i+0x13a> + 8005f08: 3501 adds r5, #1 + 8005f0a: 68e3 ldr r3, [r4, #12] + 8005f0c: 9a09 ldr r2, [sp, #36] @ 0x24 + 8005f0e: 1a9b subs r3, r3, r2 + 8005f10: 42ab cmp r3, r5 + 8005f12: dcf0 bgt.n 8005ef6 <_printf_i+0x1ee> + 8005f14: e7e9 b.n 8005eea <_printf_i+0x1e2> + 8005f16: 2500 movs r5, #0 + 8005f18: e7f7 b.n 8005f0a <_printf_i+0x202> + 8005f1a: 46c0 nop @ (mov r8, r8) + 8005f1c: 080062d9 .word 0x080062d9 + 8005f20: 080062ea .word 0x080062ea -08005db8 <__smakebuf_r>: - 8005db8: b5f0 push {r4, r5, r6, r7, lr} - 8005dba: 2602 movs r6, #2 - 8005dbc: 898b ldrh r3, [r1, #12] - 8005dbe: 0005 movs r5, r0 - 8005dc0: 000c movs r4, r1 - 8005dc2: b085 sub sp, #20 - 8005dc4: 4233 tst r3, r6 - 8005dc6: d007 beq.n 8005dd8 <__smakebuf_r+0x20> - 8005dc8: 0023 movs r3, r4 - 8005dca: 3347 adds r3, #71 @ 0x47 - 8005dcc: 6023 str r3, [r4, #0] - 8005dce: 6123 str r3, [r4, #16] - 8005dd0: 2301 movs r3, #1 - 8005dd2: 6163 str r3, [r4, #20] - 8005dd4: b005 add sp, #20 - 8005dd6: bdf0 pop {r4, r5, r6, r7, pc} - 8005dd8: ab03 add r3, sp, #12 - 8005dda: aa02 add r2, sp, #8 - 8005ddc: f7ff ffc2 bl 8005d64 <__swhatbuf_r> - 8005de0: 9f02 ldr r7, [sp, #8] - 8005de2: 9001 str r0, [sp, #4] - 8005de4: 0039 movs r1, r7 - 8005de6: 0028 movs r0, r5 - 8005de8: f7ff fbb8 bl 800555c <_malloc_r> - 8005dec: 2800 cmp r0, #0 - 8005dee: d108 bne.n 8005e02 <__smakebuf_r+0x4a> - 8005df0: 220c movs r2, #12 - 8005df2: 5ea3 ldrsh r3, [r4, r2] - 8005df4: 059a lsls r2, r3, #22 - 8005df6: d4ed bmi.n 8005dd4 <__smakebuf_r+0x1c> - 8005df8: 2203 movs r2, #3 - 8005dfa: 4393 bics r3, r2 - 8005dfc: 431e orrs r6, r3 - 8005dfe: 81a6 strh r6, [r4, #12] - 8005e00: e7e2 b.n 8005dc8 <__smakebuf_r+0x10> - 8005e02: 2380 movs r3, #128 @ 0x80 - 8005e04: 89a2 ldrh r2, [r4, #12] - 8005e06: 6020 str r0, [r4, #0] - 8005e08: 4313 orrs r3, r2 - 8005e0a: 81a3 strh r3, [r4, #12] - 8005e0c: 9b03 ldr r3, [sp, #12] - 8005e0e: 6120 str r0, [r4, #16] - 8005e10: 6167 str r7, [r4, #20] - 8005e12: 2b00 cmp r3, #0 - 8005e14: d00c beq.n 8005e30 <__smakebuf_r+0x78> - 8005e16: 0028 movs r0, r5 - 8005e18: 230e movs r3, #14 - 8005e1a: 5ee1 ldrsh r1, [r4, r3] - 8005e1c: f000 f820 bl 8005e60 <_isatty_r> - 8005e20: 2800 cmp r0, #0 - 8005e22: d005 beq.n 8005e30 <__smakebuf_r+0x78> - 8005e24: 2303 movs r3, #3 - 8005e26: 89a2 ldrh r2, [r4, #12] - 8005e28: 439a bics r2, r3 - 8005e2a: 3b02 subs r3, #2 - 8005e2c: 4313 orrs r3, r2 - 8005e2e: 81a3 strh r3, [r4, #12] - 8005e30: 89a3 ldrh r3, [r4, #12] - 8005e32: 9a01 ldr r2, [sp, #4] - 8005e34: 4313 orrs r3, r2 - 8005e36: 81a3 strh r3, [r4, #12] - 8005e38: e7cc b.n 8005dd4 <__smakebuf_r+0x1c> +08005f24 <__sflush_r>: + 8005f24: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8005f26: 220c movs r2, #12 + 8005f28: 5e8b ldrsh r3, [r1, r2] + 8005f2a: 0005 movs r5, r0 + 8005f2c: 000c movs r4, r1 + 8005f2e: 071a lsls r2, r3, #28 + 8005f30: d456 bmi.n 8005fe0 <__sflush_r+0xbc> + 8005f32: 684a ldr r2, [r1, #4] + 8005f34: 2a00 cmp r2, #0 + 8005f36: dc02 bgt.n 8005f3e <__sflush_r+0x1a> + 8005f38: 6c0a ldr r2, [r1, #64] @ 0x40 + 8005f3a: 2a00 cmp r2, #0 + 8005f3c: dd4e ble.n 8005fdc <__sflush_r+0xb8> + 8005f3e: 6ae7 ldr r7, [r4, #44] @ 0x2c + 8005f40: 2f00 cmp r7, #0 + 8005f42: d04b beq.n 8005fdc <__sflush_r+0xb8> + 8005f44: 2200 movs r2, #0 + 8005f46: 2080 movs r0, #128 @ 0x80 + 8005f48: 682e ldr r6, [r5, #0] + 8005f4a: 602a str r2, [r5, #0] + 8005f4c: 001a movs r2, r3 + 8005f4e: 0140 lsls r0, r0, #5 + 8005f50: 6a21 ldr r1, [r4, #32] + 8005f52: 4002 ands r2, r0 + 8005f54: 4203 tst r3, r0 + 8005f56: d033 beq.n 8005fc0 <__sflush_r+0x9c> + 8005f58: 6d62 ldr r2, [r4, #84] @ 0x54 + 8005f5a: 89a3 ldrh r3, [r4, #12] + 8005f5c: 075b lsls r3, r3, #29 + 8005f5e: d506 bpl.n 8005f6e <__sflush_r+0x4a> + 8005f60: 6863 ldr r3, [r4, #4] + 8005f62: 1ad2 subs r2, r2, r3 + 8005f64: 6b63 ldr r3, [r4, #52] @ 0x34 + 8005f66: 2b00 cmp r3, #0 + 8005f68: d001 beq.n 8005f6e <__sflush_r+0x4a> + 8005f6a: 6c23 ldr r3, [r4, #64] @ 0x40 + 8005f6c: 1ad2 subs r2, r2, r3 + 8005f6e: 2300 movs r3, #0 + 8005f70: 0028 movs r0, r5 + 8005f72: 6ae7 ldr r7, [r4, #44] @ 0x2c + 8005f74: 6a21 ldr r1, [r4, #32] + 8005f76: 47b8 blx r7 + 8005f78: 89a2 ldrh r2, [r4, #12] + 8005f7a: 1c43 adds r3, r0, #1 + 8005f7c: d106 bne.n 8005f8c <__sflush_r+0x68> + 8005f7e: 6829 ldr r1, [r5, #0] + 8005f80: 291d cmp r1, #29 + 8005f82: d846 bhi.n 8006012 <__sflush_r+0xee> + 8005f84: 4b29 ldr r3, [pc, #164] @ (800602c <__sflush_r+0x108>) + 8005f86: 410b asrs r3, r1 + 8005f88: 07db lsls r3, r3, #31 + 8005f8a: d442 bmi.n 8006012 <__sflush_r+0xee> + 8005f8c: 2300 movs r3, #0 + 8005f8e: 6063 str r3, [r4, #4] + 8005f90: 6923 ldr r3, [r4, #16] + 8005f92: 6023 str r3, [r4, #0] + 8005f94: 04d2 lsls r2, r2, #19 + 8005f96: d505 bpl.n 8005fa4 <__sflush_r+0x80> + 8005f98: 1c43 adds r3, r0, #1 + 8005f9a: d102 bne.n 8005fa2 <__sflush_r+0x7e> + 8005f9c: 682b ldr r3, [r5, #0] + 8005f9e: 2b00 cmp r3, #0 + 8005fa0: d100 bne.n 8005fa4 <__sflush_r+0x80> + 8005fa2: 6560 str r0, [r4, #84] @ 0x54 + 8005fa4: 6b61 ldr r1, [r4, #52] @ 0x34 + 8005fa6: 602e str r6, [r5, #0] + 8005fa8: 2900 cmp r1, #0 + 8005faa: d017 beq.n 8005fdc <__sflush_r+0xb8> + 8005fac: 0023 movs r3, r4 + 8005fae: 3344 adds r3, #68 @ 0x44 + 8005fb0: 4299 cmp r1, r3 + 8005fb2: d002 beq.n 8005fba <__sflush_r+0x96> + 8005fb4: 0028 movs r0, r5 + 8005fb6: f7ff fbf7 bl 80057a8 <_free_r> + 8005fba: 2300 movs r3, #0 + 8005fbc: 6363 str r3, [r4, #52] @ 0x34 + 8005fbe: e00d b.n 8005fdc <__sflush_r+0xb8> + 8005fc0: 2301 movs r3, #1 + 8005fc2: 0028 movs r0, r5 + 8005fc4: 47b8 blx r7 + 8005fc6: 0002 movs r2, r0 + 8005fc8: 1c43 adds r3, r0, #1 + 8005fca: d1c6 bne.n 8005f5a <__sflush_r+0x36> + 8005fcc: 682b ldr r3, [r5, #0] + 8005fce: 2b00 cmp r3, #0 + 8005fd0: d0c3 beq.n 8005f5a <__sflush_r+0x36> + 8005fd2: 2b1d cmp r3, #29 + 8005fd4: d001 beq.n 8005fda <__sflush_r+0xb6> + 8005fd6: 2b16 cmp r3, #22 + 8005fd8: d11a bne.n 8006010 <__sflush_r+0xec> + 8005fda: 602e str r6, [r5, #0] + 8005fdc: 2000 movs r0, #0 + 8005fde: e01e b.n 800601e <__sflush_r+0xfa> + 8005fe0: 690e ldr r6, [r1, #16] + 8005fe2: 2e00 cmp r6, #0 + 8005fe4: d0fa beq.n 8005fdc <__sflush_r+0xb8> + 8005fe6: 680f ldr r7, [r1, #0] + 8005fe8: 600e str r6, [r1, #0] + 8005fea: 1bba subs r2, r7, r6 + 8005fec: 9201 str r2, [sp, #4] + 8005fee: 2200 movs r2, #0 + 8005ff0: 079b lsls r3, r3, #30 + 8005ff2: d100 bne.n 8005ff6 <__sflush_r+0xd2> + 8005ff4: 694a ldr r2, [r1, #20] + 8005ff6: 60a2 str r2, [r4, #8] + 8005ff8: 9b01 ldr r3, [sp, #4] + 8005ffa: 2b00 cmp r3, #0 + 8005ffc: ddee ble.n 8005fdc <__sflush_r+0xb8> + 8005ffe: 6aa3 ldr r3, [r4, #40] @ 0x28 + 8006000: 0032 movs r2, r6 + 8006002: 001f movs r7, r3 + 8006004: 0028 movs r0, r5 + 8006006: 9b01 ldr r3, [sp, #4] + 8006008: 6a21 ldr r1, [r4, #32] + 800600a: 47b8 blx r7 + 800600c: 2800 cmp r0, #0 + 800600e: dc07 bgt.n 8006020 <__sflush_r+0xfc> + 8006010: 89a2 ldrh r2, [r4, #12] + 8006012: 2340 movs r3, #64 @ 0x40 + 8006014: 2001 movs r0, #1 + 8006016: 4313 orrs r3, r2 + 8006018: b21b sxth r3, r3 + 800601a: 81a3 strh r3, [r4, #12] + 800601c: 4240 negs r0, r0 + 800601e: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 8006020: 9b01 ldr r3, [sp, #4] + 8006022: 1836 adds r6, r6, r0 + 8006024: 1a1b subs r3, r3, r0 + 8006026: 9301 str r3, [sp, #4] + 8006028: e7e6 b.n 8005ff8 <__sflush_r+0xd4> + 800602a: 46c0 nop @ (mov r8, r8) + 800602c: dfbffffe .word 0xdfbffffe + +08006030 <_fflush_r>: + 8006030: 690b ldr r3, [r1, #16] + 8006032: b570 push {r4, r5, r6, lr} + 8006034: 0005 movs r5, r0 + 8006036: 000c movs r4, r1 + 8006038: 2b00 cmp r3, #0 + 800603a: d102 bne.n 8006042 <_fflush_r+0x12> + 800603c: 2500 movs r5, #0 + 800603e: 0028 movs r0, r5 + 8006040: bd70 pop {r4, r5, r6, pc} + 8006042: 2800 cmp r0, #0 + 8006044: d004 beq.n 8006050 <_fflush_r+0x20> + 8006046: 6a03 ldr r3, [r0, #32] + 8006048: 2b00 cmp r3, #0 + 800604a: d101 bne.n 8006050 <_fflush_r+0x20> + 800604c: f7ff f998 bl 8005380 <__sinit> + 8006050: 220c movs r2, #12 + 8006052: 5ea3 ldrsh r3, [r4, r2] + 8006054: 2b00 cmp r3, #0 + 8006056: d0f1 beq.n 800603c <_fflush_r+0xc> + 8006058: 6e62 ldr r2, [r4, #100] @ 0x64 + 800605a: 07d2 lsls r2, r2, #31 + 800605c: d404 bmi.n 8006068 <_fflush_r+0x38> + 800605e: 059b lsls r3, r3, #22 + 8006060: d402 bmi.n 8006068 <_fflush_r+0x38> + 8006062: 6da0 ldr r0, [r4, #88] @ 0x58 + 8006064: f7ff fb9d bl 80057a2 <__retarget_lock_acquire_recursive> + 8006068: 0028 movs r0, r5 + 800606a: 0021 movs r1, r4 + 800606c: f7ff ff5a bl 8005f24 <__sflush_r> + 8006070: 6e63 ldr r3, [r4, #100] @ 0x64 + 8006072: 0005 movs r5, r0 + 8006074: 07db lsls r3, r3, #31 + 8006076: d4e2 bmi.n 800603e <_fflush_r+0xe> + 8006078: 89a3 ldrh r3, [r4, #12] + 800607a: 059b lsls r3, r3, #22 + 800607c: d4df bmi.n 800603e <_fflush_r+0xe> + 800607e: 6da0 ldr r0, [r4, #88] @ 0x58 + 8006080: f7ff fb90 bl 80057a4 <__retarget_lock_release_recursive> + 8006084: e7db b.n 800603e <_fflush_r+0xe> ... -08005e3c <_fstat_r>: - 8005e3c: 2300 movs r3, #0 - 8005e3e: b570 push {r4, r5, r6, lr} - 8005e40: 4d06 ldr r5, [pc, #24] @ (8005e5c <_fstat_r+0x20>) - 8005e42: 0004 movs r4, r0 - 8005e44: 0008 movs r0, r1 - 8005e46: 0011 movs r1, r2 - 8005e48: 602b str r3, [r5, #0] - 8005e4a: f7fb fa6a bl 8001322 <_fstat> - 8005e4e: 1c43 adds r3, r0, #1 - 8005e50: d103 bne.n 8005e5a <_fstat_r+0x1e> - 8005e52: 682b ldr r3, [r5, #0] - 8005e54: 2b00 cmp r3, #0 - 8005e56: d000 beq.n 8005e5a <_fstat_r+0x1e> - 8005e58: 6023 str r3, [r4, #0] - 8005e5a: bd70 pop {r4, r5, r6, pc} - 8005e5c: 20000328 .word 0x20000328 +08006088 <__swhatbuf_r>: + 8006088: b570 push {r4, r5, r6, lr} + 800608a: 000e movs r6, r1 + 800608c: 001d movs r5, r3 + 800608e: 230e movs r3, #14 + 8006090: 5ec9 ldrsh r1, [r1, r3] + 8006092: 0014 movs r4, r2 + 8006094: b096 sub sp, #88 @ 0x58 + 8006096: 2900 cmp r1, #0 + 8006098: da0c bge.n 80060b4 <__swhatbuf_r+0x2c> + 800609a: 89b2 ldrh r2, [r6, #12] + 800609c: 2380 movs r3, #128 @ 0x80 + 800609e: 0011 movs r1, r2 + 80060a0: 4019 ands r1, r3 + 80060a2: 421a tst r2, r3 + 80060a4: d114 bne.n 80060d0 <__swhatbuf_r+0x48> + 80060a6: 2380 movs r3, #128 @ 0x80 + 80060a8: 00db lsls r3, r3, #3 + 80060aa: 2000 movs r0, #0 + 80060ac: 6029 str r1, [r5, #0] + 80060ae: 6023 str r3, [r4, #0] + 80060b0: b016 add sp, #88 @ 0x58 + 80060b2: bd70 pop {r4, r5, r6, pc} + 80060b4: 466a mov r2, sp + 80060b6: f000 f853 bl 8006160 <_fstat_r> + 80060ba: 2800 cmp r0, #0 + 80060bc: dbed blt.n 800609a <__swhatbuf_r+0x12> + 80060be: 23f0 movs r3, #240 @ 0xf0 + 80060c0: 9901 ldr r1, [sp, #4] + 80060c2: 021b lsls r3, r3, #8 + 80060c4: 4019 ands r1, r3 + 80060c6: 4b04 ldr r3, [pc, #16] @ (80060d8 <__swhatbuf_r+0x50>) + 80060c8: 18c9 adds r1, r1, r3 + 80060ca: 424b negs r3, r1 + 80060cc: 4159 adcs r1, r3 + 80060ce: e7ea b.n 80060a6 <__swhatbuf_r+0x1e> + 80060d0: 2100 movs r1, #0 + 80060d2: 2340 movs r3, #64 @ 0x40 + 80060d4: e7e9 b.n 80060aa <__swhatbuf_r+0x22> + 80060d6: 46c0 nop @ (mov r8, r8) + 80060d8: ffffe000 .word 0xffffe000 -08005e60 <_isatty_r>: - 8005e60: 2300 movs r3, #0 - 8005e62: b570 push {r4, r5, r6, lr} - 8005e64: 4d06 ldr r5, [pc, #24] @ (8005e80 <_isatty_r+0x20>) - 8005e66: 0004 movs r4, r0 - 8005e68: 0008 movs r0, r1 - 8005e6a: 602b str r3, [r5, #0] - 8005e6c: f7fb fa67 bl 800133e <_isatty> - 8005e70: 1c43 adds r3, r0, #1 - 8005e72: d103 bne.n 8005e7c <_isatty_r+0x1c> - 8005e74: 682b ldr r3, [r5, #0] - 8005e76: 2b00 cmp r3, #0 - 8005e78: d000 beq.n 8005e7c <_isatty_r+0x1c> - 8005e7a: 6023 str r3, [r4, #0] - 8005e7c: bd70 pop {r4, r5, r6, pc} - 8005e7e: 46c0 nop @ (mov r8, r8) - 8005e80: 20000328 .word 0x20000328 - -08005e84 <_sbrk_r>: - 8005e84: 2300 movs r3, #0 - 8005e86: b570 push {r4, r5, r6, lr} - 8005e88: 4d06 ldr r5, [pc, #24] @ (8005ea4 <_sbrk_r+0x20>) - 8005e8a: 0004 movs r4, r0 - 8005e8c: 0008 movs r0, r1 - 8005e8e: 602b str r3, [r5, #0] - 8005e90: f7fb fa6a bl 8001368 <_sbrk> - 8005e94: 1c43 adds r3, r0, #1 - 8005e96: d103 bne.n 8005ea0 <_sbrk_r+0x1c> - 8005e98: 682b ldr r3, [r5, #0] - 8005e9a: 2b00 cmp r3, #0 - 8005e9c: d000 beq.n 8005ea0 <_sbrk_r+0x1c> - 8005e9e: 6023 str r3, [r4, #0] - 8005ea0: bd70 pop {r4, r5, r6, pc} - 8005ea2: 46c0 nop @ (mov r8, r8) - 8005ea4: 20000328 .word 0x20000328 - -08005ea8 : - 8005ea8: b2c9 uxtb r1, r1 - 8005eaa: 1882 adds r2, r0, r2 - 8005eac: 4290 cmp r0, r2 - 8005eae: d101 bne.n 8005eb4 - 8005eb0: 2000 movs r0, #0 - 8005eb2: 4770 bx lr - 8005eb4: 7803 ldrb r3, [r0, #0] - 8005eb6: 428b cmp r3, r1 - 8005eb8: d0fb beq.n 8005eb2 - 8005eba: 3001 adds r0, #1 - 8005ebc: e7f6 b.n 8005eac +080060dc <__smakebuf_r>: + 80060dc: b5f0 push {r4, r5, r6, r7, lr} + 80060de: 2602 movs r6, #2 + 80060e0: 898b ldrh r3, [r1, #12] + 80060e2: 0005 movs r5, r0 + 80060e4: 000c movs r4, r1 + 80060e6: b085 sub sp, #20 + 80060e8: 4233 tst r3, r6 + 80060ea: d007 beq.n 80060fc <__smakebuf_r+0x20> + 80060ec: 0023 movs r3, r4 + 80060ee: 3347 adds r3, #71 @ 0x47 + 80060f0: 6023 str r3, [r4, #0] + 80060f2: 6123 str r3, [r4, #16] + 80060f4: 2301 movs r3, #1 + 80060f6: 6163 str r3, [r4, #20] + 80060f8: b005 add sp, #20 + 80060fa: bdf0 pop {r4, r5, r6, r7, pc} + 80060fc: ab03 add r3, sp, #12 + 80060fe: aa02 add r2, sp, #8 + 8006100: f7ff ffc2 bl 8006088 <__swhatbuf_r> + 8006104: 9f02 ldr r7, [sp, #8] + 8006106: 9001 str r0, [sp, #4] + 8006108: 0039 movs r1, r7 + 800610a: 0028 movs r0, r5 + 800610c: f7ff fbb8 bl 8005880 <_malloc_r> + 8006110: 2800 cmp r0, #0 + 8006112: d108 bne.n 8006126 <__smakebuf_r+0x4a> + 8006114: 220c movs r2, #12 + 8006116: 5ea3 ldrsh r3, [r4, r2] + 8006118: 059a lsls r2, r3, #22 + 800611a: d4ed bmi.n 80060f8 <__smakebuf_r+0x1c> + 800611c: 2203 movs r2, #3 + 800611e: 4393 bics r3, r2 + 8006120: 431e orrs r6, r3 + 8006122: 81a6 strh r6, [r4, #12] + 8006124: e7e2 b.n 80060ec <__smakebuf_r+0x10> + 8006126: 2380 movs r3, #128 @ 0x80 + 8006128: 89a2 ldrh r2, [r4, #12] + 800612a: 6020 str r0, [r4, #0] + 800612c: 4313 orrs r3, r2 + 800612e: 81a3 strh r3, [r4, #12] + 8006130: 9b03 ldr r3, [sp, #12] + 8006132: 6120 str r0, [r4, #16] + 8006134: 6167 str r7, [r4, #20] + 8006136: 2b00 cmp r3, #0 + 8006138: d00c beq.n 8006154 <__smakebuf_r+0x78> + 800613a: 0028 movs r0, r5 + 800613c: 230e movs r3, #14 + 800613e: 5ee1 ldrsh r1, [r4, r3] + 8006140: f000 f820 bl 8006184 <_isatty_r> + 8006144: 2800 cmp r0, #0 + 8006146: d005 beq.n 8006154 <__smakebuf_r+0x78> + 8006148: 2303 movs r3, #3 + 800614a: 89a2 ldrh r2, [r4, #12] + 800614c: 439a bics r2, r3 + 800614e: 3b02 subs r3, #2 + 8006150: 4313 orrs r3, r2 + 8006152: 81a3 strh r3, [r4, #12] + 8006154: 89a3 ldrh r3, [r4, #12] + 8006156: 9a01 ldr r2, [sp, #4] + 8006158: 4313 orrs r3, r2 + 800615a: 81a3 strh r3, [r4, #12] + 800615c: e7cc b.n 80060f8 <__smakebuf_r+0x1c> ... -08005ec0 <_init>: - 8005ec0: b5f8 push {r3, r4, r5, r6, r7, lr} - 8005ec2: 46c0 nop @ (mov r8, r8) - 8005ec4: bcf8 pop {r3, r4, r5, r6, r7} - 8005ec6: bc08 pop {r3} - 8005ec8: 469e mov lr, r3 - 8005eca: 4770 bx lr +08006160 <_fstat_r>: + 8006160: 2300 movs r3, #0 + 8006162: b570 push {r4, r5, r6, lr} + 8006164: 4d06 ldr r5, [pc, #24] @ (8006180 <_fstat_r+0x20>) + 8006166: 0004 movs r4, r0 + 8006168: 0008 movs r0, r1 + 800616a: 0011 movs r1, r2 + 800616c: 602b str r3, [r5, #0] + 800616e: f7fb f978 bl 8001462 <_fstat> + 8006172: 1c43 adds r3, r0, #1 + 8006174: d103 bne.n 800617e <_fstat_r+0x1e> + 8006176: 682b ldr r3, [r5, #0] + 8006178: 2b00 cmp r3, #0 + 800617a: d000 beq.n 800617e <_fstat_r+0x1e> + 800617c: 6023 str r3, [r4, #0] + 800617e: bd70 pop {r4, r5, r6, pc} + 8006180: 20000318 .word 0x20000318 -08005ecc <_fini>: - 8005ecc: b5f8 push {r3, r4, r5, r6, r7, lr} - 8005ece: 46c0 nop @ (mov r8, r8) - 8005ed0: bcf8 pop {r3, r4, r5, r6, r7} - 8005ed2: bc08 pop {r3} - 8005ed4: 469e mov lr, r3 - 8005ed6: 4770 bx lr +08006184 <_isatty_r>: + 8006184: 2300 movs r3, #0 + 8006186: b570 push {r4, r5, r6, lr} + 8006188: 4d06 ldr r5, [pc, #24] @ (80061a4 <_isatty_r+0x20>) + 800618a: 0004 movs r4, r0 + 800618c: 0008 movs r0, r1 + 800618e: 602b str r3, [r5, #0] + 8006190: f7fb f975 bl 800147e <_isatty> + 8006194: 1c43 adds r3, r0, #1 + 8006196: d103 bne.n 80061a0 <_isatty_r+0x1c> + 8006198: 682b ldr r3, [r5, #0] + 800619a: 2b00 cmp r3, #0 + 800619c: d000 beq.n 80061a0 <_isatty_r+0x1c> + 800619e: 6023 str r3, [r4, #0] + 80061a0: bd70 pop {r4, r5, r6, pc} + 80061a2: 46c0 nop @ (mov r8, r8) + 80061a4: 20000318 .word 0x20000318 + +080061a8 <_sbrk_r>: + 80061a8: 2300 movs r3, #0 + 80061aa: b570 push {r4, r5, r6, lr} + 80061ac: 4d06 ldr r5, [pc, #24] @ (80061c8 <_sbrk_r+0x20>) + 80061ae: 0004 movs r4, r0 + 80061b0: 0008 movs r0, r1 + 80061b2: 602b str r3, [r5, #0] + 80061b4: f7fb f978 bl 80014a8 <_sbrk> + 80061b8: 1c43 adds r3, r0, #1 + 80061ba: d103 bne.n 80061c4 <_sbrk_r+0x1c> + 80061bc: 682b ldr r3, [r5, #0] + 80061be: 2b00 cmp r3, #0 + 80061c0: d000 beq.n 80061c4 <_sbrk_r+0x1c> + 80061c2: 6023 str r3, [r4, #0] + 80061c4: bd70 pop {r4, r5, r6, pc} + 80061c6: 46c0 nop @ (mov r8, r8) + 80061c8: 20000318 .word 0x20000318 + +080061cc : + 80061cc: b2c9 uxtb r1, r1 + 80061ce: 1882 adds r2, r0, r2 + 80061d0: 4290 cmp r0, r2 + 80061d2: d101 bne.n 80061d8 + 80061d4: 2000 movs r0, #0 + 80061d6: 4770 bx lr + 80061d8: 7803 ldrb r3, [r0, #0] + 80061da: 428b cmp r3, r1 + 80061dc: d0fb beq.n 80061d6 + 80061de: 3001 adds r0, #1 + 80061e0: e7f6 b.n 80061d0 + ... + +080061e4 <_init>: + 80061e4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80061e6: 46c0 nop @ (mov r8, r8) + 80061e8: bcf8 pop {r3, r4, r5, r6, r7} + 80061ea: bc08 pop {r3} + 80061ec: 469e mov lr, r3 + 80061ee: 4770 bx lr + +080061f0 <_fini>: + 80061f0: b5f8 push {r3, r4, r5, r6, r7, lr} + 80061f2: 46c0 nop @ (mov r8, r8) + 80061f4: bcf8 pop {r3, r4, r5, r6, r7} + 80061f6: bc08 pop {r3} + 80061f8: 469e mov lr, r3 + 80061fa: 4770 bx lr diff --git a/Debug/blk_box_bc.map b/Debug/blk_box_bc.map index 306fa32..0a1f2f4 100644 --- a/Debug/blk_box_bc.map +++ b/Debug/blk_box_bc.map @@ -7,9 +7,9 @@ C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.external C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-fwalk.o) C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) (_fwalk_sglue) C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-printf.o) - ./Core/Src/main.o (printf) + ./Core/Src/RFID.o (printf) C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-puts.o) - ./Core/Src/main.o (puts) + ./Core/Src/RFID.o (puts) C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-stdio.o) C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) (__sread) C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-wbuf.o) @@ -91,6 +91,81 @@ Discarded input sections .ARM.exidx 0x00000000 0x10 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o .ARM.attributes 0x00000000 0x1b C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/RFID.o + .text 0x00000000 0x0 ./Core/Src/RFID.o + .data 0x00000000 0x0 ./Core/Src/RFID.o + .bss 0x00000000 0x0 ./Core/Src/RFID.o + .rodata.CHANNEL_OFFSET_TAB + 0x00000000 0x7 ./Core/Src/RFID.o + .text.rc522_compareIds + 0x00000000 0x52 ./Core/Src/RFID.o + .group 0x00000000 0xc ./Core/Src/main.o + .group 0x00000000 0xc ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/main.o @@ -160,10 +235,89 @@ Discarded input sections .bss 0x00000000 0x0 ./Core/Src/main.o .rodata.CHANNEL_OFFSET_TAB 0x00000000 0x7 ./Core/Src/main.o + .bss.old_keypad_state + 0x00000000 0x2 ./Core/Src/main.o + .bss.keypad_state + 0x00000000 0x2 ./Core/Src/main.o + .bss.old_button_state + 0x00000000 0x2 ./Core/Src/main.o + .bss.button_state + 0x00000000 0x2 ./Core/Src/main.o .text.printBinary 0x00000000 0x50 ./Core/Src/main.o + .bss.data 0x00000000 0x8 ./Core/Src/main.o + .text.scan_keypad + 0x00000000 0x318 ./Core/Src/main.o + .text.scan_buttons + 0x00000000 0x280 ./Core/Src/main.o .text.send_iterupt 0x00000000 0xa ./Core/Src/main.o + .debug_macro 0x00000000 0xa8a ./Core/Src/main.o + .debug_macro 0x00000000 0x123 ./Core/Src/main.o + .debug_macro 0x00000000 0x2e ./Core/Src/main.o + .debug_macro 0x00000000 0x28 ./Core/Src/main.o + .debug_macro 0x00000000 0x22 ./Core/Src/main.o + .debug_macro 0x00000000 0x8e ./Core/Src/main.o + .debug_macro 0x00000000 0x51 ./Core/Src/main.o + .debug_macro 0x00000000 0x103 ./Core/Src/main.o + .debug_macro 0x00000000 0x6a ./Core/Src/main.o + .debug_macro 0x00000000 0x1df ./Core/Src/main.o + .debug_macro 0x00000000 0x1c ./Core/Src/main.o + .debug_macro 0x00000000 0x22 ./Core/Src/main.o + .debug_macro 0x00000000 0xd1 ./Core/Src/main.o + .debug_macro 0x00000000 0x4da ./Core/Src/main.o + .debug_macro 0x00000000 0x11f ./Core/Src/main.o + .debug_macro 0x00000000 0xa701 ./Core/Src/main.o + .debug_macro 0x00000000 0x66 ./Core/Src/main.o + .debug_macro 0x00000000 0x350e ./Core/Src/main.o + .debug_macro 0x00000000 0x189 ./Core/Src/main.o + .debug_macro 0x00000000 0x5c ./Core/Src/main.o + .debug_macro 0x00000000 0x485 ./Core/Src/main.o + .debug_macro 0x00000000 0xeb4 ./Core/Src/main.o + .debug_macro 0x00000000 0x13e ./Core/Src/main.o + .debug_macro 0x00000000 0x1cf ./Core/Src/main.o + .debug_macro 0x00000000 0x13e ./Core/Src/main.o + .debug_macro 0x00000000 0x3a8 ./Core/Src/main.o + .debug_macro 0x00000000 0x280 ./Core/Src/main.o + .debug_macro 0x00000000 0x345 ./Core/Src/main.o + .debug_macro 0x00000000 0x198 ./Core/Src/main.o + .debug_macro 0x00000000 0x43 ./Core/Src/main.o + .debug_macro 0x00000000 0x1f1 ./Core/Src/main.o + .debug_macro 0x00000000 0x1d6 ./Core/Src/main.o + .debug_macro 0x00000000 0x2a3 ./Core/Src/main.o + .debug_macro 0x00000000 0x28 ./Core/Src/main.o + .debug_macro 0x00000000 0xcf ./Core/Src/main.o + .debug_macro 0x00000000 0x22c ./Core/Src/main.o + .debug_macro 0x00000000 0x67 ./Core/Src/main.o + .debug_macro 0x00000000 0xa5 ./Core/Src/main.o + .debug_macro 0x00000000 0x118 ./Core/Src/main.o + .debug_macro 0x00000000 0x10d ./Core/Src/main.o + .debug_macro 0x00000000 0x2fe ./Core/Src/main.o + .debug_macro 0x00000000 0x693 ./Core/Src/main.o + .debug_macro 0x00000000 0xa6 ./Core/Src/main.o + .debug_macro 0x00000000 0x43d ./Core/Src/main.o + .debug_macro 0x00000000 0x130 ./Core/Src/main.o + .debug_macro 0x00000000 0x22 ./Core/Src/main.o + .debug_macro 0x00000000 0x214 ./Core/Src/main.o + .debug_macro 0x00000000 0x61 ./Core/Src/main.o + .debug_macro 0x00000000 0x24 ./Core/Src/main.o + .debug_macro 0x00000000 0x43 ./Core/Src/main.o + .debug_macro 0x00000000 0x34 ./Core/Src/main.o + .debug_macro 0x00000000 0x16 ./Core/Src/main.o + .debug_macro 0x00000000 0x35 ./Core/Src/main.o + .debug_macro 0x00000000 0x369 ./Core/Src/main.o + .debug_macro 0x00000000 0x10 ./Core/Src/main.o + .debug_macro 0x00000000 0x16 ./Core/Src/main.o + .debug_macro 0x00000000 0x43 ./Core/Src/main.o + .debug_macro 0x00000000 0x34 ./Core/Src/main.o + .debug_macro 0x00000000 0x10 ./Core/Src/main.o + .debug_macro 0x00000000 0x58 ./Core/Src/main.o + .debug_macro 0x00000000 0x8e ./Core/Src/main.o + .debug_macro 0x00000000 0x1c ./Core/Src/main.o + .debug_macro 0x00000000 0x177 ./Core/Src/main.o + .debug_macro 0x00000000 0x16 ./Core/Src/main.o + .debug_macro 0x00000000 0x16 ./Core/Src/main.o + .debug_macro 0x00000000 0x146 ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/stm32g0xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32g0xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32g0xx_hal_msp.o @@ -264,7 +418,7 @@ Discarded input sections .debug_macro 0x00000000 0x693 ./Core/Src/stm32g0xx_hal_msp.o .debug_macro 0x00000000 0xa6 ./Core/Src/stm32g0xx_hal_msp.o .debug_macro 0x00000000 0x43d ./Core/Src/stm32g0xx_hal_msp.o - .debug_macro 0x00000000 0x124 ./Core/Src/stm32g0xx_hal_msp.o + .debug_macro 0x00000000 0x130 ./Core/Src/stm32g0xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32g0xx_it.o .group 0x00000000 0xc ./Core/Src/stm32g0xx_it.o .group 0x00000000 0xc ./Core/Src/stm32g0xx_it.o @@ -359,7 +513,7 @@ Discarded input sections .debug_macro 0x00000000 0x693 ./Core/Src/stm32g0xx_it.o .debug_macro 0x00000000 0xa6 ./Core/Src/stm32g0xx_it.o .debug_macro 0x00000000 0x43d ./Core/Src/stm32g0xx_it.o - .debug_macro 0x00000000 0x124 ./Core/Src/stm32g0xx_it.o + .debug_macro 0x00000000 0x130 ./Core/Src/stm32g0xx_it.o .group 0x00000000 0xc ./Core/Src/syscalls.o .group 0x00000000 0xc ./Core/Src/syscalls.o .group 0x00000000 0xc ./Core/Src/syscalls.o @@ -1543,6 +1697,8 @@ Discarded input sections 0x00000000 0x7 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o .text.HAL_GPIO_DeInit 0x00000000 0x1a0 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o + .text.HAL_GPIO_ReadPin + 0x00000000 0x3a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o .text.HAL_GPIO_TogglePin 0x00000000 0x36 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o .text.HAL_GPIO_LockPin @@ -1666,6 +1822,8 @@ Discarded input sections 0x00000000 0xf8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.HAL_I2C_Slave_Transmit_IT 0x00000000 0xe8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.HAL_I2C_Slave_Receive_IT + 0x00000000 0xac ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.HAL_I2C_Master_Transmit_DMA 0x00000000 0x254 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.HAL_I2C_Master_Receive_DMA @@ -1710,8 +1868,16 @@ Discarded input sections 0x00000000 0x68 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.HAL_I2C_Master_Abort_IT 0x00000000 0xac ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.HAL_I2C_MasterTxCpltCallback + 0x00000000 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.HAL_I2C_MasterRxCpltCallback + 0x00000000 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.HAL_I2C_SlaveRxCpltCallback 0x00000000 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.HAL_I2C_MemTxCpltCallback + 0x00000000 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.HAL_I2C_MemRxCpltCallback + 0x00000000 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.HAL_I2C_GetState 0x00000000 0x18 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.HAL_I2C_GetMode @@ -1722,10 +1888,20 @@ Discarded input sections 0x00000000 0x268 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_Mem_ISR_IT 0x00000000 0x244 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.I2C_Master_ISR_DMA + 0x00000000 0x1f8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.I2C_Mem_ISR_DMA + 0x00000000 0x258 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.I2C_Slave_ISR_DMA + 0x00000000 0x1d0 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_RequestMemoryWrite 0x00000000 0xc8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_RequestMemoryRead 0x00000000 0xc4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.I2C_ITMasterSeqCplt + 0x00000000 0x82 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.I2C_ITMasterCplt + 0x00000000 0x19c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_DMAMasterTransmitCplt 0x00000000 0xa0 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_DMASlaveTransmitCplt @@ -1746,6 +1922,10 @@ Discarded input sections 0x00000000 0x13c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_IsErrorOccurred 0x00000000 0x1f0 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.I2C_TransferConfig + 0x00000000 0x74 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + .text.I2C_Enable_IRQ + 0x00000000 0x114 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_ConvertOtherXferOptions 0x00000000 0x34 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .debug_macro 0x00000000 0xa8a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o @@ -2425,12 +2605,6 @@ Discarded input sections 0x00000000 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o .text.HAL_SPI_MspDeInit 0x00000000 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - .text.HAL_SPI_Transmit - 0x00000000 0x2be ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - .text.HAL_SPI_Receive - 0x00000000 0x2a4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - .text.HAL_SPI_TransmitReceive - 0x00000000 0x3c4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o .text.HAL_SPI_Transmit_IT 0x00000000 0x130 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o .text.HAL_SPI_Receive_IT @@ -2511,14 +2685,6 @@ Discarded input sections 0x00000000 0x48 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o .text.SPI_TxISR_16BIT 0x00000000 0x46 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - .text.SPI_WaitFlagStateUntilTimeout - 0x00000000 0x11c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - .text.SPI_WaitFifoStateUntilTimeout - 0x00000000 0x144 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - .text.SPI_EndRxTransaction - 0x00000000 0xbc ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - .text.SPI_EndRxTxTransaction - 0x00000000 0x8c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o .text.SPI_CloseRxTx_ISR 0x00000000 0x8c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o .text.SPI_CloseRx_ISR @@ -3464,6 +3630,7 @@ Linker script and memory map LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crti.o LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o +LOAD ./Core/Src/RFID.o LOAD ./Core/Src/main.o LOAD ./Core/Src/stm32g0xx_hal_msp.o LOAD ./Core/Src/stm32g0xx_it.o @@ -3527,7 +3694,7 @@ LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x08000000 g_pfnVectors 0x080000b8 . = ALIGN (0x4) -.text 0x080000b8 0x5e20 +.text 0x080000b8 0x6144 0x080000b8 . = ALIGN (0x4) *(.text) .text 0x080000b8 0x48 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o @@ -3545,530 +3712,555 @@ LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x080003fc __aeabi_idiv0 0x080003fc __aeabi_ldiv0 *(.text*) - .text.main 0x08000400 0xd4 ./Core/Src/main.o - 0x08000400 main + .text.spi_cs_rfid_write + 0x08000400 0x24 ./Core/Src/RFID.o + 0x08000400 spi_cs_rfid_write + .text.rc522_regRead8 + 0x08000424 0x6c ./Core/Src/RFID.o + 0x08000424 rc522_regRead8 + .text.rc522_regWrite8 + 0x08000490 0x54 ./Core/Src/RFID.o + 0x08000490 rc522_regWrite8 + .text.rc522_setBit + 0x080004e4 0x3c ./Core/Src/RFID.o + 0x080004e4 rc522_setBit + .text.rc522_clearBit + 0x08000520 0x44 ./Core/Src/RFID.o + 0x08000520 rc522_clearBit + .text.rc522_reset + 0x08000564 0x12 ./Core/Src/RFID.o + 0x08000564 rc522_reset + .text.rc522_antennaON + 0x08000576 0x2c ./Core/Src/RFID.o + 0x08000576 rc522_antennaON + .text.rc522_checkCard + 0x080005a2 0x48 ./Core/Src/RFID.o + 0x080005a2 rc522_checkCard + .text.rc522_request + 0x080005ea 0x6c ./Core/Src/RFID.o + 0x080005ea rc522_request + *fill* 0x08000656 0x2 + .text.rc522_toCard + 0x08000658 0x2ac ./Core/Src/RFID.o + 0x08000658 rc522_toCard + .text.rc522_antiColl + 0x08000904 0xaa ./Core/Src/RFID.o + 0x08000904 rc522_antiColl + .text.rc522_halt + 0x080009ae 0x3a ./Core/Src/RFID.o + 0x080009ae rc522_halt + .text.rc522_calculateCRC + 0x080009e8 0xb8 ./Core/Src/RFID.o + 0x080009e8 rc522_calculateCRC + .text.rc522_init + 0x08000aa0 0x60 ./Core/Src/RFID.o + 0x08000aa0 rc522_init + .text.main 0x08000b00 0x78 ./Core/Src/main.o + 0x08000b00 main .text.SystemClock_Config - 0x080004d4 0x84 ./Core/Src/main.o - 0x080004d4 SystemClock_Config + 0x08000b78 0x84 ./Core/Src/main.o + 0x08000b78 SystemClock_Config .text.MX_I2C1_Init - 0x08000558 0x80 ./Core/Src/main.o + 0x08000bfc 0x80 ./Core/Src/main.o .text.MX_SPI1_Init - 0x080005d8 0x7c ./Core/Src/main.o + 0x08000c7c 0x7c ./Core/Src/main.o .text.MX_USART2_UART_Init - 0x08000654 0x9c ./Core/Src/main.o + 0x08000cf8 0x9c ./Core/Src/main.o .text.MX_GPIO_Init - 0x080006f0 0x264 ./Core/Src/main.o + 0x08000d94 0x298 ./Core/Src/main.o .text.__io_putchar - 0x08000954 0x28 ./Core/Src/main.o - 0x08000954 __io_putchar + 0x0800102c 0x28 ./Core/Src/main.o + 0x0800102c __io_putchar .text.HAL_I2C_SlaveRxCpltCallback - 0x0800097c 0x20 ./Core/Src/main.o - 0x0800097c HAL_I2C_SlaveRxCpltCallback + 0x08001054 0x20 ./Core/Src/main.o + 0x08001054 HAL_I2C_SlaveRxCpltCallback .text.init_keypad - 0x0800099c 0x44 ./Core/Src/main.o - 0x0800099c init_keypad + 0x08001074 0x44 ./Core/Src/main.o + 0x08001074 init_keypad .text.init_buttons - 0x080009e0 0x3c ./Core/Src/main.o - 0x080009e0 init_buttons - .text.scan_keypad - 0x08000a1c 0x318 ./Core/Src/main.o - 0x08000a1c scan_keypad - .text.scan_buttons - 0x08000d34 0x280 ./Core/Src/main.o - 0x08000d34 scan_buttons + 0x080010b8 0x3c ./Core/Src/main.o + 0x080010b8 init_buttons .text.Error_Handler - 0x08000fb4 0xc ./Core/Src/main.o - 0x08000fb4 Error_Handler + 0x080010f4 0xc ./Core/Src/main.o + 0x080010f4 Error_Handler .text.HAL_MspInit - 0x08000fc0 0x50 ./Core/Src/stm32g0xx_hal_msp.o - 0x08000fc0 HAL_MspInit + 0x08001100 0x50 ./Core/Src/stm32g0xx_hal_msp.o + 0x08001100 HAL_MspInit .text.HAL_I2C_MspInit - 0x08001010 0xd4 ./Core/Src/stm32g0xx_hal_msp.o - 0x08001010 HAL_I2C_MspInit + 0x08001150 0xd4 ./Core/Src/stm32g0xx_hal_msp.o + 0x08001150 HAL_I2C_MspInit .text.HAL_SPI_MspInit - 0x080010e4 0x94 ./Core/Src/stm32g0xx_hal_msp.o - 0x080010e4 HAL_SPI_MspInit + 0x08001224 0x94 ./Core/Src/stm32g0xx_hal_msp.o + 0x08001224 HAL_SPI_MspInit .text.HAL_UART_MspInit - 0x08001178 0xc0 ./Core/Src/stm32g0xx_hal_msp.o - 0x08001178 HAL_UART_MspInit + 0x080012b8 0xc0 ./Core/Src/stm32g0xx_hal_msp.o + 0x080012b8 HAL_UART_MspInit .text.NMI_Handler - 0x08001238 0x8 ./Core/Src/stm32g0xx_it.o - 0x08001238 NMI_Handler + 0x08001378 0x8 ./Core/Src/stm32g0xx_it.o + 0x08001378 NMI_Handler .text.HardFault_Handler - 0x08001240 0x8 ./Core/Src/stm32g0xx_it.o - 0x08001240 HardFault_Handler + 0x08001380 0x8 ./Core/Src/stm32g0xx_it.o + 0x08001380 HardFault_Handler .text.SVC_Handler - 0x08001248 0xa ./Core/Src/stm32g0xx_it.o - 0x08001248 SVC_Handler + 0x08001388 0xa ./Core/Src/stm32g0xx_it.o + 0x08001388 SVC_Handler .text.PendSV_Handler - 0x08001252 0xa ./Core/Src/stm32g0xx_it.o - 0x08001252 PendSV_Handler + 0x08001392 0xa ./Core/Src/stm32g0xx_it.o + 0x08001392 PendSV_Handler .text.SysTick_Handler - 0x0800125c 0xe ./Core/Src/stm32g0xx_it.o - 0x0800125c SysTick_Handler - *fill* 0x0800126a 0x2 + 0x0800139c 0xe ./Core/Src/stm32g0xx_it.o + 0x0800139c SysTick_Handler + *fill* 0x080013aa 0x2 .text.I2C1_IRQHandler - 0x0800126c 0x30 ./Core/Src/stm32g0xx_it.o - 0x0800126c I2C1_IRQHandler - .text._read 0x0800129c 0x3a ./Core/Src/syscalls.o - 0x0800129c _read - .text._write 0x080012d6 0x38 ./Core/Src/syscalls.o - 0x080012d6 _write - .text._close 0x0800130e 0x14 ./Core/Src/syscalls.o - 0x0800130e _close - .text._fstat 0x08001322 0x1c ./Core/Src/syscalls.o - 0x08001322 _fstat - .text._isatty 0x0800133e 0x12 ./Core/Src/syscalls.o - 0x0800133e _isatty - .text._lseek 0x08001350 0x16 ./Core/Src/syscalls.o - 0x08001350 _lseek - *fill* 0x08001366 0x2 - .text._sbrk 0x08001368 0x6c ./Core/Src/sysmem.o - 0x08001368 _sbrk + 0x080013ac 0x30 ./Core/Src/stm32g0xx_it.o + 0x080013ac I2C1_IRQHandler + .text._read 0x080013dc 0x3a ./Core/Src/syscalls.o + 0x080013dc _read + .text._write 0x08001416 0x38 ./Core/Src/syscalls.o + 0x08001416 _write + .text._close 0x0800144e 0x14 ./Core/Src/syscalls.o + 0x0800144e _close + .text._fstat 0x08001462 0x1c ./Core/Src/syscalls.o + 0x08001462 _fstat + .text._isatty 0x0800147e 0x12 ./Core/Src/syscalls.o + 0x0800147e _isatty + .text._lseek 0x08001490 0x16 ./Core/Src/syscalls.o + 0x08001490 _lseek + *fill* 0x080014a6 0x2 + .text._sbrk 0x080014a8 0x6c ./Core/Src/sysmem.o + 0x080014a8 _sbrk .text.SystemInit - 0x080013d4 0xa ./Core/Src/system_stm32g0xx.o - 0x080013d4 SystemInit - *fill* 0x080013de 0x2 + 0x08001514 0xa ./Core/Src/system_stm32g0xx.o + 0x08001514 SystemInit + *fill* 0x0800151e 0x2 .text.Reset_Handler - 0x080013e0 0x50 ./Core/Startup/startup_stm32g070cbtx.o - 0x080013e0 Reset_Handler + 0x08001520 0x50 ./Core/Startup/startup_stm32g070cbtx.o + 0x08001520 Reset_Handler .text.Default_Handler - 0x08001430 0x2 ./Core/Startup/startup_stm32g070cbtx.o - 0x08001430 TIM1_CC_IRQHandler - 0x08001430 TIM6_IRQHandler - 0x08001430 RTC_TAMP_IRQHandler - 0x08001430 SPI1_IRQHandler - 0x08001430 USART3_4_IRQHandler - 0x08001430 EXTI2_3_IRQHandler - 0x08001430 ADC1_IRQHandler - 0x08001430 I2C2_IRQHandler - 0x08001430 TIM17_IRQHandler - 0x08001430 TIM16_IRQHandler - 0x08001430 TIM3_IRQHandler - 0x08001430 EXTI4_15_IRQHandler - 0x08001430 RCC_IRQHandler - 0x08001430 DMA1_Channel1_IRQHandler - 0x08001430 Default_Handler - 0x08001430 TIM14_IRQHandler - 0x08001430 TIM7_IRQHandler - 0x08001430 TIM15_IRQHandler - 0x08001430 EXTI0_1_IRQHandler - 0x08001430 SPI2_IRQHandler - 0x08001430 WWDG_IRQHandler - 0x08001430 DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler - 0x08001430 DMA1_Channel2_3_IRQHandler - 0x08001430 USART2_IRQHandler - 0x08001430 FLASH_IRQHandler - 0x08001430 USART1_IRQHandler - 0x08001430 TIM1_BRK_UP_TRG_COM_IRQHandler - *fill* 0x08001432 0x2 + 0x08001570 0x2 ./Core/Startup/startup_stm32g070cbtx.o + 0x08001570 TIM1_CC_IRQHandler + 0x08001570 TIM6_IRQHandler + 0x08001570 RTC_TAMP_IRQHandler + 0x08001570 SPI1_IRQHandler + 0x08001570 USART3_4_IRQHandler + 0x08001570 EXTI2_3_IRQHandler + 0x08001570 ADC1_IRQHandler + 0x08001570 I2C2_IRQHandler + 0x08001570 TIM17_IRQHandler + 0x08001570 TIM16_IRQHandler + 0x08001570 TIM3_IRQHandler + 0x08001570 EXTI4_15_IRQHandler + 0x08001570 RCC_IRQHandler + 0x08001570 DMA1_Channel1_IRQHandler + 0x08001570 Default_Handler + 0x08001570 TIM14_IRQHandler + 0x08001570 TIM7_IRQHandler + 0x08001570 TIM15_IRQHandler + 0x08001570 EXTI0_1_IRQHandler + 0x08001570 SPI2_IRQHandler + 0x08001570 WWDG_IRQHandler + 0x08001570 DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler + 0x08001570 DMA1_Channel2_3_IRQHandler + 0x08001570 USART2_IRQHandler + 0x08001570 FLASH_IRQHandler + 0x08001570 USART1_IRQHandler + 0x08001570 TIM1_BRK_UP_TRG_COM_IRQHandler + *fill* 0x08001572 0x2 .text.HAL_Init - 0x08001434 0x40 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o - 0x08001434 HAL_Init + 0x08001574 0x40 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x08001574 HAL_Init .text.HAL_InitTick - 0x08001474 0x94 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o - 0x08001474 HAL_InitTick + 0x080015b4 0x94 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x080015b4 HAL_InitTick .text.HAL_IncTick - 0x08001508 0x24 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o - 0x08001508 HAL_IncTick + 0x08001648 0x24 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x08001648 HAL_IncTick .text.HAL_GetTick - 0x0800152c 0x14 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o - 0x0800152c HAL_GetTick + 0x0800166c 0x14 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x0800166c HAL_GetTick .text.HAL_Delay - 0x08001540 0x48 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o - 0x08001540 HAL_Delay + 0x08001680 0x48 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x08001680 HAL_Delay .text.HAL_SYSCFG_StrobeDBattpinsConfig - 0x08001588 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o - 0x08001588 HAL_SYSCFG_StrobeDBattpinsConfig + 0x080016c8 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x080016c8 HAL_SYSCFG_StrobeDBattpinsConfig .text.__NVIC_EnableIRQ - 0x080015b4 0x34 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o + 0x080016f4 0x34 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o .text.__NVIC_SetPriority - 0x080015e8 0xdc ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o + 0x08001728 0xdc ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o .text.SysTick_Config - 0x080016c4 0x48 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o + 0x08001804 0x48 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o .text.HAL_NVIC_SetPriority - 0x0800170c 0x2a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o - 0x0800170c HAL_NVIC_SetPriority + 0x0800184c 0x2a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o + 0x0800184c HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08001736 0x20 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o - 0x08001736 HAL_NVIC_EnableIRQ + 0x08001876 0x20 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o + 0x08001876 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08001756 0x1a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o - 0x08001756 HAL_SYSTICK_Config + 0x08001896 0x1a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o + 0x08001896 HAL_SYSTICK_Config .text.HAL_DMA_Abort_IT - 0x08001770 0xd4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o - 0x08001770 HAL_DMA_Abort_IT + 0x080018b0 0xd4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o + 0x080018b0 HAL_DMA_Abort_IT .text.HAL_DMA_GetState - 0x08001844 0x18 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o - 0x08001844 HAL_DMA_GetState + 0x08001984 0x18 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o + 0x08001984 HAL_DMA_GetState .text.HAL_GPIO_Init - 0x0800185c 0x2c8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o - 0x0800185c HAL_GPIO_Init - .text.HAL_GPIO_ReadPin - 0x08001b24 0x3a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o - 0x08001b24 HAL_GPIO_ReadPin + 0x0800199c 0x2c8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o + 0x0800199c HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x08001b5e 0x3a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o - 0x08001b5e HAL_GPIO_WritePin + 0x08001c64 0x3a ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o + 0x08001c64 HAL_GPIO_WritePin + *fill* 0x08001c9e 0x2 .text.HAL_I2C_Init - 0x08001b98 0x14c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001b98 HAL_I2C_Init - .text.HAL_I2C_Slave_Receive_IT - 0x08001ce4 0xac ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001ce4 HAL_I2C_Slave_Receive_IT + 0x08001ca0 0x14c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001ca0 HAL_I2C_Init .text.HAL_I2C_EV_IRQHandler - 0x08001d90 0x34 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001d90 HAL_I2C_EV_IRQHandler + 0x08001dec 0x34 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001dec HAL_I2C_EV_IRQHandler .text.HAL_I2C_ER_IRQHandler - 0x08001dc4 0xb2 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001dc4 HAL_I2C_ER_IRQHandler - .text.HAL_I2C_MasterTxCpltCallback - 0x08001e76 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001e76 HAL_I2C_MasterTxCpltCallback - .text.HAL_I2C_MasterRxCpltCallback - 0x08001e86 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001e86 HAL_I2C_MasterRxCpltCallback + 0x08001e20 0xb2 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001e20 HAL_I2C_ER_IRQHandler .text.HAL_I2C_SlaveTxCpltCallback - 0x08001e96 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001e96 HAL_I2C_SlaveTxCpltCallback + 0x08001ed2 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001ed2 HAL_I2C_SlaveTxCpltCallback .text.HAL_I2C_AddrCallback - 0x08001ea6 0x20 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001ea6 HAL_I2C_AddrCallback + 0x08001ee2 0x20 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001ee2 HAL_I2C_AddrCallback .text.HAL_I2C_ListenCpltCallback - 0x08001ec6 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001ec6 HAL_I2C_ListenCpltCallback - .text.HAL_I2C_MemTxCpltCallback - 0x08001ed6 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001ed6 HAL_I2C_MemTxCpltCallback - .text.HAL_I2C_MemRxCpltCallback - 0x08001ee6 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001ee6 HAL_I2C_MemRxCpltCallback + 0x08001f02 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001f02 HAL_I2C_ListenCpltCallback .text.HAL_I2C_ErrorCallback - 0x08001ef6 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001ef6 HAL_I2C_ErrorCallback + 0x08001f12 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001f12 HAL_I2C_ErrorCallback .text.HAL_I2C_AbortCpltCallback - 0x08001f06 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - 0x08001f06 HAL_I2C_AbortCpltCallback - *fill* 0x08001f16 0x2 + 0x08001f22 0x10 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001f22 HAL_I2C_AbortCpltCallback + *fill* 0x08001f32 0x2 .text.I2C_Slave_ISR_IT - 0x08001f18 0x200 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - .text.I2C_Master_ISR_DMA - 0x08002118 0x1f8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - .text.I2C_Mem_ISR_DMA - 0x08002310 0x258 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - .text.I2C_Slave_ISR_DMA - 0x08002568 0x1d0 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08001f34 0x200 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_ITAddrCplt - 0x08002738 0x148 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - .text.I2C_ITMasterSeqCplt - 0x08002880 0x82 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - *fill* 0x08002902 0x2 + 0x08002134 0x148 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_ITSlaveSeqCplt - 0x08002904 0xc8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - .text.I2C_ITMasterCplt - 0x080029cc 0x19c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x0800227c 0xc8 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_ITSlaveCplt - 0x08002b68 0x310 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08002344 0x310 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_ITListenCplt - 0x08002e78 0xb0 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08002654 0xb0 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_ITError - 0x08002f28 0x204 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08002704 0x204 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_TreatErrorCallback - 0x0800312c 0x52 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x08002908 0x52 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_Flush_TXDR - 0x0800317e 0x44 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x0800295a 0x44 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_DMAAbort - 0x080031c2 0x3e ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - .text.I2C_TransferConfig - 0x08003200 0x74 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - .text.I2C_Enable_IRQ - 0x08003274 0x114 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x0800299e 0x3e ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .text.I2C_Disable_IRQ - 0x08003388 0xc6 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o - *fill* 0x0800344e 0x2 + 0x080029dc 0xc6 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + *fill* 0x08002aa2 0x2 .text.HAL_I2CEx_ConfigAnalogFilter - 0x08003450 0x98 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.o - 0x08003450 HAL_I2CEx_ConfigAnalogFilter + 0x08002aa4 0x98 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.o + 0x08002aa4 HAL_I2CEx_ConfigAnalogFilter .text.HAL_I2CEx_ConfigDigitalFilter - 0x080034e8 0x98 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.o - 0x080034e8 HAL_I2CEx_ConfigDigitalFilter + 0x08002b3c 0x98 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.o + 0x08002b3c HAL_I2CEx_ConfigDigitalFilter .text.HAL_PWREx_ControlVoltageScaling - 0x08003580 0x80 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.o - 0x08003580 HAL_PWREx_ControlVoltageScaling + 0x08002bd4 0x80 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.o + 0x08002bd4 HAL_PWREx_ControlVoltageScaling .text.LL_RCC_GetAPB1Prescaler - 0x08003600 0x18 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o + 0x08002c54 0x18 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o .text.HAL_RCC_OscConfig - 0x08003618 0x620 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o - 0x08003618 HAL_RCC_OscConfig + 0x08002c6c 0x620 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o + 0x08002c6c HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x08003c38 0x210 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o - 0x08003c38 HAL_RCC_ClockConfig + 0x0800328c 0x210 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o + 0x0800328c HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x08003e48 0x104 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o - 0x08003e48 HAL_RCC_GetSysClockFreq + 0x0800349c 0x104 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o + 0x0800349c HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x08003f4c 0x14 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o - 0x08003f4c HAL_RCC_GetHCLKFreq + 0x080035a0 0x14 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o + 0x080035a0 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08003f60 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o - 0x08003f60 HAL_RCC_GetPCLK1Freq + 0x080035b4 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o + 0x080035b4 HAL_RCC_GetPCLK1Freq .text.HAL_RCCEx_PeriphCLKConfig - 0x08003f8c 0x268 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.o - 0x08003f8c HAL_RCCEx_PeriphCLKConfig + 0x080035e0 0x268 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.o + 0x080035e0 HAL_RCCEx_PeriphCLKConfig .text.HAL_SPI_Init - 0x080041f4 0x170 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o - 0x080041f4 HAL_SPI_Init + 0x08003848 0x170 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o + 0x08003848 HAL_SPI_Init + .text.HAL_SPI_Transmit + 0x080039b8 0x2be ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o + 0x080039b8 HAL_SPI_Transmit + *fill* 0x08003c76 0x2 + .text.HAL_SPI_Receive + 0x08003c78 0x2a4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o + 0x08003c78 HAL_SPI_Receive + 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C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o + 0x08006300 PROVIDE (__init_array_end = .) + 0x08006300 . = ALIGN (0x4) -.fini_array 0x08005fe0 0x4 - 0x08005fe0 . = ALIGN (0x4) +.fini_array 0x08006300 0x4 + 0x08006300 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08005fe0 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o + .fini_array 0x08006300 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x08005fe4 . = ALIGN (0x4) - 0x08005fe4 _sidata = LOADADDR (.data) + 0x08006304 . = ALIGN (0x4) + 0x08006304 _sidata = LOADADDR (.data) -.rel.dyn 0x08005fe4 0x0 - .rel.iplt 0x08005fe4 0x0 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o +.rel.dyn 0x08006304 0x0 + .rel.iplt 0x08006304 0x0 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o -.data 0x20000000 0x68 load address 0x08005fe4 +.data 0x20000000 0x68 load address 0x08006304 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -4096,11 +4288,11 @@ LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x20000068 . = ALIGN (0x4) 0x20000068 _edata = . -.igot.plt 0x20000068 0x0 load address 0x0800604c +.igot.plt 0x20000068 0x0 load address 0x0800636c .igot.plt 0x20000068 0x0 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o 0x20000068 . = ALIGN (0x4) -.bss 0x20000068 0x2d0 load address 0x0800604c +.bss 0x20000068 0x2c0 load address 0x0800636c 0x20000068 _sbss = . 0x20000068 __bss_start__ = _sbss *(.bss) @@ -4112,62 +4304,48 @@ LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x200000d8 hspi1 .bss.huart2 0x2000013c 0x94 ./Core/Src/main.o 0x2000013c huart2 - .bss.old_keypad_state - 0x200001d0 0x2 ./Core/Src/main.o - 0x200001d0 old_keypad_state - .bss.keypad_state - 0x200001d2 0x2 ./Core/Src/main.o - 0x200001d2 keypad_state - .bss.old_button_state - 0x200001d4 0x2 ./Core/Src/main.o - 0x200001d4 old_button_state - .bss.button_state - 0x200001d6 0x2 ./Core/Src/main.o - 0x200001d6 button_state - .bss.data 0x200001d8 0x8 ./Core/Src/main.o - 0x200001d8 data - .bss.recv_cnt 0x200001e0 0x2 ./Core/Src/main.o - 0x200001e0 recv_cnt - *fill* 0x200001e2 0x2 + .bss.recv_cnt 0x200001d0 0x2 ./Core/Src/main.o + 0x200001d0 recv_cnt + *fill* 0x200001d2 0x2 .bss.__sbrk_heap_end - 0x200001e4 0x4 ./Core/Src/sysmem.o - .bss.uwTick 0x200001e8 0x4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o - 0x200001e8 uwTick - .bss.__sf 0x200001ec 0x138 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) - 0x200001ec __sf + 0x200001d4 0x4 ./Core/Src/sysmem.o + .bss.uwTick 0x200001d8 0x4 ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x200001d8 uwTick + .bss.__sf 0x200001dc 0x138 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x200001dc __sf .bss.__stdio_exit_handler - 0x20000324 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) - 0x20000324 __stdio_exit_handler - .bss.errno 0x20000328 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-reent.o) - 0x20000328 errno + 0x20000314 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x20000314 __stdio_exit_handler + .bss.errno 0x20000318 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-reent.o) + 0x20000318 errno .bss.__lock___malloc_recursive_mutex - 0x2000032c 0x1 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-lock.o) - 0x2000032c __lock___malloc_recursive_mutex + 0x2000031c 0x1 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-lock.o) + 0x2000031c __lock___malloc_recursive_mutex .bss.__lock___sfp_recursive_mutex - 0x2000032d 0x1 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-lock.o) - 0x2000032d __lock___sfp_recursive_mutex - *fill* 0x2000032e 0x2 + 0x2000031d 0x1 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-lock.o) + 0x2000031d __lock___sfp_recursive_mutex + *fill* 0x2000031e 0x2 .bss.__malloc_sbrk_start - 0x20000330 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-mallocr.o) - 0x20000330 __malloc_sbrk_start + 0x20000320 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-mallocr.o) + 0x20000320 __malloc_sbrk_start .bss.__malloc_free_list - 0x20000334 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-mallocr.o) - 0x20000334 __malloc_free_list + 0x20000324 0x4 C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-mallocr.o) + 0x20000324 __malloc_free_list *(COMMON) - 0x20000338 . = ALIGN (0x4) - 0x20000338 _ebss = . - 0x20000338 __bss_end__ = _ebss + 0x20000328 . = ALIGN (0x4) + 0x20000328 _ebss = . + 0x20000328 __bss_end__ = _ebss ._user_heap_stack - 0x20000338 0x600 load address 0x0800604c - 0x20000338 . = ALIGN (0x8) + 0x20000328 0x600 load address 0x0800636c + 0x20000328 . = ALIGN (0x8) [!provide] PROVIDE (end = .) - 0x20000338 PROVIDE (_end = .) - 0x20000538 . = (. + _Min_Heap_Size) - *fill* 0x20000338 0x200 - 0x20000938 . = (. + _Min_Stack_Size) - *fill* 0x20000538 0x400 - 0x20000938 . = ALIGN (0x8) + 0x20000328 PROVIDE (_end = .) + 0x20000528 . = (. + _Min_Heap_Size) + *fill* 0x20000328 0x200 + 0x20000928 . = (. + _Min_Stack_Size) + *fill* 0x20000528 0x400 + 0x20000928 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -4182,414 +4360,429 @@ LOAD C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .ARM.attributes 0x0000001e 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp/crtbegin.o .ARM.attributes - 0x0000004a 0x2c ./Core/Src/main.o + 0x0000004a 0x2c ./Core/Src/RFID.o .ARM.attributes - 0x00000076 0x2c ./Core/Src/stm32g0xx_hal_msp.o + 0x00000076 0x2c ./Core/Src/main.o .ARM.attributes - 0x000000a2 0x2c ./Core/Src/stm32g0xx_it.o + 0x000000a2 0x2c ./Core/Src/stm32g0xx_hal_msp.o .ARM.attributes - 0x000000ce 0x2c ./Core/Src/syscalls.o + 0x000000ce 0x2c ./Core/Src/stm32g0xx_it.o .ARM.attributes - 0x000000fa 0x2c ./Core/Src/sysmem.o + 0x000000fa 0x2c ./Core/Src/syscalls.o .ARM.attributes - 0x00000126 0x2c ./Core/Src/system_stm32g0xx.o + 0x00000126 0x2c ./Core/Src/sysmem.o .ARM.attributes - 0x00000152 0x22 ./Core/Startup/startup_stm32g070cbtx.o + 0x00000152 0x2c ./Core/Src/system_stm32g0xx.o .ARM.attributes - 0x00000174 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o + 0x0000017e 0x22 ./Core/Startup/startup_stm32g070cbtx.o .ARM.attributes - 0x000001a0 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o + 0x000001a0 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o .ARM.attributes - 0x000001cc 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o + 0x000001cc 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o .ARM.attributes - 0x000001f8 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o + 0x000001f8 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o .ARM.attributes - 0x00000224 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o + 0x00000224 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o .ARM.attributes - 0x00000250 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.o + 0x00000250 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.o .ARM.attributes - 0x0000027c 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.o + 0x0000027c 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.o .ARM.attributes - 0x000002a8 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o + 0x000002a8 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.o .ARM.attributes - 0x000002d4 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.o + 0x000002d4 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o .ARM.attributes - 0x00000300 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o + 0x00000300 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.o .ARM.attributes - 0x0000032c 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.o + 0x0000032c 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o .ARM.attributes - 0x00000358 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.o + 0x00000358 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.o .ARM.attributes - 0x00000384 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x00000384 0x2c ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.o .ARM.attributes - 0x000003b0 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-fwalk.o) + 0x000003b0 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-findfp.o) .ARM.attributes - 0x000003dc 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-printf.o) + 0x000003dc 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-fwalk.o) .ARM.attributes - 0x00000408 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-puts.o) + 0x00000408 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-printf.o) .ARM.attributes - 0x00000434 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-stdio.o) + 0x00000434 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-puts.o) .ARM.attributes - 0x00000460 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-wbuf.o) + 0x00000460 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-stdio.o) .ARM.attributes - 0x0000048c 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-wsetup.o) + 0x0000048c 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-wbuf.o) .ARM.attributes - 0x000004b8 0x2c C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memset.o) + 0x000004b8 0x2c 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C:/ST/STM32CubeIDE_1.15.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v6-m/nofp\libgcc.a(_divsi3.o) .debug_line_str 0x00000000 0x66 diff --git a/Debug/objects.list b/Debug/objects.list index 9c61785..4bfce11 100644 --- a/Debug/objects.list +++ b/Debug/objects.list @@ -1,3 +1,4 @@ +"./Core/Src/RFID.o" "./Core/Src/main.o" "./Core/Src/stm32g0xx_hal_msp.o" "./Core/Src/stm32g0xx_it.o" diff --git a/blk_box_bc Debug.launch b/blk_box_bc Debug.launch index 34771ec..50ddecd 100644 --- a/blk_box_bc Debug.launch +++ b/blk_box_bc Debug.launch @@ -78,5 +78,6 @@ + diff --git a/blk_box_bc.ioc b/blk_box_bc.ioc index a0d5d9d..27a033d 100644 --- a/blk_box_bc.ioc +++ b/blk_box_bc.ioc @@ -104,9 +104,10 @@ PA2.Signal=USART2_TX PA3.Locked=true PA3.Mode=Asynchronous PA3.Signal=USART2_RX +PA4.GPIOParameters=GPIO_Label +PA4.GPIO_Label=RFID_CS PA4.Locked=true -PA4.Mode=NSS_Signal_Hard_Output -PA4.Signal=SPI1_NSS +PA4.Signal=GPIO_Output PA5.Locked=true PA5.Mode=Full_Duplex_Master PA5.Signal=SPI1_SCK @@ -292,10 +293,10 @@ RCC.USART2Freq_Value=8000000 RCC.VCOInputFreq_Value=8000000 RCC.VCOOutputFreq_Value=128000000 SPI1.CalculateBaudRate=4.0 MBits/s +SPI1.DataSize=SPI_DATASIZE_8BIT SPI1.Direction=SPI_DIRECTION_2LINES -SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS +SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize SPI1.Mode=SPI_MODE_MASTER -SPI1.VirtualNSS=VM_NSSHARD SPI1.VirtualType=VM_MASTER USART2.IPParameters=VirtualMode-Asynchronous USART2.VirtualMode-Asynchronous=VM_ASYNC