Compare commits
No commits in common. "9a6663d42f8b7907d1aaa864b3efe197b8da1a25" and "8b5fc40ee5ed1a2583c282626f83a6b8abd9cb0b" have entirely different histories.
9a6663d42f
...
8b5fc40ee5
File diff suppressed because one or more lines are too long
@ -5,7 +5,7 @@
|
|||||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1677117995227931319" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1212502137914603586" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||||
</provider>
|
</provider>
|
||||||
@ -16,7 +16,7 @@
|
|||||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1677117995227931319" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1212502137914603586" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||||
</provider>
|
</provider>
|
||||||
|
|||||||
@ -58,54 +58,42 @@ extern SPI_HandleTypeDef hspi1;
|
|||||||
/* USER CODE END EFP */
|
/* USER CODE END EFP */
|
||||||
|
|
||||||
/* Private defines -----------------------------------------------------------*/
|
/* Private defines -----------------------------------------------------------*/
|
||||||
#define COL1_Pin GPIO_PIN_13
|
|
||||||
#define COL1_GPIO_Port GPIOC
|
|
||||||
#define COL2_Pin GPIO_PIN_14
|
|
||||||
#define COL2_GPIO_Port GPIOC
|
|
||||||
#define COL3_Pin GPIO_PIN_15
|
|
||||||
#define COL3_GPIO_Port GPIOC
|
|
||||||
#define TOUCH_Pin GPIO_PIN_0
|
|
||||||
#define TOUCH_GPIO_Port GPIOA
|
|
||||||
#define INT_Pin GPIO_PIN_1
|
#define INT_Pin GPIO_PIN_1
|
||||||
#define INT_GPIO_Port GPIOA
|
#define INT_GPIO_Port GPIOA
|
||||||
#define RFID_CS_Pin GPIO_PIN_4
|
#define RFID_CS_Pin GPIO_PIN_4
|
||||||
#define RFID_CS_GPIO_Port GPIOA
|
#define RFID_CS_GPIO_Port GPIOA
|
||||||
#define HALL_Pin GPIO_PIN_0
|
#define HALL_Pin GPIO_PIN_0
|
||||||
#define HALL_GPIO_Port GPIOB
|
#define HALL_GPIO_Port GPIOB
|
||||||
#define CLOSE_HALL_Pin GPIO_PIN_1
|
#define CLOSE_Pin GPIO_PIN_1
|
||||||
#define CLOSE_HALL_GPIO_Port GPIOB
|
#define CLOSE_GPIO_Port GPIOB
|
||||||
#define KP_C1_Pin GPIO_PIN_2
|
#define RFID_RST_Pin GPIO_PIN_2
|
||||||
#define KP_C1_GPIO_Port GPIOB
|
#define RFID_RST_GPIO_Port GPIOB
|
||||||
#define DEV4_Pin GPIO_PIN_10
|
#define SWT1_Pin GPIO_PIN_10
|
||||||
#define DEV4_GPIO_Port GPIOB
|
#define SWT1_GPIO_Port GPIOB
|
||||||
#define DEV3_Pin GPIO_PIN_11
|
#define SWT2_Pin GPIO_PIN_11
|
||||||
#define DEV3_GPIO_Port GPIOB
|
#define SWT2_GPIO_Port GPIOB
|
||||||
#define DEV2_Pin GPIO_PIN_12
|
#define COL1_Pin GPIO_PIN_15
|
||||||
#define DEV2_GPIO_Port GPIOB
|
#define COL1_GPIO_Port GPIOB
|
||||||
#define DEV1_Pin GPIO_PIN_13
|
#define COL2_Pin GPIO_PIN_8
|
||||||
#define DEV1_GPIO_Port GPIOB
|
#define COL2_GPIO_Port GPIOA
|
||||||
#define DEV0_Pin GPIO_PIN_14
|
#define SWT3_Pin GPIO_PIN_6
|
||||||
#define DEV0_GPIO_Port GPIOB
|
#define SWT3_GPIO_Port GPIOC
|
||||||
#define SWT2_Pin GPIO_PIN_8
|
#define SWT4_Pin GPIO_PIN_7
|
||||||
#define SWT2_GPIO_Port GPIOA
|
#define SWT4_GPIO_Port GPIOC
|
||||||
#define RFID_IRQ_Pin GPIO_PIN_6
|
#define ROW1_Pin GPIO_PIN_11
|
||||||
#define RFID_IRQ_GPIO_Port GPIOC
|
#define ROW1_GPIO_Port GPIOA
|
||||||
#define RFID_RST_Pin GPIO_PIN_7
|
#define ROW2_Pin GPIO_PIN_12
|
||||||
#define RFID_RST_GPIO_Port GPIOC
|
#define ROW2_GPIO_Port GPIOA
|
||||||
#define SWT1_Pin GPIO_PIN_11
|
#define ROW3_Pin GPIO_PIN_15
|
||||||
#define SWT1_GPIO_Port GPIOA
|
#define ROW3_GPIO_Port GPIOA
|
||||||
#define SWT4_Pin GPIO_PIN_12
|
#define ROW4_Pin GPIO_PIN_0
|
||||||
#define SWT4_GPIO_Port GPIOA
|
|
||||||
#define SWT3_Pin GPIO_PIN_15
|
|
||||||
#define SWT3_GPIO_Port GPIOA
|
|
||||||
#define ROW1_Pin GPIO_PIN_0
|
|
||||||
#define ROW1_GPIO_Port GPIOD
|
|
||||||
#define ROW2_Pin GPIO_PIN_1
|
|
||||||
#define ROW2_GPIO_Port GPIOD
|
|
||||||
#define ROW3_Pin GPIO_PIN_2
|
|
||||||
#define ROW3_GPIO_Port GPIOD
|
|
||||||
#define ROW4_Pin GPIO_PIN_3
|
|
||||||
#define ROW4_GPIO_Port GPIOD
|
#define ROW4_GPIO_Port GPIOD
|
||||||
|
#define COL3_Pin GPIO_PIN_1
|
||||||
|
#define COL3_GPIO_Port GPIOD
|
||||||
|
#define TOUCH_Pin GPIO_PIN_2
|
||||||
|
#define TOUCH_GPIO_Port GPIOD
|
||||||
|
#define KP_C1_Pin GPIO_PIN_3
|
||||||
|
#define KP_C1_GPIO_Port GPIOD
|
||||||
#define KP_C2_Pin GPIO_PIN_3
|
#define KP_C2_Pin GPIO_PIN_3
|
||||||
#define KP_C2_GPIO_Port GPIOB
|
#define KP_C2_GPIO_Port GPIOB
|
||||||
#define KP_C3_Pin GPIO_PIN_4
|
#define KP_C3_Pin GPIO_PIN_4
|
||||||
|
|||||||
@ -34,7 +34,7 @@ extern "C" {
|
|||||||
* @brief This is the list of modules to be used in the HAL driver
|
* @brief This is the list of modules to be used in the HAL driver
|
||||||
*/
|
*/
|
||||||
#define HAL_MODULE_ENABLED
|
#define HAL_MODULE_ENABLED
|
||||||
#define HAL_ADC_MODULE_ENABLED
|
/* #define HAL_ADC_MODULE_ENABLED */
|
||||||
/* #define HAL_CEC_MODULE_ENABLED */
|
/* #define HAL_CEC_MODULE_ENABLED */
|
||||||
/* #define HAL_COMP_MODULE_ENABLED */
|
/* #define HAL_COMP_MODULE_ENABLED */
|
||||||
/* #define HAL_CRC_MODULE_ENABLED */
|
/* #define HAL_CRC_MODULE_ENABLED */
|
||||||
|
|||||||
@ -51,7 +51,6 @@ void HardFault_Handler(void);
|
|||||||
void SVC_Handler(void);
|
void SVC_Handler(void);
|
||||||
void PendSV_Handler(void);
|
void PendSV_Handler(void);
|
||||||
void SysTick_Handler(void);
|
void SysTick_Handler(void);
|
||||||
void DMA1_Channel1_IRQHandler(void);
|
|
||||||
void I2C1_IRQHandler(void);
|
void I2C1_IRQHandler(void);
|
||||||
/* USER CODE BEGIN EFP */
|
/* USER CODE BEGIN EFP */
|
||||||
|
|
||||||
|
|||||||
357
Core/Src/main.c
357
Core/Src/main.c
@ -41,9 +41,6 @@
|
|||||||
/* USER CODE END PM */
|
/* USER CODE END PM */
|
||||||
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
/* Private variables ---------------------------------------------------------*/
|
||||||
ADC_HandleTypeDef hadc1;
|
|
||||||
DMA_HandleTypeDef hdma_adc1;
|
|
||||||
|
|
||||||
I2C_HandleTypeDef hi2c1;
|
I2C_HandleTypeDef hi2c1;
|
||||||
|
|
||||||
SPI_HandleTypeDef hspi1;
|
SPI_HandleTypeDef hspi1;
|
||||||
@ -53,54 +50,42 @@ UART_HandleTypeDef huart2;
|
|||||||
/* USER CODE BEGIN PV */
|
/* USER CODE BEGIN PV */
|
||||||
/* Bitwise changed buffer */
|
/* Bitwise changed buffer */
|
||||||
uint8_t old_delta;
|
uint8_t old_delta;
|
||||||
volatile uint8_t delta;
|
uint8_t delta;
|
||||||
|
|
||||||
#define DELTA_KP_BIT 0
|
#define DELTA_KP_BIT 0
|
||||||
#define DELTA_BTN_BIT 1
|
#define DELTA_BTN_BIT 1
|
||||||
#define DELTA_TOUCH_BIT 2
|
#define DELTA_CARD_PRESENT_BIT 2
|
||||||
#define DELTA_CARD_PRESENT_BIT 3
|
#define DELTA_CARD_ID_BIT 3
|
||||||
#define DELTA_CARD_ID_BIT 4
|
|
||||||
#define DELTA_HALL_BIT 5
|
|
||||||
#define DELTA_CLOSE_BIT 6
|
|
||||||
|
|
||||||
uint8_t i2c_register;
|
uint8_t i2c_register;
|
||||||
|
|
||||||
|
// TODO: this doesn't need to be high and low, it can simply send 2 bytes
|
||||||
#define I2C_REGISTER_DELTA 1
|
#define I2C_REGISTER_DELTA 1
|
||||||
#define I2C_REGISTER_KEYPAD 2
|
#define I2C_REGISTER_KEYPAD 2
|
||||||
#define I2C_REGISTER_BUTTON 3
|
#define I2C_REGISTER_BUTTON 3
|
||||||
#define I2C_REGISTER_TOUCH 4
|
#define I2C_REGISTER_RFID_PRESENT 4
|
||||||
#define I2C_REGISTER_RFID_PRESENT 5
|
#define I2C_REGISTER_RFID_ID 5
|
||||||
#define I2C_REGISTER_RFID_ID 6
|
|
||||||
#define I2C_REGISTER_HALL 7
|
|
||||||
#define I2C_REGISTER_CLOSE 8
|
|
||||||
|
|
||||||
uint16_t old_keypad_state = 0;
|
uint16_t old_keypad_state = 0;
|
||||||
volatile uint16_t keypad_state = 0;
|
uint16_t keypad_state = 0;
|
||||||
|
|
||||||
uint16_t old_button_state = 0;
|
uint16_t old_button_state = 0;
|
||||||
volatile uint16_t button_state = 0;
|
uint16_t button_state = 0;
|
||||||
|
|
||||||
uint8_t old_touch_state = 0;
|
|
||||||
volatile uint8_t touch_state = 0;
|
|
||||||
|
|
||||||
uint8_t old_card_present = 0;
|
uint8_t old_card_present = 0;
|
||||||
volatile uint8_t card_present = 0;
|
uint8_t card_present = 0;
|
||||||
|
|
||||||
#define CARD_ID_LEN 4
|
#define CARD_ID_LEN 4
|
||||||
uint8_t old_card_id[CARD_ID_LEN] = {0};
|
uint8_t old_card_id[CARD_ID_LEN] = {0};
|
||||||
volatile uint8_t card_id[CARD_ID_LEN] = {0};
|
uint8_t card_id[CARD_ID_LEN] = {0};
|
||||||
|
|
||||||
volatile uint16_t adc_buffer[2];
|
|
||||||
/* USER CODE END PV */
|
/* USER CODE END PV */
|
||||||
|
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
void SystemClock_Config(void);
|
void SystemClock_Config(void);
|
||||||
static void MX_GPIO_Init(void);
|
static void MX_GPIO_Init(void);
|
||||||
static void MX_DMA_Init(void);
|
|
||||||
static void MX_I2C1_Init(void);
|
static void MX_I2C1_Init(void);
|
||||||
static void MX_SPI1_Init(void);
|
static void MX_SPI1_Init(void);
|
||||||
static void MX_USART2_UART_Init(void);
|
static void MX_USART2_UART_Init(void);
|
||||||
static void MX_ADC1_Init(void);
|
|
||||||
/* USER CODE BEGIN PFP */
|
/* USER CODE BEGIN PFP */
|
||||||
#ifdef __GNUC__
|
#ifdef __GNUC__
|
||||||
/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf
|
/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf
|
||||||
@ -112,10 +97,6 @@ static void MX_ADC1_Init(void);
|
|||||||
|
|
||||||
void scan_keypad(void);
|
void scan_keypad(void);
|
||||||
void scan_buttons(void);
|
void scan_buttons(void);
|
||||||
void scan_touch(void);
|
|
||||||
|
|
||||||
void send_register(void);
|
|
||||||
void send_interupt(void);
|
|
||||||
void rfid_check_card(void);
|
void rfid_check_card(void);
|
||||||
|
|
||||||
void send_iterupt(void);
|
void send_iterupt(void);
|
||||||
@ -162,16 +143,15 @@ int main(void)
|
|||||||
|
|
||||||
/* Initialize all configured peripherals */
|
/* Initialize all configured peripherals */
|
||||||
MX_GPIO_Init();
|
MX_GPIO_Init();
|
||||||
MX_DMA_Init();
|
|
||||||
MX_I2C1_Init();
|
MX_I2C1_Init();
|
||||||
MX_SPI1_Init();
|
MX_SPI1_Init();
|
||||||
MX_USART2_UART_Init();
|
MX_USART2_UART_Init();
|
||||||
MX_ADC1_Init();
|
|
||||||
/* USER CODE BEGIN 2 */
|
/* USER CODE BEGIN 2 */
|
||||||
rc522_init();
|
|
||||||
|
// rc522_init();
|
||||||
HAL_I2C_EnableListen_IT(&hi2c1);
|
HAL_I2C_EnableListen_IT(&hi2c1);
|
||||||
HAL_ADCEx_Calibration_Start(&hadc1);
|
// printf("initialized\r\n");
|
||||||
HAL_ADC_Start_DMA(&hadc1, (uint32_t*) adc_buffer, 2);
|
|
||||||
/* USER CODE END 2 */
|
/* USER CODE END 2 */
|
||||||
|
|
||||||
/* Infinite loop */
|
/* Infinite loop */
|
||||||
@ -181,11 +161,12 @@ int main(void)
|
|||||||
// HAL_Delay(1);
|
// HAL_Delay(1);
|
||||||
scan_keypad();
|
scan_keypad();
|
||||||
scan_buttons();
|
scan_buttons();
|
||||||
scan_touch();
|
// rfid_check_card();
|
||||||
// rfid_check_card();
|
|
||||||
send_iterupt();
|
send_iterupt();
|
||||||
|
|
||||||
// printf("%d, %d", adc_buffer[0], adc_buffer[1]);
|
// printf("s: %d\r\n", keypad_state);
|
||||||
|
// printf("r: %d\r\n", recv_cnt);
|
||||||
|
// printf("d: %d %d %d %d, %d %d %d %d\r\n", data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]);
|
||||||
|
|
||||||
/* USER CODE END WHILE */
|
/* USER CODE END WHILE */
|
||||||
|
|
||||||
@ -232,73 +213,6 @@ void SystemClock_Config(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief ADC1 Initialization Function
|
|
||||||
* @param None
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
static void MX_ADC1_Init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* USER CODE BEGIN ADC1_Init 0 */
|
|
||||||
|
|
||||||
/* USER CODE END ADC1_Init 0 */
|
|
||||||
|
|
||||||
ADC_ChannelConfTypeDef sConfig = {0};
|
|
||||||
|
|
||||||
/* USER CODE BEGIN ADC1_Init 1 */
|
|
||||||
|
|
||||||
/* USER CODE END ADC1_Init 1 */
|
|
||||||
|
|
||||||
/** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
|
|
||||||
*/
|
|
||||||
hadc1.Instance = ADC1;
|
|
||||||
hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
|
|
||||||
hadc1.Init.Resolution = ADC_RESOLUTION_12B;
|
|
||||||
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
|
||||||
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
|
|
||||||
hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
|
|
||||||
hadc1.Init.LowPowerAutoWait = DISABLE;
|
|
||||||
hadc1.Init.LowPowerAutoPowerOff = DISABLE;
|
|
||||||
hadc1.Init.ContinuousConvMode = ENABLE;
|
|
||||||
hadc1.Init.NbrOfConversion = 2;
|
|
||||||
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
|
||||||
hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
|
||||||
hadc1.Init.DMAContinuousRequests = ENABLE;
|
|
||||||
hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
|
|
||||||
hadc1.Init.SamplingTimeCommon1 = ADC_SAMPLETIME_79CYCLES_5;
|
|
||||||
hadc1.Init.SamplingTimeCommon2 = ADC_SAMPLETIME_79CYCLES_5;
|
|
||||||
hadc1.Init.OversamplingMode = DISABLE;
|
|
||||||
hadc1.Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_HIGH;
|
|
||||||
if (HAL_ADC_Init(&hadc1) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
/** Configure Regular Channel
|
|
||||||
*/
|
|
||||||
sConfig.Channel = ADC_CHANNEL_8;
|
|
||||||
sConfig.Rank = ADC_REGULAR_RANK_1;
|
|
||||||
sConfig.SamplingTime = ADC_SAMPLINGTIME_COMMON_1;
|
|
||||||
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
/** Configure Regular Channel
|
|
||||||
*/
|
|
||||||
sConfig.Channel = ADC_CHANNEL_9;
|
|
||||||
sConfig.Rank = ADC_REGULAR_RANK_2;
|
|
||||||
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
/* USER CODE BEGIN ADC1_Init 2 */
|
|
||||||
|
|
||||||
/* USER CODE END ADC1_Init 2 */
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2C1 Initialization Function
|
* @brief I2C1 Initialization Function
|
||||||
* @param None
|
* @param None
|
||||||
@ -435,22 +349,6 @@ static void MX_USART2_UART_Init(void)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* Enable DMA controller clock
|
|
||||||
*/
|
|
||||||
static void MX_DMA_Init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* DMA controller clock enable */
|
|
||||||
__HAL_RCC_DMA1_CLK_ENABLE();
|
|
||||||
|
|
||||||
/* DMA interrupt init */
|
|
||||||
/* DMA1_Channel1_IRQn interrupt configuration */
|
|
||||||
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief GPIO Initialization Function
|
* @brief GPIO Initialization Function
|
||||||
* @param None
|
* @param None
|
||||||
@ -463,51 +361,33 @@ static void MX_GPIO_Init(void)
|
|||||||
/* USER CODE END MX_GPIO_Init_1 */
|
/* USER CODE END MX_GPIO_Init_1 */
|
||||||
|
|
||||||
/* GPIO Ports Clock Enable */
|
/* GPIO Ports Clock Enable */
|
||||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
|
||||||
HAL_GPIO_WritePin(INT_GPIO_Port, INT_Pin, GPIO_PIN_SET);
|
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(RFID_CS_GPIO_Port, RFID_CS_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(RFID_CS_GPIO_Port, RFID_CS_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
|
||||||
HAL_GPIO_WritePin(GPIOB, KP_C1_Pin|DEV4_Pin|DEV3_Pin|DEV2_Pin
|
|
||||||
|DEV1_Pin|DEV0_Pin, GPIO_PIN_RESET);
|
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(RFID_RST_GPIO_Port, RFID_RST_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(ROW1_GPIO_Port, ROW1_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(GPIOB, COL1_Pin|KP_C2_Pin|KP_C3_Pin|KP_C4_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(GPIOD, ROW2_Pin|ROW3_Pin|ROW4_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(COL2_GPIO_Port, COL2_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(GPIOB, KP_C2_Pin|KP_C3_Pin|KP_C4_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(GPIOD, COL3_Pin|KP_C1_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
/*Configure GPIO pins : COL1_Pin COL2_Pin COL3_Pin RFID_IRQ_Pin */
|
|
||||||
GPIO_InitStruct.Pin = COL1_Pin|COL2_Pin|COL3_Pin|RFID_IRQ_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pins : TOUCH_Pin SWT1_Pin SWT4_Pin SWT3_Pin */
|
|
||||||
GPIO_InitStruct.Pin = TOUCH_Pin|SWT1_Pin|SWT4_Pin|SWT3_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pin : INT_Pin */
|
/*Configure GPIO pin : INT_Pin */
|
||||||
GPIO_InitStruct.Pin = INT_Pin;
|
GPIO_InitStruct.Pin = INT_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_EVENTOUT;
|
||||||
HAL_GPIO_Init(INT_GPIO_Port, &GPIO_InitStruct);
|
HAL_GPIO_Init(INT_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pin : RFID_CS_Pin */
|
/*Configure GPIO pin : RFID_CS_Pin */
|
||||||
@ -517,21 +397,12 @@ static void MX_GPIO_Init(void)
|
|||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
HAL_GPIO_Init(RFID_CS_GPIO_Port, &GPIO_InitStruct);
|
HAL_GPIO_Init(RFID_CS_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pins : KP_C1_Pin DEV4_Pin DEV3_Pin DEV2_Pin
|
/*Configure GPIO pins : HALL_Pin CLOSE_Pin */
|
||||||
DEV1_Pin DEV0_Pin */
|
GPIO_InitStruct.Pin = HALL_Pin|CLOSE_Pin;
|
||||||
GPIO_InitStruct.Pin = KP_C1_Pin|DEV4_Pin|DEV3_Pin|DEV2_Pin
|
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||||
|DEV1_Pin|DEV0_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pin : SWT2_Pin */
|
|
||||||
GPIO_InitStruct.Pin = SWT2_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
HAL_GPIO_Init(SWT2_GPIO_Port, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pin : RFID_RST_Pin */
|
/*Configure GPIO pin : RFID_RST_Pin */
|
||||||
GPIO_InitStruct.Pin = RFID_RST_Pin;
|
GPIO_InitStruct.Pin = RFID_RST_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
@ -539,20 +410,51 @@ static void MX_GPIO_Init(void)
|
|||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
HAL_GPIO_Init(RFID_RST_GPIO_Port, &GPIO_InitStruct);
|
HAL_GPIO_Init(RFID_RST_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pins : ROW1_Pin ROW2_Pin ROW3_Pin ROW4_Pin */
|
/*Configure GPIO pins : SWT1_Pin SWT2_Pin */
|
||||||
GPIO_InitStruct.Pin = ROW1_Pin|ROW2_Pin|ROW3_Pin|ROW4_Pin;
|
GPIO_InitStruct.Pin = SWT1_Pin|SWT2_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pins : KP_C2_Pin KP_C3_Pin KP_C4_Pin */
|
/*Configure GPIO pins : COL1_Pin KP_C2_Pin KP_C3_Pin KP_C4_Pin */
|
||||||
GPIO_InitStruct.Pin = KP_C2_Pin|KP_C3_Pin|KP_C4_Pin;
|
GPIO_InitStruct.Pin = COL1_Pin|KP_C2_Pin|KP_C3_Pin|KP_C4_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : COL2_Pin */
|
||||||
|
GPIO_InitStruct.Pin = COL2_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(COL2_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : SWT3_Pin SWT4_Pin */
|
||||||
|
GPIO_InitStruct.Pin = SWT3_Pin|SWT4_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : ROW1_Pin ROW2_Pin ROW3_Pin */
|
||||||
|
GPIO_InitStruct.Pin = ROW1_Pin|ROW2_Pin|ROW3_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : ROW4_Pin TOUCH_Pin */
|
||||||
|
GPIO_InitStruct.Pin = ROW4_Pin|TOUCH_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : COL3_Pin KP_C1_Pin */
|
||||||
|
GPIO_InitStruct.Pin = COL3_Pin|KP_C1_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pins : KP_R1_Pin KP_R2_Pin KP_R3_Pin KP_R4_Pin */
|
/*Configure GPIO pins : KP_R1_Pin KP_R2_Pin KP_R3_Pin KP_R4_Pin */
|
||||||
GPIO_InitStruct.Pin = KP_R1_Pin|KP_R2_Pin|KP_R3_Pin|KP_R4_Pin;
|
GPIO_InitStruct.Pin = KP_R1_Pin|KP_R2_Pin|KP_R3_Pin|KP_R4_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
@ -597,21 +499,17 @@ void send_register(void) {
|
|||||||
case I2C_REGISTER_KEYPAD:
|
case I2C_REGISTER_KEYPAD:
|
||||||
send_data[0] = keypad_state & 0xFF;
|
send_data[0] = keypad_state & 0xFF;
|
||||||
send_data[1] = keypad_state >> 8;
|
send_data[1] = keypad_state >> 8;
|
||||||
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, send_data, 2, I2C_NEXT_FRAME);
|
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, &send_data, 2, I2C_NEXT_FRAME);
|
||||||
delta &= ~(1 << DELTA_KP_BIT);
|
delta &= ~(1 << DELTA_KP_BIT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_REGISTER_BUTTON:
|
case I2C_REGISTER_BUTTON:
|
||||||
send_data[0] = button_state & 0xFF;
|
send_data[0] = button_state & 0xFF;
|
||||||
send_data[1] = button_state >> 8;
|
send_data[1] = button_state >> 8;
|
||||||
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, send_data, 2, I2C_NEXT_FRAME);
|
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, &send_data, 2, I2C_NEXT_FRAME);
|
||||||
delta &= ~(1 << DELTA_BTN_BIT);
|
delta &= ~(1 << DELTA_BTN_BIT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_REGISTER_TOUCH:
|
|
||||||
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, &touch_state, 1, I2C_NEXT_FRAME);
|
|
||||||
delta &= ~(1 << DELTA_TOUCH_BIT);
|
|
||||||
break;
|
|
||||||
case I2C_REGISTER_RFID_PRESENT:
|
case I2C_REGISTER_RFID_PRESENT:
|
||||||
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, &card_present, 1, I2C_NEXT_FRAME);
|
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, &card_present, 1, I2C_NEXT_FRAME);
|
||||||
delta &= ~(1 << DELTA_CARD_PRESENT_BIT);
|
delta &= ~(1 << DELTA_CARD_PRESENT_BIT);
|
||||||
@ -620,18 +518,6 @@ void send_register(void) {
|
|||||||
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, card_id, 4, I2C_NEXT_FRAME);
|
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, card_id, 4, I2C_NEXT_FRAME);
|
||||||
delta &= ~(1 << DELTA_CARD_ID_BIT);
|
delta &= ~(1 << DELTA_CARD_ID_BIT);
|
||||||
break;
|
break;
|
||||||
case I2C_REGISTER_HALL:
|
|
||||||
send_data[0] = adc_buffer[0] & 0xFF;
|
|
||||||
send_data[1] = adc_buffer[0] >> 8;
|
|
||||||
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, send_data, 2, I2C_NEXT_FRAME);
|
|
||||||
delta &= ~(1 << DELTA_HALL_BIT);
|
|
||||||
break;
|
|
||||||
case I2C_REGISTER_CLOSE:
|
|
||||||
send_data[0] = adc_buffer[1] & 0xFF;
|
|
||||||
send_data[1] = adc_buffer[1] >> 8;
|
|
||||||
HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, send_data, 2, I2C_NEXT_FRAME);
|
|
||||||
delta &= ~(1 << DELTA_CLOSE_BIT);
|
|
||||||
break;
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@ -639,7 +525,6 @@ void send_register(void) {
|
|||||||
|
|
||||||
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
|
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
|
||||||
{
|
{
|
||||||
send_register();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
|
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
|
||||||
@ -651,93 +536,71 @@ void scan_keypad(void)
|
|||||||
uint16_t new_keypad_state = 0;
|
uint16_t new_keypad_state = 0;
|
||||||
|
|
||||||
HAL_GPIO_WritePin(KP_C1_GPIO_Port, KP_C1_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(KP_C1_GPIO_Port, KP_C1_Pin, GPIO_PIN_RESET);
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 0;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 0;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 1;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 1;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 2;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 2;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 3;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 3;
|
||||||
HAL_GPIO_WritePin(KP_C1_GPIO_Port, KP_C1_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(KP_C1_GPIO_Port, KP_C1_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
HAL_GPIO_WritePin(KP_C2_GPIO_Port, KP_C2_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(KP_C2_GPIO_Port, KP_C2_Pin, GPIO_PIN_RESET);
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 4;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 4;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 5;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 5;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 6;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 6;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 7;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 7;
|
||||||
HAL_GPIO_WritePin(KP_C2_GPIO_Port, KP_C2_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(KP_C2_GPIO_Port, KP_C2_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
HAL_GPIO_WritePin(KP_C3_GPIO_Port, KP_C3_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(KP_C3_GPIO_Port, KP_C3_Pin, GPIO_PIN_RESET);
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 8;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 8;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 9;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 9;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 10;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 10;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 11;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 11;
|
||||||
HAL_GPIO_WritePin(KP_C3_GPIO_Port, KP_C3_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(KP_C3_GPIO_Port, KP_C3_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
HAL_GPIO_WritePin(KP_C4_GPIO_Port, KP_C4_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(KP_C4_GPIO_Port, KP_C4_Pin, GPIO_PIN_RESET);
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 12;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R1_GPIO_Port, KP_R1_Pin) == GPIO_PIN_RESET) << 12;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 13;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R2_GPIO_Port, KP_R2_Pin) == GPIO_PIN_RESET) << 13;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 14;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R3_GPIO_Port, KP_R3_Pin) == GPIO_PIN_RESET) << 14;
|
||||||
new_keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 15;
|
keypad_state |= (HAL_GPIO_ReadPin(KP_R4_GPIO_Port, KP_R4_Pin) == GPIO_PIN_RESET) << 15;
|
||||||
HAL_GPIO_WritePin(KP_C4_GPIO_Port, KP_C4_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(KP_C4_GPIO_Port, KP_C4_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
__disable_irq();
|
old_keypad_state = keypad_state;
|
||||||
old_keypad_state = keypad_state;
|
|
||||||
keypad_state = new_keypad_state;
|
keypad_state = new_keypad_state;
|
||||||
if (keypad_state != old_keypad_state) {
|
if (keypad_state != old_keypad_state) {
|
||||||
delta |= 1 << DELTA_KP_BIT;
|
delta |= 1 << DELTA_KP_BIT;
|
||||||
}
|
}
|
||||||
__enable_irq();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void scan_buttons(void)
|
void scan_buttons(void)
|
||||||
{
|
{
|
||||||
uint16_t new_button_state = 0;
|
uint16_t new_button_state = 0;
|
||||||
|
|
||||||
HAL_GPIO_WritePin(ROW1_GPIO_Port, ROW1_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(COL1_GPIO_Port, COL1_Pin, GPIO_PIN_SET);
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL1_GPIO_Port, COL1_Pin) == GPIO_PIN_RESET) << 0;
|
button_state |= (HAL_GPIO_ReadPin(ROW1_GPIO_Port, ROW1_Pin) == GPIO_PIN_RESET) << 0;
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL2_GPIO_Port, COL2_Pin) == GPIO_PIN_RESET) << 4;
|
button_state |= (HAL_GPIO_ReadPin(ROW2_GPIO_Port, ROW2_Pin) == GPIO_PIN_RESET) << 1;
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL3_GPIO_Port, COL3_Pin) == GPIO_PIN_RESET) << 8;
|
button_state |= (HAL_GPIO_ReadPin(ROW3_GPIO_Port, ROW3_Pin) == GPIO_PIN_RESET) << 2;
|
||||||
HAL_GPIO_WritePin(ROW1_GPIO_Port, ROW1_Pin, GPIO_PIN_SET);
|
button_state |= (HAL_GPIO_ReadPin(ROW4_GPIO_Port, ROW4_Pin) == GPIO_PIN_RESET) << 3;
|
||||||
|
HAL_GPIO_WritePin(COL1_GPIO_Port, COL1_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
HAL_GPIO_WritePin(ROW2_GPIO_Port, ROW2_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(COL2_GPIO_Port, COL2_Pin, GPIO_PIN_SET);
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL1_GPIO_Port, COL1_Pin) == GPIO_PIN_RESET) << 1;
|
button_state |= (HAL_GPIO_ReadPin(ROW1_GPIO_Port, ROW1_Pin) == GPIO_PIN_RESET) << 4;
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL2_GPIO_Port, COL2_Pin) == GPIO_PIN_RESET) << 5;
|
button_state |= (HAL_GPIO_ReadPin(ROW2_GPIO_Port, ROW2_Pin) == GPIO_PIN_RESET) << 5;
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL3_GPIO_Port, COL3_Pin) == GPIO_PIN_RESET) << 9;
|
button_state |= (HAL_GPIO_ReadPin(ROW3_GPIO_Port, ROW3_Pin) == GPIO_PIN_RESET) << 6;
|
||||||
HAL_GPIO_WritePin(ROW2_GPIO_Port, ROW2_Pin, GPIO_PIN_SET);
|
button_state |= (HAL_GPIO_ReadPin(ROW4_GPIO_Port, ROW4_Pin) == GPIO_PIN_RESET) << 7;
|
||||||
|
HAL_GPIO_WritePin(COL2_GPIO_Port, COL2_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
HAL_GPIO_WritePin(ROW3_GPIO_Port, ROW3_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(COL3_GPIO_Port, COL3_Pin, GPIO_PIN_SET);
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL1_GPIO_Port, COL1_Pin) == GPIO_PIN_RESET) << 2;
|
button_state |= (HAL_GPIO_ReadPin(ROW1_GPIO_Port, ROW1_Pin) == GPIO_PIN_RESET) << 8;
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL2_GPIO_Port, COL2_Pin) == GPIO_PIN_RESET) << 6;
|
button_state |= (HAL_GPIO_ReadPin(ROW2_GPIO_Port, ROW2_Pin) == GPIO_PIN_RESET) << 9;
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL3_GPIO_Port, COL3_Pin) == GPIO_PIN_RESET) << 10;
|
button_state |= (HAL_GPIO_ReadPin(ROW3_GPIO_Port, ROW3_Pin) == GPIO_PIN_RESET) << 10;
|
||||||
HAL_GPIO_WritePin(ROW3_GPIO_Port, ROW3_Pin, GPIO_PIN_SET);
|
button_state |= (HAL_GPIO_ReadPin(ROW4_GPIO_Port, ROW4_Pin) == GPIO_PIN_RESET) << 11;
|
||||||
|
HAL_GPIO_WritePin(COL3_GPIO_Port, COL3_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
HAL_GPIO_WritePin(ROW4_GPIO_Port, ROW4_Pin, GPIO_PIN_RESET);
|
// TODO: read the touch sensors here too!
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL1_GPIO_Port, COL1_Pin) == GPIO_PIN_RESET) << 3;
|
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL2_GPIO_Port, COL2_Pin) == GPIO_PIN_RESET) << 7;
|
|
||||||
new_button_state |= (HAL_GPIO_ReadPin(COL3_GPIO_Port, COL3_Pin) == GPIO_PIN_RESET) << 11;
|
|
||||||
HAL_GPIO_WritePin(ROW4_GPIO_Port, ROW4_Pin, GPIO_PIN_SET);
|
|
||||||
|
|
||||||
new_button_state |= HAL_GPIO_ReadPin(SWT1_GPIO_Port, SWT1_Pin) << 12;
|
old_button_state = button_state;
|
||||||
new_button_state |= HAL_GPIO_ReadPin(SWT2_GPIO_Port, SWT2_Pin) << 13;
|
button_state = new_button_state;
|
||||||
new_button_state |= HAL_GPIO_ReadPin(SWT3_GPIO_Port, SWT3_Pin) << 14;
|
|
||||||
new_button_state |= HAL_GPIO_ReadPin(SWT4_GPIO_Port, SWT4_Pin) << 15;
|
|
||||||
|
|
||||||
__disable_irq();
|
|
||||||
old_button_state = button_state;
|
|
||||||
button_state = new_button_state;
|
|
||||||
|
|
||||||
if (button_state != old_button_state) {
|
if (button_state != old_button_state) {
|
||||||
delta |= 1 << DELTA_BTN_BIT;
|
delta |= 1 << DELTA_KP_BIT;
|
||||||
}
|
|
||||||
__enable_irq();
|
|
||||||
}
|
|
||||||
|
|
||||||
void scan_touch(void)
|
|
||||||
{
|
|
||||||
uint16_t new_touch_state = HAL_GPIO_ReadPin(TOUCH_GPIO_Port, TOUCH_Pin);
|
|
||||||
|
|
||||||
old_touch_state = touch_state;
|
|
||||||
touch_state = new_touch_state;
|
|
||||||
if (touch_state != old_touch_state) {
|
|
||||||
delta |= 1 << DELTA_TOUCH_BIT;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -761,12 +624,12 @@ void rfid_check_card() {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void send_interupt(void)
|
void send_iterupt(void)
|
||||||
{
|
{
|
||||||
if (delta != old_delta) {
|
if (delta != old_delta) {
|
||||||
old_delta = delta;
|
old_delta = delta;
|
||||||
HAL_GPIO_WritePin(INT_GPIO_Port, INT_Pin, delta != 0);
|
HAL_GPIO_WritePin(INT_GPIO_Port, INT_Pin, delta != 0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
/* USER CODE END 4 */
|
/* USER CODE END 4 */
|
||||||
|
|
||||||
|
|||||||
@ -23,7 +23,6 @@
|
|||||||
/* USER CODE BEGIN Includes */
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
/* USER CODE END Includes */
|
/* USER CODE END Includes */
|
||||||
extern DMA_HandleTypeDef hdma_adc1;
|
|
||||||
|
|
||||||
/* Private typedef -----------------------------------------------------------*/
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN TD */
|
/* USER CODE BEGIN TD */
|
||||||
@ -82,89 +81,6 @@ void HAL_MspInit(void)
|
|||||||
/* USER CODE END MspInit 1 */
|
/* USER CODE END MspInit 1 */
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief ADC MSP Initialization
|
|
||||||
* This function configures the hardware resources used in this example
|
|
||||||
* @param hadc: ADC handle pointer
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
|
|
||||||
{
|
|
||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
||||||
if(hadc->Instance==ADC1)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN ADC1_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END ADC1_MspInit 0 */
|
|
||||||
/* Peripheral clock enable */
|
|
||||||
__HAL_RCC_ADC_CLK_ENABLE();
|
|
||||||
|
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
||||||
/**ADC1 GPIO Configuration
|
|
||||||
PB0 ------> ADC1_IN8
|
|
||||||
PB1 ------> ADC1_IN9
|
|
||||||
*/
|
|
||||||
GPIO_InitStruct.Pin = HALL_Pin|CLOSE_HALL_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* ADC1 DMA Init */
|
|
||||||
/* ADC1 Init */
|
|
||||||
hdma_adc1.Instance = DMA1_Channel1;
|
|
||||||
hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
|
|
||||||
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
|
||||||
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
|
||||||
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
|
||||||
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
|
||||||
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
|
||||||
hdma_adc1.Init.Mode = DMA_CIRCULAR;
|
|
||||||
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
|
||||||
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END ADC1_MspInit 1 */
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief ADC MSP De-Initialization
|
|
||||||
* This function freeze the hardware resources used in this example
|
|
||||||
* @param hadc: ADC handle pointer
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
|
||||||
{
|
|
||||||
if(hadc->Instance==ADC1)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN ADC1_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END ADC1_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_ADC_CLK_DISABLE();
|
|
||||||
|
|
||||||
/**ADC1 GPIO Configuration
|
|
||||||
PB0 ------> ADC1_IN8
|
|
||||||
PB1 ------> ADC1_IN9
|
|
||||||
*/
|
|
||||||
HAL_GPIO_DeInit(GPIOB, HALL_Pin|CLOSE_HALL_Pin);
|
|
||||||
|
|
||||||
/* ADC1 DMA DeInit */
|
|
||||||
HAL_DMA_DeInit(hadc->DMA_Handle);
|
|
||||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END ADC1_MspDeInit 1 */
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2C MSP Initialization
|
* @brief I2C MSP Initialization
|
||||||
* This function configures the hardware resources used in this example
|
* This function configures the hardware resources used in this example
|
||||||
|
|||||||
@ -55,7 +55,6 @@
|
|||||||
/* USER CODE END 0 */
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
/* External variables --------------------------------------------------------*/
|
/* External variables --------------------------------------------------------*/
|
||||||
extern DMA_HandleTypeDef hdma_adc1;
|
|
||||||
extern I2C_HandleTypeDef hi2c1;
|
extern I2C_HandleTypeDef hi2c1;
|
||||||
/* USER CODE BEGIN EV */
|
/* USER CODE BEGIN EV */
|
||||||
|
|
||||||
@ -141,20 +140,6 @@ void SysTick_Handler(void)
|
|||||||
/* please refer to the startup file (startup_stm32g0xx.s). */
|
/* please refer to the startup file (startup_stm32g0xx.s). */
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief This function handles DMA1 channel 1 interrupt.
|
|
||||||
*/
|
|
||||||
void DMA1_Channel1_IRQHandler(void)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
|
|
||||||
|
|
||||||
/* USER CODE END DMA1_Channel1_IRQn 0 */
|
|
||||||
HAL_DMA_IRQHandler(&hdma_adc1);
|
|
||||||
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
|
|
||||||
|
|
||||||
/* USER CODE END DMA1_Channel1_IRQn 1 */
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles I2C1 event global interrupt / I2C1 wake-up interrupt through EXTI line 23.
|
* @brief This function handles I2C1 event global interrupt / I2C1 wake-up interrupt through EXTI line 23.
|
||||||
*/
|
*/
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@ -1,186 +0,0 @@
|
|||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file stm32g0xx_hal_adc_ex.h
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @brief Header file of ADC HAL extended module.
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2018 STMicroelectronics.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
|
||||||
* in the root directory of this software component.
|
|
||||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
|
||||||
#ifndef STM32G0xx_HAL_ADC_EX_H
|
|
||||||
#define STM32G0xx_HAL_ADC_EX_H
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
|
||||||
#include "stm32g0xx_hal_def.h"
|
|
||||||
|
|
||||||
/** @addtogroup STM32G0xx_HAL_Driver
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup ADCEx
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported types ------------------------------------------------------------*/
|
|
||||||
/** @defgroup ADCEx_Exported_Types ADC Extended Exported Types
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported constants --------------------------------------------------------*/
|
|
||||||
|
|
||||||
/** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup ADC_HAL_EC_GROUPS ADC instance - Groups
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define ADC_REGULAR_GROUP (LL_ADC_GROUP_REGULAR) /*!< ADC group regular (available on
|
|
||||||
all STM32 devices) */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported macros -----------------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Private macros ------------------------------------------------------------*/
|
|
||||||
|
|
||||||
/** @defgroup ADCEx_Private_Macro_internal_HAL_driver ADC Extended Private Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Macro reserved for internal HAL driver usage, not intended to be used in */
|
|
||||||
/* code of final user. */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Check whether or not ADC is independent.
|
|
||||||
* @param __HANDLE__ ADC handle.
|
|
||||||
* @note When multimode feature is not available, the macro always returns SET.
|
|
||||||
* @retval SET (ADC is independent) or RESET (ADC is not).
|
|
||||||
*/
|
|
||||||
#define ADC_IS_INDEPENDENT(__HANDLE__) (SET)
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Calibration factor size verification (7 bits maximum).
|
|
||||||
* @param __CALIBRATION_FACTOR__ Calibration factor value.
|
|
||||||
* @retval SET (__CALIBRATION_FACTOR__ is within the authorized size) or RESET (__CALIBRATION_FACTOR__ is too large)
|
|
||||||
*/
|
|
||||||
#define IS_ADC_CALFACT(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) <= (0x7FU))
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Verify the ADC oversampling ratio.
|
|
||||||
* @param __RATIO__ programmed ADC oversampling ratio.
|
|
||||||
* @retval SET (__RATIO__ is a valid value) or RESET (__RATIO__ is invalid)
|
|
||||||
*/
|
|
||||||
#define IS_ADC_OVERSAMPLING_RATIO(__RATIO__) (((__RATIO__) == ADC_OVERSAMPLING_RATIO_2 ) || \
|
|
||||||
((__RATIO__) == ADC_OVERSAMPLING_RATIO_4 ) || \
|
|
||||||
((__RATIO__) == ADC_OVERSAMPLING_RATIO_8 ) || \
|
|
||||||
((__RATIO__) == ADC_OVERSAMPLING_RATIO_16 ) || \
|
|
||||||
((__RATIO__) == ADC_OVERSAMPLING_RATIO_32 ) || \
|
|
||||||
((__RATIO__) == ADC_OVERSAMPLING_RATIO_64 ) || \
|
|
||||||
((__RATIO__) == ADC_OVERSAMPLING_RATIO_128 ) || \
|
|
||||||
((__RATIO__) == ADC_OVERSAMPLING_RATIO_256 ))
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Verify the ADC oversampling shift.
|
|
||||||
* @param __SHIFT__ programmed ADC oversampling shift.
|
|
||||||
* @retval SET (__SHIFT__ is a valid value) or RESET (__SHIFT__ is invalid)
|
|
||||||
*/
|
|
||||||
#define IS_ADC_RIGHT_BIT_SHIFT(__SHIFT__) (((__SHIFT__) == ADC_RIGHTBITSHIFT_NONE) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_1 ) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_2 ) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_3 ) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_4 ) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_5 ) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_6 ) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_7 ) || \
|
|
||||||
((__SHIFT__) == ADC_RIGHTBITSHIFT_8 ))
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Verify the ADC oversampling triggered mode.
|
|
||||||
* @param __MODE__ programmed ADC oversampling triggered mode.
|
|
||||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
|
||||||
*/
|
|
||||||
#define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
|
|
||||||
((__MODE__) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
|
||||||
/** @addtogroup ADCEx_Exported_Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup ADCEx_Exported_Functions_Group1
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* IO operation functions *****************************************************/
|
|
||||||
|
|
||||||
/* ADC calibration */
|
|
||||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc);
|
|
||||||
uint32_t HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef *hadc);
|
|
||||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t CalibrationFactor);
|
|
||||||
|
|
||||||
/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
|
|
||||||
void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc);
|
|
||||||
void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc);
|
|
||||||
void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc);
|
|
||||||
void HAL_ADCEx_ChannelConfigReadyCallback(ADC_HandleTypeDef *hadc);
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup ADCEx_Exported_Functions_Group2
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Peripheral Control functions ***********************************************/
|
|
||||||
HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc);
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* STM32G0xx_HAL_ADC_EX_H */
|
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,409 +0,0 @@
|
|||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file stm32g0xx_hal_adc_ex.c
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @brief This file provides firmware functions to manage the following
|
|
||||||
* functionalities of the Analog to Digital Converter (ADC)
|
|
||||||
* peripheral:
|
|
||||||
* + Peripheral Control functions
|
|
||||||
* Other functions (generic functions) are available in file
|
|
||||||
* "stm32g0xx_hal_adc.c".
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2018 STMicroelectronics.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
|
||||||
* in the root directory of this software component.
|
|
||||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
@verbatim
|
|
||||||
[..]
|
|
||||||
(@) Sections "ADC peripheral features" and "How to use this driver" are
|
|
||||||
available in file of generic functions "stm32g0xx_hal_adc.c".
|
|
||||||
[..]
|
|
||||||
@endverbatim
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
|
||||||
#include "stm32g0xx_hal.h"
|
|
||||||
|
|
||||||
/** @addtogroup STM32G0xx_HAL_Driver
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup ADCEx ADCEx
|
|
||||||
* @brief ADC Extended HAL module driver
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef HAL_ADC_MODULE_ENABLED
|
|
||||||
|
|
||||||
/* Private typedef -----------------------------------------------------------*/
|
|
||||||
/* Private define ------------------------------------------------------------*/
|
|
||||||
|
|
||||||
/** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Fixed timeout value for ADC calibration. */
|
|
||||||
/* Values defined to be higher than worst cases: maximum ratio between ADC */
|
|
||||||
/* and CPU clock frequencies. */
|
|
||||||
/* Example of profile low frequency : ADC frequency at 31.25kHz (ADC clock */
|
|
||||||
/* source PLL 8MHz, ADC clock prescaler 256), CPU frequency 52MHz. */
|
|
||||||
/* Calibration time max = 116 / fADC (refer to datasheet) */
|
|
||||||
/* = 193 024 CPU cycles */
|
|
||||||
#define ADC_CALIBRATION_TIMEOUT (193024UL) /*!< ADC calibration time-out value (unit: CPU cycles) */
|
|
||||||
#define ADC_DISABLE_TIMEOUT (2UL)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Private macro -------------------------------------------------------------*/
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
|
||||||
|
|
||||||
/** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
|
|
||||||
* @brief Extended IO operation functions
|
|
||||||
*
|
|
||||||
@verbatim
|
|
||||||
===============================================================================
|
|
||||||
##### IO operation functions #####
|
|
||||||
===============================================================================
|
|
||||||
[..] This section provides functions allowing to:
|
|
||||||
|
|
||||||
(+) Perform the ADC self-calibration.
|
|
||||||
(+) Get calibration factors.
|
|
||||||
(+) Set calibration factors.
|
|
||||||
|
|
||||||
@endverbatim
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Perform an ADC automatic self-calibration
|
|
||||||
* Calibration prerequisite: ADC must be disabled (execute this
|
|
||||||
* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
|
|
||||||
* @note Calibration factor can be read after calibration, using function
|
|
||||||
* HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]).
|
|
||||||
* @param hadc ADC handle
|
|
||||||
* @retval HAL status
|
|
||||||
*/
|
|
||||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc)
|
|
||||||
{
|
|
||||||
HAL_StatusTypeDef tmp_hal_status;
|
|
||||||
__IO uint32_t wait_loop_index = 0UL;
|
|
||||||
uint32_t backup_setting_cfgr1;
|
|
||||||
uint32_t calibration_index;
|
|
||||||
uint32_t calibration_factor_accumulated = 0;
|
|
||||||
uint32_t tickstart;
|
|
||||||
uint32_t adc_clk_async_presc;
|
|
||||||
__IO uint32_t delay_cpu_cycles;
|
|
||||||
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
|
|
||||||
|
|
||||||
__HAL_LOCK(hadc);
|
|
||||||
|
|
||||||
/* Calibration prerequisite: ADC must be disabled. */
|
|
||||||
|
|
||||||
/* Disable the ADC (if not already disabled) */
|
|
||||||
tmp_hal_status = ADC_Disable(hadc);
|
|
||||||
|
|
||||||
/* Check if ADC is effectively disabled */
|
|
||||||
if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
|
|
||||||
{
|
|
||||||
/* Set ADC state */
|
|
||||||
ADC_STATE_CLR_SET(hadc->State,
|
|
||||||
HAL_ADC_STATE_REG_BUSY,
|
|
||||||
HAL_ADC_STATE_BUSY_INTERNAL);
|
|
||||||
|
|
||||||
/* Manage settings impacting calibration */
|
|
||||||
/* - Disable ADC mode auto power-off */
|
|
||||||
/* - Disable ADC DMA transfer request during calibration */
|
|
||||||
/* Note: Specificity of this STM32 series: Calibration factor is */
|
|
||||||
/* available in data register and also transferred by DMA. */
|
|
||||||
/* To not insert ADC calibration factor among ADC conversion data */
|
|
||||||
/* in array variable, DMA transfer must be disabled during */
|
|
||||||
/* calibration. */
|
|
||||||
backup_setting_cfgr1 = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG | ADC_CFGR1_AUTOFF);
|
|
||||||
CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG | ADC_CFGR1_AUTOFF);
|
|
||||||
|
|
||||||
/* ADC calibration procedure */
|
|
||||||
/* Note: Perform an averaging of 8 calibrations for optimized accuracy */
|
|
||||||
for (calibration_index = 0UL; calibration_index < 8UL; calibration_index++)
|
|
||||||
{
|
|
||||||
/* Start ADC calibration */
|
|
||||||
LL_ADC_StartCalibration(hadc->Instance);
|
|
||||||
|
|
||||||
/* Wait for calibration completion */
|
|
||||||
while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
|
|
||||||
{
|
|
||||||
wait_loop_index++;
|
|
||||||
if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
|
|
||||||
{
|
|
||||||
/* Update ADC state machine to error */
|
|
||||||
ADC_STATE_CLR_SET(hadc->State,
|
|
||||||
HAL_ADC_STATE_BUSY_INTERNAL,
|
|
||||||
HAL_ADC_STATE_ERROR_INTERNAL);
|
|
||||||
|
|
||||||
__HAL_UNLOCK(hadc);
|
|
||||||
|
|
||||||
return HAL_ERROR;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
calibration_factor_accumulated += LL_ADC_GetCalibrationFactor(hadc->Instance);
|
|
||||||
}
|
|
||||||
/* Compute average */
|
|
||||||
calibration_factor_accumulated /= calibration_index;
|
|
||||||
|
|
||||||
/* Apply calibration factor (requires ADC enable and disable process) */
|
|
||||||
LL_ADC_Enable(hadc->Instance);
|
|
||||||
|
|
||||||
/* Case of ADC clocked at low frequency: Delay required between ADC enable and disable actions */
|
|
||||||
if (LL_ADC_GetClock(hadc->Instance) == LL_ADC_CLOCK_ASYNC)
|
|
||||||
{
|
|
||||||
adc_clk_async_presc = LL_ADC_GetCommonClock(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
|
|
||||||
|
|
||||||
if (adc_clk_async_presc >= LL_ADC_CLOCK_ASYNC_DIV16)
|
|
||||||
{
|
|
||||||
/* Delay loop initialization and execution */
|
|
||||||
/* Delay depends on ADC clock prescaler: Compute ADC clock asynchronous prescaler to decimal format */
|
|
||||||
delay_cpu_cycles = (1UL << ((adc_clk_async_presc >> ADC_CCR_PRESC_Pos) - 3UL));
|
|
||||||
/* Divide variable by 2 to compensate partially CPU processing cycles */
|
|
||||||
delay_cpu_cycles >>= 1UL;
|
|
||||||
|
|
||||||
while (delay_cpu_cycles != 0UL)
|
|
||||||
{
|
|
||||||
delay_cpu_cycles--;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
LL_ADC_SetCalibrationFactor(hadc->Instance, calibration_factor_accumulated);
|
|
||||||
LL_ADC_Disable(hadc->Instance);
|
|
||||||
|
|
||||||
/* Wait for ADC effectively disabled before changing configuration */
|
|
||||||
/* Get tick count */
|
|
||||||
tickstart = HAL_GetTick();
|
|
||||||
|
|
||||||
while (LL_ADC_IsEnabled(hadc->Instance) != 0UL)
|
|
||||||
{
|
|
||||||
if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
|
|
||||||
{
|
|
||||||
/* New check to avoid false timeout detection in case of preemption */
|
|
||||||
if (LL_ADC_IsEnabled(hadc->Instance) != 0UL)
|
|
||||||
{
|
|
||||||
/* Update ADC state machine to error */
|
|
||||||
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
|
|
||||||
|
|
||||||
/* Set ADC error code to ADC peripheral internal error */
|
|
||||||
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
|
|
||||||
|
|
||||||
return HAL_ERROR;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Restore configuration after calibration */
|
|
||||||
SET_BIT(hadc->Instance->CFGR1, backup_setting_cfgr1);
|
|
||||||
|
|
||||||
/* Set ADC state */
|
|
||||||
ADC_STATE_CLR_SET(hadc->State,
|
|
||||||
HAL_ADC_STATE_BUSY_INTERNAL,
|
|
||||||
HAL_ADC_STATE_READY);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
|
|
||||||
|
|
||||||
/* Note: No need to update variable "tmp_hal_status" here: already set */
|
|
||||||
/* to state "HAL_ERROR" by function disabling the ADC. */
|
|
||||||
}
|
|
||||||
|
|
||||||
__HAL_UNLOCK(hadc);
|
|
||||||
|
|
||||||
return tmp_hal_status;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Get the calibration factor.
|
|
||||||
* @param hadc ADC handle.
|
|
||||||
* @retval Calibration value.
|
|
||||||
*/
|
|
||||||
uint32_t HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef *hadc)
|
|
||||||
{
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
|
|
||||||
|
|
||||||
/* Return the selected ADC calibration value */
|
|
||||||
return ((hadc->Instance->CALFACT) & 0x0000007FU);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Set the calibration factor to overwrite automatic conversion result.
|
|
||||||
* ADC must be enabled and no conversion is ongoing.
|
|
||||||
* @param hadc ADC handle
|
|
||||||
* @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
|
|
||||||
* @retval HAL state
|
|
||||||
*/
|
|
||||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t CalibrationFactor)
|
|
||||||
{
|
|
||||||
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
|
|
||||||
uint32_t tmp_adc_is_conversion_on_going_regular;
|
|
||||||
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
|
|
||||||
assert_param(IS_ADC_CALFACT(CalibrationFactor));
|
|
||||||
|
|
||||||
__HAL_LOCK(hadc);
|
|
||||||
|
|
||||||
/* Verification of hardware constraints before modifying the calibration */
|
|
||||||
/* factors register: ADC must be enabled, no conversion on going. */
|
|
||||||
tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
|
|
||||||
|
|
||||||
if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL)
|
|
||||||
&& (tmp_adc_is_conversion_on_going_regular == 0UL)
|
|
||||||
)
|
|
||||||
{
|
|
||||||
hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT;
|
|
||||||
hadc->Instance->CALFACT |= CalibrationFactor;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* Update ADC state machine */
|
|
||||||
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
|
|
||||||
/* Update ADC error code */
|
|
||||||
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
|
|
||||||
|
|
||||||
/* Update ADC state machine to error */
|
|
||||||
tmp_hal_status = HAL_ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
__HAL_UNLOCK(hadc);
|
|
||||||
|
|
||||||
return tmp_hal_status;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Analog watchdog 2 callback in non-blocking mode.
|
|
||||||
* @param hadc ADC handle
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
__weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc)
|
|
||||||
{
|
|
||||||
/* Prevent unused argument(s) compilation warning */
|
|
||||||
UNUSED(hadc);
|
|
||||||
|
|
||||||
/* NOTE : This function should not be modified. When the callback is needed,
|
|
||||||
function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
|
|
||||||
*/
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Analog watchdog 3 callback in non-blocking mode.
|
|
||||||
* @param hadc ADC handle
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
__weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc)
|
|
||||||
{
|
|
||||||
/* Prevent unused argument(s) compilation warning */
|
|
||||||
UNUSED(hadc);
|
|
||||||
|
|
||||||
/* NOTE : This function should not be modified. When the callback is needed,
|
|
||||||
function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
|
|
||||||
*/
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief End Of Sampling callback in non-blocking mode.
|
|
||||||
* @param hadc ADC handle
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
__weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc)
|
|
||||||
{
|
|
||||||
/* Prevent unused argument(s) compilation warning */
|
|
||||||
UNUSED(hadc);
|
|
||||||
|
|
||||||
/* NOTE : This function should not be modified. When the callback is needed,
|
|
||||||
function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
|
|
||||||
*/
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief ADC channel configuration ready callback in non-blocking mode.
|
|
||||||
* @param hadc ADC handle
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
__weak void HAL_ADCEx_ChannelConfigReadyCallback(ADC_HandleTypeDef *hadc)
|
|
||||||
{
|
|
||||||
/* Prevent unused argument(s) compilation warning */
|
|
||||||
UNUSED(hadc);
|
|
||||||
|
|
||||||
/* NOTE : This function should not be modified. When the callback is needed,
|
|
||||||
function HAL_ADCEx_ChannelConfigReadyCallback must be implemented in the user file.
|
|
||||||
*/
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Disable ADC voltage regulator.
|
|
||||||
* @note Disabling voltage regulator allows to save power. This operation can
|
|
||||||
* be carried out only when ADC is disabled.
|
|
||||||
* @note To enable again the voltage regulator, the user is expected to
|
|
||||||
* resort to HAL_ADC_Init() API.
|
|
||||||
* @param hadc ADC handle
|
|
||||||
* @retval HAL status
|
|
||||||
*/
|
|
||||||
HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc)
|
|
||||||
{
|
|
||||||
HAL_StatusTypeDef tmp_hal_status;
|
|
||||||
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
|
|
||||||
|
|
||||||
/* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
|
|
||||||
if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
|
|
||||||
{
|
|
||||||
LL_ADC_DisableInternalRegulator(hadc->Instance);
|
|
||||||
tmp_hal_status = HAL_OK;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
tmp_hal_status = HAL_ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
return tmp_hal_status;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
@ -1,778 +0,0 @@
|
|||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file stm32g0xx_ll_adc.c
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @brief ADC LL module driver
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2018 STMicroelectronics.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
|
||||||
* in the root directory of this software component.
|
|
||||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
#if defined(USE_FULL_LL_DRIVER)
|
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
|
||||||
#include "stm32g0xx_ll_adc.h"
|
|
||||||
#include "stm32g0xx_ll_bus.h"
|
|
||||||
|
|
||||||
#ifdef USE_FULL_ASSERT
|
|
||||||
#include "stm32_assert.h"
|
|
||||||
#else
|
|
||||||
#define assert_param(expr) ((void)0U)
|
|
||||||
#endif /* USE_FULL_ASSERT */
|
|
||||||
|
|
||||||
/** @addtogroup STM32G0xx_LL_Driver
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#if defined (ADC1)
|
|
||||||
|
|
||||||
/** @addtogroup ADC_LL ADC
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Private types -------------------------------------------------------------*/
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
|
||||||
/* Private constants ---------------------------------------------------------*/
|
|
||||||
/** @addtogroup ADC_LL_Private_Constants
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Definitions of ADC hardware constraints delays */
|
|
||||||
/* Note: Only ADC peripheral HW delays are defined in ADC LL driver driver, */
|
|
||||||
/* not timeout values: */
|
|
||||||
/* Timeout values for ADC operations are dependent to device clock */
|
|
||||||
/* configuration (system clock versus ADC clock), */
|
|
||||||
/* and therefore must be defined in user application. */
|
|
||||||
/* Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout */
|
|
||||||
/* values definition. */
|
|
||||||
/* Note: ADC timeout values are defined here in CPU cycles to be independent */
|
|
||||||
/* of device clock setting. */
|
|
||||||
/* In user application, ADC timeout values should be defined with */
|
|
||||||
/* temporal values, in function of device clock settings. */
|
|
||||||
/* Highest ratio CPU clock frequency vs ADC clock frequency: */
|
|
||||||
/* - ADC clock from synchronous clock with AHB prescaler 512, */
|
|
||||||
/* APB prescaler 16, ADC prescaler 4. */
|
|
||||||
/* - ADC clock from asynchronous clock (HSI) with prescaler 1, */
|
|
||||||
/* with highest ratio CPU clock frequency vs HSI clock frequency: */
|
|
||||||
/* CPU clock frequency max 56MHz, HSI frequency 16MHz: ratio 4. */
|
|
||||||
/* Unit: CPU cycles. */
|
|
||||||
#define ADC_CLOCK_RATIO_VS_CPU_HIGHEST (512UL * 16UL * 4UL)
|
|
||||||
#define ADC_TIMEOUT_DISABLE_CPU_CYCLES (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1UL)
|
|
||||||
#define ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1UL)
|
|
||||||
/* Note: CCRDY handshake requires 1APB + 2 ADC + 3 APB cycles */
|
|
||||||
/* after the channel configuration has been changed. */
|
|
||||||
/* Driver timeout is approximated to 6 CPU cycles. */
|
|
||||||
#define ADC_TIMEOUT_CCRDY_CPU_CYCLES (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 6UL)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Private macros ------------------------------------------------------------*/
|
|
||||||
|
|
||||||
/** @addtogroup ADC_LL_Private_Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Check of parameters for configuration of ADC hierarchical scope: */
|
|
||||||
/* common to several ADC instances. */
|
|
||||||
#define IS_LL_ADC_COMMON_CLOCK(__CLOCK__) \
|
|
||||||
(((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV1) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV2) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV4) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV6) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV8) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV10) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV12) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV16) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV32) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV64) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV128) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV256) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_CLOCK_FREQ_MODE(__CLOCK_FREQ_MODE__) \
|
|
||||||
(((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_HIGH) \
|
|
||||||
|| ((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_LOW) \
|
|
||||||
)
|
|
||||||
|
|
||||||
/* Check of parameters for configuration of ADC hierarchical scope: */
|
|
||||||
/* ADC instance. */
|
|
||||||
#define IS_LL_ADC_CLOCK(__CLOCK__) \
|
|
||||||
(((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV1) \
|
|
||||||
|| ((__CLOCK__) == LL_ADC_CLOCK_ASYNC) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_RESOLUTION(__RESOLUTION__) \
|
|
||||||
(((__RESOLUTION__) == LL_ADC_RESOLUTION_12B) \
|
|
||||||
|| ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B) \
|
|
||||||
|| ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B) \
|
|
||||||
|| ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__) \
|
|
||||||
(((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT) \
|
|
||||||
|| ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_LOW_POWER(__LOW_POWER__) \
|
|
||||||
(((__LOW_POWER__) == LL_ADC_LP_MODE_NONE) \
|
|
||||||
|| ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT) \
|
|
||||||
|| ((__LOW_POWER__) == LL_ADC_LP_AUTOPOWEROFF) \
|
|
||||||
|| ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF) \
|
|
||||||
)
|
|
||||||
|
|
||||||
/* Check of parameters for configuration of ADC hierarchical scope: */
|
|
||||||
/* ADC group regular */
|
|
||||||
#if defined(TIM15) && defined(TIM6) && defined(TIM2)
|
|
||||||
#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
|
|
||||||
(((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_TRGO2) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH4 ) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM6_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM15_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
|
|
||||||
)
|
|
||||||
#elif defined(TIM15) && defined(TIM6)
|
|
||||||
#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
|
|
||||||
(((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_TRGO2) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH4 ) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM6_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM15_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
|
|
||||||
)
|
|
||||||
#elif defined(TIM2)
|
|
||||||
#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
|
|
||||||
(((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_TRGO2) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH4 ) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
|
|
||||||
)
|
|
||||||
#else
|
|
||||||
#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
|
|
||||||
(((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_TRGO2) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH4 ) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
|
|
||||||
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
|
|
||||||
)
|
|
||||||
#endif /* TIM15 && TIM6 && TIM2 */
|
|
||||||
|
|
||||||
#define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__) \
|
|
||||||
(((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE) \
|
|
||||||
|| ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__) \
|
|
||||||
(((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE) \
|
|
||||||
|| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED) \
|
|
||||||
|| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(__REG_OVR_DATA_BEHAVIOR__) \
|
|
||||||
(((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_PRESERVED) \
|
|
||||||
|| ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_OVERWRITTEN) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_REG_SEQ_MODE(__REG_SEQ_MODE__) \
|
|
||||||
(((__REG_SEQ_MODE__) == LL_ADC_REG_SEQ_FIXED) \
|
|
||||||
|| ((__REG_SEQ_MODE__) == LL_ADC_REG_SEQ_CONFIGURABLE) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_REG_SEQ_SCAN_LENGTH(__REG_SEQ_SCAN_LENGTH__) \
|
|
||||||
(((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_DISABLE) \
|
|
||||||
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS) \
|
|
||||||
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS) \
|
|
||||||
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS) \
|
|
||||||
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS) \
|
|
||||||
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS) \
|
|
||||||
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS) \
|
|
||||||
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS) \
|
|
||||||
)
|
|
||||||
|
|
||||||
#define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__) \
|
|
||||||
(((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE) \
|
|
||||||
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK) \
|
|
||||||
)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
|
||||||
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
|
||||||
/** @addtogroup ADC_LL_Exported_Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup ADC_LL_EF_Init
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief De-initialize registers of all ADC instances belonging to
|
|
||||||
* the same ADC common instance to their default reset values.
|
|
||||||
* @note This function is performing a hard reset, using high level
|
|
||||||
* clock source RCC ADC reset.
|
|
||||||
* @param ADCxy_COMMON ADC common instance
|
|
||||||
* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
|
|
||||||
* @retval An ErrorStatus enumeration value:
|
|
||||||
* - SUCCESS: ADC common registers are de-initialized
|
|
||||||
* - ERROR: not applicable
|
|
||||||
*/
|
|
||||||
ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
|
|
||||||
{
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
|
|
||||||
|
|
||||||
/* Prevent unused argument(s) compilation warning if no assert_param check */
|
|
||||||
(void)(ADCxy_COMMON);
|
|
||||||
|
|
||||||
/* Force reset of ADC clock (core clock) */
|
|
||||||
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_ADC);
|
|
||||||
|
|
||||||
/* Release reset of ADC clock (core clock) */
|
|
||||||
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_ADC);
|
|
||||||
|
|
||||||
return SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Initialize some features of ADC common parameters
|
|
||||||
* (all ADC instances belonging to the same ADC common instance)
|
|
||||||
* and multimode (for devices with several ADC instances available).
|
|
||||||
* @note The setting of ADC common parameters is conditioned to
|
|
||||||
* ADC instances state:
|
|
||||||
* All ADC instances belonging to the same ADC common instance
|
|
||||||
* must be disabled.
|
|
||||||
* @param ADCxy_COMMON ADC common instance
|
|
||||||
* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
|
|
||||||
* @param pADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
|
|
||||||
* @retval An ErrorStatus enumeration value:
|
|
||||||
* - SUCCESS: ADC common registers are initialized
|
|
||||||
* - ERROR: ADC common registers are not initialized
|
|
||||||
*/
|
|
||||||
ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef *ADCxy_COMMON, const LL_ADC_CommonInitTypeDef *pADC_CommonInitStruct)
|
|
||||||
{
|
|
||||||
ErrorStatus status = SUCCESS;
|
|
||||||
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
|
|
||||||
assert_param(IS_LL_ADC_COMMON_CLOCK(pADC_CommonInitStruct->CommonClock));
|
|
||||||
|
|
||||||
/* Note: Hardware constraint (refer to description of functions */
|
|
||||||
/* "LL_ADC_SetCommonXXX()": */
|
|
||||||
/* On this STM32 series, setting of these features is conditioned to */
|
|
||||||
/* ADC state: */
|
|
||||||
/* All ADC instances of the ADC common group must be disabled. */
|
|
||||||
if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(ADCxy_COMMON) == 0UL)
|
|
||||||
{
|
|
||||||
/* Configuration of ADC hierarchical scope: */
|
|
||||||
/* - common to several ADC */
|
|
||||||
/* (all ADC instances belonging to the same ADC common instance) */
|
|
||||||
/* - Set ADC clock (conversion clock) */
|
|
||||||
LL_ADC_SetCommonClock(ADCxy_COMMON, pADC_CommonInitStruct->CommonClock);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* Initialization error: One or several ADC instances belonging to */
|
|
||||||
/* the same ADC common instance are not disabled. */
|
|
||||||
status = ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
return status;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Set each @ref LL_ADC_CommonInitTypeDef field to default value.
|
|
||||||
* @param pADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
|
|
||||||
* whose fields will be set to default values.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *pADC_CommonInitStruct)
|
|
||||||
{
|
|
||||||
/* Set pADC_CommonInitStruct fields to default values */
|
|
||||||
/* Set fields of ADC common */
|
|
||||||
/* (all ADC instances belonging to the same ADC common instance) */
|
|
||||||
pADC_CommonInitStruct->CommonClock = LL_ADC_CLOCK_ASYNC_DIV2;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief De-initialize registers of the selected ADC instance
|
|
||||||
* to their default reset values.
|
|
||||||
* @note To reset all ADC instances quickly (perform a hard reset),
|
|
||||||
* use function @ref LL_ADC_CommonDeInit().
|
|
||||||
* @note If this functions returns error status, it means that ADC instance
|
|
||||||
* is in an unknown state.
|
|
||||||
* In this case, perform a hard reset using high level
|
|
||||||
* clock source RCC ADC reset.
|
|
||||||
* Refer to function @ref LL_ADC_CommonDeInit().
|
|
||||||
* @param ADCx ADC instance
|
|
||||||
* @retval An ErrorStatus enumeration value:
|
|
||||||
* - SUCCESS: ADC registers are de-initialized
|
|
||||||
* - ERROR: ADC registers are not de-initialized
|
|
||||||
*/
|
|
||||||
ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
|
|
||||||
{
|
|
||||||
ErrorStatus status = SUCCESS;
|
|
||||||
|
|
||||||
__IO uint32_t timeout_cpu_cycles = 0UL;
|
|
||||||
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_ALL_INSTANCE(ADCx));
|
|
||||||
|
|
||||||
/* Disable ADC instance if not already disabled. */
|
|
||||||
if (LL_ADC_IsEnabled(ADCx) == 1UL)
|
|
||||||
{
|
|
||||||
/* Stop potential ADC conversion on going on ADC group regular. */
|
|
||||||
LL_ADC_REG_StopConversion(ADCx);
|
|
||||||
|
|
||||||
/* Wait for ADC conversions are effectively stopped */
|
|
||||||
timeout_cpu_cycles = ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES;
|
|
||||||
while (LL_ADC_REG_IsStopConversionOngoing(ADCx) == 1UL)
|
|
||||||
{
|
|
||||||
timeout_cpu_cycles--;
|
|
||||||
if (timeout_cpu_cycles == 0UL)
|
|
||||||
{
|
|
||||||
/* Time-out error */
|
|
||||||
status = ERROR;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Disable the ADC instance */
|
|
||||||
LL_ADC_Disable(ADCx);
|
|
||||||
|
|
||||||
/* Wait for ADC instance is effectively disabled */
|
|
||||||
timeout_cpu_cycles = ADC_TIMEOUT_DISABLE_CPU_CYCLES;
|
|
||||||
while (LL_ADC_IsDisableOngoing(ADCx) == 1UL)
|
|
||||||
{
|
|
||||||
timeout_cpu_cycles--;
|
|
||||||
if (timeout_cpu_cycles == 0UL)
|
|
||||||
{
|
|
||||||
/* Time-out error */
|
|
||||||
status = ERROR;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Check whether ADC state is compliant with expected state */
|
|
||||||
if (READ_BIT(ADCx->CR,
|
|
||||||
(ADC_CR_ADSTP | ADC_CR_ADSTART
|
|
||||||
| ADC_CR_ADDIS | ADC_CR_ADEN)
|
|
||||||
)
|
|
||||||
== 0UL)
|
|
||||||
{
|
|
||||||
/* ========== Reset ADC registers ========== */
|
|
||||||
/* Reset register IER */
|
|
||||||
CLEAR_BIT(ADCx->IER,
|
|
||||||
(LL_ADC_IT_ADRDY
|
|
||||||
| LL_ADC_IT_EOC
|
|
||||||
| LL_ADC_IT_EOS
|
|
||||||
| LL_ADC_IT_OVR
|
|
||||||
| LL_ADC_IT_EOSMP
|
|
||||||
| LL_ADC_IT_AWD1
|
|
||||||
| LL_ADC_IT_AWD2
|
|
||||||
| LL_ADC_IT_AWD3
|
|
||||||
| LL_ADC_IT_EOCAL
|
|
||||||
| LL_ADC_IT_CCRDY
|
|
||||||
)
|
|
||||||
);
|
|
||||||
|
|
||||||
/* Reset register ISR */
|
|
||||||
SET_BIT(ADCx->ISR,
|
|
||||||
(LL_ADC_FLAG_ADRDY
|
|
||||||
| LL_ADC_FLAG_EOC
|
|
||||||
| LL_ADC_FLAG_EOS
|
|
||||||
| LL_ADC_FLAG_OVR
|
|
||||||
| LL_ADC_FLAG_EOSMP
|
|
||||||
| LL_ADC_FLAG_AWD1
|
|
||||||
| LL_ADC_FLAG_AWD2
|
|
||||||
| LL_ADC_FLAG_AWD3
|
|
||||||
| LL_ADC_FLAG_EOCAL
|
|
||||||
| LL_ADC_FLAG_CCRDY
|
|
||||||
)
|
|
||||||
);
|
|
||||||
|
|
||||||
/* Reset register CR */
|
|
||||||
/* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */
|
|
||||||
/* "read-set": no direct reset applicable. */
|
|
||||||
CLEAR_BIT(ADCx->CR, ADC_CR_ADVREGEN);
|
|
||||||
|
|
||||||
/* Reset register CFGR1 */
|
|
||||||
CLEAR_BIT(ADCx->CFGR1,
|
|
||||||
(ADC_CFGR1_AWD1CH | ADC_CFGR1_AWD1EN | ADC_CFGR1_AWD1SGL | ADC_CFGR1_DISCEN
|
|
||||||
| ADC_CFGR1_CHSELRMOD | ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD
|
|
||||||
| ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES
|
|
||||||
| ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN)
|
|
||||||
);
|
|
||||||
|
|
||||||
/* Reset register SMPR */
|
|
||||||
CLEAR_BIT(ADCx->SMPR, ADC_SMPR_SMP1 | ADC_SMPR_SMP2 | ADC_SMPR_SMPSEL);
|
|
||||||
|
|
||||||
/* Reset register CHSELR */
|
|
||||||
CLEAR_BIT(ADCx->CHSELR,
|
|
||||||
(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16
|
|
||||||
| ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
|
|
||||||
| ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8
|
|
||||||
| ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4
|
|
||||||
| ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0)
|
|
||||||
);
|
|
||||||
|
|
||||||
/* Reset register AWD1TR */
|
|
||||||
MODIFY_REG(ADCx->AWD1TR, ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1, ADC_AWD1TR_HT1);
|
|
||||||
|
|
||||||
/* Reset register AWD2TR */
|
|
||||||
MODIFY_REG(ADCx->AWD2TR, ADC_AWD2TR_HT2 | ADC_AWD2TR_LT2, ADC_AWD2TR_HT2);
|
|
||||||
|
|
||||||
/* Reset register AWD3TR */
|
|
||||||
MODIFY_REG(ADCx->AWD3TR, ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3, ADC_AWD3TR_HT3);
|
|
||||||
|
|
||||||
/* Wait for ADC channel configuration ready */
|
|
||||||
timeout_cpu_cycles = ADC_TIMEOUT_CCRDY_CPU_CYCLES;
|
|
||||||
while (LL_ADC_IsActiveFlag_CCRDY(ADCx) == 0UL)
|
|
||||||
{
|
|
||||||
timeout_cpu_cycles--;
|
|
||||||
if (timeout_cpu_cycles == 0UL)
|
|
||||||
{
|
|
||||||
/* Time-out error */
|
|
||||||
status = ERROR;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Clear flag ADC channel configuration ready */
|
|
||||||
LL_ADC_ClearFlag_CCRDY(ADCx);
|
|
||||||
|
|
||||||
/* Reset register DR */
|
|
||||||
/* bits in access mode read only, no direct reset applicable */
|
|
||||||
|
|
||||||
/* Reset register CALFACT */
|
|
||||||
CLEAR_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT);
|
|
||||||
|
|
||||||
/* Reset register CFGR2 */
|
|
||||||
/* Note: CFGR2 reset done at the end of de-initialization due to */
|
|
||||||
/* clock source reset */
|
|
||||||
/* Note: Update of ADC clock mode is conditioned to ADC state disabled: */
|
|
||||||
/* already done above. */
|
|
||||||
CLEAR_BIT(ADCx->CFGR2,
|
|
||||||
(ADC_CFGR2_CKMODE
|
|
||||||
| ADC_CFGR2_TOVS | ADC_CFGR2_OVSS | ADC_CFGR2_OVSR
|
|
||||||
| ADC_CFGR2_OVSE)
|
|
||||||
);
|
|
||||||
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* ADC instance is in an unknown state */
|
|
||||||
/* Need to performing a hard reset of ADC instance, using high level */
|
|
||||||
/* clock source RCC ADC reset. */
|
|
||||||
/* Caution: On this STM32 series, if several ADC instances are available */
|
|
||||||
/* on the selected device, RCC ADC reset will reset */
|
|
||||||
/* all ADC instances belonging to the common ADC instance. */
|
|
||||||
status = ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
return status;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Initialize some features of ADC instance.
|
|
||||||
* @note These parameters have an impact on ADC scope: ADC instance.
|
|
||||||
* Refer to corresponding unitary functions into
|
|
||||||
* @ref ADC_LL_EF_Configuration_ADC_Instance .
|
|
||||||
* @note The setting of these parameters by function @ref LL_ADC_Init()
|
|
||||||
* is conditioned to ADC state:
|
|
||||||
* ADC instance must be disabled.
|
|
||||||
* This condition is applied to all ADC features, for efficiency
|
|
||||||
* and compatibility over all STM32 series. However, the different
|
|
||||||
* features can be set under different ADC state conditions
|
|
||||||
* (setting possible with ADC enabled without conversion on going,
|
|
||||||
* ADC enabled with conversion on going, ...)
|
|
||||||
* Each feature can be updated afterwards with a unitary function
|
|
||||||
* and potentially with ADC in a different state than disabled,
|
|
||||||
* refer to description of each function for setting
|
|
||||||
* conditioned to ADC state.
|
|
||||||
* @note After using this function, some other features must be configured
|
|
||||||
* using LL unitary functions.
|
|
||||||
* The minimum configuration remaining to be done is:
|
|
||||||
* - Set ADC group regular sequencer:
|
|
||||||
* Depending on the sequencer mode (refer to
|
|
||||||
* function @ref LL_ADC_REG_SetSequencerConfigurable() ):
|
|
||||||
* - map channel on the selected sequencer rank.
|
|
||||||
* Refer to function @ref LL_ADC_REG_SetSequencerRanks();
|
|
||||||
* - map channel on rank corresponding to channel number.
|
|
||||||
* Refer to function @ref LL_ADC_REG_SetSequencerChannels();
|
|
||||||
* - Set ADC channel sampling time
|
|
||||||
* Refer to function LL_ADC_SetSamplingTimeCommonChannels();
|
|
||||||
* Refer to function LL_ADC_SetChannelSamplingTime();
|
|
||||||
* @param ADCx ADC instance
|
|
||||||
* @param pADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
|
|
||||||
* @retval An ErrorStatus enumeration value:
|
|
||||||
* - SUCCESS: ADC registers are initialized
|
|
||||||
* - ERROR: ADC registers are not initialized
|
|
||||||
*/
|
|
||||||
ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, const LL_ADC_InitTypeDef *pADC_InitStruct)
|
|
||||||
{
|
|
||||||
ErrorStatus status = SUCCESS;
|
|
||||||
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_ALL_INSTANCE(ADCx));
|
|
||||||
|
|
||||||
assert_param(IS_LL_ADC_CLOCK(pADC_InitStruct->Clock));
|
|
||||||
assert_param(IS_LL_ADC_RESOLUTION(pADC_InitStruct->Resolution));
|
|
||||||
assert_param(IS_LL_ADC_DATA_ALIGN(pADC_InitStruct->DataAlignment));
|
|
||||||
assert_param(IS_LL_ADC_LOW_POWER(pADC_InitStruct->LowPowerMode));
|
|
||||||
|
|
||||||
/* Note: Hardware constraint (refer to description of this function): */
|
|
||||||
/* ADC instance must be disabled. */
|
|
||||||
if (LL_ADC_IsEnabled(ADCx) == 0UL)
|
|
||||||
{
|
|
||||||
/* Configuration of ADC hierarchical scope: */
|
|
||||||
/* - ADC instance */
|
|
||||||
/* - Set ADC data resolution */
|
|
||||||
/* - Set ADC conversion data alignment */
|
|
||||||
/* - Set ADC low power mode */
|
|
||||||
MODIFY_REG(ADCx->CFGR1,
|
|
||||||
ADC_CFGR1_RES
|
|
||||||
| ADC_CFGR1_ALIGN
|
|
||||||
| ADC_CFGR1_WAIT
|
|
||||||
| ADC_CFGR1_AUTOFF
|
|
||||||
,
|
|
||||||
pADC_InitStruct->Resolution
|
|
||||||
| pADC_InitStruct->DataAlignment
|
|
||||||
| pADC_InitStruct->LowPowerMode
|
|
||||||
);
|
|
||||||
|
|
||||||
MODIFY_REG(ADCx->CFGR2,
|
|
||||||
ADC_CFGR2_CKMODE
|
|
||||||
,
|
|
||||||
pADC_InitStruct->Clock
|
|
||||||
);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* Initialization error: ADC instance is not disabled. */
|
|
||||||
status = ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
return status;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Set each @ref LL_ADC_InitTypeDef field to default value.
|
|
||||||
* @param pADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
|
|
||||||
* whose fields will be set to default values.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void LL_ADC_StructInit(LL_ADC_InitTypeDef *pADC_InitStruct)
|
|
||||||
{
|
|
||||||
/* Set pADC_InitStruct fields to default values */
|
|
||||||
/* Set fields of ADC instance */
|
|
||||||
pADC_InitStruct->Clock = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
|
|
||||||
pADC_InitStruct->Resolution = LL_ADC_RESOLUTION_12B;
|
|
||||||
pADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
|
|
||||||
pADC_InitStruct->LowPowerMode = LL_ADC_LP_MODE_NONE;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Initialize some features of ADC group regular.
|
|
||||||
* @note These parameters have an impact on ADC scope: ADC group regular.
|
|
||||||
* Refer to corresponding unitary functions into
|
|
||||||
* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
|
|
||||||
* (functions with prefix "REG").
|
|
||||||
* @note The setting of these parameters by function @ref LL_ADC_Init()
|
|
||||||
* is conditioned to ADC state:
|
|
||||||
* ADC instance must be disabled.
|
|
||||||
* This condition is applied to all ADC features, for efficiency
|
|
||||||
* and compatibility over all STM32 series. However, the different
|
|
||||||
* features can be set under different ADC state conditions
|
|
||||||
* (setting possible with ADC enabled without conversion on going,
|
|
||||||
* ADC enabled with conversion on going, ...)
|
|
||||||
* Each feature can be updated afterwards with a unitary function
|
|
||||||
* and potentially with ADC in a different state than disabled,
|
|
||||||
* refer to description of each function for setting
|
|
||||||
* conditioned to ADC state.
|
|
||||||
* @note Before using this function, ADC group regular sequencer
|
|
||||||
* must be configured: refer to function
|
|
||||||
* @ref LL_ADC_REG_SetSequencerConfigurable().
|
|
||||||
* @note After using this function, other features must be configured
|
|
||||||
* using LL unitary functions.
|
|
||||||
* The minimum configuration remaining to be done is:
|
|
||||||
* - Set ADC group regular sequencer:
|
|
||||||
* Depending on the sequencer mode (refer to
|
|
||||||
* function @ref LL_ADC_REG_SetSequencerConfigurable() ):
|
|
||||||
* - map channel on the selected sequencer rank.
|
|
||||||
* Refer to function @ref LL_ADC_REG_SetSequencerRanks();
|
|
||||||
* - map channel on rank corresponding to channel number.
|
|
||||||
* Refer to function @ref LL_ADC_REG_SetSequencerChannels();
|
|
||||||
* - Set ADC channel sampling time
|
|
||||||
* Refer to function LL_ADC_SetSamplingTimeCommonChannels();
|
|
||||||
* Refer to function LL_ADC_SetChannelSamplingTime();
|
|
||||||
* @param ADCx ADC instance
|
|
||||||
* @param pADC_RegInitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
|
|
||||||
* @retval An ErrorStatus enumeration value:
|
|
||||||
* - SUCCESS: ADC registers are initialized
|
|
||||||
* - ERROR: ADC registers are not initialized
|
|
||||||
*/
|
|
||||||
ErrorStatus LL_ADC_REG_Init(ADC_TypeDef *ADCx, const LL_ADC_REG_InitTypeDef *pADC_RegInitStruct)
|
|
||||||
{
|
|
||||||
ErrorStatus status = SUCCESS;
|
|
||||||
|
|
||||||
/* Check the parameters */
|
|
||||||
assert_param(IS_ADC_ALL_INSTANCE(ADCx));
|
|
||||||
assert_param(IS_LL_ADC_REG_TRIG_SOURCE(pADC_RegInitStruct->TriggerSource));
|
|
||||||
assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(pADC_RegInitStruct->ContinuousMode));
|
|
||||||
assert_param(IS_LL_ADC_REG_DMA_TRANSFER(pADC_RegInitStruct->DMATransfer));
|
|
||||||
assert_param(IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(pADC_RegInitStruct->Overrun));
|
|
||||||
|
|
||||||
if (LL_ADC_REG_GetSequencerConfigurable(ADCx) != LL_ADC_REG_SEQ_FIXED)
|
|
||||||
{
|
|
||||||
assert_param(IS_LL_ADC_REG_SEQ_SCAN_LENGTH(pADC_RegInitStruct->SequencerLength));
|
|
||||||
}
|
|
||||||
|
|
||||||
if ((LL_ADC_REG_GetSequencerConfigurable(ADCx) == LL_ADC_REG_SEQ_FIXED)
|
|
||||||
|| (pADC_RegInitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
|
|
||||||
)
|
|
||||||
{
|
|
||||||
assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(pADC_RegInitStruct->SequencerDiscont));
|
|
||||||
|
|
||||||
/* ADC group regular continuous mode and discontinuous mode */
|
|
||||||
/* can not be enabled simultenaeously */
|
|
||||||
assert_param((pADC_RegInitStruct->ContinuousMode == LL_ADC_REG_CONV_SINGLE)
|
|
||||||
|| (pADC_RegInitStruct->SequencerDiscont == LL_ADC_REG_SEQ_DISCONT_DISABLE));
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Note: Hardware constraint (refer to description of this function): */
|
|
||||||
/* ADC instance must be disabled. */
|
|
||||||
if (LL_ADC_IsEnabled(ADCx) == 0UL)
|
|
||||||
{
|
|
||||||
/* Configuration of ADC hierarchical scope: */
|
|
||||||
/* - ADC group regular */
|
|
||||||
/* - Set ADC group regular trigger source */
|
|
||||||
/* - Set ADC group regular sequencer length */
|
|
||||||
/* - Set ADC group regular sequencer discontinuous mode */
|
|
||||||
/* - Set ADC group regular continuous mode */
|
|
||||||
/* - Set ADC group regular conversion data transfer: no transfer or */
|
|
||||||
/* transfer by DMA, and DMA requests mode */
|
|
||||||
/* - Set ADC group regular overrun behavior */
|
|
||||||
/* Note: On this STM32 series, ADC trigger edge is set to value 0x0 by */
|
|
||||||
/* setting of trigger source to SW start. */
|
|
||||||
if ((LL_ADC_REG_GetSequencerConfigurable(ADCx) == LL_ADC_REG_SEQ_FIXED)
|
|
||||||
|| (pADC_RegInitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
|
|
||||||
)
|
|
||||||
{
|
|
||||||
/* Case of sequencer mode fixed
|
|
||||||
or sequencer length >= 2 ranks with sequencer mode fully configurable:
|
|
||||||
discontinuous mode configured */
|
|
||||||
MODIFY_REG(ADCx->CFGR1,
|
|
||||||
ADC_CFGR1_EXTSEL
|
|
||||||
| ADC_CFGR1_EXTEN
|
|
||||||
| ADC_CFGR1_DISCEN
|
|
||||||
| ADC_CFGR1_CONT
|
|
||||||
| ADC_CFGR1_DMAEN
|
|
||||||
| ADC_CFGR1_DMACFG
|
|
||||||
| ADC_CFGR1_OVRMOD
|
|
||||||
,
|
|
||||||
pADC_RegInitStruct->TriggerSource
|
|
||||||
| pADC_RegInitStruct->SequencerDiscont
|
|
||||||
| pADC_RegInitStruct->ContinuousMode
|
|
||||||
| pADC_RegInitStruct->DMATransfer
|
|
||||||
| pADC_RegInitStruct->Overrun
|
|
||||||
);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* Case of sequencer mode fully configurable
|
|
||||||
and sequencer length 1 rank (sequencer disabled):
|
|
||||||
discontinuous mode discarded (fixed to disable) */
|
|
||||||
MODIFY_REG(ADCx->CFGR1,
|
|
||||||
ADC_CFGR1_EXTSEL
|
|
||||||
| ADC_CFGR1_EXTEN
|
|
||||||
| ADC_CFGR1_DISCEN
|
|
||||||
| ADC_CFGR1_CONT
|
|
||||||
| ADC_CFGR1_DMAEN
|
|
||||||
| ADC_CFGR1_DMACFG
|
|
||||||
| ADC_CFGR1_OVRMOD
|
|
||||||
,
|
|
||||||
pADC_RegInitStruct->TriggerSource
|
|
||||||
| LL_ADC_REG_SEQ_DISCONT_DISABLE
|
|
||||||
| pADC_RegInitStruct->ContinuousMode
|
|
||||||
| pADC_RegInitStruct->DMATransfer
|
|
||||||
| pADC_RegInitStruct->Overrun
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Set ADC group regular sequencer length */
|
|
||||||
if (LL_ADC_REG_GetSequencerConfigurable(ADCx) != LL_ADC_REG_SEQ_FIXED)
|
|
||||||
{
|
|
||||||
LL_ADC_REG_SetSequencerLength(ADCx, pADC_RegInitStruct->SequencerLength);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* Initialization error: ADC instance is not disabled. */
|
|
||||||
status = ERROR;
|
|
||||||
}
|
|
||||||
return status;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Set each @ref LL_ADC_REG_InitTypeDef field to default value.
|
|
||||||
* @param pADC_RegInitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
|
|
||||||
* whose fields will be set to default values.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *pADC_RegInitStruct)
|
|
||||||
{
|
|
||||||
/* Set pADC_RegInitStruct fields to default values */
|
|
||||||
/* Set fields of ADC group regular */
|
|
||||||
/* Note: On this STM32 series, ADC trigger edge is set to value 0x0 by */
|
|
||||||
/* setting of trigger source to SW start. */
|
|
||||||
pADC_RegInitStruct->TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
|
|
||||||
pADC_RegInitStruct->SequencerLength = LL_ADC_REG_SEQ_SCAN_DISABLE;
|
|
||||||
pADC_RegInitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
|
|
||||||
pADC_RegInitStruct->ContinuousMode = LL_ADC_REG_CONV_SINGLE;
|
|
||||||
pADC_RegInitStruct->DMATransfer = LL_ADC_REG_DMA_TRANSFER_NONE;
|
|
||||||
pADC_RegInitStruct->Overrun = LL_ADC_REG_OVR_DATA_OVERWRITTEN;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#endif /* ADC1 */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#endif /* USE_FULL_LL_DRIVER */
|
|
||||||
267
blk_box_bc.ioc
267
blk_box_bc.ioc
@ -1,44 +1,7 @@
|
|||||||
#MicroXplorer Configuration settings - do not modify
|
#MicroXplorer Configuration settings - do not modify
|
||||||
ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_8
|
|
||||||
ADC1.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_9
|
|
||||||
ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV2
|
|
||||||
ADC1.ContinuousConvMode=ENABLE
|
|
||||||
ADC1.DMAContinuousRequests=ENABLE
|
|
||||||
ADC1.EOCSelection=ADC_EOC_SEQ_CONV
|
|
||||||
ADC1.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,NbrOfConversionFlag,master,SelectedChannel,ContinuousConvMode,DMAContinuousRequests,NbrOfConversion,SamplingTimeCommon1,SamplingTimeCommon2,ClockPrescaler,EOCSelection,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,Overrun
|
|
||||||
ADC1.NbrOfConversion=2
|
|
||||||
ADC1.NbrOfConversionFlag=1
|
|
||||||
ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
|
|
||||||
ADC1.Rank-2\#ChannelRegularConversion=1
|
|
||||||
ADC1.Rank-4\#ChannelRegularConversion=2
|
|
||||||
ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLINGTIME_COMMON_1
|
|
||||||
ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLINGTIME_COMMON_1
|
|
||||||
ADC1.SamplingTimeCommon1=ADC_SAMPLETIME_79CYCLES_5
|
|
||||||
ADC1.SamplingTimeCommon2=ADC_SAMPLETIME_79CYCLES_5
|
|
||||||
ADC1.SelectedChannel=ADC_CHANNEL_8|ADC_CHANNEL_9
|
|
||||||
ADC1.master=1
|
|
||||||
CAD.formats=
|
CAD.formats=
|
||||||
CAD.pinconfig=
|
CAD.pinconfig=
|
||||||
CAD.provider=
|
CAD.provider=
|
||||||
Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
|
|
||||||
Dma.ADC1.0.EventEnable=DISABLE
|
|
||||||
Dma.ADC1.0.Instance=DMA1_Channel1
|
|
||||||
Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
|
|
||||||
Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
|
|
||||||
Dma.ADC1.0.Mode=DMA_CIRCULAR
|
|
||||||
Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
|
|
||||||
Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
|
|
||||||
Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
|
||||||
Dma.ADC1.0.Priority=DMA_PRIORITY_LOW
|
|
||||||
Dma.ADC1.0.RequestNumber=1
|
|
||||||
Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
|
||||||
Dma.ADC1.0.SignalID=NONE
|
|
||||||
Dma.ADC1.0.SyncEnable=DISABLE
|
|
||||||
Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
|
||||||
Dma.ADC1.0.SyncRequestNumber=1
|
|
||||||
Dma.ADC1.0.SyncSignalID=NONE
|
|
||||||
Dma.Request0=ADC1
|
|
||||||
Dma.RequestsNb=1
|
|
||||||
File.Version=6
|
File.Version=6
|
||||||
GPIO.groupedBy=Group By Peripherals
|
GPIO.groupedBy=Group By Peripherals
|
||||||
I2C1.IPParameters=Timing,OwnAddress
|
I2C1.IPParameters=Timing,OwnAddress
|
||||||
@ -47,68 +10,59 @@ I2C1.Timing=0x2000090E
|
|||||||
KeepUserPlacement=false
|
KeepUserPlacement=false
|
||||||
Mcu.CPN=STM32G070CBT6
|
Mcu.CPN=STM32G070CBT6
|
||||||
Mcu.Family=STM32G0
|
Mcu.Family=STM32G0
|
||||||
Mcu.IP0=ADC1
|
Mcu.IP0=I2C1
|
||||||
Mcu.IP1=DMA
|
Mcu.IP1=NVIC
|
||||||
Mcu.IP2=I2C1
|
Mcu.IP2=RCC
|
||||||
Mcu.IP3=NVIC
|
Mcu.IP3=SPI1
|
||||||
Mcu.IP4=RCC
|
Mcu.IP4=SYS
|
||||||
Mcu.IP5=SPI1
|
Mcu.IP5=USART2
|
||||||
Mcu.IP6=SYS
|
Mcu.IPNb=6
|
||||||
Mcu.IP7=USART2
|
|
||||||
Mcu.IPNb=8
|
|
||||||
Mcu.Name=STM32G070CBTx
|
Mcu.Name=STM32G070CBTx
|
||||||
Mcu.Package=LQFP48
|
Mcu.Package=LQFP48
|
||||||
Mcu.Pin0=PC13
|
Mcu.Pin0=PF0-OSC_IN (PF0)
|
||||||
Mcu.Pin1=PC14-OSC32_IN (PC14)
|
Mcu.Pin1=PF1-OSC_OUT (PF1)
|
||||||
Mcu.Pin10=PA5
|
Mcu.Pin10=PB1
|
||||||
Mcu.Pin11=PA6
|
Mcu.Pin11=PB2
|
||||||
Mcu.Pin12=PA7
|
Mcu.Pin12=PB10
|
||||||
Mcu.Pin13=PB0
|
Mcu.Pin13=PB11
|
||||||
Mcu.Pin14=PB1
|
Mcu.Pin14=PB15
|
||||||
Mcu.Pin15=PB2
|
Mcu.Pin15=PA8
|
||||||
Mcu.Pin16=PB10
|
Mcu.Pin16=PA9
|
||||||
Mcu.Pin17=PB11
|
Mcu.Pin17=PC6
|
||||||
Mcu.Pin18=PB12
|
Mcu.Pin18=PC7
|
||||||
Mcu.Pin19=PB13
|
Mcu.Pin19=PA10
|
||||||
Mcu.Pin2=PC15-OSC32_OUT (PC15)
|
Mcu.Pin2=PA1
|
||||||
Mcu.Pin20=PB14
|
Mcu.Pin20=PA11 [PA9]
|
||||||
Mcu.Pin21=PA8
|
Mcu.Pin21=PA12 [PA10]
|
||||||
Mcu.Pin22=PA9
|
Mcu.Pin22=PA13
|
||||||
Mcu.Pin23=PC6
|
Mcu.Pin23=PA14-BOOT0
|
||||||
Mcu.Pin24=PC7
|
Mcu.Pin24=PA15
|
||||||
Mcu.Pin25=PA10
|
Mcu.Pin25=PD0
|
||||||
Mcu.Pin26=PA11 [PA9]
|
Mcu.Pin26=PD1
|
||||||
Mcu.Pin27=PA12 [PA10]
|
Mcu.Pin27=PD2
|
||||||
Mcu.Pin28=PA13
|
Mcu.Pin28=PD3
|
||||||
Mcu.Pin29=PA14-BOOT0
|
Mcu.Pin29=PB3
|
||||||
Mcu.Pin3=PF0-OSC_IN (PF0)
|
Mcu.Pin3=PA2
|
||||||
Mcu.Pin30=PA15
|
Mcu.Pin30=PB4
|
||||||
Mcu.Pin31=PD0
|
Mcu.Pin31=PB5
|
||||||
Mcu.Pin32=PD1
|
Mcu.Pin32=PB6
|
||||||
Mcu.Pin33=PD2
|
Mcu.Pin33=PB7
|
||||||
Mcu.Pin34=PD3
|
Mcu.Pin34=PB8
|
||||||
Mcu.Pin35=PB3
|
Mcu.Pin35=PB9
|
||||||
Mcu.Pin36=PB4
|
Mcu.Pin36=VP_SYS_VS_Systick
|
||||||
Mcu.Pin37=PB5
|
Mcu.Pin37=VP_SYS_VS_DBSignals
|
||||||
Mcu.Pin38=PB6
|
Mcu.Pin4=PA3
|
||||||
Mcu.Pin39=PB7
|
Mcu.Pin5=PA4
|
||||||
Mcu.Pin4=PF1-OSC_OUT (PF1)
|
Mcu.Pin6=PA5
|
||||||
Mcu.Pin40=PB8
|
Mcu.Pin7=PA6
|
||||||
Mcu.Pin41=PB9
|
Mcu.Pin8=PA7
|
||||||
Mcu.Pin42=VP_SYS_VS_Systick
|
Mcu.Pin9=PB0
|
||||||
Mcu.Pin43=VP_SYS_VS_DBSignals
|
Mcu.PinsNb=38
|
||||||
Mcu.Pin5=PA0
|
|
||||||
Mcu.Pin6=PA1
|
|
||||||
Mcu.Pin7=PA2
|
|
||||||
Mcu.Pin8=PA3
|
|
||||||
Mcu.Pin9=PA4
|
|
||||||
Mcu.PinsNb=44
|
|
||||||
Mcu.ThirdPartyNb=0
|
Mcu.ThirdPartyNb=0
|
||||||
Mcu.UserConstants=
|
Mcu.UserConstants=
|
||||||
Mcu.UserName=STM32G070CBTx
|
Mcu.UserName=STM32G070CBTx
|
||||||
MxCube.Version=6.11.1
|
MxCube.Version=6.11.1
|
||||||
MxDb.Version=DB.6.0.111
|
MxDb.Version=DB.6.0.111
|
||||||
NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
|
||||||
NVIC.ForceEnableDMAVector=true
|
NVIC.ForceEnableDMAVector=true
|
||||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
NVIC.I2C1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
NVIC.I2C1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||||
@ -116,26 +70,22 @@ NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
|||||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||||
NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true\:false
|
NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true\:false
|
||||||
PA0.GPIOParameters=GPIO_Label
|
PA1.GPIOParameters=GPIO_PuPd,GPIO_Label
|
||||||
PA0.GPIO_Label=TOUCH
|
|
||||||
PA0.Locked=true
|
|
||||||
PA0.Signal=GPIO_Input
|
|
||||||
PA1.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
|
||||||
PA1.GPIO_Label=INT
|
PA1.GPIO_Label=INT
|
||||||
PA1.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
|
PA1.GPIO_PuPd=GPIO_NOPULL
|
||||||
PA1.GPIO_PuPd=GPIO_PULLUP
|
|
||||||
PA1.Locked=true
|
PA1.Locked=true
|
||||||
PA1.PinState=GPIO_PIN_SET
|
PA1.Signal=EVENTOUT
|
||||||
PA1.Signal=GPIO_Output
|
|
||||||
PA10.Locked=true
|
PA10.Locked=true
|
||||||
PA10.Mode=I2C
|
PA10.Mode=I2C
|
||||||
PA10.Signal=I2C1_SDA
|
PA10.Signal=I2C1_SDA
|
||||||
PA11\ [PA9].GPIOParameters=GPIO_Label
|
PA11\ [PA9].GPIOParameters=GPIO_PuPd,GPIO_Label
|
||||||
PA11\ [PA9].GPIO_Label=SWT1
|
PA11\ [PA9].GPIO_Label=ROW1
|
||||||
|
PA11\ [PA9].GPIO_PuPd=GPIO_PULLUP
|
||||||
PA11\ [PA9].Locked=true
|
PA11\ [PA9].Locked=true
|
||||||
PA11\ [PA9].Signal=GPIO_Input
|
PA11\ [PA9].Signal=GPIO_Input
|
||||||
PA12\ [PA10].GPIOParameters=GPIO_Label
|
PA12\ [PA10].GPIOParameters=GPIO_PuPd,GPIO_Label
|
||||||
PA12\ [PA10].GPIO_Label=SWT4
|
PA12\ [PA10].GPIO_Label=ROW2
|
||||||
|
PA12\ [PA10].GPIO_PuPd=GPIO_PULLUP
|
||||||
PA12\ [PA10].Locked=true
|
PA12\ [PA10].Locked=true
|
||||||
PA12\ [PA10].Signal=GPIO_Input
|
PA12\ [PA10].Signal=GPIO_Input
|
||||||
PA13.Locked=true
|
PA13.Locked=true
|
||||||
@ -143,8 +93,9 @@ PA13.Mode=Serial_Wire
|
|||||||
PA13.Signal=SYS_SWDIO
|
PA13.Signal=SYS_SWDIO
|
||||||
PA14-BOOT0.Mode=Serial_Wire
|
PA14-BOOT0.Mode=Serial_Wire
|
||||||
PA14-BOOT0.Signal=SYS_SWCLK
|
PA14-BOOT0.Signal=SYS_SWCLK
|
||||||
PA15.GPIOParameters=GPIO_Label
|
PA15.GPIOParameters=GPIO_PuPd,GPIO_Label
|
||||||
PA15.GPIO_Label=SWT3
|
PA15.GPIO_Label=ROW3
|
||||||
|
PA15.GPIO_PuPd=GPIO_PULLUP
|
||||||
PA15.Locked=true
|
PA15.Locked=true
|
||||||
PA15.Signal=GPIO_Input
|
PA15.Signal=GPIO_Input
|
||||||
PA2.Locked=true
|
PA2.Locked=true
|
||||||
@ -166,50 +117,41 @@ PA6.Signal=SPI1_MISO
|
|||||||
PA7.Locked=true
|
PA7.Locked=true
|
||||||
PA7.Mode=Full_Duplex_Master
|
PA7.Mode=Full_Duplex_Master
|
||||||
PA7.Signal=SPI1_MOSI
|
PA7.Signal=SPI1_MOSI
|
||||||
PA8.GPIOParameters=GPIO_PuPd,GPIO_Label
|
PA8.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||||
PA8.GPIO_Label=SWT2
|
PA8.GPIO_Label=COL2
|
||||||
PA8.GPIO_PuPd=GPIO_PULLUP
|
PA8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
|
||||||
|
PA8.GPIO_PuPd=GPIO_NOPULL
|
||||||
PA8.Locked=true
|
PA8.Locked=true
|
||||||
PA8.Signal=GPIO_Input
|
PA8.PinState=GPIO_PIN_SET
|
||||||
|
PA8.Signal=GPIO_Output
|
||||||
PA9.Locked=true
|
PA9.Locked=true
|
||||||
PA9.Mode=I2C
|
PA9.Mode=I2C
|
||||||
PA9.Signal=I2C1_SCL
|
PA9.Signal=I2C1_SCL
|
||||||
PB0.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode
|
PB0.GPIOParameters=GPIO_Label
|
||||||
PB0.GPIO_Label=HALL
|
PB0.GPIO_Label=HALL
|
||||||
PB0.GPIO_Mode=GPIO_MODE_ANALOG
|
|
||||||
PB0.GPIO_PuPd=GPIO_NOPULL
|
|
||||||
PB0.Locked=true
|
PB0.Locked=true
|
||||||
PB0.Mode=IN8
|
PB0.Signal=GPIO_Analog
|
||||||
PB0.Signal=ADC1_IN8
|
PB1.GPIOParameters=GPIO_Label
|
||||||
PB1.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode
|
PB1.GPIO_Label=CLOSE
|
||||||
PB1.GPIO_Label=CLOSE_HALL
|
|
||||||
PB1.GPIO_Mode=GPIO_MODE_ANALOG
|
|
||||||
PB1.GPIO_PuPd=GPIO_NOPULL
|
|
||||||
PB1.Locked=true
|
PB1.Locked=true
|
||||||
PB1.Mode=IN9
|
PB1.Signal=GPIO_Analog
|
||||||
PB1.Signal=ADC1_IN9
|
|
||||||
PB10.GPIOParameters=GPIO_Label
|
PB10.GPIOParameters=GPIO_Label
|
||||||
PB10.GPIO_Label=DEV4
|
PB10.GPIO_Label=SWT1
|
||||||
PB10.Locked=true
|
PB10.Locked=true
|
||||||
PB10.Signal=GPIO_Output
|
PB10.Signal=GPIO_Input
|
||||||
PB11.GPIOParameters=GPIO_Label
|
PB11.GPIOParameters=GPIO_Label
|
||||||
PB11.GPIO_Label=DEV3
|
PB11.GPIO_Label=SWT2
|
||||||
PB11.Locked=true
|
PB11.Locked=true
|
||||||
PB11.Signal=GPIO_Output
|
PB11.Signal=GPIO_Input
|
||||||
PB12.GPIOParameters=GPIO_Label
|
PB15.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||||
PB12.GPIO_Label=DEV2
|
PB15.GPIO_Label=COL1
|
||||||
PB12.Locked=true
|
PB15.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
|
||||||
PB12.Signal=GPIO_Output
|
PB15.GPIO_PuPd=GPIO_NOPULL
|
||||||
PB13.GPIOParameters=GPIO_Label
|
PB15.Locked=true
|
||||||
PB13.GPIO_Label=DEV1
|
PB15.PinState=GPIO_PIN_SET
|
||||||
PB13.Locked=true
|
PB15.Signal=GPIO_Output
|
||||||
PB13.Signal=GPIO_Output
|
|
||||||
PB14.GPIOParameters=GPIO_Label
|
|
||||||
PB14.GPIO_Label=DEV0
|
|
||||||
PB14.Locked=true
|
|
||||||
PB14.Signal=GPIO_Output
|
|
||||||
PB2.GPIOParameters=GPIO_Label
|
PB2.GPIOParameters=GPIO_Label
|
||||||
PB2.GPIO_Label=KP_C1
|
PB2.GPIO_Label=RFID_RST
|
||||||
PB2.Locked=true
|
PB2.Locked=true
|
||||||
PB2.Signal=GPIO_Output
|
PB2.Signal=GPIO_Output
|
||||||
PB3.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
PB3.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||||
@ -253,44 +195,35 @@ PB9.GPIO_Label=KP_R4
|
|||||||
PB9.GPIO_PuPd=GPIO_PULLUP
|
PB9.GPIO_PuPd=GPIO_PULLUP
|
||||||
PB9.Locked=true
|
PB9.Locked=true
|
||||||
PB9.Signal=GPIO_Input
|
PB9.Signal=GPIO_Input
|
||||||
PC13.GPIOParameters=GPIO_Label
|
|
||||||
PC13.GPIO_Label=COL1
|
|
||||||
PC13.Locked=true
|
|
||||||
PC13.Signal=GPIO_Input
|
|
||||||
PC14-OSC32_IN\ (PC14).GPIOParameters=GPIO_Label
|
|
||||||
PC14-OSC32_IN\ (PC14).GPIO_Label=COL2
|
|
||||||
PC14-OSC32_IN\ (PC14).Locked=true
|
|
||||||
PC14-OSC32_IN\ (PC14).Signal=GPIO_Input
|
|
||||||
PC15-OSC32_OUT\ (PC15).GPIOParameters=GPIO_Label
|
|
||||||
PC15-OSC32_OUT\ (PC15).GPIO_Label=COL3
|
|
||||||
PC15-OSC32_OUT\ (PC15).Locked=true
|
|
||||||
PC15-OSC32_OUT\ (PC15).Signal=GPIO_Input
|
|
||||||
PC6.GPIOParameters=GPIO_Label
|
PC6.GPIOParameters=GPIO_Label
|
||||||
PC6.GPIO_Label=RFID_IRQ
|
PC6.GPIO_Label=SWT3
|
||||||
PC6.Locked=true
|
PC6.Locked=true
|
||||||
PC6.Signal=GPIO_Input
|
PC6.Signal=GPIO_Input
|
||||||
PC7.GPIOParameters=GPIO_Label
|
PC7.GPIOParameters=GPIO_Label
|
||||||
PC7.GPIO_Label=RFID_RST
|
PC7.GPIO_Label=SWT4
|
||||||
PC7.Locked=true
|
PC7.Locked=true
|
||||||
PC7.Signal=GPIO_Output
|
PC7.Signal=GPIO_Input
|
||||||
PD0.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
PD0.GPIOParameters=GPIO_Label
|
||||||
PD0.GPIO_Label=ROW1
|
PD0.GPIO_Label=ROW4
|
||||||
PD0.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
|
|
||||||
PD0.GPIO_PuPd=GPIO_NOPULL
|
|
||||||
PD0.Locked=true
|
PD0.Locked=true
|
||||||
PD0.PinState=GPIO_PIN_SET
|
PD0.Signal=GPIO_Input
|
||||||
PD0.Signal=GPIO_Output
|
PD1.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||||
PD1.GPIOParameters=GPIO_Label
|
PD1.GPIO_Label=COL3
|
||||||
PD1.GPIO_Label=ROW2
|
PD1.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
|
||||||
|
PD1.GPIO_PuPd=GPIO_NOPULL
|
||||||
PD1.Locked=true
|
PD1.Locked=true
|
||||||
|
PD1.PinState=GPIO_PIN_SET
|
||||||
PD1.Signal=GPIO_Output
|
PD1.Signal=GPIO_Output
|
||||||
PD2.GPIOParameters=GPIO_Label
|
PD2.GPIOParameters=GPIO_Label
|
||||||
PD2.GPIO_Label=ROW3
|
PD2.GPIO_Label=TOUCH
|
||||||
PD2.Locked=true
|
PD2.Locked=true
|
||||||
PD2.Signal=GPIO_Output
|
PD2.Signal=GPIO_Input
|
||||||
PD3.GPIOParameters=GPIO_Label
|
PD3.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||||
PD3.GPIO_Label=ROW4
|
PD3.GPIO_Label=KP_C1
|
||||||
|
PD3.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
|
||||||
|
PD3.GPIO_PuPd=GPIO_NOPULL
|
||||||
PD3.Locked=true
|
PD3.Locked=true
|
||||||
|
PD3.PinState=GPIO_PIN_SET
|
||||||
PD3.Signal=GPIO_Output
|
PD3.Signal=GPIO_Output
|
||||||
PF0-OSC_IN\ (PF0).Locked=true
|
PF0-OSC_IN\ (PF0).Locked=true
|
||||||
PF0-OSC_IN\ (PF0).Mode=HSE-External-Oscillator
|
PF0-OSC_IN\ (PF0).Mode=HSE-External-Oscillator
|
||||||
@ -329,7 +262,7 @@ ProjectManager.ToolChainLocation=
|
|||||||
ProjectManager.UAScriptAfterPath=
|
ProjectManager.UAScriptAfterPath=
|
||||||
ProjectManager.UAScriptBeforePath=
|
ProjectManager.UAScriptBeforePath=
|
||||||
ProjectManager.UnderRoot=true
|
ProjectManager.UnderRoot=true
|
||||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_USART2_UART_Init-USART2-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true
|
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_I2C1_Init-I2C1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_USART2_UART_Init-USART2-false-HAL-true
|
||||||
RCC.ADCFreq_Value=8000000
|
RCC.ADCFreq_Value=8000000
|
||||||
RCC.AHBFreq_Value=8000000
|
RCC.AHBFreq_Value=8000000
|
||||||
RCC.APBFreq_Value=8000000
|
RCC.APBFreq_Value=8000000
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user